JP5579996B2 - Solder joining method - Google Patents

Solder joining method Download PDF

Info

Publication number
JP5579996B2
JP5579996B2 JP2009094889A JP2009094889A JP5579996B2 JP 5579996 B2 JP5579996 B2 JP 5579996B2 JP 2009094889 A JP2009094889 A JP 2009094889A JP 2009094889 A JP2009094889 A JP 2009094889A JP 5579996 B2 JP5579996 B2 JP 5579996B2
Authority
JP
Japan
Prior art keywords
thermosetting resin
circuit board
paste
resin
solder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2009094889A
Other languages
Japanese (ja)
Other versions
JP2010245434A (en
Inventor
直倫 大橋
新 岸
敦史 山口
秀規 宮川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Panasonic Holdings Corp
Original Assignee
Panasonic Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp, Matsushita Electric Industrial Co Ltd filed Critical Panasonic Corp
Priority to JP2009094889A priority Critical patent/JP5579996B2/en
Publication of JP2010245434A publication Critical patent/JP2010245434A/en
Application granted granted Critical
Publication of JP5579996B2 publication Critical patent/JP5579996B2/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector

Description

本発明は、はんだ接合方法およびはんだ接合構造体に関し、さらに詳しくはBGA型パッケージ部品等の電子部品を電子回路基板上にはんだ接合する方法、およびそれによるはんだ接合構造体に関するものである。   The present invention relates to a solder joint method and a solder joint structure, and more particularly, to a method for solder joining an electronic component such as a BGA type package component on an electronic circuit board, and a solder joint structure using the method.

電子部品を電子回路基板上に搭載し、接続する方法として、はんだ接合が広く用いられている。これまではんだ接合部の信頼性を高めるためや、基板上にフラックス残渣を残さないようにするために、電子部品として電極にはんだバンプが備わったBGA型パッケージ部品を用い、この電子部品と電子回路基板との間にフラックス成分を有する熱硬化性樹脂を供給し、リフロー加熱させることで、はんだ接合と樹脂の硬化とを同時に行うという方法が知られている(例えば、特許文献1参照)。   Solder bonding is widely used as a method for mounting and connecting electronic components on an electronic circuit board. In order to increase the reliability of solder joints and not leave flux residue on the substrate, BGA type package parts with electrodes with solder bumps have been used as electronic parts. A method is known in which soldering and resin curing are simultaneously performed by supplying a thermosetting resin having a flux component between the substrate and reflow heating (see, for example, Patent Document 1).

特開平4−280443号公報JP-A-4-280443

しかしながら、このような接合方法では、リフロー加熱時に、熱硬化性樹脂の熱だれ(加熱時に軟化し流動性を示す現象)によって、樹脂がはんだバンプと電子回路基板の電極との間に入り込みやすいことが明らかとなった。このような現象が生じると、はんだ接合部の接合性が安定せず、接続不良となる。   However, in such a joining method, during reflow heating, the resin tends to enter between the solder bumps and the electrodes of the electronic circuit board due to the heat dripping of the thermosetting resin (a phenomenon that softens and exhibits fluidity during heating). Became clear. When such a phenomenon occurs, the bondability of the solder joint is not stable, resulting in poor connection.

本発明はこのような問題に鑑みてなされたもので、はんだ接合性が安定であり、かつ接合部の高い信頼性を確保することができるはんだ接合方法と、それによるはんだ接合構造体とを提供することを目的とする。   The present invention has been made in view of such problems, and provides a solder joint method capable of ensuring stable solder joint and ensuring high reliability of the joint portion, and a solder joint structure using the solder joint structure. The purpose is to do.

本発明の電子部品のはんだ接合方法は、
突起電極を有する電子部品とを電子回路基板とはんだで接合する方法であって、
電子回路基板の電極部に、導電性フィラー、フラックス、第1の熱硬化性樹脂、およびこの第1の熱硬化性樹脂を硬化させる硬化剤を含む導電性ペーストを供給する工程と、
電子部品に、第1の熱硬化性樹脂より粘度が低い第2の熱硬化性樹脂、およびこの第2の熱硬化性樹脂を硬化させる硬化剤を含む絶縁性樹脂ペーストを供給する工程と、
電子部品を電子回路基板上に搭載する工程と、
加熱によって、突起電極の一部のみを溶かすと共に導電性フィラーを溶融させ、且つ、第1および第2の熱硬化性樹脂を硬化させる工程
とを有し、前記電子部品の突起電極および前記導電性フィラーが、Snと、Bi、In、Ag、ZnおよびCuからなる群から選ばれる2種以上の元素との組合せからなる組成を有する半田材料からなり、
第1および第2の熱硬化性樹脂を硬化させる工程では、第1の熱硬化性樹脂を突起電極の周囲にて硬化させ、更に第2の熱硬化性樹脂を第1の熱硬化性樹脂の周囲にて硬化させる。
The method for soldering electronic components according to the present invention includes:
A method of joining an electronic component having a protruding electrode to an electronic circuit board with solder,
Supplying a conductive paste containing a conductive filler, a flux, a first thermosetting resin, and a curing agent for curing the first thermosetting resin to the electrode portion of the electronic circuit board;
Supplying an electronic component with an insulating resin paste containing a second thermosetting resin having a viscosity lower than that of the first thermosetting resin and a curing agent for curing the second thermosetting resin;
Mounting electronic components on an electronic circuit board;
A step of melting only a part of the protruding electrode by heating, melting the conductive filler, and curing the first and second thermosetting resins, and the protruding electrode of the electronic component and the conductive property fillers, Ri Do a solder material having a Sn, Bi, an in, Ag, a composition comprising a combination of two or more elements selected from the group consisting of Zn and Cu,
In the step of curing the first and second thermosetting resins, the first thermosetting resin is cured around the protruding electrodes, and further the second thermosetting resin is made of the first thermosetting resin. Ru was cured by the surrounding.

また、上述の方法において、フラックスは主成分が有機酸またはロジンであり、その導電性ペーストにおける含有比率が1〜15質量%の範囲内であることが好ましい。   Moreover, in the above-mentioned method, it is preferable that the main component of the flux is an organic acid or rosin, and the content ratio in the conductive paste is in the range of 1 to 15% by mass.

さらにまた、上述の方法において、第1の熱硬化性樹脂はビスフェノールF型エポキシ樹脂であり、その導電性ペーストにおける含有比率が5〜50質量%の範囲内であることが好ましい。 Furthermore, in the above-described method, the first thermosetting resin is a bisphenol F-type epoxy resin, and the content ratio in the conductive paste is preferably in the range of 5 to 50% by mass.

上述の方法において、導電性ペーストにおける、アルコール、エーテル、ケトン、アセタールまたはエステル化合物の含有比率が2質量%以下であることが好ましい。   In the above-described method, the content ratio of alcohol, ether, ketone, acetal or ester compound in the conductive paste is preferably 2% by mass or less.

上述の方法において、第2の熱硬化性樹脂はビスフェノールF型エポキシ樹脂であることが好ましい。 In the above-described method, the second thermosetting resin is preferably a bisphenol F type epoxy resin.

上述の方法において、絶縁性樹脂ペーストのフラックス含有比率が20質量%以下であることが好ましい。   In the above-mentioned method, it is preferable that the flux content ratio of the insulating resin paste is 20% by mass or less.

本発明の方法によれば、導電性ペーストを電子回路基板の電極部に供給することで、導電性ペーストのタック力によってBGA型パッケージ部品などの電子部品が基板上に固定される。このため、加熱時に、絶縁性樹脂ペーストの熱だれによる電子部品の位置ずれや電子部品の電極と基板の電極部との間への絶縁性樹脂ペーストの入り込みが発生せず、優れたはんだ接合性が得られる。   According to the method of the present invention, by supplying the conductive paste to the electrode portion of the electronic circuit board, an electronic component such as a BGA type package component is fixed on the substrate by the tack force of the conductive paste. For this reason, during heating, the position of the electronic component due to thermal dripping of the insulating resin paste and the penetration of the insulating resin paste between the electrode of the electronic component and the electrode part of the substrate do not occur, and excellent solderability Is obtained.

さらに、導電性ペーストに関しては、熱硬化性樹脂中に、フラックス成分などの粉体成分を分散させることで、アルコール、エーテル、ケトン、アセタール、またはエステル化合物などの溶剤の配合比率を導電性ペーストに対して、2質量%以下に抑えることができる。このように溶剤の配合量を低減することによって、溶剤の気化による樹脂中のボイド発生が少なくなり、信頼性の高い接合部を備えたはんだ接合構造体を得ることができる。   Furthermore, for conductive pastes, the powder components such as flux components are dispersed in the thermosetting resin, so that the blending ratio of the solvent such as alcohol, ether, ketone, acetal, or ester compound is changed to the conductive paste. On the other hand, it can be suppressed to 2% by mass or less. Thus, by reducing the compounding amount of the solvent, generation of voids in the resin due to the evaporation of the solvent is reduced, and a solder joint structure having a highly reliable joint can be obtained.

また、本発明によるはんだ接合構造体においては、はんだ接合部がそれを囲むよう硬化樹脂で覆われた構造とすることによって、衝撃が加えられたときにそれによる応力が緩和される。このため、接合部の耐衝撃特性が向上し、接合部が外部から加えられる衝撃によって損傷を受けるというおそれが軽減される。   In the solder joint structure according to the present invention, the solder joint is covered with a hardened resin so as to surround the joint, so that the stress caused by the impact is alleviated. For this reason, the impact resistance characteristics of the joint portion are improved, and the possibility that the joint portion is damaged by an externally applied impact is reduced.

さらに、はんだ接合部の電子回路基板電極側が硬化樹脂でフィレット状に覆われ、さらにそれとは別種の硬化樹脂で覆われた構造とすることによって、衝撃が加えられたときには、一方の硬化樹脂に亀裂が生じても他方の硬化樹脂がそのブロック体として働くため、1種の樹脂のみで接合部の周囲を覆う場合に比べて、より高い耐衝撃特性を得ることができる。   Furthermore, the structure where the electronic circuit board electrode side of the solder joint is covered with a hardened resin in a fillet shape, and further covered with another type of hardened resin, when an impact is applied, one hardened resin cracks. Even if this occurs, the other cured resin acts as the block body, so that higher impact resistance can be obtained compared to the case where the periphery of the joint is covered with only one kind of resin.

また、絶縁性樹脂ペーストを電子部品側に供給することによって、導電性ペーストが供給されている電子回路基板上に供給する場合に比べて、導電性ペーストおよび絶縁性樹脂ペーストに含まれている熱硬化性樹脂が硬化した後のはんだボール残り量をいちじるしく減少させることができる。   In addition, by supplying the insulating resin paste to the electronic component side, the heat contained in the conductive paste and the insulating resin paste is compared with the case where the conductive paste is supplied onto the electronic circuit board. The remaining amount of solder balls after the curable resin is cured can be remarkably reduced.

絶縁性樹脂ペーストを電子回路基板上に供給した場合には、絶縁性樹脂ペーストを供給する際には、それによって導電性ペーストが押し流され、さらに供給後においては、樹脂だれにより導電性ペーストが押し流されてそれに含まれている導電性フィラーが絶縁性樹脂ペーストに取り込まれる。このため、加熱後に、多量のはんだボールが残存してしまう。   When the insulating resin paste is supplied onto the electronic circuit board, when the insulating resin paste is supplied, the conductive paste is washed away, and after the supply, the conductive paste is washed away by the resin dripping. The conductive filler contained therein is taken into the insulating resin paste. For this reason, a large amount of solder balls remain after heating.

これに対して、絶縁性樹脂ペーストを電子部品側に供給した後、導電性ペーストが供給されている電子回路基板上に電子部品を搭載する本発明の方法によれば、搭載後には絶縁性樹脂ペーストが電子回路基板と電子部品とに働く表面張力によってその位置が保持される。このため、上述のように導電性ペーストを押し流すという現象の発生が抑制され、リフロー加熱後のはんだボール残りが少なくなると考えられる。   In contrast, according to the method of the present invention in which the electronic component is mounted on the electronic circuit board to which the conductive paste is supplied after the insulating resin paste is supplied to the electronic component side, the insulating resin is mounted after the mounting. The position of the paste is maintained by the surface tension acting on the electronic circuit board and the electronic component. For this reason, it is considered that the phenomenon that the conductive paste is swept away is suppressed as described above, and the solder ball remaining after the reflow heating is reduced.

本発明のはんだ接合方法の実施の形態を説明するための断面図である。It is sectional drawing for demonstrating embodiment of the soldering method of this invention. 本発明の実施の形態の方法によるはんだ接合構造体の一例を示す断面図である。It is sectional drawing which shows an example of the soldering structure by the method of embodiment of this invention. 本発明の実施の形態の方法によるはんだ接合構造体の他の例を示す断面図である。It is sectional drawing which shows the other example of the solder joint structure by the method of embodiment of this invention.

以下本発明の実施の形態として、電子部品としてBGA型パッケージ部品を使用し、それを電子回路基板上に実装する方法と、それによるはんだ接合構造体について説明する。   Hereinafter, as an embodiment of the present invention, a method of using a BGA type package component as an electronic component and mounting it on an electronic circuit board, and a solder joint structure using the same will be described.

図1に示すように、電子回路基板1における配線パターンの電極部2上にスクリーン印刷法を用いて導電性ペーストを供給し、所定の厚さの導電性ペースト層3を形成する。導電性ペーストの供給方法としては、スクリーン印刷法に限られるものでなく、ディップ法なども使用することができる。   As shown in FIG. 1, a conductive paste is supplied onto the electrode part 2 of the wiring pattern in the electronic circuit board 1 by using a screen printing method to form a conductive paste layer 3 having a predetermined thickness. The method for supplying the conductive paste is not limited to the screen printing method, and a dipping method or the like can also be used.

BGA型パッケージの電子部品4として、突起電極としてのバンプ電極5を複数個備えた部品を準備する。この電子部品4のバンプ電極5形成面側に、絶縁性樹脂ペーストを供給して、絶縁性樹脂ペースト層6を形成する。絶縁性樹脂ペーストの供給量は、バンプ電極5の頂部が絶縁性樹脂ペースト層6から露出する量とするのが望ましい。絶縁性樹脂ペースト層6を形成するための代表的な方法として、平面基台上に形成した所定の厚さの絶縁性樹脂ペースト膜に電子部品4のバンプ電極5の形成面側を押し付けて、この面上に絶縁性樹脂ペーストを転写する方法、または、スキージもしくはディスペンサーなどを使用して絶縁性樹脂ペーストを塗布する方法をあげることができる。無論、本発明においてはこれらの塗布方法に限られるものではない。   As an electronic component 4 of the BGA type package, a component having a plurality of bump electrodes 5 as protruding electrodes is prepared. An insulating resin paste is supplied to the surface of the electronic component 4 where the bump electrode 5 is formed, and the insulating resin paste layer 6 is formed. The supply amount of the insulating resin paste is preferably set so that the top of the bump electrode 5 is exposed from the insulating resin paste layer 6. As a typical method for forming the insulating resin paste layer 6, the bump electrode 5 forming surface side of the electronic component 4 is pressed against an insulating resin paste film having a predetermined thickness formed on a flat base, A method of transferring the insulating resin paste onto this surface or a method of applying the insulating resin paste using a squeegee or a dispenser can be used. Of course, the present invention is not limited to these coating methods.

次に、電子回路基板1に対して電子部品4をその電極形成面側を対向させ、電子回路基板1の電極部2と、それに対応する電子部品4のバンプ電極5との位置合わせを行った後に、電子部品4を電子回路基板1上に搭載する。次いで、リフロー炉などの加熱炉で全体をはんだの融点以上の温度で加熱する。この加熱によって、導電性ペースト層3中の導電性フィラーが溶融してはんだ付けが行われる。バンプ電極5がはんだボールである場合には、その少なくとも一部分が溶融し、はんだ接合に寄与する。そして、はんだ付け時に、導電性ペースト層3およびに絶縁性樹脂ペースト層6にそれぞれ含まれていた熱硬化性樹脂が硬化する。   Next, the electrode forming surface of the electronic component 4 was opposed to the electronic circuit board 1, and the electrode part 2 of the electronic circuit board 1 and the corresponding bump electrode 5 of the electronic component 4 were aligned. Later, the electronic component 4 is mounted on the electronic circuit board 1. Next, the whole is heated at a temperature equal to or higher than the melting point of the solder in a heating furnace such as a reflow furnace. By this heating, the conductive filler in the conductive paste layer 3 is melted and soldered. When the bump electrode 5 is a solder ball, at least a part of the bump electrode 5 is melted and contributes to solder bonding. At the time of soldering, the thermosetting resin contained in the conductive paste layer 3 and the insulating resin paste layer 6 is cured.

この実施の形態において使用する導電性ペーストには、導電性フィラー、フラックス、熱硬化性樹脂たとえばビスフェノール型エポキシ樹脂、およびその硬化剤を含むペースト材料を使用するのが望ましい。さらに、必要に応じてアルコール、エーテル、ケトン、アセタールまたはエステル化合物などの溶剤成分や、さらには粘度調整やチクソ性付与のための添加剤を追加配合してもよい。   As the conductive paste used in this embodiment, it is desirable to use a conductive filler, a flux, a thermosetting resin such as a bisphenol type epoxy resin, and a paste material containing the curing agent. Furthermore, if necessary, a solvent component such as alcohol, ether, ketone, acetal or ester compound, and further an additive for adjusting viscosity or imparting thixotropy may be added.

導電性フィラーには、Snと、Bi、In、Ag、ZnおよびCuからなる群から選ばれる2種以上の元素の組合せからなる組成の金属成分を含む低融点合金粒子を使用することができる。このような合金粒子に代えて、これら成分から選択した2種以上の金属の粒子を所定比率で混合した材料や、主成分粒子に副成分をめっきすることで所定の組成とした材料を使用することもできる。代表的な組成の合金として、Sn−3.0%Ag−0.5%Cu、Sn−4.0%Ag−0.5%Cu、Sn−3.0%Ag−3.0%Bi、Sn−3.4%Ag−4.8%Bi、Sn−2.0%Ag−0.5%Cu−7.5%Bi、Sn−3.0%Ag−0.5%Cu−10.0%In、Sn−3.0%Ag−15.0%Zn、およびSn−3.0%Ag−9.0%Znなどの低融点合金をあげることができる。   As the conductive filler, low melting point alloy particles containing Sn and a metal component having a composition composed of a combination of two or more elements selected from the group consisting of Bi, In, Ag, Zn and Cu can be used. Instead of such alloy particles, a material in which two or more kinds of metal particles selected from these components are mixed in a predetermined ratio, or a material having a predetermined composition by plating subcomponents on main component particles is used. You can also. As an alloy having a typical composition, Sn-3.0% Ag-0.5% Cu, Sn-4.0% Ag-0.5% Cu, Sn-3.0% Ag-3.0% Bi, Sn-3.4% Ag-4.8% Bi, Sn-2.0% Ag-0.5% Cu-7.5% Bi, Sn-3.0% Ag-0.5% Cu-10. Examples thereof include low melting point alloys such as 0% In, Sn-3.0% Ag-15.0% Zn, and Sn-3.0% Ag-9.0% Zn.

導電性ペーストにおけるフラックスの含有比率は1〜15質量%の範囲内であることが望ましい。その含有比率が1質量%よりも少なくなると、電子回路基板1の電極部2や後述する電子部品のバンプ電極の表面に形成される酸化膜を十分に除去することが困難となり、はんだ接合部の接合性が低下する。また、それが15質量%よりも多くなると、絶縁性樹脂硬化物が脆くなり、クラックを発生するおそれが生じる。   The content ratio of the flux in the conductive paste is desirably in the range of 1 to 15% by mass. When the content ratio is less than 1% by mass, it becomes difficult to sufficiently remove the oxide film formed on the surface of the electrode part 2 of the electronic circuit board 1 and the bump electrode of the electronic component described later, Bondability decreases. Moreover, when it exceeds 15 mass%, insulating resin cured | curing material will become weak and there exists a possibility that a crack may generate | occur | produce.

熱硬化性樹脂の含有比率は、導電性ペーストにおいて5〜50質量%の範囲内であることが望ましい。その含有比率が5質量%より少なくなると、フラックスなどの粉体成分を分散するのに十分でなく、また、50質量%より多くなると、導電性フィラーの溶融時の凝集性が低下する。   The content ratio of the thermosetting resin is desirably in the range of 5 to 50% by mass in the conductive paste. If the content ratio is less than 5% by mass, it is not sufficient to disperse powder components such as flux, and if it exceeds 50% by mass, the cohesiveness at the time of melting of the conductive filler decreases.

溶剤成分については、導電ペーストに必要に応じて加える成分であり、その配合比率は導電性ペーストにおいて2質量%以下とする。   About a solvent component, it is a component added to an electrically conductive paste as needed, and the mixture ratio shall be 2 mass% or less in an electrically conductive paste.

また、絶縁性樹脂ペーストには、熱硬化性樹脂とその硬化剤とを含むペースト材料を使用することが望ましい。必要に応じて金属酸化膜の除去作用を有する有機酸またはロジンよりなるフラックスを、さらには粘度調整・チクソ性付与添加剤を配合してもよい。   Moreover, it is desirable to use a paste material containing a thermosetting resin and its curing agent for the insulating resin paste. If necessary, a flux made of an organic acid or rosin having an action of removing a metal oxide film, and further a viscosity adjusting / thixotropic additive may be blended.

フラックスの含有比率は、絶縁性樹脂ペーストにおいて20質量%以下であることが望ましい。フラックスを20質量%より多く含ませると、それによって硬化後の樹脂が脆くなり、クラックを生じやすくなるので、好ましくない。   The content ratio of the flux is desirably 20% by mass or less in the insulating resin paste. If the flux is contained in an amount of more than 20% by mass, the cured resin becomes brittle and cracks are liable to occur, which is not preferable.

さらに、絶縁性樹脂ペーストに使用する熱硬化性樹脂には、導電性ペーストに使用する熱硬化性樹脂の粘度と同等ないしそれより低い樹脂を使用することできる。より好ましくは、絶縁性樹脂ペーストに使用する熱硬化性樹脂には、導電性ペーストに使用する熱硬化性樹脂の粘度より低い樹脂を使用する。   Furthermore, as the thermosetting resin used for the insulating resin paste, a resin having a viscosity equal to or lower than the viscosity of the thermosetting resin used for the conductive paste can be used. More preferably, as the thermosetting resin used for the insulating resin paste, a resin having a viscosity lower than that of the thermosetting resin used for the conductive paste is used.

なお、電子部品4のバンプ電極5を上述した導電性フリットと同種の低融点合金で形成することも可能であり、バンプ電極および導電性フリットの少なくとも一方をこの低融点合金で形成することによって、電子部品4のバンプ電極4と電子回路基板1の電極部2との良好な接続を得ることができる。   The bump electrode 5 of the electronic component 4 can be formed of the same low melting point alloy as that of the conductive frit described above. By forming at least one of the bump electrode and the conductive frit of this low melting point alloy, Good connection between the bump electrode 4 of the electronic component 4 and the electrode portion 2 of the electronic circuit board 1 can be obtained.

図2および図3に上述の接合方法によるBGA型パッケージ部品と電子回路基板との接合構造の代表例を示す。   2 and 3 show typical examples of the bonding structure between the BGA type package component and the electronic circuit board by the bonding method described above.

図2に示すはんだ接合構造体は、導電性ペーストと絶縁性樹脂ペーストにそれぞれ含まれていた熱硬化性樹脂に粘度が等しいか、あってもその差異が実質的になく、また相溶性のよい樹脂材料を使用したときの例である。   The solder joint structure shown in FIG. 2 has substantially the same viscosity even if the thermosetting resin contained in each of the conductive paste and the insulating resin paste has the same viscosity or has good compatibility. This is an example when a resin material is used.

この構造体においては、BGA型パッケージの電子部品4の電極5と電子回路基板1の電極部2とがはんだによって接合しており、そのはんだ接合部7の周囲を硬化樹脂体8が覆い封止している。硬化樹脂体8は導電性ペーストと絶縁性樹脂ペーストにそれぞれ含まれていた熱硬化性樹脂の混合物の硬化物で形成されている。   In this structure, the electrode 5 of the electronic component 4 of the BGA type package and the electrode portion 2 of the electronic circuit board 1 are joined by solder, and the periphery of the solder joint 7 is covered with the cured resin body 8 and sealed. doing. The cured resin body 8 is formed of a cured product of a mixture of thermosetting resins contained in the conductive paste and the insulating resin paste, respectively.

図3に示すはんだ接合構造体では、絶縁性樹脂ペーストに含まれている熱硬化性樹脂の粘度が導電性ペーストに含まれている熱硬化性樹脂の粘度よりも低い場合や、これら熱硬化性樹脂に非相溶性または相溶性のよくない材料を使用した場合のものである。この構造体においては、導電性ペーストに含まれる熱硬化性樹脂が硬化して、はんだ接合部7の基板電極部2側の周囲を、フィレットを形成するように覆い、さらにこの硬化樹脂体9の周囲を絶縁性樹脂ペースト由来の硬化樹脂体10が覆う形態となる。   In the solder joint structure shown in FIG. 3, when the viscosity of the thermosetting resin contained in the insulating resin paste is lower than the viscosity of the thermosetting resin contained in the conductive paste, these thermosetting resins This is the case where a material incompatible or incompatible with the resin is used. In this structure, the thermosetting resin contained in the conductive paste is cured, and the periphery of the solder joint 7 on the side of the substrate electrode 2 is covered so as to form a fillet. The surroundings are covered with a cured resin body 10 derived from an insulating resin paste.

実施例で使用した電子部品、電子回路基板、導電性ペーストおよび絶縁性樹脂ペーストは次のとおりである。   The electronic parts, the electronic circuit board, the conductive paste, and the insulating resin paste used in the examples are as follows.

電子部品には、電極にSn−3.0%Ag−0.5%Cuの組成のはんだバンプを備えたBGA型パッケージの半導体装置を用いた。そのパッケージサイズは11mm平方で、ランド径が直径0.3mm、ピッチが0.5mm、総バンプ数が441である。   As the electronic component, a BGA type package semiconductor device having solder bumps with Sn-3.0% Ag-0.5% Cu composition as electrodes was used. The package size is 11 mm square, the land diameter is 0.3 mm, the pitch is 0.5 mm, and the total number of bumps is 441.

電子部品のための絶縁性樹脂ペーストには、熱硬化性樹脂としてビスフェノールF型エポキシ樹脂(86質量部)、硬化剤としてイミダゾール系硬化剤(7質量部)、フラックスとしてグルタル酸(7質量部)で構成されたものを用いた。   Insulating resin paste for electronic parts includes bisphenol F type epoxy resin (86 parts by mass) as a thermosetting resin, imidazole-based curing agent (7 parts by mass) as a curing agent, and glutaric acid (7 parts by mass) as a flux. What was comprised was used.

また、電子回路基板には厚さ0.8mmのガラスエポキシ基板を用いた。   A glass epoxy substrate having a thickness of 0.8 mm was used as the electronic circuit board.

電子回路基板のための導電性ペーストには、導電性フィラーがSnAgCu粒子、フラックス成分がグルタル酸、熱硬化性樹脂がビスフェノールF型エポキシ樹脂、その硬化剤がイミダゾール系硬化剤、粘度調整・チクソ性付与添加剤がヒマシ油系チクソ剤、溶剤成分がブチルカルビトールであるペーストを用いた。実施例1、2における導電性ペーストの組成は下記表1のとおりとした。   The conductive paste for the electronic circuit board includes SnAgCu particles as the conductive filler, glutaric acid as the flux component, bisphenol F type epoxy resin as the thermosetting resin, imidazole curing agent as its curing agent, viscosity adjustment / thixotropy A paste in which the additive was a castor oil-based thixotropic agent and the solvent component was butyl carbitol was used. The composition of the conductive paste in Examples 1 and 2 was as shown in Table 1 below.

バンプや導電性フィラーには、上述のSnAgCu系のはんだ材料に代えて、たとえばSnAgBi系、SnAgCuBi系、SnAgCuIn系、SnAgZn系、SnZnBi系、SnCu系、SnAgInBi系またはSnZnAl系のはんだ材料を使用することも可能である。   For the bumps and conductive fillers, for example, SnAgBi, SnAgCuBi, SnAgCuIn, SnAgZn, SnZnBi, SnCu, SnAgInBi, or SnZnAl can be used instead of the above SnAgCu solder material. Is also possible.

比較例1では、実施例における導電性ペーストから導電性フィラーを除いた、下記表1に記載の組成の樹脂ペーストを使用し、また、電子部品、絶縁性樹脂ペースト、および電子回路基板については実施例と同じものを使用した。   In Comparative Example 1, a resin paste having the composition shown in Table 1 below, which is obtained by removing the conductive filler from the conductive paste in the example, was used, and the electronic component, the insulating resin paste, and the electronic circuit board were used. The same as the example was used.

上述の電子部品と電子回路基板との接合は次の手順で行った。   The above-described electronic component and electronic circuit board were joined by the following procedure.

まず、電子回路基板の電極部上に、導電性ペーストをスクリーン印刷法で所定の厚さとなるよう選択的に供給した。一方、電子部品のバンプ取付け面側を絶縁性樹脂ペースト膜に押し付けて、バンプ取付け面全面に絶縁性樹脂ペーストを転写した後、スキージを用いて転写された絶縁性樹脂ペースト層をBGAバンプの高さ(約0.3mm)と等しい均一な厚さとし、バンプ頂部がこのペースト層から露出するように形成した。なお、このとき転写された絶縁性樹脂ペーストの質量は8mgであった。   First, the conductive paste was selectively supplied on the electrode part of the electronic circuit board so as to have a predetermined thickness by screen printing. On the other hand, after pressing the bump mounting surface side of the electronic component against the insulating resin paste film and transferring the insulating resin paste to the entire surface of the bump mounting surface, the transferred insulating resin paste layer using the squeegee is formed on the BGA bump. A uniform thickness equal to the thickness (about 0.3 mm) was formed so that the bump tops were exposed from the paste layer. The mass of the insulating resin paste transferred at this time was 8 mg.

次いで、絶縁性樹脂ペーストが供給されたBGA型パッケージ部品を、電子回路基板と位置合わせをした後に、電子回路基板上の所定位置に搭載した。次に、それらを、最高到達温度が245℃である温度プロファイルのリフロー炉内に搬送して、加熱し、はんだ付けと熱硬化性樹脂の硬化とを行ってから、外部に搬出した。   Next, after aligning the BGA type package component supplied with the insulating resin paste with the electronic circuit board, it was mounted at a predetermined position on the electronic circuit board. Next, they were transported into a reflow furnace having a temperature profile with a maximum temperature of 245 ° C., heated, soldered and the thermosetting resin was cured, and then transported outside.

実施例1および2、ならびに比較例1における接合条件は全て同じとした。   The joining conditions in Examples 1 and 2 and Comparative Example 1 were all the same.

接合部の評価は以下のように行った。すなわち、接合性については、接合部の電気抵抗を測定し、導通しているものは○(良)、導通が不安定または導通していないものは×(不良)として評価した。また、硬化樹脂におけるボイド量については、接合させた後、接合部の平面的な断面を観察し、電子部品の電極と電子回路基板の電極部との間をまたぐボイドが一つもないものを○(良)、一つでもあれば×(不良)として評価した。   Evaluation of the joint was performed as follows. That is, regarding the bonding property, the electrical resistance of the bonded portion was measured, and evaluation was made as ○ (good) when conducting, and as x (defective) when unstable or not conducting. In addition, for the void amount in the cured resin, after bonding, observe a planar cross section of the bonded portion, and there is no void that straddles between the electrode of the electronic component and the electrode portion of the electronic circuit board. (Good), if there was even one, it evaluated as x (defect).

Figure 0005579996
Figure 0005579996

表1の結果から明らかなように、実施例1および2によれば電子部品と電子回路基板との接合性、ボイド量がともに「良」であったのに対して、比較例では接合性、ボイド量がともに不良であった。   As is apparent from the results of Table 1, according to Examples 1 and 2, the bondability between the electronic component and the electronic circuit board and the void amount were both “good”, whereas in the comparative example, the bondability, Both void amounts were poor.

すなわち、実施例1、2によるはんだ接合構造体では、そのはんだ接合部によって電子部品と電子回路基板とが確実に導通し、かつ、それを被覆する硬化樹脂に電極間をまたぐボイドの発生が認められなかった。そして、導電性フィラーを含む導電性ペーストを接合材料として用いることによって、そのタック力により電子部品が電子回路基板上に安定して保持され、また、接合すべき箇所への樹脂のかみこみもなく、接合性が安定することが確認できた。   That is, in the solder joint structure according to Examples 1 and 2, the electronic component and the electronic circuit board are reliably conducted by the solder joint portion, and generation of voids straddling the electrodes is recognized in the cured resin covering the solder. I couldn't. And by using a conductive paste containing a conductive filler as a bonding material, the electronic component is stably held on the electronic circuit board by its tack force, and there is no resin biting into the place to be bonded, It was confirmed that the bondability was stable.

一方、比較例1によるはんだ接合体では、電子部品と電子回路基板との間で非導通状態が発生し、また、はんだ接合部を被覆する硬化樹脂に電極間をまたぐボイドの発生が認められた。そして、フラックスを含む熱硬化性樹脂のみを使用して電子部品を電子回路基板に搭載しているので、リフロー炉への搬送など、その搬送時に位置ずれが発生し、またリフロー炉での加熱時に電極間に樹脂がかみこむことによって、接合性が安定しないことが認められた。   On the other hand, in the solder joined body according to Comparative Example 1, a non-conductive state occurred between the electronic component and the electronic circuit board, and generation of voids across the electrodes was observed in the cured resin covering the solder joint. . Since the electronic component is mounted on the electronic circuit board using only the thermosetting resin containing the flux, misalignment occurs at the time of transportation, such as transportation to the reflow furnace, and at the time of heating in the reflow furnace. It was recognized that the bonding property was not stable due to the resin biting between the electrodes.

次に、絶縁性樹脂ペーストの供給方法を変えて、リフロー加熱後のはんだボール残りの量について調べた。   Next, the supply method of the insulating resin paste was changed, and the amount of remaining solder balls after reflow heating was examined.

上述の実施例1、2のはんだ接合方法と比較するため、導電性ペースト、絶縁性樹脂ペースト、電子回路基板、および電子部品については実施例1と同じものを用い、絶縁性樹脂ペーストの供給方法のみを変えてはんだ接合をした。   In order to compare with the solder joining method of the above-described Examples 1 and 2, the conductive paste, the insulating resin paste, the electronic circuit board, and the electronic component are the same as those in Example 1, and the insulating resin paste supply method Only soldering was changed.

この供給方法としては、電子回路基板の電極部上に導電性ペーストをスクリーン印刷法で塗布し、次いで絶縁性樹脂ペーストをエアー式のディスペンサーを使用して、電子回路基板の電極上に8mg塗布した。絶縁性樹脂ペーストが全電極部を覆ったことを確認した後、BGA型パッケージの電子部品を電子回路基板に対して位置合わせして電子回路基板に搭載し、最高到達温度が245℃となるように温度プロファイルを設定したリフロー炉で加熱し、はんだ付けと熱硬化性樹脂の硬化とを行って、比較例2を作製した。   As this supply method, a conductive paste was applied on the electrode part of the electronic circuit board by screen printing, and then 8 mg of the insulating resin paste was applied on the electrode of the electronic circuit board using an air-type dispenser. . After confirming that the insulating resin paste has covered all the electrode parts, the electronic components of the BGA type package are aligned with the electronic circuit board and mounted on the electronic circuit board so that the maximum temperature reached 245 ° C. Comparative Example 2 was prepared by heating in a reflow oven with a temperature profile set to 1, soldering and curing the thermosetting resin.

硬化後のはんだボール残りについて、実施例1と比較例2とによるはんだ接合構造体で比較した。その結果、実施例1によるはんだボール残り量は、比較例2によるそれの約58%であった。   The solder ball remaining after curing was compared between the solder joint structures according to Example 1 and Comparative Example 2. As a result, the remaining amount of solder balls in Example 1 was about 58% of that in Comparative Example 2.

このように、比較例2の方法によると、絶縁性樹脂ペーストを電子回路基板上に供給した場合にリフロー加熱後のはんだボール残り量が多くなるのは、次のような理由によるものと考えられる。すなわち、絶縁性樹脂ペースト供給時にそれによって導電性ペーストが押し流されたり、形成された絶縁性樹脂ペースト層が樹脂だれすることによって導電性ペーストが押し流されたりして、導電性ペーストの導電性フィラーが絶縁性樹脂ペーストに取り込まれるためではないかと推測される。   As described above, according to the method of Comparative Example 2, when the insulating resin paste is supplied onto the electronic circuit board, the remaining amount of the solder ball after the reflow heating is considered to be as follows. . That is, when the insulating resin paste is supplied, the conductive paste is washed away, or the formed insulating resin paste layer is poured into the resin so that the conductive paste is washed away. It is presumed that it may be taken into the insulating resin paste.

これに対して、実施例1の方法によれば、絶縁性樹脂ペーストを電子部品側に供給してはんだ接合を行っており、比較例2におけるような上述の現象の発生が効果的に抑制されたために、はんだボール残り量がいちじるしく少なくなったと考えられる。   On the other hand, according to the method of Example 1, the insulating resin paste is supplied to the electronic component side to perform solder bonding, and the occurrence of the above phenomenon as in Comparative Example 2 is effectively suppressed. For this reason, it is considered that the remaining amount of solder balls has been remarkably reduced.

本発明のはんだ接合方法は、電子部品と電子回路基板とのはんだ付けとはんだ接合部の封止のための熱硬化性樹脂の硬化とを同時に行うものであり、かつ接合性および接合部の信頼性に優れるものであることから、各種の電気機器や電子機器の分野において広く使用することができる。   The solder joint method of the present invention simultaneously performs soldering of an electronic component and an electronic circuit board and curing of a thermosetting resin for sealing a solder joint portion, and also provides the bondability and the reliability of the joint portion. Since it is excellent in performance, it can be widely used in the fields of various electric devices and electronic devices.

1 電子回路基板
2 電極部
3 導電性ペースト層
4 電子部品
5 突起電極としてのバンプ電極
6 絶縁性樹脂ペースト層
7 はんだ接合部
8、9、10 硬化樹脂体
DESCRIPTION OF SYMBOLS 1 Electronic circuit board 2 Electrode part 3 Conductive paste layer 4 Electronic component 5 Bump electrode 6 as protruding electrode Insulating resin paste layer 7 Solder joint part 8, 9, 10 Cured resin body

Claims (3)

突起電極を有する電子部品と電子回路基板とをはんだで接合するはんだ接合方法であって、
前記電子回路基板の電極部上に、導電性フィラー、フラックス、第1の熱硬化性樹脂、および前記第1の熱硬化性樹脂を硬化させる硬化剤を含む導電性ペーストを供給する工程と、
前記電子部品に、前記第1の熱硬化性樹脂より粘度が低い第2の熱硬化性樹脂、および前記第2の熱硬化性樹脂を硬化させる硬化剤を含む絶縁性樹脂ペーストを供給する工程と、
前記電子部品を前記電子回路基板上に搭載する工程と、
加熱によって、前記突起電極の一部のみを溶かすとともに前記導電性フィラーを溶融させ、且つ、前記第1および第2の熱硬化性樹脂を硬化させる工程
とを有し、前記電子部品の突起電極および前記導電性フィラーが、Snと、Bi、In、Ag、ZnおよびCuからなる群から選ばれる2種以上の元素との組合せからなる組成を有する半田材料からなり、
前記第1および第2の熱硬化性樹脂を硬化させる工程では、前記第1の熱硬化性樹脂を前記突起電極の周囲にて硬化させ、更に前記第2の熱硬化性樹脂を前記第1の熱硬化性樹脂の周囲にて硬化させる、はんだ接合方法。
A solder joining method for joining an electronic component having a protruding electrode and an electronic circuit board with solder,
Supplying a conductive paste on the electrode part of the electronic circuit board, including a conductive filler, a flux, a first thermosetting resin, and a curing agent that cures the first thermosetting resin;
Supplying to the electronic component an insulating resin paste containing a second thermosetting resin having a viscosity lower than that of the first thermosetting resin and a curing agent for curing the second thermosetting resin; ,
Mounting the electronic component on the electronic circuit board;
A step of melting only a part of the protruding electrode by heating, melting the conductive filler, and curing the first and second thermosetting resins, and the protruding electrode of the electronic component and the conductive filler, Sn and, Ri Do solder material having Bi, an in, Ag, a composition comprising a combination of two or more elements selected from the group consisting of Zn and Cu,
In the step of curing the first and second thermosetting resins, the first thermosetting resin is cured around the protruding electrodes, and the second thermosetting resin is further cured with the first thermosetting resin. Ru cured at ambient thermosetting resin, soldering method.
前記突起電極及び前記導電性フィラーは何れも、SnAgCuである、請求項1に記載のはんだ接合方法。   The solder bonding method according to claim 1, wherein both the protruding electrode and the conductive filler are SnAgCu. 前記第1の熱硬化性樹脂及び前記第2の熱硬化性樹脂は何れも、ビスフェノールF型エポキシ樹脂である、請求項1又は請求項2に記載のはんだ接合方法。   The solder joining method according to claim 1 or 2, wherein each of the first thermosetting resin and the second thermosetting resin is a bisphenol F-type epoxy resin.
JP2009094889A 2009-04-09 2009-04-09 Solder joining method Expired - Fee Related JP5579996B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009094889A JP5579996B2 (en) 2009-04-09 2009-04-09 Solder joining method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009094889A JP5579996B2 (en) 2009-04-09 2009-04-09 Solder joining method

Publications (2)

Publication Number Publication Date
JP2010245434A JP2010245434A (en) 2010-10-28
JP5579996B2 true JP5579996B2 (en) 2014-08-27

Family

ID=43098089

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009094889A Expired - Fee Related JP5579996B2 (en) 2009-04-09 2009-04-09 Solder joining method

Country Status (1)

Country Link
JP (1) JP5579996B2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012104557A (en) * 2010-11-08 2012-05-31 Ngk Spark Plug Co Ltd Wiring board with electronic component and manufacturing method of the same
JP2014103183A (en) 2012-11-19 2014-06-05 Mitsubishi Electric Corp Electronic circuit, manufacturing method of the same, and electronic component
JP2016029724A (en) * 2015-09-14 2016-03-03 三菱電機株式会社 Electronic circuit and electronic component

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3019851B1 (en) * 1998-12-22 2000-03-13 日本電気株式会社 Semiconductor device mounting structure
JP2001053112A (en) * 1999-08-17 2001-02-23 Mitsubishi Electric Corp Method for connecting circuit substrate and composite circuit substrate
JP4394213B2 (en) * 1999-09-27 2010-01-06 株式会社デンソー LSI package mounting method
JP3948289B2 (en) * 2002-01-22 2007-07-25 松下電器産業株式会社 Electronic component mounting method
JP2004260094A (en) * 2003-02-27 2004-09-16 Sekisui Chem Co Ltd Conductive fine particle and conductive connection structure
JP4203666B2 (en) * 2004-12-27 2009-01-07 パナソニック株式会社 Electronic component mounting method and electronic component mounting structure
JP4692101B2 (en) * 2005-06-27 2011-06-01 ソニー株式会社 Part joining method

Also Published As

Publication number Publication date
JP2010245434A (en) 2010-10-28

Similar Documents

Publication Publication Date Title
US8679635B2 (en) Bonding material, bonded portion and circuit board
KR101982034B1 (en) Anisotropic conductive paste and electronic component connecting method using the same
US20190232438A1 (en) Solder paste and mount structure
US10440834B2 (en) Resin fluxed solder paste, and mount structure
JP6226424B2 (en) Bonding material and method for manufacturing electronic component
JP5093766B2 (en) Manufacturing method of semiconductor package substrate mounted with conductive balls, etc.
WO2017110052A1 (en) Paste thermosetting resin composition, semiconductor component, semiconductor mounted article, method for manufacturing semiconductor component, and method for manufacturing semiconductor mounted article
CN102737752B (en) Anisotropic conductive is stuck with paste and uses the method for attachment of electronic unit of this electroconductive paste
US20180229333A1 (en) Solder paste and mount structure obtained by using same
WO2016016916A1 (en) Semiconductor component, semiconductor mounting component using same, and semiconductor mounting component manufacturing method
CN106624452A (en) Solder paste and soldering flux, and mounted structure using same
JP2011056527A (en) Composition of solder paste
WO2001024968A1 (en) Soldering flux, solder paste and method of soldering
JP3849842B2 (en) Flux for soldering, solder paste, electronic component device, electronic circuit module, electronic circuit device, and soldering method
US20200306893A1 (en) Solder paste and mount structure
WO2015146473A1 (en) Flux and solder paste
JP5579996B2 (en) Solder joining method
US20210354251A1 (en) Resin flux solder paste and mount structure
JP5160576B2 (en) Solder paste, pin grid array package substrate and pin grid array package using the same, and method for manufacturing pin grid array package substrate
JP4976257B2 (en) Conductive paste and mounting body using the same
JP2018126787A (en) Solder paste and mounting structure acquired with the same
WO2018134860A1 (en) Semiconductor-mounted product
JP6124032B2 (en) Mounting structure and manufacturing method of mounting structure
WO2023013732A1 (en) Resin composition for fluxes, solder paste and package structure
JP2024017848A (en) Solder paste and mounting structure

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20120203

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20130325

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20130328

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20130508

RD04 Notification of resignation of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7424

Effective date: 20131127

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20131205

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20140114

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20140618

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20140710

R151 Written notification of patent or utility model registration

Ref document number: 5579996

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R151

LAPS Cancellation because of no payment of annual fees