JP5565897B2 - High-speed inversion pulse power supply - Google Patents

Description

  The present invention relates to a high-speed inversion pulse power supply device used for electroplating or the like.

  In certain types of electroplating, it is known that when a periodically reversing current is passed, the physical properties of the coating are improved, and copper plating has long been put into practical use as PR copper plating. This copper PR plating reverses the polarity with a period of several seconds or more. However, in recent years, when the polarity is reversed at a high speed with a period of one hundred microseconds to several milliseconds, the plating quality of certain types of plating is remarkable. It has been found that there is an improvement effect, and it has come to be used for chromium plating, nickel plating and the like. As a high-speed inversion pulse power supply device for performing such plating, for example, a device as shown in Patent Document 1 has been proposed, and the applicant of the present application has solved the problem of the power supply device shown in Patent Document 1 as a high-speed inversion pulse. The power supply device is pending as Japanese Patent Application No. 2007-322698.

  The power supply device disclosed in Patent Document 1 includes a first DC power supply device, a second DC power supply device, one output terminal of the first DC power supply device, and the other output of the second DC power supply device. A series circuit of a first reactor provided between the end and one end of the load, a first main switching element that is turned on and off at high speed, one output end of the second DC power supply device, and the first A second reactor provided between the other output end of the DC power supply device and the other end of the load, and a second main switching element that complementarily turns off and on in response to the on and off of the first main switching element. Between the output of the first reactor and the other output terminal of the first DC power supply device in a complementary manner corresponding to on / off of the first main switching element. Auxiliary switching element and second rear A second auxiliary switching element that is turned off and on in a complementary manner in response to the on and off of the second main switching element, between the output of the tor and the other output terminal of the second DC power supply device, First and second clamps connected in parallel to the second auxiliary switching element, connected in series to the first and second clamp diodes and the first and second clamp diodes, respectively, and charged with a steady-state peak voltage. First and second clamp circuits each including a first capacitor, a first or second voltage detector for detecting both ends of the first or second auxiliary switching element, and the first or second voltage detector. And a control device that turns on the first or second auxiliary switching element when the detection signal is equal to or higher than a predetermined voltage.

  In this configuration, the output of the first DC power supply is short-circuited by the first reactor while the first auxiliary switching element is on, and the output of the second DC power supply is second while the second auxiliary switching element is on. Shorted by the reactor, energy is accumulated in each reactor. When the first main switching element is turned on, the first auxiliary switching element is turned off, the energy stored in the first reactor is supplied to the load as a positive current, and when the second main switching element is turned on, the second auxiliary switching element is turned on. The element is turned off, and the energy stored in the second reactor is supplied to the load as a negative current.

  In this method, the current passed through the reactor is transferred to the load, and the current rise during each energization is good, but the current continues to flow through the transformer, auxiliary switching element, and reactor when not energized. For this reason, there is a problem in that the loss becomes large and the apparatus cannot be reduced in size because a large reactor is required even if the usage rate is low. In the invention of Japanese Patent Application No. 2007-322698 that solves this problem, an output of a power source for supplying positive current and a power source for supplying negative current are provided, and an output of a power source for supplying positive current and a power source for supplying negative current are provided. The output of the power supply is connected in parallel with the polarity reversed, and the power supply for supplying negative current supplies the current via a pulse transformer.

  As a result, current does not continue to flow through transformers, auxiliary switching elements, reactors, etc. at times other than during energization, so that the loss is reduced and a large reactor is not required, which makes it possible to reduce the size of the device. It was. However, since the negative pulse current is supplied via a pulse transformer, when an extremely long negative pulse is required, the pulse voltage transformer has a voltage time product sufficient to pass the pulse power. This requires a transformer, and the pulse transformer has to be enlarged. As a method for solving this problem, the present applicant has provided a second DC-DC converter separately from the DC-DC converter constituting the power supply for supplying positive current, and pulsed the output of the second DC-DC converter. It was considered that a negative pulse having a long width was supplied from the second DC-DC converter in series with the secondary coil of the transformer. However, this method has a problem that two DC-DC converters are required and the cost is increased.

JP 2002-1229397 A

  The present invention solves the above-mentioned problems, and provides a high-speed inversion pulse power supply device that can supply an inversion pulse current having a good waveform at any pulse width with low loss, small size, and low cost. It was made to do.

  In order to solve the above problems, the high-speed inversion pulse power supply device of the present invention is provided with a switching type bipolar DC power supply that outputs positive and negative bipolar DC with respect to the neutral point. Connect the first semiconductor switch and the second semiconductor switch in series between the positive pole and the neutral point, and connect the third semiconductor switch between the neutral point of the bipolar DC power supply and the negative pole of the bipolar DC power supply. A semiconductor switch and a fourth semiconductor switch are connected in series, and a capacitor is connected between the connection point of the first semiconductor switch and the second semiconductor switch, and the connection point of the third semiconductor switch and the fourth semiconductor switch. The fifth semiconductor switch and the sixth semiconductor switch are connected in series between the positive pole and the negative pole of the bipolar DC power supply, and the connection point between the fifth semiconductor switch and the sixth semiconductor switch is neutral. With point Taking out the output from those characterized by.

  Here, the first semiconductor switch and the fourth semiconductor switch are turned on at the end of the positive polarity pulse period, and the second semiconductor switch and the sixth semiconductor switch are turned on at the start of the negative polarity pulse period. Turn on the sixth semiconductor switch during the period, turn on the first semiconductor switch and the fourth semiconductor switch at the end of the negative pulse period, and turn on the third semiconductor switch and the fifth semiconductor at the start of the positive pulse period The switch is turned on, and the drive signal for turning on the fifth semiconductor switch during the positive polarity pulse period is sequentially generated, and the polarity is set so that the output current becomes the set value during the positive polarity pulse period or the negative polarity pulse period. It is preferable to provide a control means for controlling the DC power supply.

  According to the present invention, the energy stored in the inductance of the circuit is supplied to the capacitor by turning on the first semiconductor switch and the fourth semiconductor switch at the end of the positive pulse period and at the end of the negative pulse period. The current of the positive polarity pulse and the negative polarity pulse can be rapidly lowered by recovering energy stored in the inductance of the load circuit. In addition, the second semiconductor switch and the sixth semiconductor switch are turned on at the start of the negative polarity pulse period, and the third semiconductor switch and the fifth semiconductor switch are turned on at the start of the positive polarity pulse period, respectively, and stored in the capacitor. The discharged energy can be released to the load, and the current of the negative polarity pulse and the positive polarity pulse can be rapidly raised.

  In this way, the current is rapidly lowered by recovering the energy stored in the circuit inductance to the capacitor, and the current is rapidly raised by discharging the energy stored in the capacitor and stored in the load. In addition to shortening the rise time and the fall time of the pulse current, there is an effect of high efficiency since energy is not lost. Also, after the pulse current rises, the current is supplied from the bipolar DC power supply. However, since the bipolar DC power supply uses a switching method, the followability is good and a pulse current with a good waveform is supplied. There are advantages.

It is a connection diagram which shows the structure of this invention. It is a wave form diagram of the principal part at the time of operation. It is a figure which shows the path | route of the electric current at the time of operation | movement. It is a figure which shows the path | route of the electric current at the time of operation | movement. It is a figure which shows the path | route of the electric current at the time of operation | movement. It is a figure which shows the path | route of the electric current at the time of operation | movement. It is a figure which shows the path | route of the electric current at the time of operation | movement. It is a figure which shows the path | route of the electric current at the time of operation | movement.

Next, the best mode for carrying out the present invention will be specifically described with reference to the drawings.
FIG. 1 is a connection diagram of a main circuit showing a first embodiment of the present invention, in which a semiconductor switch is connected to a positive pole of a DC power source for converting AC power supplied from an AC input terminal 2 by a rectifier 1 into DC power. The positive poles 3a and 3b are connected, and the negative poles of the semiconductor switches 3a and 3b are connected to the positive poles of the semiconductor switches 4a and 4b, respectively, with the negative pole connected to the negative pole of the DC power source.

  A primary coil of the transformer 5 is connected between the connection point of the semiconductor switches 3a and 4a and the connection point of the semiconductor switches 3b and 4b, and a center tap 6 is provided on the secondary coil of the transformer 5. The anodes of the diodes 7a and 7b and the cathodes of the diodes 8a and 8b are connected to both ends, respectively. The cathodes of the diodes 7a and 7b are connected to each other and connected to one end of the reactor 9, and the anodes of the diodes 8a and 8b are connected to each other and connected to one end of the reactor 10, respectively. 3b, 4a, 4b, the transformer 5 and the diodes 7a, 7b, 8a, 8b constitute a switching type bipolar DC power source that outputs positive and negative bipolar DC with respect to the neutral point, and the center tap 6 is in the middle The other end of the reactor 9 is a positive pole, and the other end of the reactor 10 is a negative pole.

  A positive pole of a semiconductor switch 11a, which is a first semiconductor switch, is connected to the other end of the reactor 9, which is a positive pole of the bipolar DC power supply. A negative pole of the semiconductor switch 11a is connected to a second semiconductor switch. A positive pole of a certain semiconductor switch 11b is connected, and a negative pole of the semiconductor switch 11b is connected to a center tap 6 which is a neutral point of the bipolar DC power supply. Further, the positive electrode of the semiconductor switch 12a as the third semiconductor switch is connected to the center tap 6, and the positive electrode of the semiconductor switch 12b as the fourth semiconductor switch is connected to the negative electrode of the semiconductor switch 12a. The negative pole of the semiconductor switch 12b is connected to the other end of the reactor 10, which is the negative pole of the bipolar DC power supply.

  As a result, the semiconductor switch 11a and the semiconductor switch 11b are connected in series between the positive pole of the bipolar DC power source and the neutral point, and between the neutral point and the negative pole of the bipolar DC power source. The semiconductor switch 12a and the semiconductor switch 12b are connected in series. A capacitor 14 is connected via a capacitor current detector 13 between the connection point of these semiconductor switches 11a and 11b and the connection point of the semiconductor switches 12a and 12b.

  The positive pole of the bipolar DC power supply is connected to the positive pole of the semiconductor switch 15a as the fifth semiconductor switch, and the negative pole of the semiconductor switch 15a is connected to the semiconductor switch 15b as the sixth semiconductor switch. The plus pole is connected, and the minus pole of the semiconductor switch 15b is connected to the minus pole of the bipolar DC power supply. As a result, the semiconductor switch 15a and the semiconductor switch 15b are connected in series between the positive pole and the negative pole of the bipolar DC power supply. A connection point between the semiconductor switch 15 a and the semiconductor switch 15 b is connected to the output terminal 16 a, and the output terminal 16 b is connected to the center tap 6 via the output current detector 17. The semiconductor switches 3a, 3b, 4a, and 4b, the semiconductor switches 11a, 11b, 12a, and 12b and the semiconductor switches 15a and 15b constituting the above circuit are assumed to incorporate diodes that conduct in the reverse direction, and are high-speed elements. Is desirable.

  In the figure, reference numeral 18 denotes a control device, which sets the timing of generating a timing signal by setting the time of the positive pulse and the negative pulse, that is, each pulse width, and the output current of the positive pulse and the negative pulse, respectively. A current setting circuit for generating a current reference signal and a PWM modulation circuit for controlling the output current. The control device 18 is obtained by detecting the capacitor current detection signal obtained from the capacitor current detector 13, the output current detection signal obtained from the output current detector 17, the output voltage detection signal, and the voltage across the capacitor 14. Capacitor voltage detection signal is input.

  The control device 18 that is provided with these circuits and receives each detection signal receives the semiconductor switches 11a, 11b, 12a, and the like depending on conditions such as a timing signal, a capacitor current detection signal, an output current detection signal, an output voltage detection signal, and a capacitor voltage detection signal. The drive command signal for individually turning on the switch 12b and the semiconductor switches 15a and 15b is generated and supplied to the drive device 19, and the semiconductor switches 3a and 4b and the semiconductor are controlled by the timing signal, the current reference signal, and the output current detection signal. A drive command signal for alternately turning on the switches 3b and 4a is generated and applied to the drive device 20. The drive device 19 is insulated and amplified based on the drive command signal and added to the gates of the semiconductor switches 11a, 11b, 12a and 12b and the semiconductor switches 15a and 15b. The drive device 20 is based on the drive command signal. Insulating and amplifying are applied to the gates of the semiconductor switches 3a, 3b, 4a and 4b.

  The control device 18 configured as described above operates as follows. At the start of operation, a positive pulse period is applied, a drive signal is given to the semiconductor switch 15a, and a drive signal is given alternately to the semiconductor switches 3a, 4b and the semiconductor switches 3b, 4a. At the end of the positive pulse period, the drive signal is stopped being applied to the semiconductor switches 3a, 3b, 4a, 4b, and 15a, and the drive signal is applied to the semiconductor switches 11a and 12b. When the current of the capacitor 14 becomes zero by the capacitor current detection signal, a negative pulse period starts. At the start of the negative pulse period, a drive signal is given to the semiconductor switches 3a, 3b, 4a, 4b, 11b, 15b, and an output current detection signal When it is detected that the output current has reached the set value, or when it is detected by the capacitor voltage detection signal that the voltage of the capacitor 14 has become zero, the drive signal is no longer applied to the semiconductor switch 11b, and the negative polarity During the pulse period, drive signals are continuously supplied to the semiconductor switches 3a, 3b, 4a, 4b, and 15b.

  At the end of the negative polarity pulse period, the drive signals are stopped being applied to the semiconductor switches 3a, 3b, 4a, 4b, and 15b, and the drive signals are applied to the semiconductor switches 11a and 12b. When the current of the capacitor 14 becomes zero by the capacitor current detection signal, the positive pulse period starts. At the start of the positive pulse period, a drive signal is given to the semiconductor switches 3a, 3b, 4a, 4b, 12a, 15a, and the output current detection signal When it is detected that the output current has reached the set value, or when it is detected that the voltage of the capacitor 14 has become zero by the capacitor voltage detection signal, the drive signal is stopped being applied to the semiconductor switch 12a. During the pulse period, a drive signal is continuously applied to the semiconductor switches 3a, 3b, 4a, 4b, and 15a as described above.

  The operation of the high-speed inversion pulse power supply device configured as described above will be described below. Basically, the positive polarity pulse and the negative polarity pulse are output alternately. However, in the case of plating, since a film is formed during the positive polarity energization period, the normal positive polarity energization time is usually the negative polarity energization period. It is set to several times or more. FIG. 2 shows a waveform of a main part when one negative pulse is output while two positive pulses are output. A and B indicate driving of the semiconductor switches 15a and 15b, respectively. Signals C, D, E, and F are drive signals for the semiconductor switches 11a and 11b and the semiconductor switches 12a and 12b, G is a drive signal for the semiconductor switches 3a and 4b, and H is a drive signal for the semiconductor switches 3b and 4a. J is the output current, K is the output voltage, L is the output voltage on the plus side of the bipolar DC power supply, and M and N are the current and voltage of the capacitor 14. It goes without saying that the negative output voltage of the bipolar DC power supply is opposite in polarity to L and has the same absolute value, and the dotted line of the waveform L indicates the average voltage.

  The AC power supplied from the AC input terminal 2 is converted into DC power by the rectifier 1 and supplied to the circuits of the semiconductor switches 3a, 3b, 4a and 4b. During the positive pulse period, a drive signal is given to the semiconductor switch 15a, and a drive signal is alternately given to the semiconductor switches 3a, 4b and the semiconductor switches 3b, 4a. As a result, the semiconductor switch 15a is turned on, the semiconductor switches 3a and 4b and the semiconductor switches 3b and 4a are turned on alternately, and an alternating current flows through the primary coil of the transformer 5. The AC power induced in the secondary coil of the transformer 5 is rectified by the diodes 7a and 7b, and a positive polarity pulse is output through the reactor 9 and the semiconductor switch 15a, with the output terminal 16a being positive and the output terminal 16b being negative.

  Since the load can be equivalently regarded as a series circuit of an inductance L and a resistance R, the reactor 9, the semiconductor switch 15a, the output terminal 16a, the inductance L, the resistance indicated by the solid line arrow in FIG. A current flows through the path of R, the output terminal 16b, and the output current detector 17, and a positive pulse current flows through the load. The output current is detected by the output current detector 17, and an error between the detected output current detection signal and the current reference signal of the set positive polarity pulse current is amplified and applied to the PWM modulation circuit. The PWM modulation circuit controls the pulse width of the drive signals applied to the semiconductor switches 3a and 4b and the semiconductor switches 3b and 4a so that the error is minimized, and the positive pulse current is controlled to the set value of the positive pulse current. Here, if an anode plate is connected to the output terminal 16a and an object to be plated is connected to the output terminal 16b and immersed in a plating solution, a plating film is formed.

  When the positive pulse period ends, the drive signals are not supplied to the semiconductor switches 3a, 3b, 4a, 4b, and 15a, and the drive signals are supplied to the semiconductor switches 11a and 12b. As a result, the semiconductor switch 15a, the semiconductor switches 3a, 3b, 4a, and 4b are all turned off, and the semiconductor switches 11a and 12b are turned on. Energy is stored in the reactor 9 by the positive pulse current that has flowed, and the path of the reactor 9, the semiconductor switch 11a, the capacitor 14, the capacitor current detector 13, and the semiconductor switch 12a indicated by a chain line arrow in FIG. 4 by the energy. A current flows through the reactor 9, and the energy stored in the reactor 9 is transferred to the capacitor 14. At this time, in the semiconductor switch 12a, the current flows in the reverse direction through the diode in the reverse direction built-in.

  Further, energy is also stored in the inductance L, and the inductance L, resistance R, output terminal 16b, output current detector 17, semiconductor switch 11b, capacitor 14 and capacitor current detector indicated by solid arrows in FIG. 13, current flows through the path of the semiconductor switch 12b, the semiconductor switch 15b, and the output terminal 16a, and the energy stored in the inductance L is also transferred to the capacitor. When the energy stored in the reactor 9 and the inductance L shifts to the capacitor 14, the voltage of the capacitor 14 increases, and the positive pulse current rapidly decreases to zero. When the energy transfer is completed, no current flows through the capacitor 14, and this is detected by the capacitor current detector 13 and enters the negative polarity pulse period.

  At the beginning of the negative pulse period, a drive signal is supplied to the semiconductor switches 11b and 15b, and a drive signal is supplied to the semiconductor switches 3a, 4b and 3b, 4a alternately. As a result, the semiconductor switches 11b and 15b are turned on, the semiconductor switches 3a, 4b and 3b, 4a are turned on alternately, and the energy stored in the capacitor 14 is the semiconductor switch 11b indicated by the solid line arrow in FIG. 17, the output terminal 16 b, the resistor R, the inductance L, the output terminal 16 a, the semiconductor switch 15 b, the semiconductor switch 12 b, and the capacitor current detector 13. At this time, the voltage of the capacitor 14 rises due to the transfer of the energy stored in the reactor 9 and the inductance L, and a high voltage is applied to the inductance L, and the negative pulse current rises rapidly.

  When the negative pulse current reaches the set value of the negative pulse current or when the energy stored in the capacitor 14 is completely discharged and the voltage becomes zero, the drive signal is not given to the semiconductor switch 11b. The semiconductor switch 11b is turned off. These conditions are detected when the output current detection signal and the capacitor voltage detection signal are input to the control device 18. Since the semiconductor switches 3a, 4b and 3b, 4a are alternately turned on and an alternating current flows through the primary coil of the transformer 5, the alternating current power induced in the secondary coil is rectified by the diodes 8a and 8b, and the solid arrows in FIG. A negative pulse current continuously flows through the path of the output current detector 17, the output terminal 16b, the resistor R, the inductance L, the output terminal 16a, the semiconductor switch 15b, and the reactor 10 shown in FIG. It is controlled to the set value of the negative pulse current. The main purpose of this negative current conduction is to dissolve the tip of the plating film that is excessively adhered to the object to be plated.

  When the negative pulse period ends, the drive signals are not supplied to the semiconductor switches 3a, 3b, 4a, 4b, and 15b, and the drive signals are supplied to the semiconductor switches 11a and 12b. Thereby, all the semiconductor switches 3a, 3b, 4a, 4b, and 15b are turned off, and the semiconductor switches 11a and 12b are turned on. Energy is stored in the reactor 10 by the negative pulse current that has flowed, and the path of the semiconductor switch 11b, the capacitor 14, the capacitor current detector 13, the semiconductor switch 12b, and the reactor 10 indicated by a chain line arrow in FIG. A current flows through the reactor 10, and the energy stored in the reactor 10 is transferred to the capacitor 14.

  Further, energy is also stored in the inductance L, and the inductance L, output terminal 16a, semiconductor switch 11a, capacitor 14, capacitor current detector 13, semiconductor switch 12a, output current detection indicated by solid line arrows in FIG. Current flows through the path of the capacitor 17, the output terminal 16 b, and the resistor R, and the energy stored in the inductance L is also transferred to the capacitor 14. When the energy stored in the reactor 10 and the inductance L is transferred to the capacitor 14, the capacitor 14 is charged, and the output current rapidly decreases to zero. When the energy transfer is completed, no current flows through the capacitor 14, and this is detected by the capacitor current detector 13 and enters the positive pulse period.

  At the beginning of the positive pulse period, a drive signal is applied to the semiconductor switches 12a and 15a, and a drive signal is applied alternately to the semiconductor switches 3a, 4b and 3b, 4a. As a result, the semiconductor switches 12a and 15a are turned on, the semiconductor switches 3a and 4b and the semiconductor switches 3b and 4a are turned on alternately, and the energy stored in the capacitor 14 is shown by the solid line arrows in FIG. , The output terminal 16a, the inductance L, the resistance R, the output terminal 16b, the output current detector 17, the semiconductor switch 12a, and the capacitor current detector 13 are discharged through the path, and the positive pulse current rises rapidly.

  When the positive pulse current reaches the set value of the positive pulse current or when the energy stored in the capacitor 14 is completely discharged and the voltage becomes zero, the drive signal is not given to the semiconductor switch 12a. The semiconductor switch 12a is turned off. Since the semiconductor switches 3a, 4b and the semiconductor switches 3b, 4a are alternately turned on and an alternating current flows through the primary coil of the transformer 5, as described above, the reactor 9, the semiconductor switch 15a, and the output terminal indicated by the solid line arrows in FIG. The positive pulse current continuously flows through the path of 16a, inductance L, resistor R, output terminal 16b, and output current detector 17, and the current is controlled to the set value of the positive pulse current by the PWM modulation circuit. . In this way, the positive pulse period again occurs, and thereafter the positive pulse period and the negative pulse period are repeated in the same manner.

  Here, since the negative pulse current is generally larger than the positive pulse current, the energy required for the rising of the positive pulse current is smaller than the energy required for the rising of the negative pulse current. Less than the energy stored in the capacitor 14 at the end of the sex pulse period. FIG. 2 shows a state in which the positive pulse current rises before all the energy stored in the capacitor 14 is released at the beginning of the positive pulse period, so that the voltage remains in the capacitor 14 during the positive pulse period. It is doing.

  As described above, according to the present invention, the energy stored in the reactors 9, 10 and the inductance L of the circuit is transferred to the capacitor 14 at the end of the positive pulse period and at the end of the negative pulse period. Since the energy stored in the capacitor 14 is released to the load at the start of the negative pulse period and at the start of the positive pulse period, the pulse current can only be rapidly lowered or raised. In addition, the energy stored in the circuit can be effectively supplied to the load, and there is an advantage that there is little loss and high efficiency. Also, after the pulse current rises, the current is supplied from the bipolar DC power supply. However, since the bipolar DC power supply uses a switching method, the followability is good and a pulse current with a good waveform is supplied. There are advantages.

DESCRIPTION OF SYMBOLS 1 Rectifier 2 AC input terminal 3a, 3b, 4a, 4b Semiconductor switch 5 Transformer 6 Center tap 7a, 7b, 8a, 8b Diode 9, 10 Reactor 11a, 11b, 12a, 12b Semiconductor switch 13 Capacitor current detector 14 Capacitor 15a , 15b Semiconductor switch 16a, 16b Output terminal 17 Output current detector 18 Control device 19, 20 Drive device L Inductance R Resistance

Claims (2)

  A switching type bipolar DC power supply that outputs positive and negative bipolar DC to the neutral point is provided, and the first semiconductor switch and the second semiconductor are between the positive and neutral points of the bipolar DC power supply. Connect the switch in series, connect the third semiconductor switch and the fourth semiconductor switch in series between the neutral point of the bipolar DC power supply and the negative pole of the bipolar DC power supply, A capacitor is connected between the connection point of the second semiconductor switch and the connection point of the third semiconductor switch and the fourth semiconductor switch, and the fifth semiconductor is connected between the positive electrode and the negative electrode of the bipolar DC power supply. A high-speed inversion pulse power supply device characterized in that a switch and a sixth semiconductor switch are connected in series, and an output is taken out between a connection point and a neutral point of the fifth semiconductor switch and the sixth semiconductor switch.   At the end of the positive polarity pulse period, the first semiconductor switch and the fourth semiconductor switch are turned on. At the start of the negative polarity pulse period, the second semiconductor switch and the sixth semiconductor switch are turned on. The sixth semiconductor switch is turned on, the first semiconductor switch and the fourth semiconductor switch are turned on at the end of the negative polarity pulse period, and the third semiconductor switch and the fifth semiconductor switch are turned on at the start of the positive polarity pulse period. And sequentially generate a drive signal to turn on the fifth semiconductor switch during the positive polarity pulse period and set the bipolar DC power supply so that the output current becomes the set value during the positive polarity pulse period or the negative polarity pulse period. 2. The high-speed inversion pulse power supply device according to claim 1, further comprising control means for controlling.

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