JP5562320B2 - Semiconductor test apparatus and semiconductor test method - Google Patents

Description

  The present invention relates to a semiconductor test apparatus and a semiconductor test method, and more particularly to a semiconductor test apparatus and a semiconductor test method for measuring the electrical characteristics of the object to be measured via the front and back electrodes of the object to be measured. is there.

  When measuring the electrical characteristics of objects to be measured such as semiconductor wafers and semiconductor chips, a method is used in which the installation surface of the object to be measured is brought into contact with a chuck stage by vacuum suction. In a semiconductor having a vertical structure in which current flows in the vertical direction of the object to be measured, that is, in the out-of-plane direction, a chuck stage to which the installation surface of the object to be measured is fixed is one of the measurement electrodes. For this reason, the adhesion between the object to be measured and the chuck stage affects the contact resistance, which in turn affects the electrical characteristics.

  In order to reduce the contact resistance, it is conceivable to increase the adhesion. However, increasing the degree of vacuum for vacuum adsorption in order to improve adhesion results in deterioration of electrical characteristics in another aspect. That is, when foreign matter such as dust is present on the chuck stage, the object to be measured is placed on the foreign matter, and the installation surface of the object to be measured is strongly pressed against the foreign matter by vacuum suction. When the foreign matter is large, a defect such as a crack may occur in the contact portion with the object to be measured and in the vicinity of the contact portion, and the object to be measured may be partially damaged. In this case, the damaged measurement object is counted as defective. On the other hand, even if the size of the foreign matter is a level that is difficult to see, for example, several tens of μm or less, the measurement object is distorted by pressure at or near the contact portion with the measurement object. When introduced, leakage current increases due to the piezo effect. Also in this case, the device under test is counted as defective.

  Therefore, as a countermeasure against an increase in the defect rate due to foreign matters existing on the chuck stage, for example, in Japanese Patent Laid-Open No. 2008-4739 (Patent Document 1), a stress buffer film is added to the back side of the semiconductor substrate. A method for relieving stress due to foreign matter has been proposed.

  Japanese Patent Laying-Open No. 2011-49337 (Patent Document 2) proposes a technique for suppressing the occurrence of scratches on the back electrode by adding a sheet having conductivity and elasticity to the back side of the semiconductor substrate. Yes.

  By the way, in recent years, since the wafer diameter has been increased and the wafer thickness has been reduced, the warpage of the wafer is regarded as a particular problem. If the wafer is warped, the wafer as the object to be measured cannot be fixed to the chuck stage by vacuum suction, and even if the wafer is fixed, the adhesion between the object to be measured and the chuck stage is likely to be lowered.

  Therefore, for example, Japanese Patent Application Laid-Open No. 2005-332839 (Patent Document 3) and Japanese Utility Model Laid-Open No. 1-97551 (Patent Document 4) describe that the chuck stage is covered with a cover so as to suppress the effects of contact resistance and warpage. It has been proposed to measure the electrical characteristics by bringing a probe into contact with both sides of the object to be measured without bringing the object into contact.

JP 2008-4739 A JP 2011-49337 A JP 2005-332839 A Japanese Utility Model Publication No. 1-97551

  However, in the test apparatus described in Japanese Patent Application Laid-Open No. 2005-332839, the semiconductor wafer is fixed by being held by the protrusions of the holding member. May crack and break.

  Further, in the prober described in Japanese Utility Model Laid-Open No. 1-97551, the wafer is fixed by being attracted to the wafer attracting portion, so that the wafer is cracked and broken when the probe comes into contact with the wafer. Sometimes.

  The present invention has been made in view of the above problems, and its purpose is to suppress cracking and breakage of the object to be measured when measuring electrical characteristics by contacting the probe from both sides of the object to be measured. A semiconductor test apparatus and a semiconductor test method are provided.

  The semiconductor test apparatus of the present invention is a semiconductor test apparatus for measuring the electrical characteristics of the object to be measured through the front and back electrodes provided on the front and back surfaces of the object to be measured. The semiconductor device includes a plurality of object supports for holding a part of the back surface of the object to be measured unfixed, and a plurality of electrodes for measuring electrical characteristics in electrical contact with the back electrode of the object to be measured. A back surface probe and a surface probe for measuring electrical characteristics by making electrical contact with the surface electrode of the object to be measured are provided. After the plurality of back surface probes come into contact with the back surface electrode of the object to be measured that is not fixedly held on the measurement object support, the surface probe is placed on the surface electrode located on the surface side in the region surrounded by the plurality of back surface probes. It is provided so that contact is possible.

  According to the semiconductor test apparatus of the present invention, after the plurality of back surface probes contact the back surface electrode of the object to be measured that is not fixedly held on the object to be measured object, the surface in the region surrounded by the plurality of back surface probes. A surface probe is provided in contact with the surface electrode located on the side. Since the object support holds a part of the back surface of the object to be measured unfixed, when the plurality of back surface probes contact the back electrode of the object to be measured, the object to be measured is the object to be measured. It can be moved from the support. For this reason, the stress which presses a to-be-measured object to a to-be-measured object support body does not act. Thereby, it is possible to suppress cracking and breakage of the object to be measured at the part held on the object support and the part in contact with the back surface probe.

  In addition, after the plurality of back surface probes contact the back surface electrode of the object to be measured, the surface probe contacts the surface electrode located on the front surface side in the region surrounded by the plurality of back surface probes. Will warp in a convex shape. For this reason, the stress which presses the to-be-measured object by a surface probe to a to-be-measured object support does not reach the part of the to-be-measured object support holding the to-be-measured object. Thereby, it is possible to suppress cracking and breakage of the object to be measured at the part held on the object support and the part in contact with the back surface probe.

1 is a schematic perspective view of a semiconductor test apparatus in Embodiment 1 of the present invention. It is a general | schematic expanded sectional view which follows the II-II line of FIG. It is a schematic plan view which shows the position of the surface probe and back surface probe of the semiconductor testing apparatus in Embodiment 1 of this invention. It is a schematic sectional drawing which shows operation | movement of the surface probe of the semiconductor testing apparatus in Embodiment 1 of this invention, Comprising: The figure (A) which shows a state before a surface probe contacts a to-be-measured object, and a surface probe is to be measured It is a figure (B) which shows a state after contacting a thing, and a figure (C) which shows a state where it fell further, after a surface probe contacted a measured object. It is a schematic sectional drawing which shows the state which the back surface probe of the semiconductor testing apparatus in Embodiment 1 of this invention contacted the back surface electrode. It is a schematic sectional drawing which shows the state which the semiconductor wafer moved from the to-be-measured object support body by the back surface probe of the semiconductor testing apparatus in Embodiment 1 of this invention. It is a schematic sectional drawing which shows the state which the back surface probe of the semiconductor testing apparatus in Embodiment 1 of this invention contacted the back surface electrode, and the surface probe contacted the surface electrode. It is a schematic sectional drawing which shows the contact state of the back surface probe and front surface probe of the semiconductor testing apparatus in Embodiment 1 of this invention. It is a schematic sectional drawing which shows the contact state of the back surface probe and front surface probe of the semiconductor test apparatus of the comparative example 1. It is a schematic sectional drawing which shows the contact state of the back surface probe and front surface probe of the semiconductor test apparatus of the comparative example 2. It is a schematic perspective view of the semiconductor test apparatus in Embodiment 2 of this invention. It is a schematic side view of the semiconductor test apparatus in Embodiment 2 of the present invention. It is a schematic plan view which shows the position of the surface probe of the semiconductor testing apparatus in Embodiment 2 of this invention, a back surface probe, and a surface side to-be-measured object fixing jig. It is a schematic sectional drawing which shows the elastic body provided in the back surface side to-be-measured object fixing jig of the semiconductor testing apparatus in Embodiment 2 of this invention. It is a schematic sectional drawing which shows the state by which the semiconductor wafer was installed in the semiconductor testing apparatus in Embodiment 2 of this invention. It is a schematic sectional drawing which shows the state from which the semiconductor wafer was released from the semiconductor test apparatus in Embodiment 2 of this invention. It is a schematic sectional drawing which shows the state by which the semiconductor wafer was pinched | interposed into the back surface side to-be-measured object fixing jig and the surface side to-be-measured object fixing jig of the semiconductor testing apparatus in Embodiment 2 of this invention. It is a schematic sectional drawing of the semiconductor test apparatus in Embodiment 1 of this invention. It is a schematic sectional drawing which shows the insulating member of the semiconductor testing apparatus in Embodiment 1 of this invention.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
(Embodiment 1)
First, the configuration of the semiconductor test apparatus according to the first embodiment of the present invention will be described.

  1 to 3, the semiconductor test apparatus according to the present embodiment is measured through a back electrode 1c and a surface electrode 1d provided on a front surface 1a and a back surface 1b of a semiconductor chip 1 as an object to be measured. This is for measuring the electrical characteristics of the semiconductor chip 1 which is a product. In the present embodiment, the test is performed in the state of the semiconductor wafer 10 on which the semiconductor chip 1 as the object to be measured is formed, but the cut-out semiconductor chip 1 itself may be directly tested.

  A semiconductor chip 1 as an object to be measured includes a semiconductor having a vertical structure in which a front surface electrode 1d and a back surface electrode 1c are provided on a front surface 1a and a back surface 1b. The semiconductor chip 1 may be a power semiconductor such as an IGBT (Insulated Gate Bipolar Transistor) and a diode. As the power semiconductor, one having a large electrode pad size of 15 mm × 15 mm and capable of applying a current corresponding to several hundred amperes (A) can be used. The semiconductor chip 1 is not limited to these.

  The semiconductor test apparatus mainly includes a measurement object support 2, a back surface probe 3, and a front surface probe 4.

  The measurement object support 2 is provided so as to hold a part of the back surface 1b of the semiconductor chip (measurement object) 1 unfixed. The measurement object support 2 mainly includes a main body 2a and an arm 2e. The main body 2 a is for holding the semiconductor wafer 10 on which the semiconductor chip 1 is formed, and is a basic part of the measurement object support 2. The arm portion 2e is used for moving the semiconductor chip 1.

  The main body 2a has a frame 2b, a support 2c, and a groove 2d. The frame portion 2b is for preventing the semiconductor wafer 10 from dropping. The support portion 2 c is for contacting and holding the outer peripheral portion of the semiconductor wafer 10 on the back surface 1 b side. The groove portion 2d is mainly used to store wafer debris generated from the outer peripheral edge portion of the semiconductor wafer 10 and foreign matters brought in from the previous process.

  The main body 2 a is configured in a circular shape along the outer periphery of the semiconductor wafer 10 when the circular semiconductor wafer 10 is placed as in the present embodiment. In addition, as will be described in the following embodiments, when performing the characteristic evaluation at the time of temperature change, the main body 2a is made of a heat-resistant material. As a material of the main body 2a, for example, a metal material such as stainless steel excellent in corrosion resistance and a resin material such as engineering plastic can be applied, but the material is not limited thereto.

  The back surface probe 3 is for making electrical contact with the back surface electrode 1c of the semiconductor chip 1 and measuring electrical characteristics. A plurality of back surface probes 3 are provided. The surface probe 4 is for making electrical contact with the surface electrode 1d of the semiconductor chip 1 and measuring electrical characteristics. It is sufficient that at least one surface probe 4 is provided.

  As shown in FIG. 2, the back surface probe 3 expands and contracts via a tip portion 3a that makes mechanical and electrical contact with the back surface electrode 1c formed on the semiconductor chip 1, and a spring member such as a spring incorporated therein. It is comprised from the pushing part 3b which can be, and the installation part 3c connected to the probe card etc. by the side of an apparatus. Similarly, the surface probe 4 includes a tip portion 4a, a push-in portion 4b, and an installation portion 4c. The back surface probe 3 and the front surface probe 4 can be made of a material having excellent conductivity, such as copper, but are not limited thereto. In particular, each of the tip portions 3a and 4a may be coated with another member, for example, gold, palladium, tantalum, platinum, or the like from the viewpoint of improving conductivity or durability.

  The plurality of back surface probes 3 are provided so as to be able to come into contact with the back surface electrode 1c of the semiconductor chip 1 held unfixed on the measurement object support 2. The surface probe 4 is provided so as to be able to come into contact with the surface electrode 1d located on the surface 1a side in the region R surrounded by the plurality of back surface probes 3 after the plurality of back surface probes 3 contact the back surface electrode 1c.

  As shown in FIG. 3, in the present embodiment, four back surface probes 3 and four front surface probes 4 are provided. The four back probes 3 are in contact with the surface electrode 1d on the surface 1a side in the region R indicated by the alternate long and short dash line in FIG. 3 surrounded by the contact portion of the tip 3a of the four back probes 3 with the back electrode 1c. The surface probe 4 is provided.

  If the surface probe 4 is in contact with the surface electrode 1d on the surface 1a side in the region R surrounded by the plurality of back surface probes 3, the number of the back surface probes 3 and the surface probes is not limited, and the applied current value and The number should be changed according to the specifications of the electrical characteristics to be measured. In FIG. 1, for easy viewing, the back surface probe 3 and the front surface probe 4 are indicated by arrows, and the contact portion side is indicated by the direction of the arrow.

  Subsequently, operations of the back surface probe 3 and the front surface probe 4 will be described. The back surface probe 3 and the front surface probe 4 are configured to operate in the same manner. For convenience of explanation, the operation of the surface probe 4 will be described. 4A to 4C, from the initial state shown in FIG. 4A toward the surface 1a of the semiconductor chip 1 as shown in FIG. 4B (below the Z-axis in the figure). When the surface probe 4 is lowered, the surface electrode 1d and the tip portion 4a first come into contact with each other. As shown in FIG. 4C, when the surface probe 4 is further lowered thereafter, the pushing portion 4b is pushed into the installation portion 4c via a spring member, and the contact with the surface electrode 1d is ensured.

Next, the operation of the semiconductor test apparatus and the semiconductor test method of this embodiment will be described.
Referring to FIGS. 5 to 7, the back surface probe 3 and the front surface probe are placed so that the semiconductor wafer 10 is placed on the main body 2 a of the object support 2 and contacts a predetermined semiconductor chip 1 for measuring electrical characteristics. 4 is conveyed to a predetermined position. 5 to 7, the back surface probe 3 and the front surface probe 4 are indicated by arrows for convenience of explanation.

  As shown in FIG. 5, first, a semiconductor wafer 10 on which a semiconductor chip 1 as an object to be measured is formed is prepared. The semiconductor wafer 10 is held in a non-fixed state on the measurement object support 2. When the back probe 3 rises, the individual tip portions come into contact with the back electrode 1 c of the semiconductor chip 1. In the drawing, the individual tip portions are in contact at the same time. However, when the semiconductor wafer 10 is warped, it is not necessarily the same time, but is brought into contact with some time shift.

  As shown in FIG. 6, when the back surface probe 3 is further raised, the respective front end portions push up the semiconductor wafer 10 via the back surface electrode 1c, and the contact between the front end portion and the back surface electrode 1c is ensured. At this time, a part of the periphery of the back surface 1b of the semiconductor wafer 10 may be separated from the measurement object support 2. The end of the raising of the back surface probe 3 is performed by detecting the contact between each back surface probe 3 and the back surface electrode 1c. The detection method is performed by, for example, resistance measurement between individual back surface probes 3, but is not limited thereto. For example, a sensor for detecting the pushing amount of each back probe 3 may be provided, and the rise of the back probe 3 may be controlled by the sensor output.

  As shown in FIG. 7, the surface probe 4 finally descends, and the descent of the surface probe 4 is stopped when contact between each tip and the surface electrode 1d is detected. Thereafter, the electrical characteristics of the semiconductor chip 1 are measured.

Then, the specific example of the evaluation process using the semiconductor test apparatus of this Embodiment is shown below.
First, the semiconductor wafer 10 is set on the measurement object support 2. Subsequently, the semiconductor wafer 10 is transferred to the electrical characteristic evaluation position. Next, the back surface probe 3 rises toward the back surface electrode 1 c to be evaluated in the semiconductor wafer 10. Thereafter, contact of all the back surface probes 3 with the back surface electrode 1c is confirmed. Subsequently, the ascent of the back probe 3 is stopped. Next, the surface probe 4 is lowered toward the surface electrode 1 d to be evaluated in the semiconductor wafer 10. Thereafter, contact of all surface probes 4 with the surface electrode 1d is confirmed. Subsequently, measurement of the electrical characteristics of the object to be measured is started. Thereby, the electrical characteristics of the object to be measured are evaluated.

Next, the effect of this Embodiment is demonstrated.
With reference to FIGS. 8-10, the effect of this Embodiment is demonstrated compared with a comparative example. 8 to 10, the back surface probe 3 and the front surface probe 4 are indicated by arrows for convenience of explanation. As shown in FIG. 8, in the present embodiment, as described above, the back surface probe 3 contacts the back surface electrode 1c first, and then the surface probe 4 contacts the surface electrode 1d in the region surrounded by the back surface probe 3. To do. Thus, the back surface probe 3 is brought into contact with the back surface electrode 1c, and the surface probe 4 is brought into contact with the front surface electrode 1d, so that stress applied to the semiconductor wafer 10 from the back surface probe 3 and the front surface probe 4 is around the semiconductor chip 1 to be evaluated. To balance. Thereby, the stress applied to the semiconductor wafer 10 from the back surface probe 3 and the front surface probe 4 can be prevented from being applied to the peripheral portion of the semiconductor wafer 10. Therefore, the peripheral portion of the semiconductor wafer 10 is not damaged or cracked.

  On the other hand, as shown in FIG. 9, in the semiconductor test apparatus of Comparative Example 1, the surface probe 4 contacts the surface electrode 1 d outside the region surrounded by the back surface probe 3. In this case, the stress applied to the semiconductor wafer 10 from the surface probe 4 does not balance around the semiconductor chip 1 to be evaluated, and is also applied as an applied stress F to the portion where the semiconductor wafer 10 and the measured object support 2 are in contact. . For this reason, the semiconductor wafer 10 may be damaged and cracked due to the applied stress F.

  As shown in FIG. 10, in the semiconductor device of Comparative Example 2, the peripheral portion of the semiconductor wafer 10 is fixed to the measurement object support 2 by, for example, vacuum suction. When the contact positions of the contact probes coincide on the front and back surfaces and contact at the same time with the same stress, the stress applied to the semiconductor wafer 10 from the contact probes is balanced around the semiconductor chip 1 to be evaluated. However, when the contact positions of the contact probes do not match on the front and back surfaces, or do not contact at the same time, or the stress does not match on the front and back surfaces, the stress applied to the semiconductor wafer 10 is not balanced around the semiconductor chip 1 to be evaluated, and the semiconductor Since the applied stress F is also applied to the portion where the wafer 10 and the measurement object support 2 are in contact, the semiconductor wafer 10 may be damaged or cracked due to the applied stress F.

  For example, when the front surface probe 4 contacts the front surface electrode 1d before the back surface probe 3 contacts the back surface electrode 1c, the applied stress F is also applied to the portion where the semiconductor wafer 10 and the object support 2 are in contact. Therefore, the semiconductor wafer 10 may be damaged or cracked due to the applied stress F.

  As described above, according to the semiconductor test apparatus of the present embodiment, after the plurality of back surface probes 3 are in contact with the back surface electrode 1c of the semiconductor chip 1 held unfixed to the measurement object support 2, the plurality of back surfaces are contacted. The surface probe 4 is provided so as to be able to contact the surface electrode 1d located on the surface 1a side in the region R surrounded by the probe 3. And since the to-be-measured object support body 2 holds a part of the back surface 1b of the semiconductor chip 1 in a non-fixed state, when the plurality of back surface probes 3 contact the back surface electrode 1c of the semiconductor chip 1, the semiconductor chip 1 The semiconductor wafer 10 on which is formed can move from the measurement object support 2. For this reason, the stress which presses the periphery of the semiconductor wafer 10 on which the semiconductor chip 1 is formed against the measurement object support 2 does not act. Thereby, the crack and damage of the semiconductor wafer 10 and the semiconductor chip 1 in the part hold | maintained at the to-be-measured object support body 2 and the part which contacts the back surface probe 3 can be suppressed.

  In addition, after the plurality of back surface probes 3 are in contact with the back surface electrode 1c of the semiconductor chip 1, the surface probe 4 is in contact with the surface electrode 1d located on the surface 1a side in the region R surrounded by the plurality of back surface probes 3. The semiconductor wafer 10 on which the semiconductor chip 1 is formed warps in a convex shape toward the back surface 1b side. For this reason, the stress that presses the semiconductor wafer 10 on which the semiconductor chip 1 is formed by the surface probe 4 against the measurement object support 2 is applied to the portion of the measurement object support 2 that holds the semiconductor wafer 10 on which the semiconductor chip 1 is formed. It doesn't reach. Thereby, the crack and damage of the semiconductor wafer 10 in the part hold | maintained at the to-be-measured object support body 2 and the part which contacts the back surface probe 3 can be suppressed.

  Further, in the semiconductor device of the present embodiment, the foreign matter attached to the back surface 1b of the device under test 1 or the chuck stage by directly contacting the probe with each of the back electrode 1c and the surface electrode 1d of the device under test 1 It is possible to suppress the poor electrical characteristics due to the above. Moreover, the measurement accuracy of the electrical characteristics can be improved by avoiding the measurement of the electrical characteristics via the stage that contacts the back surface 1b of the DUT 1. Further, it is not necessary to take measures for adding materials to the individual objects to be measured 1 themselves, so that the process can be simplified and the cost can be reduced.

  The semiconductor test method according to the present embodiment includes a step of preparing the device under test 1 and a step of measuring the electrical characteristics of the device under test 1 using a semiconductor test apparatus. Thereby, the crack and breakage of the DUT 1 can be suppressed.

(Embodiment 2)
The second embodiment of the present invention is mainly different from the first embodiment in that a temperature changing portion is provided. Referring to FIGS. 11 to 13, the semiconductor test apparatus of the present embodiment has a temperature changing portion H. The temperature changing portion H includes a heating element 20, a back-side measured object fixing jig 21, and a front-side measured object fixing jig 22. Other configurations are the same as those in the first embodiment, and thus description thereof will not be repeated. In FIG. 11, the surface side object fixing jig 22 is not shown for convenience of explanation. In FIG. 12, the back surface probe 3 and the front surface probe 4 are indicated by arrows for convenience of explanation. Further, in FIG. 13, for convenience of explanation, each component is illustrated in a simplified manner as appropriate.

  As shown in FIG. 11 and FIG. 12, in the present embodiment, a part of the semiconductor wafer 10 is sandwiched between the back-side measured object fixing jig 21 and the front-side measured object fixing jig 22, and the heating element. The electrical characteristics of the semiconductor chip 1 as the object to be measured are measured in a state where the temperature is raised by 20.

  The temperature change part H is for changing the temperature of the DUT 1. The temperature change portion H is provided on at least one of the front surface 1a side and the back surface 1b side of the DUT 1. The temperature change portion H is provided so as to surround at least one of the surface electrode 1d with which the surface probe 4 of the device under test 1 contacts and the back surface electrode 1c with which the back surface probe 3 of the device under test 1 contacts.

  The temperature change part H has a heating element (heater part) 20 for raising the temperature of the DUT 1. A heating wire can be applied to the heater portion. First, by applying a current to the heating wire wound around the back-side measured object fixing jig 21 and the front-side measured object fixing jig 22, the back-side measured object fixing jig 21 and the front-side measured object fixing jig 21 are fixed. The jig 22 is warmed. Thereafter, the temperature of the semiconductor chip 1 is raised through the contact portion with the semiconductor wafer 10 or the air inside the back-side measured object fixing jig 21 and the front-side measured object fixing jig 22. The confirmation of the temperature rise is performed using the temperature sensor 23.

The back-side measured object fixing jig 21 and the front-side measured object fixing jig 22 are arranged so as to surround at least one semiconductor chip 1. In the present embodiment, the back-side measured object fixing jig 21 and the front-side measured object fixing jig 22 are formed so as to have a cylindrical tube portion. However, the present invention is not limited to this, and at least one Any configuration that surrounds the semiconductor chip 1 is acceptable.
Further, the back-side measured object fixing jig 21 and the front-side measured object fixing jig 22 may be held by bringing their respective end surface portions into contact with the semiconductor wafer 10.

  The back-side measured object fixing jig 21 and the front-side measured object fixing jig 22 are made of a material having excellent thermal conductivity and high thermal conductivity. For example, a metal system such as aluminum or copper is used. It can be made of materials, ceramics, etc., but is not limited thereto.

  As shown in FIG. 13, the temperature sensor 23 is provided so as to be in contact with substantially the center of the semiconductor chip 1. Since the temperature of the semiconductor chip 1 rises mainly from the part where the back-side measured object fixing jig 21 and the front-side measured object fixing jig 22 are in contact, the temperature sensor 23 is installed at the center where the temperature rise is most delayed. ing. The temperature sensor 23 is, for example, a thermocouple, and performs temperature measurement in contact with the semiconductor chip 1. However, the temperature sensor 23 is not limited to this and may be optical non-contact detection.

  In addition, although the case where the heater part 20 was provided in both the back surface side to-be-measured object fixing jig 21 and the surface side to-be-measured object fixing jig 22 was demonstrated, it should just be provided in at least one. Moreover, although the example of temperature rising was demonstrated, it is not restricted to this, An electrical property may be measured in the state which lowered temperature. That is, the temperature change part H may have a cooling body for lowering the temperature of the object to be measured. For example, the temperature can be lowered and the temperature can be lowered by installing Peltier elements on the back-side measured object fixing jig 21 and the front-side measured object fixing jig 22.

  Further, referring to FIG. 14, an elastic body 24 having heat resistance may be provided on the end surface of the back surface side object fixing jig 21 that contacts the semiconductor wafer 10. As a result, it is possible to prevent the semiconductor wafer 10 from being cracked or damaged during contact with the semiconductor wafer 10. For example, silicone rubber can be applied to the elastic body 24, but is not limited thereto.

Next, the operation of the semiconductor test apparatus of this embodiment will be described.
With reference to FIGS. 15 to 17, the semiconductor wafer 10 is placed on the main body 2 a of the measurement object support 2. The back surface probe and the front surface probe are transported to a predetermined position so as to come into contact with a predetermined semiconductor chip 1 whose electrical characteristics are to be measured. Then, the back-side measured object fixing jig 21 and the front-side measured object fixing jig 22 are also transported to predetermined positions so as to contact the semiconductor wafer 10. In FIGS. 15 to 17, the back surface probe and the front surface probe are not shown for convenience of explanation.

  As shown in FIG. 15, the back surface side object fixing jig 21 is raised. All or part of the end surface of the back-side measured object fixing jig 21 contacts the vicinity of the semiconductor chip 1. The state of contact varies depending on the state of warping when the semiconductor wafer 10 is warped.

  As shown in FIG. 16, the semiconductor wafer 10 is pushed up when it further rises. At this time, a part of the periphery of the back surface of the semiconductor wafer 10 may be separated from the measurement object support 2.

  Next, as shown in FIG. 17, the surface-side object fixing jig 22 is lowered, and the lowering is stopped after the end surface of the surface-side object fixing jig 22 contacts the vicinity of the semiconductor chip 1. Electrical characteristics are measured by bringing the back surface probe and the surface probe into contact with the back surface electrode 1c and the surface electrode 1d.

  The contact of the back surface probe and the surface probe with the back surface electrode 1c and the surface electrode 1d may be after the back surface side object fixing jig 21 and the front surface side object fixing jig 22 are in contact with the semiconductor wafer 10. Also, it may be before contact or simultaneously with contact.

  In addition, since the structure and semiconductor testing method of this embodiment other than this are the same as those of the first embodiment described above, the same elements are denoted by the same reference numerals, and the description thereof will not be repeated.

Next, the effect of this Embodiment is demonstrated.
Since the semiconductor test apparatus according to the present embodiment has the temperature changing portion H for changing the temperature of the DUT 1, the temperature environment at the time of evaluation can be changed. Thereby, the electrical characteristic of the DUT 1 in a state where the temperature environment is changed can be measured.

  Moreover, since the temperature change part H is provided in at least any one of the surface 1a and the back surface 1b of the to-be-measured object 1, it can change the temperature environment of at least one side of the to-be-measured object 1, and both surfaces. .

  Further, the temperature changing portion H is provided so as to surround at least one of the surface electrode 1d that the surface probe 4 of the device under test 1 contacts and the back surface electrode 1c that the back surface probe 3 of the device under test 1 contacts. The semiconductor chip 1 including the back electrode 1c and the front electrode 1d can be effectively changed in temperature.

  Further, the temperature changing portion H includes at least one of the heating element 20 for increasing the temperature of the device under test 1 and the cooling body for decreasing the temperature of the device under test, so The electrical characteristics of the DUT 1 can be measured in the lowered state.

  Also. In the semiconductor test apparatus according to the present embodiment, the electrical characteristics can be measured at a desired temperature without putting the entire semiconductor wafer 10 in a thermostatic chamber, so that the test apparatus can be prevented from being enlarged. Moreover, cost reduction can be achieved. Further, the evaluation time can be shortened.

(Embodiment 3)
The third embodiment of the present invention is mainly different from the second embodiment in that the temperature of the object to be measured changes depending on the gas.

  Referring to FIG. 18, in the semiconductor test apparatus of the present embodiment, temperature change portion H includes cylindrical portion (back surface side object fixing jig) 21 and cylindrical portion (front surface side object fixing jig) 22. And a gas supply unit 25 and a partition plate 26. In FIG. 18, the back surface probe, the front surface probe, and the temperature sensor are not shown for easy viewing.

  The cylinder parts 21 and 22 have a hollow shape. The cylindrical portion is made of a material having low heat conductivity and high heat insulation properties, and can be made of, for example, a resin material, but is not limited thereto.

  The gas supply part 25 is provided in the cylinder parts 21 and 22 so that gas can be supplied. The gas supply unit 25 can change the temperature of the semiconductor chip 1 by supplying gas into the cylindrical portions 21 and 22 in a state where at least one of the front electrode 1d and the back electrode 1c is surrounded by the cylindrical portions 21 and 22. Is provided.

  The gas flows along the partition plate 26 in the cylindrical portions 21 and 22 as indicated by arrows in the figure. The gas may be either a gas for increasing the temperature of the object to be measured or a gas for decreasing the temperature of the object to be measured. That is, the temperature change of the semiconductor chip 1 is performed through the gas flow in the cylinder portions 21 and 22. The temperature change is confirmed using a temperature sensor. In addition, as a gas for raising or lowering the temperature, for example, use of dry air or an inert gas that is higher or lower than the test atmosphere temperature is conceivable.

  In addition, although the case where the cylinder parts 21 and 22 were provided in the surface 1a side and the back surface 1b side of the semiconductor chip 1 was demonstrated, you may provide in either the surface 1a side or the back surface 1b side.

  In addition, referring to FIG. 19, an insulating member 27 having a concavo-convex shape may be provided on the inner peripheral surface of the cylindrical portion 21. The insulating member 27 is intended to prevent the influence of other discharges that occur during measurement of electrical characteristics on the chip. For example, a resin material is used as the material of the insulating member 27, but the material is not limited thereto. Since the creepage distance becomes longer by using the uneven shape, the discharge can be suppressed. Further, the insulating member 27 may also be provided on the cylindrical portion 22.

  In addition, since the structure and semiconductor testing method of this embodiment other than this are the same as those of the first embodiment described above, the same elements are denoted by the same reference numerals, and the description thereof will not be repeated.

Next, the effect of this Embodiment is demonstrated.
In the semiconductor test apparatus of the present embodiment, the gas supply unit 25 supplies gas into the cylinder parts 21 and 22 in a state where at least one of the front electrode 1d and the back electrode 1c is surrounded by the cylinder parts 21 and 22. Thus, the temperature of the semiconductor chip 1 is provided to be variable. For this reason, the electrical property of the DUT 1 in a state where the temperature environment is changed by the gas can be measured.

  In addition, since the insulating member having an uneven shape is provided on the inner peripheral surface of the cylindrical portion 21, the discharge can be suppressed. As a result, the occurrence of defects such as destruction of the semiconductor chip can be suppressed.

The above embodiments can be combined as appropriate.
The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

  1 object to be measured (semiconductor chip), 1a surface, 1b back surface, 1c back electrode, 1d surface electrode, 2 object support, 3 back probe, 4 surface probe, 10 semiconductor wafer, 20 heating element, 21 and 22 cylinder Part, 23 temperature sensor, 24 elastic body, 25 gas supply part, 26 partition plate, 27 insulating member, H temperature changing part, R region.

Claims (10)

A semiconductor test apparatus for measuring electrical characteristics of the object to be measured through front and back electrodes provided on the front and back surfaces of the object to be measured,
A measurement object support for holding a part of the back surface of the measurement object in an unfixed manner; and
A plurality of back surface probes for measuring electrical characteristics in electrical contact with the back surface electrode of the object to be measured;
A surface probe for measuring an electrical property in electrical contact with the surface electrode of the object to be measured;
After the plurality of back surface probes are in contact with the back surface electrode of the object to be measured, which is non-fixedly held on the measurement object support, the surface object side is located in the region surrounded by the plurality of back surface probes. A semiconductor test apparatus, wherein the surface probe is provided in contact with the surface electrode.   The semiconductor test apparatus according to claim 1, further comprising a temperature changing unit for changing a temperature of the object to be measured.   The semiconductor test apparatus according to claim 2, wherein the temperature change portion is provided on at least one of the front surface side and the back surface side of the object to be measured.   The temperature changing portion is provided so as to surround at least one of the front surface electrode that contacts the front surface probe of the object to be measured and the rear surface electrode that contacts the rear surface probe of the object to be measured. 2. The semiconductor test apparatus according to 2 or 3.   The said temperature change part contains at least any one of the heat generating body for raising the temperature of the said to-be-measured object, and the cooling body for lowering the temperature of the to-be-measured object. Semiconductor test equipment.   The semiconductor test apparatus according to claim 2, wherein the temperature changing portion has a cylindrical tube portion. The temperature changing part is
A cylindrical portion having a hollow shape;
A gas supply unit capable of supplying gas into the cylindrical part,
The gas supply unit is provided so that the temperature of the object to be measured can be changed by supplying the gas into the cylinder part in a state where at least one of the front electrode and the back electrode is surrounded by the cylinder part. The semiconductor test apparatus according to claim 2 or 3.   The semiconductor test apparatus according to claim 7, wherein the gas includes any one of a gas for increasing the temperature of the object to be measured and a gas for decreasing the temperature of the object to be measured.   The semiconductor test apparatus according to claim 6, further comprising an insulating member provided on an inner peripheral surface of the cylindrical portion and having an uneven shape. Preparing the object to be measured;
A semiconductor test method comprising: measuring electrical characteristics of the object to be measured by the semiconductor test apparatus according to claim 1.

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