JP5498811B2 - Capacitive input device - Google Patents

Capacitive input device Download PDF

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JP5498811B2
JP5498811B2 JP2010032391A JP2010032391A JP5498811B2 JP 5498811 B2 JP5498811 B2 JP 5498811B2 JP 2010032391 A JP2010032391 A JP 2010032391A JP 2010032391 A JP2010032391 A JP 2010032391A JP 5498811 B2 JP5498811 B2 JP 5498811B2
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adhesive layer
substrate
input device
lower electrode
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JP2011170511A (en
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真一 樋口
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Alps Alpine Co Ltd
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本発明は、入力座標位置を検出可能な静電容量式の入力装置に係り、特に、粘着層の誘電率に関する。   The present invention relates to a capacitance type input device capable of detecting an input coordinate position, and more particularly to a dielectric constant of an adhesive layer.

図４は本発明に対する比較例の静電容量式タッチパネル（入力装置）の部分縦断面図を示す。   FIG. 4 shows a partial longitudinal sectional view of a capacitive touch panel (input device) of a comparative example for the present invention.

図４に示すように、静電容量式タッチパネル１は、表面に下部電極パターンが形成された下部基板２と、表面に上部電極パターンが形成された上部基板３と、表面に入力領域４ａを備える表面部材（パネル）４とを備える。   As shown in FIG. 4, the capacitive touch panel 1 includes a lower substrate 2 having a lower electrode pattern formed on the surface, an upper substrate 3 having an upper electrode pattern formed on the surface, and an input region 4a on the surface. And a surface member (panel) 4.

図４に示すように、下部基板２と上部基板３間、及び上部基板３と表面部材４間は夫々、粘着層５，６を介して接合されている。   As shown in FIG. 4, the lower substrate 2 and the upper substrate 3, and the upper substrate 3 and the surface member 4 are bonded via adhesive layers 5 and 6, respectively.

上記した下部電極パターンと上部電極パターンは夫々、複数本形成され、各下部電極パターンと各上部電極パターンとがマトリクス状に配列されている。   A plurality of the lower electrode patterns and the upper electrode patterns described above are formed, and the lower electrode patterns and the upper electrode patterns are arranged in a matrix.

このため上部電極パターンと下部電極パターンの間には静電容量が発生している。そして、上下電極パターン間に大きな容量が形成されている場合には、図４に示すように指Ｆにて入力領域４ａ上を操作した際に生じる静電容量の変化率が小さくなり、低いセンサ感度しか得られない。   For this reason, a capacitance is generated between the upper electrode pattern and the lower electrode pattern. When a large capacitance is formed between the upper and lower electrode patterns, the rate of change in capacitance that occurs when the finger F is operated on the input region 4a as shown in FIG. Only sensitivity can be obtained.

図４に示すように、下部基板２と上部基板３間、及び上部基板３と表面部材４間に夫々、粘着層５，６が存在する形態においては、通常、粘着層５，６には同じものを使用しており、粘着層５，６の誘電率について考慮されていない。下記特許文献に示す発明においても、粘着層の誘電率については何も記載されていない。   As shown in FIG. 4, in the form in which the adhesive layers 5 and 6 exist between the lower substrate 2 and the upper substrate 3 and between the upper substrate 3 and the surface member 4, respectively, the adhesive layers 5 and 6 are usually the same. The dielectric constant of the adhesive layers 5 and 6 is not considered. Also in the invention shown in the following patent document, nothing is described about the dielectric constant of the adhesive layer.

特開２００８−９７２８３号公報JP 2008-97283 A 特開２００９−３７３７３号公報JP 2009-37373 A 特開平１１−３９０９３号公報JP 11-39093 A

そこで本発明は上記従来の課題を解決するためのものであり、特に、粘着層の誘電率を調整して、センサ感度を向上させることが可能な静電容量式の入力装置を提供することを目的としている。   Accordingly, the present invention is to solve the above-described conventional problems, and in particular, to provide a capacitance type input device capable of improving the sensor sensitivity by adjusting the dielectric constant of the adhesive layer. It is aimed.

本発明における静電容量式の入力装置は、
下から、基材表面に複数本の下部電極パターンが第１の方向に延出して形成された下部基板、基材表面に複数本の上部電極パターンが前記第１の方向に交差する第２の方向に延出して形成された上部基板、及び前記上部基板に対向する第１の面と指にて操作される入力領域を有する第２の面を備えた表面部材の順に積層され、前記下部基板と前記上部基板との間は第１の粘着層を介して接合されており、前記上部基板と前記表面部材との間は前記第１の粘着層よりも前記第２の面に近い第２の粘着層を介して接合されており、
前記第１の粘着層の誘電率は、前記第２の粘着層の誘電率よりも小さいことを特徴とするものである。 The capacitance type input device in the present invention is:
A lower substrate formed by extending a plurality of lower electrode patterns in a first direction on the substrate surface from below; a second substrate in which a plurality of upper electrode patterns intersects the first direction on the substrate surface An upper substrate formed extending in a direction; a first surface facing the upper substrate; and a surface member having a second surface having an input region operated by a finger, and stacked on the lower substrate in this order. And the upper substrate are bonded via a first adhesive layer, and the second substrate is closer to the second surface than the first adhesive layer between the upper substrate and the surface member. Bonded through an adhesive layer,
A dielectric constant of the first adhesive layer is smaller than a dielectric constant of the second adhesive layer.

本発明では、第１の粘着層及び第２の粘着層の各誘電率を調整して、センサ感度に優れた静電容量式の入力装置を実現するものである。すなわち本発明では、上下電極パターン間の静電容量を小さくすべく、パターン幅を変えたり、上下電極パターン間の距離を変える必要がない。また、表面に電極パターンが形成される基材の材質等を変えることも必要ない。このため、薄型の入力装置にできるし、また耐久性、耐候性、ノイズ耐性等が低下することもない。   In the present invention, by adjusting the dielectric constants of the first adhesive layer and the second adhesive layer, a capacitance type input device having excellent sensor sensitivity is realized. That is, in the present invention, there is no need to change the pattern width or the distance between the upper and lower electrode patterns in order to reduce the capacitance between the upper and lower electrode patterns. Moreover, it is not necessary to change the material of the base material on which the electrode pattern is formed. For this reason, a thin input device can be obtained, and durability, weather resistance, noise resistance, and the like are not deteriorated.

そして本発明では、上記のように、第１の粘着層の誘電率を、前記第２の粘着層の誘電率よりも小さくしている。これにより、上下電極パターン間の静電容量を小さく、操作体（例えば指）により入力領域を操作した際に生じる静電容量の変化率を大きくでき、したがって、センサ感度に優れた静電容量式の入力装置を実現できる。   In the present invention, as described above, the dielectric constant of the first adhesive layer is made smaller than that of the second adhesive layer. As a result, the capacitance between the upper and lower electrode patterns can be reduced, and the change rate of the capacitance generated when the input area is operated by the operating body (for example, a finger) can be increased. Can be realized.

本発明では、前記第１の粘着層及び前記第２の粘着層には、誘電率の異なる光学粘着剤が用いられることが好ましい。   In the present invention, it is preferable that optical adhesives having different dielectric constants are used for the first adhesive layer and the second adhesive layer.

また本発明では、前記第１の粘着層及び前記第２の粘着層には、誘電率が異なるアクリル樹脂系の材料、あるいは誘電率が異なるシリコーンゴム系の材料が用いられることが好ましい。   In the present invention, it is preferable that acrylic resin materials having different dielectric constants or silicone rubber materials having different dielectric constants are used for the first adhesive layer and the second adhesive layer.

あるいは本発明では、前記第１の粘着層及び前記第２の粘着層には、一方がアクリル樹脂系の材料で、他方が、前記アクリル樹脂とは異なる誘電率のシリコーンゴム系の材料が用いられることが好ましい。   Alternatively, in the present invention, one of the first adhesive layer and the second adhesive layer is an acrylic resin material, and the other is a silicone rubber material having a dielectric constant different from that of the acrylic resin. It is preferable.

また本発明では、前記下部電極パターンが駆動電極で、前記上部電極パターンが検出電極であり、前記下部電極パターンのパターン幅が、前記上部電極パターンのパターン幅よりも広い構成に好ましく適用できる。   In the present invention, the lower electrode pattern is a drive electrode, the upper electrode pattern is a detection electrode, and the pattern width of the lower electrode pattern is preferably applicable to a configuration wider than the pattern width of the upper electrode pattern.

本発明によれば、電極パターン幅や上下電極パターン間の距離、基材の材質等を変えることなく、粘着層の誘電率を調整することで、センサ感度に優れた入力装置を実現できる。   ADVANTAGE OF THE INVENTION According to this invention, the input device excellent in sensor sensitivity is realizable by adjusting the dielectric constant of an adhesion layer, without changing the electrode pattern width, the distance between upper and lower electrode patterns, the material of a base material, etc.

本実施形態の入力装置の分解斜視図、An exploded perspective view of the input device of the present embodiment, （ａ）は、図１の入力装置をＹ１−Ｙ２方向に沿って切断した部分縦断面図、（ｂ）は、（ａ）の各部材を接合した状態を示す入力装置の部分縦断面図、(A) is the partial longitudinal cross-sectional view which cut | disconnected the input device of FIG. 1 along the Y1-Y2 direction, (b) is the partial longitudinal cross-sectional view of the input device which shows the state which joined each member of (a), 本実施形態における上下電極パターンの部分拡大平面図、Partial enlarged plan view of the upper and lower electrode pattern in the present embodiment, 本発明が解決する課題を説明するための入力装置の部分縦断面図。The fragmentary longitudinal cross-sectional view of the input device for demonstrating the subject which this invention solves.

図１は、本実施形態の入力装置（タッチパネル）１０の分解斜視図、図２（ａ）は本実施形態の入力装置をＹ１−Ｙ２方向に沿って切断したときの部分縦断面図、図２（ｂ）は、図２（ａ）の各部材を接合した状態を示す本実施形態の入力装置１０の部分縦断面図である。   FIG. 1 is an exploded perspective view of an input device (touch panel) 10 according to the present embodiment, FIG. 2A is a partial longitudinal sectional view of the input device according to the present embodiment cut along the Y1-Y2 direction, and FIG. (B) is the fragmentary longitudinal cross-section of the input device 10 of this embodiment which shows the state which joined each member of Fig.2 (a).

図１に示すように入力装置１０は、下から基材表面に複数本の下部電極パターン１４が形成された下部基板２２、第１の粘着層３０、基材表面に複数本の上部電極パターン１３が形成された上部基板２１、第２の粘着層３１、及び、表面に入力領域１１を備えた表面部材（パネル）２０の順に積層されている。   As shown in FIG. 1, the input device 10 includes a lower substrate 22 having a plurality of lower electrode patterns 14 formed on the surface of the base material from the bottom, a first adhesive layer 30, and a plurality of upper electrode patterns 13 on the surface of the base material. Are laminated in the order of the upper substrate 21 on which the substrate is formed, the second adhesive layer 31, and the surface member (panel) 20 having the input region 11 on the surface.

図１、図２に示すように、下部基板２２は、下部基材３２と、下部基材３２の表面３２ａに形成された複数本の下部電極パターン１４とを備えて構成される。図１には一部の下部電極パターン１４のみが図示されている。図１に示すように各下部電極パターン１４は、Ｙ１−Ｙ２方向に所定の間隔を空けて配置され、また各下部電極パターン１４は、Ｘ１−Ｘ２方向（第１の方向）に直線状（帯状）に延出して形成されている。   As shown in FIGS. 1 and 2, the lower substrate 22 includes a lower base material 32 and a plurality of lower electrode patterns 14 formed on the surface 32 a of the lower base material 32. FIG. 1 shows only a part of the lower electrode pattern 14. As shown in FIG. 1, the lower electrode patterns 14 are arranged at predetermined intervals in the Y1-Y2 direction, and the lower electrode patterns 14 are linear (band-like) in the X1-X2 direction (first direction). ).

また、各下部電極パターン１４のＸ１側あるいはＸ２側の端部には下部配線パターン（図示しない）が電気的に接続されている。下部配線パターンは非入力領域１２のＸ１側領域及びＸ２側領域からＹ２側領域１２ａにまで引き回され、各下部配線パターンの先端には下部接続部１７が形成されている。図１に示すように、例えば、各下部接続部１７は、次に説明する上部接続部１５と平面視にて重ならないように、複数の上部接続部１５が形成される中央部の両側端部に、Ｘ１−Ｘ２方向に間隔を空けて配列されている。   Further, a lower wiring pattern (not shown) is electrically connected to the end of each lower electrode pattern 14 on the X1 side or X2 side. The lower wiring pattern is routed from the X1 side region and the X2 side region of the non-input region 12 to the Y2 side region 12a, and a lower connection portion 17 is formed at the tip of each lower wiring pattern. As shown in FIG. 1, for example, each lower connection portion 17 has both side end portions of a central portion where a plurality of upper connection portions 15 are formed so as not to overlap with an upper connection portion 15 described below in plan view. Are arranged at intervals in the X1-X2 direction.

図１，図２に示すように上部基板２１は、上部基材３３と、上部基材３３の表面３３ａに形成された複数本の上部電極パターン１３とを備えて構成される。図１には、一部の上部電極パターン１３のみが図示されている。図１に示すように、各上部電極パターン１３は、Ｘ１−Ｘ２方向に所定の間隔を空けて配置され、また各上部電極パターン１３は、Ｙ１−Ｙ２方向（第２の方向）に直線状（帯状）に延出して形成されている。   As shown in FIGS. 1 and 2, the upper substrate 21 includes an upper base material 33 and a plurality of upper electrode patterns 13 formed on the surface 33 a of the upper base material 33. FIG. 1 shows only a part of the upper electrode pattern 13. As shown in FIG. 1, the upper electrode patterns 13 are arranged at predetermined intervals in the X1-X2 direction, and the upper electrode patterns 13 are linear in the Y1-Y2 direction (second direction) ( It is formed to extend in a band shape.

また各上部電極パターン１３のＹ２側の端部には、上部配線パターン（図示しない）が電気的に接続され、更に、各上部配線パターンの先端には上部接続部１５が形成されている（図１参照）。各上部接続部１５は非入力領域１２のＹ２側領域１２ａの略中央部にＸ１−Ｘ２方向に間隔を空けて配列されている（図１参照）。   Further, an upper wiring pattern (not shown) is electrically connected to the end portion on the Y2 side of each upper electrode pattern 13, and an upper connection portion 15 is formed at the tip of each upper wiring pattern (see FIG. 1). Each of the upper connecting portions 15 is arranged at a substantially central portion of the Y2 side region 12a of the non-input region 12 with an interval in the X1-X2 direction (see FIG. 1).

図３（上下電極パターンの部分拡大平面図）に示すように、上下電極パターン１３，１４を平面的に見ると、各上部電極パターン１３と各下部電極パターン１４は、マトリクス状に配列されている。図３では、各上下電極パターン１３，１４は直交しているが、直交以外で平面的に交差する形態であってもよい。   As shown in FIG. 3 (partially enlarged plan view of the upper and lower electrode patterns), when the upper and lower electrode patterns 13 and 14 are viewed in plan, the upper electrode patterns 13 and the lower electrode patterns 14 are arranged in a matrix. . In FIG. 3, the upper and lower electrode patterns 13 and 14 are orthogonal to each other.

図３に示すように、下部電極パターン１４のパターン幅はＴ１からなる一定幅で、上部電極パターン１３のパターン幅はＴ２からなる一定幅である。図３に示すように下部電極パターン１４のパターン幅Ｔ１は、上部電極パターン１３のパターン幅Ｔ２よりも大きい。パターン幅Ｔ１は、３〜１０ｍｍ程度であり、パターン幅Ｔ２は、０．５〜２ｍｍ程度である。   As shown in FIG. 3, the pattern width of the lower electrode pattern 14 is a constant width composed of T1, and the pattern width of the upper electrode pattern 13 is a constant width composed of T2. As shown in FIG. 3, the pattern width T 1 of the lower electrode pattern 14 is larger than the pattern width T 2 of the upper electrode pattern 13. The pattern width T1 is about 3 to 10 mm, and the pattern width T2 is about 0.5 to 2 mm.

図３に示す実施形態では、パターン幅Ｔ１が大きい下部電極パターン１４は、駆動電極（ドライブ電極）であり、またノイズに対するシールドとしても機能する。一方、パターン幅Ｔ２が小さい上部電極パターン１３は検出電極である。   In the embodiment shown in FIG. 3, the lower electrode pattern 14 having a large pattern width T1 is a drive electrode (drive electrode) and also functions as a shield against noise. On the other hand, the upper electrode pattern 13 having a small pattern width T2 is a detection electrode.

各電極パターン１３，１４はいずれも基材表面にＩＴＯ（Indium Tin Oxide）等の透明導電材料でスパッタや蒸着により成膜される。また基材３２，３３は、ポリエチレンテレフタレート（ＰＥＴ）等の透明基材で形成される。   Each of the electrode patterns 13 and 14 is formed on the surface of the base material by sputtering or vapor deposition with a transparent conductive material such as ITO (Indium Tin Oxide). The base materials 32 and 33 are formed of a transparent base material such as polyethylene terephthalate (PET).

表面部材（パネル）２０は、プレスチックやガラス基材で形成される。表面部材２０の下面２０ｂには加飾層２４が設けられる。入力領域１１は透光性の入力領域であり、入力領域１１の周囲に着色された非透光性の非入力領域１２が形成される。   The surface member (panel) 20 is formed of a plastic or glass substrate. A decorative layer 24 is provided on the lower surface 20 b of the surface member 20. The input area 11 is a translucent input area, and a colored non-transparent non-input area 12 is formed around the input area 11.

図１に示すように、本実施形態の入力装置１０には、フレキシブルプリント基板２３が設けられる。図１に示すように、フレキシブルプリント基板２３の先端（接続部１５，１７との接続側）は、中央部２３ａと、両側端部２３ｂ，２３ｂとに分離している。フレキシブルプリント基板２３の中央部２３ａには複数の第１接続部（図示しない）が形成されており、中央部２３ａが上部接続部１５上に重ねられて、各第１接続部と各上部接続部１５とが電気的に接続されている。また、フレキシブルプリント基板２３の両側端部２３ｂには複数の第２接続部（図示しない）が形成されており、両側端部２３ｂ，２３ｂが入力装置１０の下部接続部１７上に重ねられて、各第２接続部と各下部接続部１７とが電気的に接続されている。   As shown in FIG. 1, a flexible printed circuit board 23 is provided in the input device 10 of the present embodiment. As shown in FIG. 1, the tip of the flexible printed circuit board 23 (the connection side with the connection parts 15 and 17) is separated into a central part 23a and both side end parts 23b and 23b. A plurality of first connection portions (not shown) are formed in the central portion 23a of the flexible printed circuit board 23, and the central portion 23a is overlaid on the upper connection portion 15 so that each first connection portion and each upper connection portion is overlapped. 15 is electrically connected. Further, a plurality of second connection portions (not shown) are formed on both side end portions 23b of the flexible printed circuit board 23, and both side end portions 23b, 23b are overlapped on the lower connection portion 17 of the input device 10, Each 2nd connection part and each lower connection part 17 are electrically connected.

またフレキシブルプリント基板２３では、各第１接続部及び各第２接続部が、フレキシブルプリント基板２３の表面に設置されたコネクタ３５と、図示しない配線パターンを介して電気的に接続されている。   Moreover, in the flexible printed circuit board 23, each 1st connection part and each 2nd connection part are electrically connected with the connector 35 installed in the surface of the flexible printed circuit board 23 via the wiring pattern which is not shown in figure.

本実施形態における入力装置１０は、駆動電極である各下部電極パターン１４にパルス状の電圧が順番に与えられ、このとき上部電極パターン１３に瞬間的に電流が流れる。図２（ｂ）に示すように、導電体である指Ｆ等の操作体が、入力領域１１に触れると、上下電極パターン１３，１４間の静電容量に、指Ｆと上部電極パターン１３間の静電容量が付加され、その結果、指Ｆに近い上部電極パターン１３に流れる電流が指が触れていないときと比較して変化する。したがって、ある下部電極パターン１４にパルス状の電圧を与えた状態で、順次、各上部電極パターン１３の時定数の変化を検知し、この時定数変化の連続検知を、各下部電極パターン１４に電圧を順に与えながら行うことで、入力領域１１における指Ｆが触れた位置を算出することができる。   In the input device 10 according to this embodiment, a pulsed voltage is sequentially applied to each lower electrode pattern 14 that is a drive electrode, and at this time, a current flows instantaneously through the upper electrode pattern 13. As shown in FIG. 2B, when an operating body such as a finger F as a conductor touches the input region 11, the capacitance between the upper and lower electrode patterns 13 and 14 is increased between the finger F and the upper electrode pattern 13. As a result, the current flowing through the upper electrode pattern 13 near the finger F changes as compared to when the finger is not touching. Therefore, in a state where a pulsed voltage is applied to a certain lower electrode pattern 14, a change in the time constant of each upper electrode pattern 13 is sequentially detected, and a continuous detection of this time constant change is applied to each lower electrode pattern 14. Are performed in order, the position of the input area 11 touched by the finger F can be calculated.

本実施形態における入力装置１０は、図１，図２（ａ）に示すように、第１の粘着層３０が下部基板２２と上部基板２１との間に設けられている。また、第２の粘着層３１が、上部基板２１と表面部材２０との間に設けられる。そして、図２（ａ）に示すように、下部基板２２と上部基板２１間が第１の粘着層３０を介して接合され、上部基板２１と表面部材２０との間が第２の粘着層３１を介して接合される。   As shown in FIG. 1 and FIG. 2A, the input device 10 in this embodiment is provided with a first adhesive layer 30 between a lower substrate 22 and an upper substrate 21. A second adhesive layer 31 is provided between the upper substrate 21 and the surface member 20. Then, as shown in FIG. 2A, the lower substrate 22 and the upper substrate 21 are joined via the first adhesive layer 30, and the upper substrate 21 and the surface member 20 are connected to the second adhesive layer 31. It is joined via.

本実施形態では、第１の粘着層３０の誘電率が第２の粘着層３１の誘電率よりも小さくなっている。   In the present embodiment, the dielectric constant of the first adhesive layer 30 is smaller than the dielectric constant of the second adhesive layer 31.

第１の粘着層３０及び第２の粘着層３１は、共に、入力領域１１及び非入力領域１２の全体に設けられるため、透光性の材質であることが必要である。   Since both the first adhesive layer 30 and the second adhesive layer 31 are provided in the entire input area 11 and non-input area 12, it is necessary to be a light-transmitting material.

本実施形態では、第１の粘着層３０及び第２の粘着層３１には、誘電率が異なる透明な光学粘着剤（ＯＣＡ）を用いることが出来る。ＯＣＡとしては、例えば、アクリル樹脂系の材料とシリコーンゴム系の材料があり、アクリル樹脂系の材料での誘電率は、２．７〜４．５程度、シリコーンゴム系の材料での誘電率は、３．０〜３．５程度である。このように、同じアクリル樹脂系の材料やシリコーンゴム系の材料でも誘電率に幅がある。よって、第１の粘着層３０及び第２の粘着層３１には、異なる誘電率のアクリル樹脂系の材料を使用し、あるいは、異なる誘電率のシリコーンゴム系の材料を使用することが出来る。または、第１の粘着層３０及び第２の粘着層３１の一方にアクリル樹脂系の材料を、他方にアクリル樹脂とは異なる誘電率を有するシリコーンゴム系の材料を用いることが出来る。例えば、第１の粘着層３０に、シリコーンゴム系の材料を用い、第２の粘着層３１に、シリコーンゴム系より大きい誘電率を設定しやすいアクリル樹脂系の材料を用いる構成を提示できる。   In the present embodiment, transparent optical adhesives (OCAs) having different dielectric constants can be used for the first adhesive layer 30 and the second adhesive layer 31. As OCA, for example, there are acrylic resin-based materials and silicone rubber-based materials. The dielectric constant of acrylic resin-based materials is about 2.7 to 4.5, and the dielectric constant of silicone rubber-based materials is , About 3.0 to 3.5. Thus, even the same acrylic resin material or silicone rubber material has a wide dielectric constant. Therefore, the first adhesive layer 30 and the second adhesive layer 31 can be made of acrylic resin materials having different dielectric constants, or silicone rubber materials having different dielectric constants. Alternatively, an acrylic resin material can be used for one of the first adhesive layer 30 and the second adhesive layer 31, and a silicone rubber material having a dielectric constant different from that of the acrylic resin can be used for the other. For example, a configuration in which a silicone rubber material is used for the first adhesive layer 30 and an acrylic resin material that can easily set a dielectric constant larger than that of the silicone rubber system can be presented for the second adhesive layer 31 can be presented.

このように本実施形態では、第１の粘着層３０及び第２の粘着層３１の各誘電率を調整することで、感度に優れた静電容量式の入力装置１０を実現するものである。   As described above, in this embodiment, by adjusting the dielectric constants of the first adhesive layer 30 and the second adhesive layer 31, the capacitive input device 10 with excellent sensitivity is realized.

すなわち本実施形態では、上下電極パターン間の静電容量を小さくすべく、パターン幅を変えたり、上下電極パターン間の距離を変える必要がない。また、表面に電極パターンが形成される基材３２，３３の材質等を変えることも必要ない。図３に示すように、下部電極パターン１４のパターン幅Ｔ１は広くなっているが、上下電極パターン間の静電容量を小さくすべくパターン幅Ｔ１を小さくすることは必要なく、よって、下部電極パターン１４に、入力装置１０の下方に配置される液晶ディスプレイ（図示しない）のノイズ耐性を高めるシールドとしての機能を効果的に持たせることが出来る。以上により、本実施形態における入力装置１０では、薄型化を促進でき、また耐久性、耐候性、ノイズ耐性等が低下することもない。   That is, in this embodiment, there is no need to change the pattern width or the distance between the upper and lower electrode patterns in order to reduce the capacitance between the upper and lower electrode patterns. Moreover, it is not necessary to change the material of the base materials 32 and 33 on which the electrode pattern is formed on the surface. As shown in FIG. 3, although the pattern width T1 of the lower electrode pattern 14 is wide, it is not necessary to reduce the pattern width T1 in order to reduce the capacitance between the upper and lower electrode patterns. 14 can effectively have a function as a shield for enhancing noise resistance of a liquid crystal display (not shown) disposed below the input device 10. As described above, in the input device 10 according to the present embodiment, the reduction in thickness can be promoted, and durability, weather resistance, noise resistance, and the like are not reduced.

そして本実施形態では、上記のように、第１の粘着層３０の誘電率を、第２の粘着層３１の誘電率よりも小さくしている。これにより、上下電極パターン間の静電容量を小さく、操作体（例えば指Ｆ）により入力領域１１を操作した際に生じる静電容量の変化率を大きくでき、したがって、センサ感度に優れた静電容量式の入力装置１０を実現できる。   In the present embodiment, as described above, the dielectric constant of the first adhesive layer 30 is made smaller than the dielectric constant of the second adhesive layer 31. Thereby, the electrostatic capacitance between the upper and lower electrode patterns can be reduced, and the change rate of the electrostatic capacitance generated when the input area 11 is operated by the operating body (for example, the finger F) can be increased. A capacitive input device 10 can be realized.

１０ 入力装置
１１ 入力領域
１２ 非入力領域
１２ａ Ｙ２側領域
１３ 上部電極パターン
１４ 下部電極パターン
１５ 上部接続部
１７ 下部接続部
２０ 表面部材（パネル）
２１ 上部基板
２２ 下部基板
２３ フレキシブルプリント基板
３０ 第１の粘着層
３１ 第２の粘着層
３２ 下部基材
３３ 上部基材
３５ コネクタ DESCRIPTION OF SYMBOLS 10 Input device 11 Input area | region 12 Non-input area | region 12a Y2 side area | region 13 Upper electrode pattern 14 Lower electrode pattern 15 Upper connection part 17 Lower connection part 20 Surface member (panel)
21 upper substrate 22 lower substrate 23 flexible printed circuit board 30 first adhesive layer 31 second adhesive layer 32 lower base material 33 upper base material 35 connector

Claims (5)

下から、基材表面に複数本の下部電極パターンが第１の方向に延出して形成された下部基板、基材表面に複数本の上部電極パターンが前記第１の方向に交差する第２の方向に延出して形成された上部基板、及び前記上部基板に対向する第１の面と指にて操作される入力領域を有する第２の面を備えた表面部材の順に積層され、前記下部基板と前記上部基板との間は第１の粘着層を介して接合されており、前記上部基板と前記表面部材との間は前記第１の粘着層よりも前記第２の面に近い第２の粘着層を介して接合されており、
前記第１の粘着層の誘電率は、前記第２の粘着層の誘電率よりも小さいことを特徴とする静電容量式の入力装置。 A lower substrate formed by extending a plurality of lower electrode patterns in a first direction on the substrate surface from below; a second substrate in which a plurality of upper electrode patterns intersects the first direction on the substrate surface An upper substrate formed extending in a direction; a first surface facing the upper substrate; and a surface member having a second surface having an input region operated by a finger, and stacked on the lower substrate in this order. And the upper substrate are bonded via a first adhesive layer, and the second substrate is closer to the second surface than the first adhesive layer between the upper substrate and the surface member. Bonded through an adhesive layer,
The capacitance type input device, wherein a dielectric constant of the first adhesive layer is smaller than a dielectric constant of the second adhesive layer. 前記第１の粘着層及び前記第２の粘着層には、誘電率の異なる光学粘着剤が用いられる請求項１記載の静電容量式の入力装置。   The capacitance type input device according to claim 1, wherein optical adhesives having different dielectric constants are used for the first adhesive layer and the second adhesive layer. 前記第１の粘着層及び前記第２の粘着層には、誘電率が異なるアクリル樹脂系の材料、あるいは誘電率が異なるシリコーンゴム系の材料が用いられる請求項２記載の静電容量式の入力装置。   The capacitance type input according to claim 2, wherein the first adhesive layer and the second adhesive layer are made of acrylic resin materials having different dielectric constants or silicone rubber materials having different dielectric constants. apparatus. 前記第１の粘着層及び前記第２の粘着層には、一方がアクリル樹脂系の材料で、他方が、前記アクリル樹脂とは異なる誘電率のシリコーンゴム系の材料が用いられる請求項２記載の静電容量式の入力装置。   3. The first adhesive layer and the second adhesive layer, wherein one is an acrylic resin material and the other is a silicone rubber material having a dielectric constant different from that of the acrylic resin. Capacitance type input device. 前記下部電極パターンが駆動電極で、前記上部電極パターンが検出電極であり、前記下部電極パターンのパターン幅が、前記上部電極パターンのパターン幅よりも広い請求項１ないし４のいずれか１項に記載の静電容量式の入力装置。   The lower electrode pattern is a drive electrode, the upper electrode pattern is a detection electrode, and the pattern width of the lower electrode pattern is wider than the pattern width of the upper electrode pattern. Capacitance type input device.
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