JP5496517B2 - Motor control circuit - Google Patents

Description

  The present invention relates to a motor control circuit that performs PWM control.

  2. Description of the Related Art Conventionally, a motor control circuit for performing motor current control and performing PWM control is known. In this control, the ratio of on time to off time (duty) with a constant switching cycle. The ratio is changed (see, for example, Patent Document 1).

JP 2003-324928 A

  When performing the above-described PWM control, there is a case where complementary PWM control for alternately turning on a high-side switching element and a low-side switching element arranged between a power supply and a ground (ground) may be performed. Here, when the motor current increases when the high-side switching element is turned on, when the high-side switching element is turned on, the PWM state is changed to the positive phase PWM control state, and the low-side switching element is turned on. The PWM state when the motor is in operation is referred to as a reverse phase PWM control state. In the case of such complementary PWM control, if the high-side switching element and the low-side switching element are simultaneously turned on, a through current may flow and the element may be damaged. As a countermeasure, it is preferable to provide a dead time in which the switching elements on the high side and the low side are simultaneously turned off, and this dead time is set to an optimum value according to circuit constants such as elements to be used, voltage, and current.

  However, when the dead time is provided, the effect of synchronous rectification by complementary PWM is reduced at a high duty, resulting in a decrease in efficiency. For example, if the dead time is 2 μs when the PWM carrier cycle is 50 μs, there is a total dead time of 4 μs at the rise and fall. In this case, if the duty ratio is 90%, the off time is 5 μs (= 50 μs × 0.1). Therefore, if the dead time of 4 μs is subtracted, it becomes 1 μs, and only 1 μs has the effect of synchronous rectification. There was a problem that the loss due to.

In order to solve such a problem and realize that the loss of PWM in high duty ratio control can be reduced in complementary PWM control, in the present invention, a high side switching element connected to the power supply side, A low-side switching element connected to the ground side; and PWM control means for controlling the motor by turning on and off each of the high-side and low-side switching elements with complementary PWM in accordance with a duty ratio command signal, and the complementary PWM In this control, a predetermined dead that is simultaneously turned off when the normal-phase PWM state in which the high-side switching element is on and the reverse-phase PWM state in which the low-side switching element is on is switched from one to the other. A time is provided, and the PWM control means determines that the duty ratio command signal is The performs normal PWM control is carrier frequency is constant of less than the duty ratio, when the above predetermined duty ratio, the low-side switching element of time controlled by the reverse-phase PWM in the predetermined duty ratio The carrier period is fixed to Tc, the carrier period is expressed as Tc, the time fixed to the predetermined value controlled by the reverse phase PWM is expressed as Trev, the duty ratio is expressed as DUTY, and Tc = Trev ÷ (100% By using the carrier cycle Tc calculated by -DUTY), the duty ratio is set to a value corresponding to the command signal by lowering the carrier frequency corresponding to the increase in the duty ratio.

  In particular, a predetermined value of the time controlled by the reverse phase PWM is preferably longer than the predetermined dead time. The period of the carrier frequency is determined by the time-up time of a period timer set according to the duty ratio, and the time controlled by the reverse phase PWM is the time of the off timer set according to the duty ratio It should be determined by the up time.

  As described above, according to the present invention, when the frequency of the PWM carrier is constant, the higher the duty ratio is, the more the dead time occupies the antiphase PWM control time of the switching element. Since the ratio increases, the PWM loss increases. However, at a predetermined duty ratio or higher, the PWM carrier frequency is decreased, the period becomes longer, and the off time is fixed, so that it accounts for the off time. The ratio of dead time can be reduced. Thereby, it is possible to reduce PWM loss in high duty ratio control in complementary PWM control.

  In particular, the switching can be performed smoothly by setting the predetermined value of the anti-phase PWM control time to a cycle calculated from the carrier frequency at a predetermined duty ratio that becomes a switching point for decreasing the carrier frequency. Further, by changing the carrier frequency by a simple subtraction process using a period timer and an off timer, the arithmetic process can be simplified and the circuit scale can be reduced.

It is a block circuit diagram of a motor control device based on the present invention. It is a control flowchart based on this invention. It is a figure which shows the waveform example of PWM. It is a figure which shows the relationship between a duty ratio and a carrier period. It is a figure corresponding to FIG. 1 which shows 2nd Embodiment. It is a control flow figure in a 2nd embodiment. It is a figure which shows the waveform of PWM in 2nd Embodiment.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a block circuit diagram of a motor control device according to the present invention. For example, the motor control device may be used as a drive source of an electric vehicle, and an outer rotor type motor may be used and wheels may be attached to the outer rotor. In the illustrated example, the three-phase brushless motor M is shown, but this is an example and the motor to be controlled is not limited.

  As shown in the figure, each phase coil 2 of the motor M is connected to an in-vehicle battery BT as a power source via an inverter 1 as a drive current supply means. In the inverter 1, an FET is used as a switching element, a high-side switching element 1a is connected to the power source side of the motor M, and a low-side switching element 1b is connected to the ground side.

  The power supply line connecting the battery BT and the inverter 1 is provided with a current detection sensor 3 as current detection means, and a current detection signal detected thereby is a current detection circuit of the control circuit ECU as PWM control means. 4 is input. The motor M is provided with a rotation sensor 6 as rotation detection means for detecting the rotation angle of the rotor 5, and the rotation angle signal is input to the rotation angle detection circuit 7. The rotation angle detection circuit 7 calculates the rotation (angle) position of the rotor 5 relative to the stator 8, and the rotation speed detection circuit 41 calculates the rotation speed of the rotor 4 relative to the stator 6.

  Next, the control circuit ECU will be described with reference to FIG. In FIG. 1, the main part of the circuit configuration according to the present invention is shown, and other known circuits necessary for motor control are not shown. As shown in FIG. 1, a driving operation input circuit 11 to which a driving operation signal, which may be a signal from an external sensor (not shown), for example, an accelerator operation amount is input to the control circuit ECU, From the output current command circuit 12 to which the output signal from the driving operation input circuit 11 is input, the output current comparison circuit 13 to which each output signal from the output current command circuit 12 and the current detection circuit 4 is input, and the output current comparison circuit 13 The output duty determination circuit 14 to which the output signal is input, the carrier period determination circuit 15 and the negative phase time determination circuit 16 to which the output signal from the output duty determination circuit 14 is input, and the carrier period determination circuit 15 and the negative phase time determination, respectively. A PWM signal generation circuit 17 to which each output signal from the circuit 16 is input is provided. Each circuit may include a circuit configured using an IC and a circuit configured by CPU program control. Further, detailed description of the parts understood by the illustrated circuit names and signal lines will be omitted.

  The signal output from the driving operation input circuit 11 may be increased or decreased according to the accelerator operation amount, and the signal output from the output current comparison circuit 13 is the output current command value from the output current command circuit 12 and It may change (for example, difference) according to the result of comparing the current detection value. In the output duty determination circuit 14, the duty ratio in the drive (acceleration / deceleration) output control is determined based on the output determination value from the output current comparison circuit 13, and the duty ratio determination signal is used as the PWM signal generation circuit 17. Output to. The PWM signal generation circuit 38 determines a PWM signal as a control signal that is pulse-width-modulated in a known PWM control for a brushless motor and that corresponds to the duty ratio.

  Next, the driving control procedure according to the present invention will be described with reference to the flowchart of FIG. 2 and the waveform diagram of FIG. In step ST1 of FIG. 2, the driving operation signal from the driving operation input circuit 11 and the current detection signal from the current detection circuit 4 are read. In the next step ST2, the output duty determination circuit 14 compares the values read in step ST1. The result is converted into a duty ratio DUTY as a duty ratio command signal.

In the next step ST3, it is determined whether or not the duty ratio DUTY is less than 60%. If it is determined that the duty ratio is less than 60%, the process proceeds to step ST4. This determination is performed by both the carrier cycle determination circuit 15 and the reverse phase time determination circuit 16. In step ST4, the carrier cycle determination circuit 15 sets the carrier cycle to a constant value of 50 μs (carrier frequency 20 kHz). In the next step ST5, the reverse phase time determination circuit 16 sets the reverse phase time Trev in the PWM control to the following equation (1). Is calculated.
Trev = (100% −DUTY) × 50 [μs] (1)

  In the next step ST6, a PWM signal based on the reverse phase time Trev is generated by the PWM signal generation circuit 17, and the PWM signal is output to the inverter 1. Thus, when the duty ratio DUTY is less than 60%, PWM control is performed by changing the reverse phase time Trev in a known carrier cycle constant state.

  The shortest time of the reverse phase time Trev when the duty ratio is less than 60% is 20 μs from the equation (1). Further, the dead time when both the switching elements 1a and 1b are turned off is about 4 μs, which is sufficiently shorter than the reverse phase time of 20 μs, and the influence of the loss due to the dead time can be ignored.

On the other hand, if it is determined in step ST3 that the duty ratio DUTY is 60% or more, the process proceeds to step ST7. In step ST7, the carrier cycle determination circuit 15 calculates the carrier cycle Tc by the following equation (2).
Tc = 20 ÷ (100% −DUTY) [μs] (2)

  In the next step ST8, the reverse phase time Trev is set constant at 20 μs at a duty ratio of 60%, and the process proceeds to step ST6. In step ST6, PWM control is performed in which the carrier cycle Tc and the reverse phase time Trev obtained by the above equations are constant at 20 μs. Therefore, if the duty ratio is 60% or more, the reverse phase time Trev is fixed to 20 μs. 2 may be processed as a subroutine and executed from step ST1 every predetermined cycle.

  A specific waveform example of PWM control performed in this way will be described with reference to FIG. FIG. 3 shows a waveform example in the case of 20, 40, 60, 80, 90, and 95% as a specific example of the duty ratio. As shown in the figure, when the duty ratio is 20 to 60%, the carrier period Tc is constant at 50 μs (20 kHz). In this state, the reverse phase time Trev is changed in length according to the duty ratio to obtain a PWM waveform.

  When the duty ratio is 60%, the reverse phase time Trev is 20 μs according to the above equation (1). When the duty ratio is 60% or more, the reverse phase time Trev is fixed to 20 μs at 60% as a predetermined duty ratio. At the same time, the carrier cycle Tc is calculated on the basis of the duty ratio DUTY by the equation (2). As a specific example shown in the figure, for example, when the duty ratio is 80%, the carrier cycle Tc is 100 μs. When the duty ratio is 90%, the carrier period Tc is 200 μs, and when the duty ratio is 95%, the carrier period Tc is 400 μs.

  Thus, in the illustrated example, the reverse phase time Trev is 20 μs or more when the duty ratio is less than 60%, and the reverse phase time Trev is fixed to 20 μs when the duty ratio is 60% or more. Therefore, since the dead-off time is 4 μs and synchronous rectification can be performed in 80% or more, loss due to PWM can be minimized. In the illustrated example, when the carrier frequency Tc is constant and the duty ratio is less than 60%, the maximum value of the reverse phase time Trev is 50 μs and the minimum value is 20 μs, so the range of the reverse phase time Trev is 20 to 50 μs. Therefore, the ripple current does not increase as in the case where the carrier period is simply lengthened, and the upper limit of the carrier frequency is 20 kHz, so that the carrier frequency is not increased excessively and the switching loss is not increased.

  FIG. 4 is a graph showing the relationship between the duty ratio DUTY and the carrier period. FIG. 4 corresponds to the above example. When the duty ratio is less than 60%, the carrier period is constant at 50 μs, and when the duty ratio is 60% or more, the carrier period is obtained by the above equation (2). In addition, since it becomes infinite at the duty ratio of 100%, in FIG. 4, the graph is shown with 99.5% as the upper limit, but the value from that value to the duty ratio of 100% may be set as the same value. In this case, the carrier period Tc is 4000 μs (200 Hz). Also, by mapping the graph of FIG. 4, the carrier cycle corresponding to the duty command value can be obtained, and the PWM control can be easily performed.

  In the above embodiment, the reverse cycle Trev is fixed to 20 μs with a duty ratio of 60% or more, and the carrier cycle is changed according to the duty ratio. However, as means for solving the problems of the present invention, The second embodiment is not limited to the embodiment and will be described below.

  FIG. 5 is a view corresponding to FIG. 1 described above, and the same parts as those described above are denoted by the same reference numerals and detailed description thereof is omitted. In the circuit of FIG. 5, a cycle timer 21 is provided instead of the carrier cycle determination circuit 15 of FIG. 1, and an off timer 22 is provided instead of the reverse phase time determination circuit 16.

  For example, when the frequency of the control clock is 4 MHz and the maximum on time T1max (duty ratio 100%) is set as 16000 clocks, the control can be performed with a resolution of 0 to 16000. Therefore, it is preferable that the period timer 21 can correspond to 0 to 18000 clocks. On the other hand, when the resolution of the duty ratio 100% is 200, the minimum off time T0min is 80 when the duty ratio is 60%, so the off timer 22 sets the off time count TM0 within the range of 80 to 200. Shall be set. The count-up (time-up time) of the count number TM set by the cycle timer 21 is one cycle of PWM control, and the count-up (time-up time) of the off-count number TM0 set by the off timer 22 is OFF of the PWM control. This corresponds to the output time (time controlled by reverse phase PWM).

  Next, the control procedure using the cycle timer 21 and the off timer 22 will be described with reference to the flowchart of FIG. 6 and the time chart of FIG. As shown in FIG. 7, in the PWM control in the present embodiment, the PWM output is turned off (= 0) at the beginning of the PWM cycle TM, but it may be turned on at the beginning.

As shown in FIG. 6, steps ST11 to ST13 may be the same as steps ST1 to ST3 in FIG. In step ST13, it is determined whether or not the duty ratio DUTY exceeds 60%, but the calculation can be performed by equation (3).
DUTY> (200−T0min) * 1/2 (3)
Here, T0min is the number of clocks (= 80) corresponding to the minimum off time.

If it is determined in step ST13 that the duty ratio DUTY exceeds 60%, the process proceeds to step ST14, and the divisor d is obtained by the equation (4).
d = (100−DUTY) * 2 (4)
Note that the divisor d corresponds to the duty ratio (0 to 100%) and is 0 to 200 as the number of clocks, but is 0 to 80 in step ST14.

  If it is determined that it is 60% or less, the process proceeds to step ST15, where the divisor (modulus number) d is set to a value corresponding to the minimum off time T0min (= 80). In this case, the divisor d is a fixed value.

  In step ST16 following step ST14 or step ST15, it is determined whether or not the count number TM of the cycle timer 21 is smaller than the divisor d. If the count number TM is smaller than the divisor d, the process proceeds to step ST17, where the count number TM is If it is greater than or equal to the divisor d, the process proceeds to step ST18.

  In step ST17, the count number TM of the cycle timer 21 is set to the maximum on time T1max (= 16000), and the process proceeds to step ST19. In step ST19, as in step ST13, it is determined whether or not the duty ratio DUTY exceeds 60%. When it is determined that the duty ratio DUTY exceeds 60%, the process proceeds to step ST20, and when it is determined that the duty ratio DUTY is 60% or less, the process proceeds to step ST21.

  In step ST20, the off time T0 by the off timer 22 is set to a value (= 80) corresponding to the minimum off time T0min, and the process returns to step ST11. In step ST21, the off time T0 by the off timer 22 is subtracted from the duty ratio 100% of the duty ratio DUTY (0 to 100) set in step ST12, and the duty ratio 100% is converted to correspond to the number of clocks 200. Return to step ST11. The count number TM in the PWM control in this case is the above-described maximum on time T1max, and the off time T0 is the value (80 to 200) set in step ST20 or ST21.

In step ST18 which proceeds when it is determined in step ST16 that the count number TM is greater than or equal to the divisor d, the count number TM of the period timer 21 is obtained by equation (5).
TM = TM-d (5)

  In step ST22 following step ST18, it is determined whether or not the off-timer 22 has timed up (TM0 = 0). If it is determined that the time has not expired, the process proceeds to step ST23, where it is determined that the time has expired. In that case, the process proceeds to step ST24. In step ST23, the PWM output is turned off (= 0), the count TM0 of the off timer 22 is counted down (TM0-1), and the process returns to step ST11. In step ST24, the PWM output is turned on (= 1), and the process returns to step ST11.

  Even if it does in this way, there can exist an effect similar to the above. For example, the case where the duty ratio DUTY exceeds 60% as shown in FIG. 7 will be described. In this case, the divisor d is set to the value calculated by the equation (4) in step ST14, and in the first cycle, the process proceeds to step ST17, where the cycle timer 21 is set to the maximum on-time T1max equivalent (= 16000), Since the process further proceeds to step ST20, the off-time count TM0 is set to be equivalent to the minimum off-time TMmin (= 80).

  In the next cycle, the count number TM (= 16000) is equal to or greater than the divisor d, so the process proceeds from step ST16 to step ST18. In step ST18, the count number TM of the period timer 21 is subtracted by the divisor d and the process proceeds to step ST22. . Since the count number TM0 of the off timer 22 is larger than 0 (80> 0) because it is the value set in step ST21, the process proceeds to step ST23, and the count TM0 is decremented by 1, and the process proceeds to the next cycle.

  After the next cycle, step ST23 is repeated until the minimum OFF time T0min equivalent (= 80) is reached. During that time, the PWM output is OFF, and when the count number TM0 of the OFF timer 21 becomes 0, the process proceeds to step ST24, where the PWM output is Turn on. When the count number TM of the period timer 21 when turned on becomes a value less than the divisor d by the subsequent subtraction of the divisor d, the process proceeds from step ST16 to step ST17, and the above steps are repeated thereafter. In this way, PWM control is performed based on the ratio between the off time and the on time per cycle in accordance with the duty ratio DUTY.

  For example, when the duty ratio is 80%, the divisor d = 40 and the count number TM0 = 80 of the off timer 22, the count number TM of the cycle timer 21 when step ST23 is repeated 80 times is 12800 (= 16000− 40 * 80), and the subsequent PWM output is turned on 320 (= 1800/40) times. In this case, the PWM duty ratio is 80% (= 320 / (80 + 320)). This corresponds to the 80% case shown in FIG. 3 of the above embodiment. That is, 16000 clocks of the maximum on-time T1max divided by 400 (= 80 + 320) is 400, and 1 cycle of 4 MHz (= 250 ns) is 400 μs (10 kHz) per cycle, 80 of which are off output time 20 μs.

  As described above, when the duty ratio exceeds 60%, the off time TM0 does not become shorter than 80 clocks, and similarly to the above-described embodiment, the effect of synchronous rectification by complementary PWM at a high duty ratio is prevented. High efficiency can be maintained. As described above, when the frequency of the control clock is 4 MHz and one control clock is 250 ns, the fixed off time TM0 is 20 μs, which is the same as the above embodiment.

  If the duty ratio is 60% or less, the divisor d is fixed to the minimum off time T0min equivalent (= 80) in step ST15, and after steps ST16 and ST17 as described above, the off time TM0 is changed to the duty ratio in step ST21. When set according to DUTY and proceeding to step ST18, the same processing as described above is performed.

  For example, when the duty ratio is 40%, since the divisor d = 80 and the count number TM0 = 120 of the off timer 22, the count number TM of the cycle timer 21 when step ST23 is repeated 120 times is 9600 (= 16000− 80 * 120), and the subsequent PWM output is turned on 80 (= 6400/80) times. In this case, the duty ratio is 40% (= 80 / (120 + 80)). This case also corresponds to the 40% case shown in FIG. 3 of the above embodiment. That is, one cycle is 50 μs (20 kHz) for 200 cycles of one clock (= 250 ns).

  As described above, also in the second embodiment, the carrier frequency (cycle) can be changed in accordance with the duty ratio in step ST18, and the same effect as the above-described embodiment can be obtained. In addition, since the carrier frequency is changed by a simple subtraction process, the calculation process can be simplified and the circuit scale can be reduced.

  The motor control circuit according to the present invention has the effect of suppressing loss in PWM control due to dead time in which the high-side and low-side switching elements are simultaneously turned off in the case of performing complementary PWM control, and motor control for performing PWM control Useful for all devices using circuits

DESCRIPTION OF SYMBOLS 1 Inverter 1a High side switching element 1b Low side switching element 11 Driving | operation operation input circuit 14 Output Duty determination circuit 15 Carrier period determination circuit 16 Reverse phase time determination circuit 17 PWM signal generation circuit 21 Period timer 22 Off timer ECU Control circuit M Motor

Claims (3)

The high-side switching element connected to the power supply side, the low-side switching element connected to the ground side, and the high-side and low-side switching elements according to the duty ratio command signal are turned on and off with complementary PWM to control the motor. PWM control means for
In the control with the complementary PWM, the normal phase PWM state in which the high side switching element is on and the reverse phase PWM state in which the low side switching element is on are simultaneously turned off when switching from one to the other. There is a predetermined dead time,
The PWM control means is
When the duty ratio command signal is less than a predetermined duty ratio, normal PWM control is performed in which the carrier frequency is constant,
Given in the case of more than the duty ratio fixed time controlled by the reverse-phase PWM to a predetermined value the low side switching element is turned on in the predetermined duty ratio, represents the carrier cycle in Tc, the reverse phase The time fixed to the predetermined value controlled by PWM is represented by Trev, the duty ratio is represented by DUTY,
Tc = Trev ÷ (100% −DUTY)
A motor control circuit characterized in that the duty ratio is reduced to a value corresponding to the command signal by lowering the carrier frequency in response to an increase in the duty ratio by using the carrier cycle Tc calculated in (1 ).   The motor control circuit according to claim 1, wherein a predetermined value of the time controlled by the reverse phase PWM is longer than the predetermined dead time. A period of the carrier frequency is determined by a time-up time of a period timer set according to the duty ratio;
3. The motor control circuit according to claim 1, wherein a time controlled by the reverse phase PWM is determined by a time-up time of an off timer set in accordance with the duty ratio.

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