JP5493956B2 - Manufacturing method of semiconductor wafer - Google Patents
Manufacturing method of semiconductor wafer Download PDFInfo
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- JP5493956B2 JP5493956B2 JP2010027213A JP2010027213A JP5493956B2 JP 5493956 B2 JP5493956 B2 JP 5493956B2 JP 2010027213 A JP2010027213 A JP 2010027213A JP 2010027213 A JP2010027213 A JP 2010027213A JP 5493956 B2 JP5493956 B2 JP 5493956B2
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- 239000004065 semiconductor Substances 0.000 title claims description 62
- 238000004519 manufacturing process Methods 0.000 title claims description 33
- 238000005498 polishing Methods 0.000 claims description 204
- 239000006061 abrasive grain Substances 0.000 claims description 161
- 238000007517 polishing process Methods 0.000 claims description 70
- 239000002245 particle Substances 0.000 claims description 24
- 238000007518 final polishing process Methods 0.000 claims description 19
- 238000000034 method Methods 0.000 claims description 17
- 239000003795 chemical substances by application Substances 0.000 claims description 15
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 10
- 239000008119 colloidal silica Substances 0.000 claims description 6
- 235000012431 wafers Nutrition 0.000 description 141
- 238000004140 cleaning Methods 0.000 description 35
- 230000007547 defect Effects 0.000 description 23
- 230000002776 aggregation Effects 0.000 description 13
- KWYUFKZDYYNOTN-UHFFFAOYSA-M Potassium hydroxide Chemical compound [OH-].[K+] KWYUFKZDYYNOTN-UHFFFAOYSA-M 0.000 description 12
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 9
- 229910052710 silicon Inorganic materials 0.000 description 9
- 239000010703 silicon Substances 0.000 description 9
- 230000003746 surface roughness Effects 0.000 description 8
- 238000005054 agglomeration Methods 0.000 description 7
- 238000004220 aggregation Methods 0.000 description 6
- 238000005259 measurement Methods 0.000 description 6
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 4
- MCMNRKCIXSYSNV-UHFFFAOYSA-N Zirconium dioxide Chemical compound O=[Zr]=O MCMNRKCIXSYSNV-UHFFFAOYSA-N 0.000 description 4
- 239000007864 aqueous solution Substances 0.000 description 4
- 239000002904 solvent Substances 0.000 description 4
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 description 3
- 230000004931 aggregating effect Effects 0.000 description 3
- 239000003513 alkali Substances 0.000 description 3
- 230000010354 integration Effects 0.000 description 3
- 239000003002 pH adjusting agent Substances 0.000 description 3
- 239000002002 slurry Substances 0.000 description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 2
- 239000000654 additive Substances 0.000 description 2
- 229910000272 alkali metal oxide Inorganic materials 0.000 description 2
- 150000001340 alkali metals Chemical class 0.000 description 2
- 229910001860 alkaline earth metal hydroxide Inorganic materials 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
- CETPSERCERDGAM-UHFFFAOYSA-N ceric oxide Chemical compound O=[Ce]=O CETPSERCERDGAM-UHFFFAOYSA-N 0.000 description 2
- 229910000422 cerium(IV) oxide Inorganic materials 0.000 description 2
- 230000000052 comparative effect Effects 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 2
- 238000002296 dynamic light scattering Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000011156 evaluation Methods 0.000 description 2
- AMWRITDGCCNYAT-UHFFFAOYSA-L hydroxy(oxo)manganese;manganese Chemical compound [Mn].O[Mn]=O.O[Mn]=O AMWRITDGCCNYAT-UHFFFAOYSA-L 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 238000005406 washing Methods 0.000 description 2
- BVKZGUZCCUSVTD-UHFFFAOYSA-M Bicarbonate Chemical compound OC([O-])=O BVKZGUZCCUSVTD-UHFFFAOYSA-M 0.000 description 1
- JOYRKODLDBILNP-UHFFFAOYSA-N Ethyl urethane Chemical compound CCOC(N)=O JOYRKODLDBILNP-UHFFFAOYSA-N 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 239000003082 abrasive agent Substances 0.000 description 1
- 150000008044 alkali metal hydroxides Chemical class 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- -1 and in this respect Substances 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- 238000001962 electrophoresis Methods 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 239000012467 final product Substances 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 150000007524 organic acids Chemical class 0.000 description 1
- 239000003960 organic solvent Substances 0.000 description 1
- 239000000047 product Substances 0.000 description 1
- 238000006748 scratching Methods 0.000 description 1
- 230000002393 scratching effect Effects 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
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- Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Description
本発明は、半導体ウェーハの製造方法に関するものであり、詳しくはスクラッチ等の研磨工程に起因する表面欠陥（以下「研磨起因欠陥」という）を低減可能な半導体ウェーハの製造方法に関するものである。 The present invention relates to a method for manufacturing a semiconductor wafer, and more particularly to a method for manufacturing a semiconductor wafer capable of reducing surface defects (hereinafter referred to as “polishing-induced defects”) resulting from a polishing process such as scratching.
シリコンウェーハ等の半導体ウェーハ（以下、単に「ウェーハ」ともいう）の一般的な製造プロセスは、図２に示すように、スライス工程３１、面取り工程３２、ラッピング工程３３、エッチング工程３４、研磨工程３５および最終洗浄工程３６によって構成されている。このうち、研磨工程３５としては、ウェーハの表面のみを研磨する片面研磨またはウェーハの表面と裏面を同時に研磨する両面研磨が用いられる（以下、両面研磨におけるウェーハの表面と裏面も総称して「表面」という）。上記研磨工程３５では、通常、平坦化を目的とした粗研磨工程と、表面粗さの改善や研磨傷の除去を目的とした仕上げ研磨工程等から成る複数のステップ（以下「複数段研磨」という）が採用される（例えば特許文献１参照）。 As shown in FIG. 2, a general manufacturing process of a semiconductor wafer such as a silicon wafer (hereinafter also simply referred to as “wafer”) includes a slicing step 31, a chamfering step 32, a lapping step 33, an etching step 34, and a polishing step 35. And a final cleaning step 36. Among these, as the polishing step 35, single-side polishing for polishing only the front surface of the wafer or double-side polishing for simultaneously polishing the front and back surfaces of the wafer (hereinafter, the front and back surfaces of the wafer in double-side polishing are also collectively referred to as “front surface”). "). In the polishing step 35, a plurality of steps (hereinafter referred to as “multi-step polishing”), which are generally composed of a rough polishing step for flattening and a final polishing step for the purpose of improving surface roughness and removing polishing flaws, etc. ) Is employed (see, for example, Patent Document 1).
この複数段研磨では、各研磨工程において、研磨砥粒（以下、単に「砥粒」ともいう）を含む研磨剤を供給しながらウェーハ表面を研磨布に摺接させた状態でウェーハを運動させて、ウェーハの表面を研磨する。図２に、ウェーハの平坦度の向上を目的とした粗研磨工程３５ａ、粗研磨工程で生じたウェーハの表面粗さ、歪み、くもりを除去するために仕上げ研磨工程３５ｃの１段階前に行う仕上げ前研磨工程３５ｂおよび仕上げ研磨工程３５ｃから成る３段研磨の研磨工程３５の例を示す。各研磨工程の終了後においては、必要に応じて、ウェーハの表面が洗浄される。具体的には、粗研磨後洗浄工程３５ａ’、仕上げ前研磨後洗浄工程３５ｂ’および最終洗浄工程３６が付加される。また、上記の各研磨工程後の洗浄工程以外に、スライス工程３１から粗研磨工程３５ａまでの各工程の間で、適宜洗浄工程が付加される。各洗浄工程では、１段階だけでなく必要に応じて２段階以上の繰り返し洗浄が行われる。
なお、図２には、３段研磨の研磨工程３５の例を示したが、研磨工程３５は、最終製品の仕様に応じて、粗研磨後洗浄工程３５ａ’と仕上げ前研磨工程３５ｂとの間に１ステップ以上の研磨工程を付加した４段以上の研磨としてもよい。
In this multi-stage polishing, in each polishing step, the wafer is moved in a state where the surface of the wafer is in sliding contact with the polishing cloth while supplying an abrasive containing abrasive grains (hereinafter also simply referred to as “abrasive grains”). Polish the surface of the wafer. FIG. 2 shows a rough polishing step 35a for improving the flatness of the wafer, and a finish performed one stage before the final polishing step 35c in order to remove the surface roughness, distortion, and cloudiness of the wafer generated in the rough polishing step. An example of a three-stage polishing step 35 including a pre-polishing step 35b and a final polishing step 35c will be described. After the completion of each polishing step, the surface of the wafer is cleaned as necessary. Specifically, a post-polishing cleaning step 35a ′, a pre-polishing post-polishing cleaning step 35b ′, and a final cleaning step 36 are added. In addition to the cleaning step after each polishing step, a cleaning step is appropriately added between the steps from the slicing step 31 to the rough polishing step 35a. In each cleaning process, not only one stage but also two or more stages are repeatedly cleaned as necessary.
FIG. 2 shows an example of the polishing process 35 of the three-stage polishing, but the polishing process 35 is performed between the rough post-polishing cleaning process 35a ′ and the pre-finish polishing process 35b according to the specifications of the final product. Further, four or more steps of polishing may be added by adding a polishing step of one step or more.
通常、粗研磨工程（図２の例では３５ａ）では、比較的大きい粒径の研磨砥粒（以下「粗研磨砥粒」という）を用いて、ウェーハ片面で５μｍ以上の研磨取り代で、一方、仕上げ研磨工程（図２の例では３５ｃ）では、比較的小さい粒径の研磨砥粒（以下「仕上げ研磨砥粒」という）を用いて、ウェーハ片面で０．０１μｍ以上の研磨取り代でウェーハ表面が研磨される。粗研磨工程と仕上げ研磨工程との間に行われる仕上げ前研磨工程（図２の例では３５ｂ）では、粗研磨砥粒よりも小さくかつ仕上げ研磨砥粒よりも大きい粒径を有する研磨砥粒（以下「仕上げ前研磨砥粒」という）を用いて、ウェーハ片面で０．１μｍ以上の研磨取り代でウェーハ表面が研磨される。すなわち、研磨砥粒の粒径は、粗研磨砥粒、仕上げ前研磨砥粒、仕上げ研磨砥粒の順に小さくなるように設定される。
また、研磨砥粒の濃度は、研磨砥粒の粒径、研磨速度、研磨取り代等に応じて、一般的に、粗研磨工程および仕上げ前研磨工程では高く、逆に、仕上げ研磨工程では低く設定される。
Usually, in the rough polishing step (35a in the example of FIG. 2), a relatively large abrasive grain (hereinafter referred to as “rough abrasive grain”) is used with a polishing allowance of 5 μm or more on one side of the wafer. In the final polishing step (35c in the example of FIG. 2), a relatively small abrasive grain (hereinafter referred to as “finished abrasive grain”) is used to remove the wafer with a polishing allowance of 0.01 μm or more on one side of the wafer. The surface is polished. In the pre-finish polishing step (35b in the example of FIG. 2) performed between the rough polishing step and the final polishing step, polishing abrasive grains having a particle size smaller than the coarse polishing abrasive grains and larger than the final polishing abrasive grains ( Hereinafter, the wafer surface is polished with a polishing allowance of 0.1 μm or more on one side of the wafer using “pre-finishing abrasive grains”. That is, the grain size of the abrasive grains is set so as to decrease in the order of coarse abrasive grains, pre-finish abrasive grains, and finish abrasive grains.
The concentration of the abrasive grains is generally high in the rough polishing process and the pre-finishing polishing process, and conversely low in the final polishing process, depending on the grain size, polishing rate, polishing allowance, etc. of the polishing abrasive grains. Is set.
上記の複数段研磨において、前段の研磨工程で使用された研磨剤中の研磨砥粒が研磨の終了後にウェーハ表面に残存している状態で次の研磨工程を行うと、次の研磨工程で、残存している研磨砥粒に起因してウェーハ表面にスクラッチ等の研磨起因欠陥が生成するといった問題が発生する。このため、複数段研磨においては、各研磨工程の終了後に、必要に応じて、ウェーハ表面を洗浄する（図２の例では３５ａ’および３５ｂ’）ことによってウェーハ表面に残存する研磨砥粒を除去してから、次の研磨工程でウェーハ表面の研磨を行う。 In the above-described multi-stage polishing, when the next polishing process is performed in a state where the abrasive grains in the polishing agent used in the previous polishing process remain on the wafer surface after the polishing, in the next polishing process, Due to the remaining abrasive grains, there arises a problem that polishing-induced defects such as scratches are generated on the wafer surface. For this reason, in multi-stage polishing, the polishing surface remaining on the wafer surface is removed by cleaning the wafer surface as necessary after the completion of each polishing step (35a ′ and 35b ′ in the example of FIG. 2). Then, the wafer surface is polished in the next polishing step.
複数段研磨において、粗研磨工程で使用される砥粒（粗研磨砥粒）は粒径が比較的大きいため、砥粒の凝集が起こりにくい。従って、粗研磨工程の終了後にウェーハ表面を洗浄することによってウェーハ表面から研磨砥粒を容易に除去することができる。
しかしながら、粗研磨工程後、使用される研磨砥粒の粒径が小さくなるに従って研磨砥粒の凝集が起こり易くなり、凝集した研磨砥粒がウェーハ表面に付着して、研磨後にウェーハ表面を洗浄しても凝集した研磨砥粒が完全には除去できなくなる。この結果、ウェーハ表面に研磨砥粒が残存して、この状態で次工程の研磨を行うとウェーハ表面に研磨起因欠陥が生成する。
特に、仕上げ研磨工程後の最終洗浄工程（図２の例では３６）が終了したウェーハの表面に研磨起因欠陥が存在すると、ウェーハから製造されるデバイスの高集積化が阻害される。従って、ウェーハの研磨工程においては、研磨起因欠陥が低減できるような研磨条件を設定する必要がある。
In the multi-stage polishing, the abrasive grains (coarse polishing abrasive grains) used in the rough polishing step have a relatively large particle size, and thus aggregation of the abrasive grains hardly occurs. Therefore, the abrasive grains can be easily removed from the wafer surface by cleaning the wafer surface after the rough polishing step.
However, after the rough polishing process, the abrasive grains tend to aggregate as the grain size of the abrasive grains used decreases, and the aggregated abrasive grains adhere to the wafer surface, and the wafer surface is washed after polishing. However, the agglomerated abrasive grains cannot be completely removed. As a result, polishing abrasive grains remain on the wafer surface, and if the next process is polished in this state, a polishing-induced defect is generated on the wafer surface.
In particular, if polishing-induced defects exist on the surface of the wafer after the final cleaning step (36 in the example of FIG. 2) after the finish polishing step, high integration of devices manufactured from the wafer is hindered. Therefore, in the wafer polishing process, it is necessary to set polishing conditions that can reduce polishing-induced defects.
研磨工程においてウェーハの表面に付着した研磨砥粒を完全に除去する方法の一つとして、研磨後の洗浄能力を強化する方法がある。しかしながら、洗浄能力の強化は、洗浄工数および洗浄費用の増大だけでなく、ウェーハ表面のヘイズ値（粗さの指標）といった洗浄後のウェーハ表面の品質低下を招くので、好ましくない。 One method for completely removing the abrasive grains adhering to the surface of the wafer in the polishing step is to enhance the cleaning ability after polishing. However, the enhancement of the cleaning capability is not preferable because it not only increases the number of cleaning steps and the cleaning cost but also causes the quality of the wafer surface after cleaning, such as the haze value (roughness index), of the wafer surface.
そこで、本発明の目的は、複数段の研磨工程を備える半導体ウェーハの製造方法において、デバイスの高集積化に適応し得る高い表面品質を有する半導体ウェーハを得るために研磨起因欠陥を低減するための手段を提供することにある。 Accordingly, an object of the present invention is to reduce defects caused by polishing in order to obtain a semiconductor wafer having a high surface quality that can be applied to high integration of devices in a semiconductor wafer manufacturing method including a plurality of polishing steps. It is to provide means.
本願発明者らは、上記目的を達成するために、複数段の研磨工程を備える半導体ウェーハの製造方法において最終洗浄後のウェーハの表面に研磨起因欠陥が生成する原因について鋭意検討を重ねた結果、以下の知見を得るに至った。
（１）最終洗浄後のウェーハ表面の研磨起因欠陥は、仕上げ前研磨砥粒が凝集して仕上げ前研磨後のウェーハ表面に付着することに起因して生成する。すなわち、仕上げ前研磨工程中に仕上げ前研磨砥粒が凝集してウェーハ表面に付着し、仕上げ前研磨工程の後にウェーハ表面の洗浄を行ってもこの凝集した砥粒を完全には除去することができず、この結果、凝集した砥粒がウェーハ表面に残存する。この状態で次工程の仕上げ研磨工程を行うと、ウェーハ表面に残存する凝集した砥粒に起因して、ウェーハ表面にスクラッチ等の表面欠陥が生成する。仕上げ研磨工程では粗研磨工程や仕上げ前研磨工程と比較して研磨取り代が小さいので、この表面欠陥は仕上げ研磨では除去することができず、この結果、仕上げ研磨工程後の最終洗浄を行ってもウェーハ表面に欠陥が残留する。
（２）従って、仕上げ前研磨工程中に仕上げ前研磨砥粒が凝集してウェーハ表面に付着することが抑制できれば、最終洗浄後のウェーハ表面の研磨起因欠陥を低減することが可能となる。
（３）さらに、仕上げ前研磨工程の１段階前（仕上げ研磨工程の２段階前）に行われる研磨工程（以下「仕上げ２段前研磨工程」という）に使用される研磨剤中の研磨砥粒（以下「仕上げ２段前研磨砥粒」という）の粒径と比較して、仕上げ前研磨砥粒の粒径が小さいほど（つまり、仕上げ２段前研磨砥粒と仕上げ前研磨砥粒との粒径の差が大きいほど）、仕上げ前研磨工程中に仕上げ前研磨砥粒が凝集してウェーハ表面に付着する現象が顕著になる。
以上の知見に基づき、本願発明者らは、上記の仕上げ前研磨工程中に仕上げ前研磨砥粒が凝集してウェーハ表面に付着する現象は、仕上げ前研磨砥粒の粒径を仕上げ２段前研磨砥粒の粒径以上にするとともに、仕上げ前研磨工程に使用される研磨剤中の仕上げ前研磨砥粒の濃度を、仕上げ２段前研磨工程で使用される研磨剤中の仕上げ２段前研磨砥粒の濃度以下に設定することによって抑制できることを見出し、本発明を完成するに至った。
In order to achieve the above object, the inventors of the present invention have conducted extensive studies on the cause of the generation of polishing-induced defects on the surface of the wafer after the final cleaning in the method of manufacturing a semiconductor wafer including a plurality of stages of polishing steps. The following findings were obtained.
(1) The polishing-induced defects on the wafer surface after the final cleaning are generated due to the aggregation of the pre-finish polishing abrasive grains and the adhesion to the wafer surface after the pre-finish polishing. That is, the pre-finish polishing abrasive grains aggregate and adhere to the wafer surface during the pre-finish polishing process, and even if the wafer surface is washed after the pre-finish polishing process, the aggregate abrasive grains can be completely removed. As a result, aggregated abrasive grains remain on the wafer surface. When the next final polishing step is performed in this state, surface defects such as scratches are generated on the wafer surface due to aggregated abrasive grains remaining on the wafer surface. In the final polishing process, the polishing allowance is small compared to the rough polishing process and the pre-finish polishing process, so this surface defect cannot be removed by final polishing, and as a result, the final cleaning after the final polishing process is performed. Also, defects remain on the wafer surface.
(2) Therefore, if the pre-finish polishing abrasive grains can be prevented from aggregating and adhering to the wafer surface during the pre-finish polishing step, it is possible to reduce polishing-induced defects on the wafer surface after the final cleaning.
(3) Further, the abrasive grains in the abrasive used in the polishing process (hereinafter referred to as “the final two-stage polishing process”) performed one stage before the final polishing process (two stages before the final polishing process). The smaller the particle size of the pre-finishing abrasive grain (that is, the difference between the pre-finishing second stage polishing abrasive grain and the pre-finishing polishing abrasive grain) than the grain size (hereinafter referred to as “the pre-finishing second stage polishing abrasive grain”). The larger the difference in particle size), the more noticeable is the phenomenon that pre-finish abrasive grains aggregate and adhere to the wafer surface during the pre-finish polishing step.
Based on the above knowledge, the inventors of the present application have found that the phenomenon that the pre-finishing abrasive grains aggregate and adhere to the wafer surface during the pre-finishing polishing process is the same as that of the final polishing abrasive grain size. The particle size of the abrasive grains is set to be equal to or larger than that, and the concentration of the pre-finish abrasive grains in the abrasive used in the pre-finish polishing step is set to be two steps before the finish in the abrasive used in the two-stage pre-polishing step. It has been found that it can be suppressed by setting the concentration to be equal to or less than the concentration of the abrasive grains, and the present invention has been completed.
すなわち、上記目的は、下記の手段によって達成された。
[１]半導体ウェーハ表面を研磨する研磨工程を含む半導体ウェーハの製造方法であって、
前記研磨工程は、少なくとも、仕上げ研磨工程の２段階前に行われる仕上げ２段前研磨工程、仕上げ研磨工程の１段階前に行われる仕上げ前研磨工程、および仕上げ研磨工程、をこの順に含む３段階の研磨工程から成り、かつ、
前記仕上げ前研磨工程に使用される研磨剤は、下記（１）および（２）を満たすことを特徴とする半導体ウェーハの製造方法。
（１）含有される研磨砥粒（仕上げ前研磨砥粒）の粒径が、前記仕上げ２段前研磨工程に使用される研磨剤中の研磨砥粒（仕上げ２段前研磨砥粒）の粒径以上である。
（２）前記仕上げ前研磨砥粒の濃度が、前記仕上げ２段前研磨工程に使用される研磨剤の仕上げ２段前研磨砥粒の濃度以下である。
[２]前記仕上げ前研磨砥粒の粒径は、前記仕上げ２段前研磨砥粒の粒径の１倍以上かつ４倍以下である[１]に記載の半導体ウェーハの製造方法。
[３]前記仕上げ前研磨砥粒の濃度は、前記仕上げ２段前研磨砥粒の濃度の０．０１倍〜０．３倍の範囲である[１]または[２]に記載の半導体ウェーハの製造方法。
[４]前記仕上げ前研磨砥粒の粒径は、７０ｎｍ以上かつ２００ｎｍ以下である[１]〜[３]のいずれかに記載の半導体ウェーハの製造方法。
[５]前記仕上げ前研磨砥粒の濃度は、０．０５質量％〜０．３質量％の範囲である[１]〜[４]のいずれかに記載の半導体ウェーハの製造方法。
[６]前記仕上げ前研磨砥粒のゼータ電位は−３０ｍＶ未満である[１]〜[５]のいずれかに記載の半導体ウェーハの製造方法。
[７]前記仕上げ前研磨工程におけるウェーハ表面のゼータ電位は０ｍＶ未満である[１]〜[６]のいずれかに記載の半導体ウェーハの製造方法。
[８]前記仕上げ前研磨砥粒はコロイダルシリカである[１]〜[７]のいずれかに記載の半導体ウェーハの製造方法。
That is, the above object has been achieved by the following means.
[1] A semiconductor wafer manufacturing method including a polishing step for polishing a semiconductor wafer surface,
The polishing process includes at least three stages including, in this order, a two-step pre-finishing polishing process performed two stages before the final polishing process, a pre-finishing polishing process performed one stage before the final polishing process, and a final polishing process in this order. Consisting of a polishing process, and
The polishing agent used in the pre-finish polishing step satisfies the following (1) and (2):
(1) The grain size of the abrasive grains (pre-finishing polishing abrasive grains) contained in the abrasive used in the polishing process before the final two-stage polishing is determined. It is more than the diameter.
(2) The concentration of the abrasive grains before finishing is equal to or less than the concentration of the abrasive grains before finishing 2 stages of the polishing agent used in the polishing process before 2 stages of finishing.
[2] The method for producing a semiconductor wafer according to [1], wherein the grain size of the pre-finishing abrasive grains is 1 to 4 times the grain diameter of the pre-finishing second stage abrasive grains.
[3] The semiconductor wafer according to [1] or [2], wherein the concentration of the pre-finish polishing abrasive grains is in a range of 0.01 to 0.3 times the concentration of the pre-finishing second polishing abrasive grains. Production method.
[4] The method for producing a semiconductor wafer according to any one of [1] to [3], wherein the grain size of the pre-finish abrasive grains is 70 nm or more and 200 nm or less.
[5] The method for producing a semiconductor wafer according to any one of [1] to [4], wherein the concentration of the pre-finish abrasive grains is in the range of 0.05% by mass to 0.3% by mass.
[6] The method for producing a semiconductor wafer according to any one of [1] to [5], wherein the pre-finish abrasive grain has a zeta potential of less than −30 mV.
[7] The method for producing a semiconductor wafer according to any one of [1] to [6], wherein a zeta potential on the wafer surface in the pre-finish polishing step is less than 0 mV.
[8] The method for producing a semiconductor wafer according to any one of [1] to [7], wherein the pre-finish polishing abrasive is colloidal silica.
本発明によれば、複数段研磨工程を経て製造される半導体ウェーハ表面の研磨起因欠陥を低減することができ、その結果、デバイスの高集積化に適応可能な高い表面品質を有する半導体ウェーハを提供することができる。 According to the present invention, it is possible to reduce defects caused by polishing on the surface of a semiconductor wafer manufactured through a multi-step polishing process, and as a result, a semiconductor wafer having high surface quality that can be adapted to high integration of devices is provided. can do.
本発明は、半導体ウェーハ表面を研磨する研磨工程を含む半導体ウェーハの製造方法に関する。本発明の半導体ウェーハの製造方法において、前記研磨工程は、少なくとも、仕上げ研磨工程の２段階前に行われる仕上げ２段前研磨工程、仕上げ研磨工程の１段階前に行われる仕上げ前研磨工程、および仕上げ研磨工程、をこの順に含む３段階の研磨工程から成り、かつ、前記仕上げ前研磨工程に使用される研磨剤は、下記（１）および（２）を満たすものである。
（１）含有される仕上げ前研磨砥粒の粒径が、前記仕上げ２段前研磨工程に使用される研磨剤中の仕上げ２段前研磨砥粒の粒径以上である。
（２）前記仕上げ前研磨砥粒の濃度が、前記仕上げ２段前研磨工程に使用される研磨剤の仕上げ２段前研磨砥粒の濃度以下である。
図１に、上記条件（１）および（２）を満たす本発明の一実施態様における、各研磨工程で使用される研磨砥粒の粒径と研磨剤中の砥粒濃度の関係を模式的に示す。図１に示す実施態様は、仕上げ２段前研磨工程、仕上げ前研磨工程および仕上げ研磨工程をこの順に含む３段研磨を実施するものであり、仕上げ２段前研磨工程が粗研磨工程（図２の例では３５ａ）に相当する。本発明の半導体ウェーハの製造方法は、研磨工程として、少なくとも上記条件（１）および（２）を満たす３段研磨を実施することにより、先に説明したように、最終的に得られる半導体ウェーハにおいて研磨起因欠陥を低減することが可能となる。
以下、本発明の半導体ウェーハの製造方法について、更に詳細に説明する。
The present invention relates to a semiconductor wafer manufacturing method including a polishing process for polishing a semiconductor wafer surface. In the method for producing a semiconductor wafer of the present invention, the polishing step includes at least a two-step pre-finishing polishing step performed two steps before the final polishing step, a pre-finishing polishing step performed one step before the final polishing step, and The abrasive used in the pre-finish polishing step comprises three polishing steps including the finish polishing step in this order, and satisfies the following (1) and (2).
(1) The particle diameter of the pre-finishing abrasive grains contained is equal to or greater than the particle diameter of the pre-finishing two-stage polishing abrasive grains in the polishing agent used in the two-stage finishing polishing process.
(2) The concentration of the abrasive grains before finishing is equal to or less than the concentration of the abrasive grains before finishing 2 stages of the polishing agent used in the polishing process before 2 stages of finishing.
FIG. 1 schematically shows the relationship between the grain size of abrasive grains used in each polishing step and the abrasive grain concentration in the abrasive in one embodiment of the present invention that satisfies the above conditions (1) and (2). Show. The embodiment shown in FIG. 1 performs three-stage polishing including a finish two-stage pre-polishing process, a pre-finish polishing process, and a finish polishing process in this order, and the finish two-stage pre-polishing process is a rough polishing process (FIG. 2). This corresponds to 35a). In the semiconductor wafer manufacturing method of the present invention, as described above, by performing three-stage polishing satisfying at least the above conditions (1) and (2) as a polishing step, in the semiconductor wafer finally obtained It is possible to reduce polishing-induced defects.
Hereinafter, the semiconductor wafer manufacturing method of the present invention will be described in more detail.
本発明の半導体ウェーハの製造方法は、半導体ウェーハ表面を研磨する研磨工程を含むものである。ここで研磨対象となる半導体ウェーハは、例えばシリコンウェーハある。シリコンウェーハは、ｐ型シリコンウェーハであってもｎ型シリコンウェーハであってもよい。研磨対象となる半導体ウェーハの厚さは、例えば６００〜１０００μｍであるが、特に限定されるものではない。本発明は、２００ｍｍ、３００ｍｍ、４５０ｍｍ等どのような口径のウェーハにも適応可能である。例えばシリコンウェーハをはじめとする半導体ウェーハは、通常、研磨工程前に、図２に示すように、スライス工程３１、面取り工程３２、ラッピング工程３３、エッチング工程３４を経て製造される。これらの工程は、いずれも公知技術であるため、ここでの説明は省略する。 The method for producing a semiconductor wafer of the present invention includes a polishing step for polishing the surface of the semiconductor wafer. Here, the semiconductor wafer to be polished is, for example, a silicon wafer. The silicon wafer may be a p-type silicon wafer or an n-type silicon wafer. The thickness of the semiconductor wafer to be polished is, for example, 600 to 1000 μm, but is not particularly limited. The present invention can be applied to wafers of any diameter such as 200 mm, 300 mm, and 450 mm. For example, semiconductor wafers including silicon wafers are usually manufactured through a slicing step 31, a chamfering step 32, a lapping step 33, and an etching step 34 as shown in FIG. 2 before the polishing step. Since these steps are all known techniques, description thereof is omitted here.
研磨工程は、例えば、研磨装置の定盤に貼り付けられたウレタン系のポリッシングパッド等の研磨パッドと半導体ウェーハ表面との間に研磨剤を所定量供給し、研磨剤に含まれる砥粒と半導体ウェーハ表面とを接触させるために、半導体ウェーハを研磨パッドに向かって加圧した状態で移動（例えば回転）させることによって行うことができる。 In the polishing process, for example, a predetermined amount of polishing agent is supplied between a polishing pad such as a urethane polishing pad attached to a surface plate of a polishing apparatus and the surface of the semiconductor wafer, and the abrasive grains contained in the polishing agent and the semiconductor In order to make contact with the wafer surface, the semiconductor wafer can be moved (for example, rotated) in a pressurized state toward the polishing pad.
研磨装置としては、その表面に研磨パッドを貼り付けた定盤、研磨剤の供給手段および半導体ウェーハの移動手段（例えば回転手段）を有するものを用いることができる。また、研磨装置としては、キャリアプレートにワックス等で貼り付けたウェーハの表面のみを研磨する片面研磨装置、または、ウェーハ保持用丸穴を有するキャリアに保持したウェーハの表面と裏面を同時に研磨する両面研磨装置の何れも使用できる。 As the polishing apparatus, an apparatus having a surface plate with a polishing pad attached to the surface thereof, an abrasive supply means, and a semiconductor wafer moving means (for example, a rotating means) can be used. Also, as a polishing apparatus, a single-side polishing apparatus that polishes only the surface of a wafer attached to a carrier plate with wax or the like, or a double-side polishing that simultaneously polishes the front and back surfaces of a wafer held in a carrier having round holes for holding wafers. Any polishing apparatus can be used.
定盤は、鉄やステンレスなどの金属またはセラミックスから製造される平面性の良好なものが好適である。定盤のサイズは半導体ウェーハのサイズに応じて適宜選択することができる。 The surface plate is preferably made of a metal such as iron or stainless steel or made of ceramics and having good flatness. The size of the surface plate can be appropriately selected according to the size of the semiconductor wafer.
上記研磨装置において半導体ウェーハは、研磨剤が供給された研磨パッド上で移動しながら砥粒と接触する。ここでのウェーハ移動速度（例えば回転速度）は、砥粒や半導体ウェーハの材質等に応じて適宜選択することができ、例えば１０〜５００ｒｐｍであり、好適には２０〜２００ｒｐｍである。研磨工程において半導体ウェーハは、通常、定盤に向かって加圧される。加圧時の圧力は研磨砥粒の種類やサイズに応じて適宜選択することができ、例えば５〜１００ｋＰａであり、１０〜７０ｋＰａであることが好ましい。 In the polishing apparatus, the semiconductor wafer comes into contact with the abrasive grains while moving on the polishing pad supplied with the polishing agent. The wafer moving speed (for example, rotational speed) here can be appropriately selected according to the material of the abrasive grains and the semiconductor wafer, and is, for example, 10 to 500 rpm, and preferably 20 to 200 rpm. In the polishing process, the semiconductor wafer is usually pressurized toward the surface plate. The pressure at the time of pressurization can be suitably selected according to the kind and size of abrasive grains, and is, for example, 5 to 100 kPa, and preferably 10 to 70 kPa.
また、研磨剤の供給量も定盤のサイズに応じて適宜選択することができる。例えば、１〜１００ｍｌ／分であり、好適には１０〜５０ｍｌ／分である。 Moreover, the supply amount of the abrasive can also be appropriately selected according to the size of the surface plate. For example, it is 1 to 100 ml / min, and preferably 10 to 50 ml / min.
研磨工程において使用される研磨剤は、通常、少なくとも砥粒を含むものであり、好ましくは、砥粒を溶媒に分散させたスラリーである。ただし後述するように、仕上げ研磨工程においては、砥粒を含有しない研磨剤が使用される場合もある。 The abrasive used in the polishing step usually contains at least abrasive grains, and is preferably a slurry in which abrasive grains are dispersed in a solvent. However, as will be described later, an abrasive that does not contain abrasive grains may be used in the final polishing step.
研磨砥粒としては、コロイダルシリカ、シリカ、アルミナ、セリア、チタニア、ジルコニア、窒化珪素、炭化珪素、酸化マンガン、ダイアモンド、またはこれらの混合物を使用することができる。中でも、研磨砥粒の凝集を抑制する観点からは、分散性の高い研磨砥粒を用いることが好ましく、この点からはコロイダルシリカが好ましい。 As abrasive grains, colloidal silica, silica, alumina, ceria, titania, zirconia, silicon nitride, silicon carbide, manganese oxide, diamond, or a mixture thereof can be used. Among these, from the viewpoint of suppressing the aggregation of the abrasive grains, it is preferable to use highly dispersible abrasive grains, and in this respect, colloidal silica is preferable.
溶媒としては、研磨対象である半導体ウェーハの特性、使用する砥粒の種類等に応じて適宜選択することができる。例えば、ＫＯＨ、ＮａＯＨ、アンモニア等の無機アルカリ化合物であるアルカリ金属の水酸化物を溶質として含む水溶液などを用いることができる。溶媒の使用量は特に限定されるものではないが、例えば砥粒量の２〜２００質量倍、好ましくは５〜５０質量倍である。 As a solvent, it can select suitably according to the characteristic of the semiconductor wafer which is a grinding | polishing object, the kind of abrasive grain to be used, etc. For example, an aqueous solution containing an alkali metal hydroxide that is an inorganic alkali compound such as KOH, NaOH, or ammonia as a solute can be used. Although the usage-amount of a solvent is not specifically limited, For example, it is 2-200 mass times of the amount of abrasive grains, Preferably it is 5-50 mass times.
研磨剤は、砥粒および溶媒に加えて、必要に応じて、ｐＨ調整剤等の添加剤を含んでいてもよい。これら添加剤の使用量は、適宜調整すればよく、特に限定されるものではない。 The abrasive may contain additives such as a pH adjuster, if necessary, in addition to the abrasive grains and the solvent. The amount of these additives used may be adjusted as appropriate and is not particularly limited.
研磨剤のｐＨ値は、上記のアルカリ金属またはアルカリ土類金属の水酸化物等の溶質の濃度によって調整することができ、または、ｐＨ調整剤の添加によっても調整可能である。ｐＨ調整剤としては、炭酸水素塩、有機酸などを用いることができる。 The pH value of the abrasive can be adjusted by the concentration of a solute such as the alkali metal or alkaline earth metal hydroxide described above, or can be adjusted by adding a pH adjuster. As the pH adjuster, hydrogen carbonate, organic acid, or the like can be used.
本発明における研磨工程は、少なくとも仕上げ研磨工程の２段階前に行われる仕上げ２段前研磨工程、仕上げ研磨工程の１段階前に行われる仕上げ前研磨工程および仕上げ研磨工程をこの順に含む３段階の研磨工程を含む。各研磨工程の間には、前工程で使用した研磨剤を除去するために、必要に応じて洗浄を行うことが好ましい。 The polishing process in the present invention includes at least three stages including, in this order, a final two-stage polishing process that is performed two stages before the final polishing process, a pre-finish polishing process that is performed one stage before the final polishing process, and a final polishing process. A polishing step is included. In order to remove the abrasive used in the previous step, it is preferable to perform washing as necessary between the respective polishing steps.
仕上げ前研磨工程に使用される研磨剤は、下記（１）および（２）を満たすものである。
（１）含有される仕上げ前研磨砥粒の粒径が、仕上げ２段前研磨工程に使用される研磨剤中の仕上げ２段前研磨砥粒の粒径以上である。
（２）仕上げ前研磨砥粒の濃度が、仕上げ２段前研磨工程に使用される研磨剤の仕上げ２段前研磨砥粒の濃度以下である。
以下、上記条件（１）、（２）について説明する。
The abrasive used in the pre-finish polishing step satisfies the following (1) and (2).
(1) The particle diameter of the pre-finishing abrasive grains contained is equal to or greater than the particle diameter of the pre-finishing two-stage polishing abrasive grains in the abrasive used in the finishing two-stage pre-polishing process.
(2) The concentration of the pre-finishing polishing abrasive grains is equal to or lower than the concentration of the polishing pre-finishing two-stage polishing abrasives used in the pre-finishing second stage polishing step.
Hereinafter, the conditions (1) and (2) will be described.
条件（１）
仕上げ前研磨砥粒の粒径は、前述の理由から、仕上げ２段前研磨砥粒の粒径以上とする。仕上げ前研磨砥粒の粒径は、仕上げ前研磨工程後にウェーハ表面に砥粒が残留することを効果的に抑制する観点から、仕上げ２段前研磨砥粒の粒径の１倍以上かつ４倍以下であることが好ましく、１倍以上かつ３倍以下であることがより好ましく、１倍以上かつ２倍以下であることがよりいっそう好ましい。なお、本発明において、砥粒に関する「粒径」とは、動的光散乱法に基づいて測定される平均粒径をいうものとする。ここで、動的光散乱法による粒径の測定は、例えば、Ｊｏｕｒｎａｌ ｏｆ Ｃｈｅｍｉｃａｌ Ｐｈｙｓｉｃｓ 第５７巻１１号（１９７２年１２月）第４８１４頁に説明された方法で行うことができる。
Condition (1)
The grain size of the pre-finishing abrasive grains is set to be equal to or larger than the grain diameter of the two-stage pre-finishing abrasive grains for the reasons described above. The grain size of the pre-finish abrasive grains is 1 to 4 times the grain diameter of the pre-finish 2-stage abrasive grains from the viewpoint of effectively suppressing the remaining of the abrasive grains on the wafer surface after the pre-finish polishing process. It is preferably 1 or more, more preferably 1 or more and 3 or less, and even more preferably 1 or more and 2 or less. In the present invention, the “particle diameter” relating to abrasive grains refers to the average particle diameter measured based on the dynamic light scattering method. Here, the measurement of the particle size by the dynamic light scattering method can be performed by, for example, the method described in Journal of Chemical Physics Vol. 57 No. 11 (December 1972), page 4814.
具体的には、仕上げ前研磨砥粒の粒径は、７０ｎｍ以上かつ２００ｎｍ以下であることが好ましく、７０ｎｍ以上かつ１５０ｎｍ以下であることがより好ましい。仕上げ前研磨工程は、主にウェーハ表面の自然酸化膜の除去およびウェーハ表面粗さの低減のために行われるものであり、ここで使用される研磨剤中の研磨砥粒の粒径が７０ｎｍ以上であれば、長時間を要することなく自然酸化膜の除去およびウェーハ表面粗さの低減を達成できるため好ましい。また、研磨砥粒の粒径が７０ｎｍ以上であれば、研磨砥粒同士の凝集が少ないため、研磨工程後の洗浄工程において除去困難な凝集物の生成を低減できるため好ましい。また、研磨砥粒の粒径が２００ｎｍ以下、好ましくは１５０ｎｍ以下であれば、研磨剤中での研磨砥粒の沈降が少ないため、研磨剤中の研磨砥粒の分散性が高く均一な研磨を行うことができるため好ましい。 Specifically, the particle size of the pre-finish abrasive grains is preferably 70 nm or more and 200 nm or less, and more preferably 70 nm or more and 150 nm or less. The pre-finish polishing step is mainly performed for removing the natural oxide film on the wafer surface and reducing the surface roughness of the wafer. The particle size of the abrasive grains in the abrasive used here is 70 nm or more. If it is, it is preferable because removal of the natural oxide film and reduction of the surface roughness of the wafer can be achieved without requiring a long time. Further, it is preferable that the particle size of the abrasive grains is 70 nm or more because the aggregation of the abrasive grains is small, and the generation of aggregates that are difficult to remove in the cleaning step after the polishing step can be reduced. Moreover, if the abrasive grain size is 200 nm or less, preferably 150 nm or less, the settling of the abrasive grains in the abrasive is small, so that the abrasive grains in the abrasive have high dispersibility and uniform polishing. Since it can be performed, it is preferable.
仕上げ前研磨砥粒の粒径については、前述の通りである。従って、本発明において仕上げ２段前研磨砥粒の粒径は、仕上げ前研磨砥粒の粒径以下である。具体的には、研磨砥粒同士の凝集および研磨剤中での研磨砥粒の沈降を抑制する観点からは、５０ｎｍ〜１００ｎｍの範囲であることが好ましい。なお、後述の実施例では、仕上げ前研磨工程の１段階前に行う仕上げ２段前研磨工程が粗研磨工程である態様（つまり、粗研磨工程、仕上げ前研磨工程および仕上げ研磨工程から成る３段研磨の態様）を示したが、本発明では、仕上げ前研磨工程の前に行われる研磨工程は１段階に限定されるものではなく、２段階以上の研磨工程を行うことも、もちろん可能である。なお、仕上げ前研磨工程よりも前に行われる研磨工程では、研磨砥粒の粒径が比較的大きいために研磨砥粒の凝集によるウェーハ表面への付着は発生し難いが、仮に研磨砥粒の凝集によるウェーハ表面への付着が発生したとしても、仕上げ前研磨工程の直前に行う洗浄および仕上げ前研磨工程によって、凝集してウェーハに付着した研磨砥粒を除去することができる。 The particle size of the pre-finish abrasive grains is as described above. Therefore, in the present invention, the grain size of the pre-finishing second stage abrasive grains is not more than the grain size of the pre-finishing abrasive grains. Specifically, the range of 50 nm to 100 nm is preferable from the viewpoint of suppressing the aggregation of the abrasive grains and the settling of the abrasive grains in the abrasive. In the embodiments described later, a mode in which the two-stage pre-finish polishing process performed one stage before the pre-finish polishing process is a rough polishing process (that is, a three-stage process including a rough polishing process, a pre-finish polishing process, and a final polishing process). In the present invention, the polishing process performed before the pre-finishing polishing process is not limited to one stage, and it is of course possible to perform two or more stages of polishing processes. . In the polishing process performed before the pre-finishing polishing process, the abrasive grains are relatively large, so that it is difficult for the abrasive grains to adhere to the wafer surface due to agglomeration of the abrasive grains. Even if the agglomeration adheres to the wafer surface, the abrasive grains agglomerated and adhered to the wafer can be removed by the cleaning and the pre-finish polishing step performed immediately before the pre-finish polishing step.
一方、仕上げ研磨工程は、初期段階の研磨で生じた表面粗さ、歪み、くもりのうち仕上げ前研磨工程までに除去できなかったものを除去するために行う工程であり、仕上げ前研磨工程に比べて、研磨取り代および研磨速度は小さい。このため、仕上げ研磨工程で使用する研磨剤に含まれる仕上げ研磨砥粒の粒径は、仕上げ前研磨砥粒の粒径以下であることが好ましい。これにより、仕上げ研磨においてウェーハ表面の表面粗さ（マイクロラフネス）の悪化を抑制することが可能となる。この場合、仕上げ研磨砥粒が凝集してウェーハ表面に付着し、ウェーハ表面に研磨起因欠陥が生成することを防止するために、仕上げ研磨砥粒の濃度は、仕上げ前研磨砥粒の濃度以下とすることが好ましく、仕上げ前研磨砥粒の濃度より低くすることがより好ましく、さらには、研磨砥粒を含まない（つまり、研磨砥粒濃度が０である）研磨剤を使用することがよりいっそう好ましい。研磨砥粒を含まない研磨剤を使用することにより、仕上げ研磨においてマイクロラフネスの悪化を防止することも可能となる。ここで、「研磨砥粒を含まない研磨剤」とは、不可避的に研磨剤に混入する砥粒成分を含む可能性はあるものの、積極的に研磨砥粒成分を含んでいない研磨剤をいう。 On the other hand, the final polishing process is a process that is performed to remove surface roughness, distortion, and cloudiness that occurred in the initial stage of polishing that could not be removed by the pre-finishing polishing process. Thus, the polishing allowance and the polishing rate are small. For this reason, it is preferable that the particle diameter of the finishing abrasive grain contained in the abrasive | polishing agent used at a final polishing process is below the particle diameter of the abrasive grain before finishing. Thereby, it becomes possible to suppress the deterioration of the surface roughness (micro roughness) of the wafer surface in the finish polishing. In this case, in order to prevent the finish abrasive grains from aggregating and adhering to the wafer surface and generating defects caused by polishing on the wafer surface, the concentration of the finish abrasive grains is not more than the concentration of the abrasive grains before finishing. More preferably, the concentration is lower than the concentration of the abrasive grains before finishing, and it is even more preferable to use an abrasive that does not contain abrasive grains (that is, the abrasive grain concentration is 0). preferable. By using an abrasive that does not contain abrasive grains, it becomes possible to prevent the deterioration of microroughness in finish polishing. Here, the term “abrasive that does not contain abrasive grains” refers to an abrasive that does not actively contain abrasive grains, although it may contain abrasive grains that are inevitably mixed in the abrasive. .
条件（２）
本発明において、仕上げ前研磨工程に使用される研磨剤の仕上げ前研磨砥粒の濃度は、仕上げ２段前研磨工程に使用される研磨剤の仕上げ２段前研磨砥粒の濃度以下とする。仕上げ前研磨砥粒の濃度は、仕上げ前研磨工程後にウェーハ表面に砥粒が残留することを効果的に抑制する観点から、仕上げ２段前研磨砥粒の濃度の０．０１倍以上０．３倍以下であることが好ましく、０．０２倍以上０．３倍以下であることがより好ましい。具体的には、仕上げ前研磨砥粒の濃度は、０．０５質量％〜０．３質量％の範囲であることが好ましく、０．１質量％〜０．３質量％の範囲であることがより好ましい。０．０５質量％以上、好ましくは０．１質量％以上であれば、仕上げ前研磨工程において長時間を要することなく自然酸化膜の除去およびウェーハ表面粗さの低減を達成できるため好ましい。０．３質量％以下であれば、研磨砥粒同士の凝集が少ないため、研磨工程後の洗浄工程において除去困難な凝集物の生成を低減できるため好ましい。
Condition (2)
In this invention, the density | concentration of the abrasive grain before finishing of the abrasive | polishing agent used for a grinding | polishing process before finishing shall be below the density | concentration of the grinding | polishing grain before finishing 2 steps | paragraphs of the abrasive | polishing agent used for 2 steps | paragraphs before finishing polishing. The concentration of the abrasive grains before finishing is 0.01 times or more of the concentration of the abrasive grains before finishing 2 steps from the viewpoint of effectively suppressing the abrasive grains from remaining on the wafer surface after the polishing process before finishing. It is preferable that it is 2 times or less, and more preferably 0.02 times or more and 0.3 times or less. Specifically, the concentration of the abrasive grains before finishing is preferably in the range of 0.05% by mass to 0.3% by mass, and in the range of 0.1% by mass to 0.3% by mass. More preferred. If it is 0.05 mass% or more, preferably 0.1 mass% or more, it is preferable because removal of the natural oxide film and reduction of the wafer surface roughness can be achieved without requiring a long time in the polishing step before finishing. If it is 0.3 mass% or less, since there is little aggregation of abrasive grains, it can reduce the production | generation of the aggregate difficult to remove in the washing | cleaning process after a grinding | polishing process, and it is preferable.
仕上げ前研磨砥粒の濃度については、前述の通りである。従って、本発明において仕上げ２段前研磨砥粒の濃度は、仕上げ前研磨砥粒の濃度以上である。具体的には、研磨速度を低下させずかつ砥粒が凝集してウェーハ表面に付着することを抑制する観点からは、１質量％〜５質量％の範囲であることが好ましい。なお、仕上げ前研磨工程よりも前に行われる研磨工程で、仮に研磨砥粒の凝集やウェーハへの付着が発生したとしても、前記した理由から後工程において除去可能である。 The concentration of the pre-finish abrasive grains is as described above. Therefore, in the present invention, the concentration of the abrasive grains before the final two-stage finish is equal to or higher than the concentration of the abrasive grains before the finishing. Specifically, it is preferably in the range of 1% by mass to 5% by mass from the viewpoint of preventing the polishing rate from being reduced and suppressing the agglomeration from aggregating and adhering to the wafer surface. Note that even if agglomeration of abrasive grains or adhesion to a wafer occurs in a polishing process performed before the pre-finish polishing process, it can be removed in a subsequent process for the reasons described above.
一方、仕上げ研磨工程は、初期段階の研磨で生じた表面粗さ、歪み、くもりのうち仕上げ前研磨工程までに除去できなかったものを除去するために行う工程であり、仕上げ前研磨工程に比べて、研磨取り代および研磨速度は小さい。このため、仕上げ研磨砥粒の濃度は、仕上げ前研磨砥粒の濃度以下であることが好ましい。これによって、仕上げ研磨砥粒が凝集してウェーハ表面に付着し、これに起因してウェーハ表面に研磨起因欠陥が生成することが抑制できる。または、先に説明したように、研磨砥粒を含まない（つまり、研磨砥粒濃度が０である）研磨剤を使用することがより好ましい。 On the other hand, the final polishing process is a process that is performed to remove surface roughness, distortion, and cloudiness that occurred in the initial stage of polishing that could not be removed by the pre-finishing polishing process. Thus, the polishing allowance and the polishing rate are small. For this reason, it is preferable that the density | concentration of a finishing polishing abrasive grain is below the density | concentration of the polishing abrasive grain before finishing. As a result, it is possible to suppress the finish abrasive grains from agglomerating and adhering to the wafer surface, thereby causing generation of polishing-induced defects on the wafer surface. Alternatively, as described above, it is more preferable to use an abrasive that does not contain abrasive grains (that is, the abrasive grain concentration is 0).
なお、研磨剤中の研磨砥粒は、ｐＨ３〜７に等電点を持つものとして、シリカ、セリア、ジルコニア等、ｐＨ７〜９に等電点を持つものとして、アルミナ、チタニアがある。これらの砥粒のゼータ電位は等電点のｐＨ以下で正になり、等電点のｐＨ以上では負になる。したがって、研磨剤の液性により研磨砥粒のゼータ電位を制御することができる。半導体ウェーハ表面と砥粒のゼータ電位を同符号にすることにより、反発力によって研磨砥粒のウェーハ表面への付着をよりいっそう低減することが可能となるため、半導体ウェーハ表面のゼータ電位と同符号になるように、研磨砥粒の等電点に基づき研磨剤の液性を調整することが好ましい。シリコンウェーハ等の半導体ウェーハは通常、アルカリ中では０ｍＶ未満、即ちマイナスのゼータ電位を示すため、研磨剤として塩基性のものを使用する場合には、アルカリ中でマイナスのゼータ電位を示す研磨砥粒を用いることが好ましい。この場合、反発力によって研磨砥粒同士の凝集を効果的に抑制するためには、研磨砥粒のゼータ電位は−３０ｍＶ未満であることが好ましく、−３５ｍＶ未満であることがより好ましい。研磨砥粒のゼータ電位の下限値は、特に限定されるものではないが、通常、−１００ｍＶ以上程度である。一方、半導体ウェーハ表面がマイナスのゼータ電位を示す場合、反発力によって砥粒の付着を効果的に抑制する観点から、そのゼータ電位は０ｍＶ未満であることが好ましい。半導体ウェーハのゼータ電位の下限値も特に限定されるものではないが、通常、−１００ｍＶ以上程度である。研磨砥粒および半導体ウェーハのゼータ電位は、研磨剤のｐＨ値またはアルカリ金属またはアルカリ土類金属の水酸化物等の溶質の濃度によって制御可能である。ゼータ電位を小さくする（ゼータ電位の絶対値を大きくする）ために前述の溶質の濃度を増加させると研磨後のウェーハ表面の粗さが増大する場合があるため、研磨砥粒および半導体ウェーハのゼータ電位の下限値は、いずれも−１００ｍＶ以上が好ましい。なお、本発明におけるゼータ電位は、電気泳動法によって測定される値をいうものとする。前述のゼータ電位の制御は、少なくとも、研磨起因欠陥の生成を抑制するために研磨砥粒の凝集およびウェーハ表面への付着を抑制すべき仕上げ前研磨工程で行うことが好ましいが、仕上げ前研磨工程を含む全研磨工程にわたって行うことが更に好ましい。 The abrasive grains in the polishing agent include alumina and titania as those having an isoelectric point at pH 3 to 7, such as silica, ceria, zirconia, and the like having an isoelectric point at pH 7 to 9. The zeta potential of these abrasive grains becomes positive below the pH of the isoelectric point, and becomes negative above the pH of the isoelectric point. Therefore, the zeta potential of the abrasive grains can be controlled by the liquidity of the abrasive. By making the zeta potential of the semiconductor wafer surface and the abrasive grains the same sign, it becomes possible to further reduce the adhesion of the abrasive grains to the wafer surface by the repulsive force, so the same sign as the zeta potential of the semiconductor wafer surface. It is preferable to adjust the liquidity of the abrasive based on the isoelectric point of the abrasive grains. Semiconductor wafers such as silicon wafers usually show less than 0 mV in an alkali, that is, a negative zeta potential. Therefore, when using a basic abrasive as an abrasive, abrasive grains showing a negative zeta potential in an alkali. Is preferably used. In this case, in order to effectively suppress agglomeration of the abrasive grains by the repulsive force, the zeta potential of the abrasive grains is preferably less than −30 mV, and more preferably less than −35 mV. The lower limit value of the zeta potential of the abrasive grains is not particularly limited, but is usually about −100 mV or more. On the other hand, when the surface of the semiconductor wafer exhibits a negative zeta potential, the zeta potential is preferably less than 0 mV from the viewpoint of effectively suppressing the adhesion of abrasive grains by the repulsive force. The lower limit value of the zeta potential of the semiconductor wafer is not particularly limited, but is usually about −100 mV or more. The zeta potential of the abrasive grains and the semiconductor wafer can be controlled by the pH value of the abrasive or the concentration of a solute such as an alkali metal or alkaline earth metal hydroxide. Increasing the concentration of the solute described above to reduce the zeta potential (increase the absolute value of the zeta potential) may increase the roughness of the polished wafer surface. The lower limit of the potential is preferably −100 mV or more. The zeta potential in the present invention refers to a value measured by electrophoresis. The control of the zeta potential described above is preferably performed in a pre-finish polishing step that should suppress at least agglomeration of the abrasive grains and adhesion to the wafer surface in order to suppress generation of defects due to polishing. More preferably, it is carried out over the entire polishing step.
上記研磨工程後の半導体ウェーハは、通常、最終洗浄工程を経て製品ウェーハとなる。本発明では、仕上げ前研磨工程で使用する研磨剤が前記条件（１）および（２）を満たすことにより、研磨起因欠陥の原因となる研磨砥粒の凝集によるウェーハ表面への付着を抑制することができるため、最終洗浄工程は通常の洗浄条件で行うことが可能である。したがって最終洗浄工程は、純水または有機溶媒による洗浄、ＲＣＡ洗浄、ＳＣ−１洗浄等の公知の洗浄方法によって行うことができる。 The semiconductor wafer after the polishing step usually becomes a product wafer through a final cleaning step. In the present invention, the polishing agent used in the pre-finish polishing step satisfies the above conditions (1) and (2), thereby suppressing adhesion to the wafer surface due to agglomeration of polishing abrasive grains causing polishing-induced defects. Therefore, the final cleaning step can be performed under normal cleaning conditions. Therefore, the final cleaning step can be performed by a known cleaning method such as cleaning with pure water or an organic solvent, RCA cleaning, or SC-1 cleaning.
以上説明した本発明の半導体ウェーハの製造方法によれば、研磨起因欠陥が低減した、高い表面品質を有する半導体ウェーハを製造することができる。このように高い表面品質を有する半導体ウェーハを用いることにより、この半導体ウェーハから製造されるデバイスの高集積化が可能となる。 According to the semiconductor wafer manufacturing method of the present invention described above, it is possible to manufacture a semiconductor wafer having high surface quality with reduced polishing-induced defects. By using a semiconductor wafer having such a high surface quality, it becomes possible to highly integrate devices manufactured from this semiconductor wafer.
以下に、実施例により本発明を説明するが、本発明は実施例に示す態様に限定されるものではない。 Hereinafter, the present invention will be described by way of examples, but the present invention is not limited to the embodiments shown in the examples.
[実施例１〜５、比較例１〜３]
直径２００ｍｍのインゴットをスライスし、面取り、ラッピング、エッチングを行い、厚さ約８００μｍの研磨対象のシリコンウェーハを得た。
研磨装置として、両面同時研磨装置を使用し、以下の条件で、仕上げ２段前研磨工程（粗研磨工程）、仕上げ前研磨工程および仕上げ研磨工程をこの順で実施した。各研磨工程の間に、ＲＣＡ洗浄を実施し、仕上げ研磨工程後のウェーハに対してもＲＣＡ洗浄を行った。
（１）仕上げ２段前研磨工程（粗研磨工程）
研磨剤種類：研磨砥粒含有水酸化カリウム水溶液（水性スラリー）
研磨剤ｐＨ：１１
研磨砥粒：コロイダルシリカ（粒径および濃度：表１記載）
研磨条件：ウェーハ回転数５０ｒｐｍ、加圧３０ｋＰａ、研磨剤供給量：３０ｍｌ／分
研磨取り代：ウェーハ両面で１０μｍ
（２）仕上げ前研磨工程
研磨剤種類：研磨砥粒含有水酸化カリウム水溶液（水性スラリー）
研磨剤ｐＨ：１１
研磨砥粒：コロイダルシリカ（粒径および濃度：表１記載）
研磨条件：ウェーハ回転数６０ｒｐｍ、加圧３０ｋＰａ、研磨剤供給量：３０ｍｌ／分
研磨取り代：ウェーハ両面で２μｍ
（３）仕上げ（最終）研磨工程
研磨剤種類：研磨砥粒を含有しない水酸化カリウム水溶液
研磨剤ｐＨ：１１
研磨条件：ウェーハ回転数６５ｒｐｍ、加圧１０ｋＰａ、研磨剤供給量：３０ｍｌ／分
研磨取り代：ウェーハ両面で０．１μｍ
[Examples 1-5, Comparative Examples 1-3]
A 200 mm diameter ingot was sliced, chamfered, lapped, and etched to obtain a silicon wafer to be polished having a thickness of about 800 μm.
A double-sided simultaneous polishing apparatus was used as the polishing apparatus, and the final two-stage polishing process (rough polishing process), the pre-finishing polishing process, and the final polishing process were performed in this order under the following conditions. RCA cleaning was performed between each polishing step, and RCA cleaning was also performed on the wafer after the final polishing step.
(1) Two-stage pre-polishing process (rough polishing process)
Abrasive type: Potassium hydroxide aqueous solution (aqueous slurry) containing abrasive grains
Abrasive pH: 11
Abrasive grain: colloidal silica (particle size and concentration: listed in Table 1)
Polishing conditions: wafer rotation speed 50 rpm, pressurization 30 kPa, abrasive supply amount: 30 ml / min Polishing allowance: 10 μm on both sides of the wafer
(2) Polishing process before finishing Abrasive type: Potassium hydroxide aqueous solution containing abrasive grains (aqueous slurry)
Abrasive pH: 11
Abrasive grain: colloidal silica (particle size and concentration: listed in Table 1)
Polishing conditions: wafer rotation speed 60 rpm, pressurization 30 kPa, abrasive supply amount: 30 ml / min Polishing allowance: 2 μm on both sides of the wafer
(3) Finishing (final) polishing step Abrasive type: potassium hydroxide aqueous solution containing no abrasive grains Abrasive pH: 11
Polishing conditions: wafer rotation speed 65 rpm, pressure 10 kPa, abrasive supply amount: 30 ml / min Polishing allowance: 0.1 μm on both sides of the wafer
評価方法
（１）研磨砥粒の粒径の測定
ＢＥＣＫＭＡＮ ＣＯＵＬＴＥＲ社製のＮ４ ＰＬＵＳ（商品名）を使用して、研磨砥粒の平均粒径を測定した。
（２）仕上げ前研磨砥粒のゼータ電位の測定
大塚電子株式会社製のＥＬＳ−Ｚ（商品名）を使用して測定した。
（３）仕上げ前研磨工程におけるシリコンウェーハ表面のゼータ電位の測定
大塚電子株式会社製のＥＬＳ−Ｚ（商品名）を使用して測定した。
（４）ＬＰＤ(Light Point Defect)個数の測定
ＫＬＡ−Ｔｅｎｃｏｒ社製のＳｕｒｆＳｃａｎ ＳＰ−１（商品名）を使用して、最終洗浄後のウェーハ表面に残存するＬＰＤを検出し、サイズが０．０５μｍ以上のＬＰＤの個数を測定した。測定されるＬＰＤ個数が２０個未満であれば、研磨起因欠陥が少なく、高い表面品質を有すると判断することができる。
Evaluation Method (1) Measurement of Abrasive Grain Size The average grain size of the abrasive grains was measured using N4 PLUS (trade name) manufactured by BECKMAN COULTER.
(2) Measurement of zeta potential of pre-finished abrasive grains Measurement was performed using ELS-Z (trade name) manufactured by Otsuka Electronics Co., Ltd.
(3) Measurement of zeta potential on silicon wafer surface in pre-finish polishing step: Measured using ELS-Z (trade name) manufactured by Otsuka Electronics Co., Ltd.
(4) Measurement of number of LPDs (Light Point Defect) Using the ScanScan SP-1 (trade name) manufactured by KLA-Tencor, LPD remaining on the wafer surface after the final cleaning is detected, and the size is 0.05 μm. The number of LPDs was measured. If the number of LPDs to be measured is less than 20, it can be determined that there are few polishing-induced defects and high surface quality.
評価結果
表１に示すように、実施例１〜実施例５のいずれの場合も、比較例１〜３と比べて最終洗浄後の直径２００ｍｍウェーハの表面上におけるＬＰＤ個数が２０個未満となった。上記結果から、本発明によって、研磨起因欠陥の発生が抑制された、高い表面品質を有する半導体ウェーハを製造できることが確認された。
Evaluation results As shown in Table 1, in any of Examples 1 to 5, the number of LPDs on the surface of the 200 mm diameter wafer after the final cleaning was less than 20 in comparison with Comparative Examples 1 to 3. . From the above results, it was confirmed that the present invention can produce a semiconductor wafer having high surface quality in which the occurrence of polishing-induced defects is suppressed.
本発明の半導体ウェーハの製造方法は、高集積化された半導体デバイスの製造分野において有用である。 The semiconductor wafer manufacturing method of the present invention is useful in the field of manufacturing highly integrated semiconductor devices.
Claims (8)
前記研磨工程は、少なくとも、仕上げ研磨工程の２段階前に行われる仕上げ２段前研磨工程、仕上げ研磨工程の１段階前に行われる仕上げ前研磨工程、および仕上げ研磨工程、をこの順に含む３段階の研磨工程から成り、かつ、
前記仕上げ前研磨工程に使用される研磨剤は、下記（１）および（２）を満たすことを特徴とする半導体ウェーハの製造方法。
（１）含有される研磨砥粒（以下、「仕上げ前研磨砥粒」という）の粒径が、前記仕上げ２段前研磨工程に使用される研磨剤中の研磨砥粒（以下、「仕上げ２段前研磨砥粒」という）の粒径以上である。
（２）前記仕上げ前研磨砥粒の濃度が、前記仕上げ２段前研磨工程に使用される研磨剤の仕上げ２段前研磨砥粒の濃度以下である。 A method for manufacturing a semiconductor wafer including a polishing step for polishing a semiconductor wafer surface,
The polishing process includes at least three stages including, in this order, a two-step pre-finishing polishing process performed two stages before the final polishing process, a pre-finishing polishing process performed one stage before the final polishing process, and a final polishing process in this order. Consisting of a polishing process, and
The polishing agent used in the pre-finish polishing step satisfies the following (1) and (2):
(1) The particle size of the abrasive grains contained (hereinafter referred to as “pre-finished abrasive grains”) is determined by the abrasive grains (hereinafter referred to as “finish 2” It is more than the particle size of “pre-stage polishing abrasive”.
(2) The concentration of the abrasive grains before finishing is equal to or less than the concentration of the abrasive grains before finishing 2 stages of the polishing agent used in the polishing process before 2 stages of finishing.
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| WO2013070679A1 (en) | 2011-11-08 | 2013-05-16 | Tosoh Smd, Inc. | Silicon sputtering target with special surface treatment and good particle performance and methods of making the same |
| JP5961076B2 (en) * | 2012-08-24 | 2016-08-02 | 住友電気工業株式会社 | Method for evaluating the surface of an object |
| JP6068647B2 (en) | 2013-08-09 | 2017-01-25 | 株式会社フジミインコーポレーテッド | Polished polishing object manufacturing method and polishing composition kit |
| JP6611485B2 (en) | 2014-11-07 | 2019-11-27 | 株式会社フジミインコーポレーテッド | Polishing method and polishing composition |
| EP3258483A4 (en) * | 2015-02-12 | 2018-02-28 | Fujimi Incorporated | Method for polishing silicon wafer and surface treatment composition |
| US10748778B2 (en) | 2015-02-12 | 2020-08-18 | Fujimi Incorporated | Method for polishing silicon wafer and surface treatment composition |
| JP6951933B2 (en) * | 2017-10-10 | 2021-10-20 | 花王株式会社 | Finish polishing liquid composition for silicon wafer |
| DE112017007930T5 (en) | 2017-10-17 | 2020-05-28 | Sumco Corporation | METHOD FOR POLISHING A SILICON WAFER |
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