JP2011165909A - Method of manufacturing semiconductor wafer - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a measures for reducing polish-caused defects for obtaining a semiconductor wafer having high surface quality adaptable to high integration of a device, in a method of manufacturing a semiconductor wafer including a polishing step having a plurality of steps. <P>SOLUTION: This method of manufacturing a semiconductor wafer includes a polishing step of polishing a semiconductor wafer surface. The polishing step includes at least three steps that are a step preceding by two steps from finish-polishing step, a step preceding by one step from finish-polishing step, and a finish-polishing step. An abrasive used for the step preceding by one step from finish-polishing step satisfies the following (1) and (2). (1) Particle sizes of contained polishing abrasive grains (polishing abrasive grains used for the step preceding by one step from finish-polishing step) are not smaller than those of the polishing abrasive grains (polishing abrasive grains used for the step preceding by two steps from finish-polishing step) contained in the abrasive used for the step preceding by two steps from finish-polishing step. (2) A density of the polishing abrasive grains used for the step preceding by one step from finish-polishing step is not larger than that of the polishing abrasive grains of the abrasive used for the step preceding by two steps from finish-polishing step. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a semiconductor wafer, and more particularly to a method for manufacturing a semiconductor wafer capable of reducing surface defects (hereinafter referred to as “polishing-induced defects”) resulting from a polishing process such as scratching.

  As shown in FIG. 2, a general manufacturing process of a semiconductor wafer such as a silicon wafer (hereinafter also simply referred to as “wafer”) includes a slicing step 31, a chamfering step 32, a lapping step 33, an etching step 34, and a polishing step 35. And a final cleaning step 36. Among these, as the polishing step 35, single-side polishing for polishing only the front surface of the wafer or double-side polishing for simultaneously polishing the front and back surfaces of the wafer (hereinafter, the front and back surfaces of the wafer in double-side polishing are also collectively referred to as “front surface”). "). In the polishing step 35, a plurality of steps (hereinafter referred to as “multi-step polishing”), which are generally composed of a rough polishing step for flattening and a final polishing step for the purpose of improving surface roughness and removing polishing flaws, etc. ) Is employed (see, for example, Patent Document 1).

In this multi-stage polishing, in each polishing step, the wafer is moved in a state where the surface of the wafer is in sliding contact with the polishing cloth while supplying an abrasive containing abrasive grains (hereinafter also simply referred to as “abrasive grains”). Polish the surface of the wafer. FIG. 2 shows a rough polishing step 35a for improving the flatness of the wafer, and a finish performed one stage before the final polishing step 35c in order to remove the surface roughness, distortion, and cloudiness of the wafer generated in the rough polishing step. An example of a three-stage polishing step 35 including a pre-polishing step 35b and a final polishing step 35c will be described. After the completion of each polishing step, the surface of the wafer is cleaned as necessary. Specifically, a post-polishing cleaning step 35a ′, a pre-polishing post-polishing cleaning step 35b ′, and a final cleaning step 36 are added. In addition to the cleaning step after each polishing step, a cleaning step is appropriately added between the steps from the slicing step 31 to the rough polishing step 35a. In each cleaning process, not only one stage but also two or more stages are repeatedly cleaned as necessary.
FIG. 2 shows an example of the polishing process 35 of the three-stage polishing, but the polishing process 35 is performed between the rough post-polishing cleaning process 35a ′ and the pre-finish polishing process 35b according to the specifications of the final product. Further, four or more steps of polishing may be added by adding a polishing step of one step or more.

Usually, in the rough polishing step (35a in the example of FIG. 2), a relatively large abrasive grain (hereinafter referred to as “rough abrasive grain”) is used with a polishing allowance of 5 μm or more on one side of the wafer. In the final polishing step (35c in the example of FIG. 2), a relatively small abrasive grain (hereinafter referred to as “finished abrasive grain”) is used to remove the wafer with a polishing allowance of 0.01 μm or more on one side of the wafer. The surface is polished. In the pre-finish polishing step (35b in the example of FIG. 2) performed between the rough polishing step and the final polishing step, polishing abrasive grains having a particle size smaller than the coarse polishing abrasive grains and larger than the final polishing abrasive grains ( Hereinafter, the wafer surface is polished with a polishing allowance of 0.1 μm or more on one side of the wafer using “pre-finishing abrasive grains”. That is, the grain size of the abrasive grains is set so as to decrease in the order of coarse abrasive grains, pre-finish abrasive grains, and finish abrasive grains.
The concentration of the abrasive grains is generally high in the rough polishing process and the pre-finishing polishing process, and conversely low in the final polishing process, depending on the grain size, polishing rate, polishing allowance, etc. of the polishing abrasive grains. Is set.

  In the above-described multi-stage polishing, when the next polishing process is performed in a state where the abrasive grains in the polishing agent used in the previous polishing process remain on the wafer surface after the polishing, in the next polishing process, Due to the remaining abrasive grains, there arises a problem that polishing-induced defects such as scratches are generated on the wafer surface. For this reason, in multi-stage polishing, the polishing surface remaining on the wafer surface is removed by cleaning the wafer surface as necessary after the completion of each polishing step (35a ′ and 35b ′ in the example of FIG. 2). Then, the wafer surface is polished in the next polishing step.

Japanese Patent No. 3637594

In the multi-stage polishing, the abrasive grains (coarse polishing abrasive grains) used in the rough polishing step have a relatively large particle size, and thus aggregation of the abrasive grains hardly occurs. Therefore, the abrasive grains can be easily removed from the wafer surface by cleaning the wafer surface after the rough polishing step.
However, after the rough polishing process, the abrasive grains tend to aggregate as the grain size of the abrasive grains used decreases, and the aggregated abrasive grains adhere to the wafer surface, and the wafer surface is washed after polishing. However, the agglomerated abrasive grains cannot be completely removed. As a result, polishing abrasive grains remain on the wafer surface, and if the next process is polished in this state, a polishing-induced defect is generated on the wafer surface.
In particular, if polishing-induced defects exist on the surface of the wafer after the final cleaning step (36 in the example of FIG. 2) after the finish polishing step, high integration of devices manufactured from the wafer is hindered. Therefore, in the wafer polishing process, it is necessary to set polishing conditions that can reduce polishing-induced defects.

  One method for completely removing the abrasive grains adhering to the surface of the wafer in the polishing step is to enhance the cleaning ability after polishing. However, the enhancement of the cleaning capability is not preferable because it not only increases the number of cleaning steps and the cleaning cost but also causes the quality of the wafer surface after cleaning, such as the haze value (roughness index), of the wafer surface.

  Accordingly, an object of the present invention is to reduce defects caused by polishing in order to obtain a semiconductor wafer having a high surface quality that can be applied to high integration of devices in a semiconductor wafer manufacturing method including a plurality of polishing steps. It is to provide means.

In order to achieve the above object, the inventors of the present invention have conducted extensive studies on the cause of the generation of polishing-induced defects on the surface of the wafer after the final cleaning in the method of manufacturing a semiconductor wafer including a plurality of stages of polishing steps. The following findings were obtained.
(1) The polishing-induced defects on the wafer surface after the final cleaning are generated due to the aggregation of the pre-finish polishing abrasive grains and the adhesion to the wafer surface after the pre-finish polishing. That is, the pre-finish polishing abrasive grains aggregate and adhere to the wafer surface during the pre-finish polishing process, and even if the wafer surface is washed after the pre-finish polishing process, the aggregate abrasive grains can be completely removed. As a result, aggregated abrasive grains remain on the wafer surface. When the next final polishing step is performed in this state, surface defects such as scratches are generated on the wafer surface due to aggregated abrasive grains remaining on the wafer surface. In the final polishing process, the polishing allowance is small compared to the rough polishing process and the pre-finish polishing process, so this surface defect cannot be removed by final polishing, and as a result, the final cleaning after the final polishing process is performed. Also, defects remain on the wafer surface.
(2) Therefore, if the pre-finish polishing abrasive grains can be prevented from aggregating and adhering to the wafer surface during the pre-finish polishing step, it is possible to reduce polishing-induced defects on the wafer surface after the final cleaning.
(3) Further, the abrasive grains in the abrasive used in the polishing process (hereinafter referred to as “the final two-stage polishing process”) performed one stage before the final polishing process (two stages before the final polishing process). The smaller the particle size of the pre-finishing abrasive grain (that is, the difference between the pre-finishing second stage polishing abrasive grain and the pre-finishing polishing abrasive grain) than the grain size (hereinafter referred to as “the pre-finishing second stage polishing abrasive grain”). The larger the difference in particle size), the more noticeable is the phenomenon that pre-finish abrasive grains aggregate and adhere to the wafer surface during the pre-finish polishing step.
Based on the above knowledge, the inventors of the present application have found that the phenomenon that the pre-finishing abrasive grains aggregate and adhere to the wafer surface during the pre-finishing polishing process is the same as that of the final polishing abrasive grain size. The particle size of the abrasive grains is set to be equal to or larger than that, and the concentration of the pre-finish abrasive grains in the abrasive used in the pre-finish polishing step is set to be two steps before the finish in the abrasive used in the two-stage pre-polishing step. It has been found that it can be suppressed by setting the concentration to be equal to or less than the concentration of the abrasive grains, and the present invention has been completed.

That is, the above object has been achieved by the following means.
[1] A semiconductor wafer manufacturing method including a polishing step for polishing a semiconductor wafer surface,
The polishing process includes at least three stages including, in this order, a two-step pre-finishing polishing process performed two stages before the final polishing process, a pre-finishing polishing process performed one stage before the final polishing process, and a final polishing process in this order. Consisting of a polishing process, and
The polishing agent used in the pre-finish polishing step satisfies the following (1) and (2):
(1) The grain size of the abrasive grains (pre-finishing polishing abrasive grains) contained in the abrasive used in the polishing process before the final two-stage polishing is determined. It is more than the diameter.
(2) The concentration of the abrasive grains before finishing is equal to or less than the concentration of the abrasive grains before finishing 2 stages of the polishing agent used in the polishing process before 2 stages of finishing.
[2] The method for producing a semiconductor wafer according to [1], wherein the grain size of the pre-finishing abrasive grains is 1 to 4 times the grain diameter of the pre-finishing second stage abrasive grains.
[3] The semiconductor wafer according to [1] or [2], wherein the concentration of the pre-finish polishing abrasive grains is in a range of 0.01 to 0.3 times the concentration of the pre-finishing second polishing abrasive grains. Production method.
[4] The method for producing a semiconductor wafer according to any one of [1] to [3], wherein the grain size of the pre-finish abrasive grains is 70 nm or more and 200 nm or less.
[5] The method for producing a semiconductor wafer according to any one of [1] to [4], wherein the concentration of the pre-finish abrasive grains is in the range of 0.05% by mass to 0.3% by mass.
[6] The method for producing a semiconductor wafer according to any one of [1] to [5], wherein the pre-finish abrasive grain has a zeta potential of less than −30 mV.
[7] The method for producing a semiconductor wafer according to any one of [1] to [6], wherein a zeta potential on the wafer surface in the pre-finish polishing step is less than 0 mV.
[8] The method for producing a semiconductor wafer according to any one of [1] to [7], wherein the pre-finish polishing abrasive is colloidal silica.

  According to the present invention, it is possible to reduce defects caused by polishing on the surface of a semiconductor wafer manufactured through a multi-step polishing process, and as a result, a semiconductor wafer having high surface quality that can be adapted to high integration of devices is provided. can do.

It is a figure which shows typically the relationship between the particle size and density | concentration of the abrasive grain in each grinding | polishing process of 3 steps | paragraphs of grinding | polishing processes among one Embodiment of this invention. It is a flow which shows the general manufacturing process of a semiconductor wafer.

The present invention relates to a semiconductor wafer manufacturing method including a polishing process for polishing a semiconductor wafer surface. In the method for producing a semiconductor wafer of the present invention, the polishing step includes at least a two-step pre-finishing polishing step performed two steps before the final polishing step, a pre-finishing polishing step performed one step before the final polishing step, and The abrasive used in the pre-finish polishing step comprises three polishing steps including the finish polishing step in this order, and satisfies the following (1) and (2).
(1) The particle diameter of the pre-finishing abrasive grains contained is equal to or greater than the particle diameter of the pre-finishing two-stage polishing abrasive grains in the polishing agent used in the two-stage finishing polishing process.
(2) The concentration of the abrasive grains before finishing is equal to or less than the concentration of the abrasive grains before finishing 2 stages of the polishing agent used in the polishing process before 2 stages of finishing.
FIG. 1 schematically shows the relationship between the grain size of abrasive grains used in each polishing step and the abrasive grain concentration in the abrasive in one embodiment of the present invention that satisfies the above conditions (1) and (2). Show. The embodiment shown in FIG. 1 performs three-stage polishing including a finish two-stage pre-polishing process, a pre-finish polishing process and a finish polishing process in this order, and the finish two-stage pre-polishing process is a rough polishing process (FIG. 2). This corresponds to 35a). In the semiconductor wafer manufacturing method of the present invention, as described above, by performing three-stage polishing satisfying at least the above conditions (1) and (2) as a polishing step, in the semiconductor wafer finally obtained It is possible to reduce polishing-induced defects.
Hereinafter, the semiconductor wafer manufacturing method of the present invention will be described in more detail.

  The method for producing a semiconductor wafer of the present invention includes a polishing step for polishing the surface of the semiconductor wafer. Here, the semiconductor wafer to be polished is, for example, a silicon wafer. The silicon wafer may be a p-type silicon wafer or an n-type silicon wafer. The thickness of the semiconductor wafer to be polished is, for example, 600 to 1000 μm, but is not particularly limited. The present invention can be applied to wafers of any diameter such as 200 mm, 300 mm, and 450 mm. For example, semiconductor wafers including silicon wafers are usually manufactured through a slicing step 31, a chamfering step 32, a lapping step 33, and an etching step 34 as shown in FIG. 2 before the polishing step. Since these steps are all known techniques, description thereof is omitted here.

  In the polishing process, for example, a predetermined amount of polishing agent is supplied between a polishing pad such as a urethane polishing pad attached to a surface plate of a polishing apparatus and the surface of the semiconductor wafer, and the abrasive grains contained in the polishing agent and the semiconductor In order to make contact with the wafer surface, the semiconductor wafer can be moved (for example, rotated) in a pressurized state toward the polishing pad.

  As the polishing apparatus, an apparatus having a surface plate with a polishing pad attached to the surface thereof, an abrasive supply means, and a semiconductor wafer moving means (for example, a rotating means) can be used. Also, as a polishing apparatus, a single-side polishing apparatus that polishes only the surface of a wafer attached to a carrier plate with wax or the like, or a double-side polishing that simultaneously polishes the front and back surfaces of a wafer held in a carrier having round holes for holding wafers. Any polishing apparatus can be used.

  The surface plate is preferably made of a metal such as iron or stainless steel or made of ceramics and having good flatness. The size of the surface plate can be appropriately selected according to the size of the semiconductor wafer.

  In the polishing apparatus, the semiconductor wafer comes into contact with the abrasive grains while moving on the polishing pad supplied with the polishing agent. The wafer moving speed (for example, rotational speed) here can be appropriately selected according to the material of the abrasive grains and the semiconductor wafer, and is, for example, 10 to 500 rpm, and preferably 20 to 200 rpm. In the polishing process, the semiconductor wafer is usually pressurized toward the surface plate. The pressure at the time of pressurization can be suitably selected according to the kind and size of abrasive grains, and is, for example, 5 to 100 kPa, and preferably 10 to 70 kPa.

  Moreover, the supply amount of the abrasive can also be appropriately selected according to the size of the surface plate. For example, it is 1 to 100 ml / min, and preferably 10 to 50 ml / min.

  The abrasive used in the polishing step usually contains at least abrasive grains, and is preferably a slurry in which abrasive grains are dispersed in a solvent. However, as will be described later, an abrasive that does not contain abrasive grains may be used in the final polishing step.

  As abrasive grains, colloidal silica, silica, alumina, ceria, titania, zirconia, silicon nitride, silicon carbide, manganese oxide, diamond, or a mixture thereof can be used. Among these, from the viewpoint of suppressing the aggregation of the abrasive grains, it is preferable to use highly dispersible abrasive grains, and in this respect, colloidal silica is preferable.

  As a solvent, it can select suitably according to the characteristic of the semiconductor wafer which is a grinding | polishing object, the kind of abrasive grain to be used, etc. For example, an aqueous solution containing an alkali metal hydroxide that is an inorganic alkali compound such as KOH, NaOH, or ammonia as a solute can be used. Although the usage-amount of a solvent is not specifically limited, For example, it is 2-200 mass times of the amount of abrasive grains, Preferably it is 5-50 mass times.

  The abrasive may contain additives such as a pH adjuster, if necessary, in addition to the abrasive grains and the solvent. The amount of these additives used may be adjusted as appropriate and is not particularly limited.

  The pH value of the abrasive can be adjusted by the concentration of a solute such as the alkali metal or alkaline earth metal hydroxide described above, or can be adjusted by adding a pH adjuster. As the pH adjuster, a hydrogen carbonate, an organic acid, or the like can be used.

  The polishing process in the present invention includes at least three stages including, in this order, a final two-stage polishing process that is performed two stages before the final polishing process, a pre-finish polishing process that is performed one stage before the final polishing process, and a final polishing process. A polishing step is included. In order to remove the abrasive used in the previous step, it is preferable to perform washing as necessary between the respective polishing steps.

The abrasive used in the pre-finish polishing step satisfies the following (1) and (2).
(1) The particle diameter of the pre-finishing abrasive grains contained is equal to or greater than the particle diameter of the pre-finishing two-stage polishing abrasive grains in the abrasive used in the finishing two-stage pre-polishing process.
(2) The concentration of the pre-finishing polishing abrasive grains is equal to or lower than the concentration of the polishing pre-finishing two-stage polishing abrasives used in the pre-finishing second stage polishing step.
Hereinafter, the conditions (1) and (2) will be described.

Condition (1)
The grain size of the pre-finishing abrasive grains is set to be equal to or larger than the grain diameter of the two-stage pre-finishing abrasive grains for the reasons described above. The grain size of the pre-finish abrasive grains is 1 to 4 times the grain diameter of the pre-finish 2-stage abrasive grains from the viewpoint of effectively suppressing the remaining of the abrasive grains on the wafer surface after the pre-finish polishing process. It is preferably 1 or more, more preferably 1 or more and 3 or less, and even more preferably 1 or more and 2 or less. In the present invention, the “particle diameter” relating to abrasive grains refers to the average particle diameter measured based on the dynamic light scattering method. Here, the measurement of the particle size by the dynamic light scattering method can be performed by, for example, the method described in Journal of Chemical Physics Vol. 57 No. 11 (December 1972), page 4814.

  Specifically, the particle size of the pre-finish abrasive grains is preferably 70 nm or more and 200 nm or less, and more preferably 70 nm or more and 150 nm or less. The pre-finish polishing step is mainly performed for removing the natural oxide film on the wafer surface and reducing the surface roughness of the wafer. The particle size of the abrasive grains in the abrasive used here is 70 nm or more. If it is, it is preferable because removal of the natural oxide film and reduction of the surface roughness of the wafer can be achieved without requiring a long time. Further, it is preferable that the particle size of the abrasive grains is 70 nm or more because the aggregation of the abrasive grains is small, and the generation of aggregates that are difficult to remove in the cleaning step after the polishing step can be reduced. Moreover, if the abrasive grain size is 200 nm or less, preferably 150 nm or less, the settling of the abrasive grains in the abrasive is small, so that the abrasive grains in the abrasive have high dispersibility and uniform polishing. Since it can be performed, it is preferable.

  The particle size of the pre-finish abrasive grains is as described above. Therefore, in the present invention, the grain size of the pre-finishing second stage abrasive grains is not more than the grain size of the pre-finishing abrasive grains. Specifically, the range of 50 nm to 100 nm is preferable from the viewpoint of suppressing the aggregation of the abrasive grains and the settling of the abrasive grains in the abrasive. In the embodiments described later, a mode in which the two-stage pre-finish polishing process performed one stage before the pre-finish polishing process is a rough polishing process (that is, a three-stage process including a rough polishing process, a pre-finish polishing process and a final polishing process). In the present invention, the polishing process performed before the pre-finishing polishing process is not limited to one stage, and it is of course possible to perform two or more stages of polishing processes. . In the polishing process performed before the pre-finishing polishing process, the abrasive grains are relatively large, so that it is difficult for the abrasive grains to adhere to the wafer surface due to agglomeration of the abrasive grains. Even if the agglomeration adheres to the wafer surface, the abrasive grains agglomerated and adhered to the wafer can be removed by the cleaning and the pre-finish polishing step performed immediately before the pre-finish polishing step.

  On the other hand, the final polishing process is a process that is performed to remove surface roughness, distortion, and cloudiness that occurred in the initial stage of polishing that could not be removed by the pre-finishing polishing process. Thus, the polishing allowance and the polishing rate are small. For this reason, it is preferable that the particle diameter of the finishing abrasive grain contained in the abrasive | polishing agent used at a final polishing process is below the particle diameter of the abrasive grain before finishing. Thereby, it becomes possible to suppress the deterioration of the surface roughness (micro roughness) of the wafer surface in the finish polishing. In this case, in order to prevent the finish abrasive grains from aggregating and adhering to the wafer surface and generating defects caused by polishing on the wafer surface, the concentration of the finish abrasive grains is not more than the concentration of the abrasive grains before finishing. More preferably, the concentration is lower than the concentration of the abrasive grains before finishing, and it is even more preferable to use an abrasive that does not contain abrasive grains (that is, the abrasive grain concentration is 0). preferable. By using an abrasive that does not contain abrasive grains, it becomes possible to prevent the deterioration of microroughness in finish polishing. Here, the term “abrasive that does not contain abrasive grains” refers to an abrasive that does not actively contain abrasive grains, although it may contain abrasive grains that are inevitably mixed in the abrasive. .

Condition (2)
In this invention, the density | concentration of the abrasive grain before finishing of the abrasive | polishing agent used for a grinding | polishing process before finishing shall be below the density | concentration of the grinding | polishing grain before finishing 2 steps | paragraphs of the abrasive | polishing agent used for 2 steps | paragraphs before finishing polishing. The concentration of the abrasive grains before finishing is 0.01 times or more of the concentration of the abrasive grains before finishing 2 steps from the viewpoint of effectively suppressing the abrasive grains from remaining on the wafer surface after the polishing process before finishing. It is preferable that it is 2 times or less, and more preferably 0.02 times or more and 0.3 times or less. Specifically, the concentration of the abrasive grains before finishing is preferably in the range of 0.05% by mass to 0.3% by mass, and in the range of 0.1% by mass to 0.3% by mass. More preferred. If it is 0.05 mass% or more, preferably 0.1 mass% or more, it is preferable because removal of the natural oxide film and reduction of the wafer surface roughness can be achieved without requiring a long time in the polishing step before finishing. If it is 0.3 mass% or less, since there is little aggregation of abrasive grains, it can reduce the production | generation of the aggregate which is difficult to remove in the washing | cleaning process after a grinding | polishing process, and it is preferable.

  The concentration of the pre-finish abrasive grains is as described above. Therefore, in the present invention, the concentration of the abrasive grains before the final two-stage finish is equal to or higher than the concentration of the abrasive grains before the finishing. Specifically, it is preferably in the range of 1% by mass to 5% by mass from the viewpoint of preventing the polishing rate from being reduced and suppressing the agglomeration from aggregating and adhering to the wafer surface. Note that even if agglomeration of abrasive grains or adhesion to a wafer occurs in a polishing process performed before the pre-finish polishing process, it can be removed in a subsequent process for the reasons described above.

  On the other hand, the final polishing process is a process that is performed to remove surface roughness, distortion, and cloudiness that occurred in the initial stage of polishing that could not be removed by the pre-finishing polishing process. Thus, the polishing allowance and the polishing rate are small. For this reason, it is preferable that the density | concentration of a finishing polishing abrasive grain is below the density | concentration of the polishing abrasive grain before finishing. As a result, it is possible to suppress the finish abrasive grains from agglomerating and adhering to the wafer surface, thereby causing generation of polishing-induced defects on the wafer surface. Alternatively, as described above, it is more preferable to use an abrasive that does not contain abrasive grains (that is, the abrasive grain concentration is 0).

  The abrasive grains in the polishing agent include alumina and titania as those having an isoelectric point at pH 3 to 7, such as silica, ceria, zirconia, and the like having an isoelectric point at pH 7 to 9. The zeta potential of these abrasive grains becomes positive below the pH of the isoelectric point, and becomes negative above the pH of the isoelectric point. Therefore, the zeta potential of the abrasive grains can be controlled by the liquidity of the abrasive. By making the zeta potential of the semiconductor wafer surface and the abrasive grains the same sign, it becomes possible to further reduce the adhesion of the abrasive abrasive grains to the wafer surface by the repulsive force, and therefore the same sign as the zeta potential of the semiconductor wafer surface. It is preferable to adjust the liquidity of the abrasive based on the isoelectric point of the abrasive grains. Semiconductor wafers such as silicon wafers usually show less than 0 mV in an alkali, that is, a negative zeta potential. Therefore, when using a basic abrasive as an abrasive, abrasive grains showing a negative zeta potential in an alkali. Is preferably used. In this case, in order to effectively suppress agglomeration of the abrasive grains by the repulsive force, the zeta potential of the abrasive grains is preferably less than −30 mV, and more preferably less than −35 mV. The lower limit value of the zeta potential of the abrasive grains is not particularly limited, but is usually about −100 mV or more. On the other hand, when the surface of the semiconductor wafer exhibits a negative zeta potential, the zeta potential is preferably less than 0 mV from the viewpoint of effectively suppressing the adhesion of abrasive grains by the repulsive force. The lower limit value of the zeta potential of the semiconductor wafer is not particularly limited, but is usually about −100 mV or more. The zeta potential of the abrasive grains and the semiconductor wafer can be controlled by the pH value of the abrasive or the concentration of a solute such as an alkali metal or alkaline earth metal hydroxide. Increasing the concentration of the solute described above to reduce the zeta potential (increase the absolute value of the zeta potential) may increase the roughness of the polished wafer surface. The lower limit of the potential is preferably −100 mV or more. The zeta potential in the present invention refers to a value measured by electrophoresis. The control of the zeta potential described above is preferably performed in a pre-finish polishing step that should suppress at least agglomeration of the abrasive grains and adhesion to the wafer surface in order to suppress generation of defects due to polishing. More preferably, it is carried out over the entire polishing step.

  The semiconductor wafer after the polishing step usually becomes a product wafer through a final cleaning step. In the present invention, the polishing agent used in the pre-finish polishing step satisfies the above conditions (1) and (2), thereby suppressing adhesion to the wafer surface due to agglomeration of polishing abrasive grains causing polishing-induced defects. Therefore, the final cleaning step can be performed under normal cleaning conditions. Therefore, the final cleaning step can be performed by a known cleaning method such as cleaning with pure water or an organic solvent, RCA cleaning, or SC-1 cleaning.

  According to the semiconductor wafer manufacturing method of the present invention described above, it is possible to manufacture a semiconductor wafer having high surface quality with reduced polishing-induced defects. By using a semiconductor wafer having such a high surface quality, it becomes possible to highly integrate devices manufactured from this semiconductor wafer.

  Hereinafter, the present invention will be described by way of examples, but the present invention is not limited to the embodiments shown in the examples.

[Examples 1-5, Comparative Examples 1-3]
A 200 mm diameter ingot was sliced, chamfered, lapped, and etched to obtain a silicon wafer to be polished having a thickness of about 800 μm.
A double-sided simultaneous polishing apparatus was used as the polishing apparatus, and the final two-stage polishing process (rough polishing process), the pre-finishing polishing process, and the final polishing process were performed in this order under the following conditions. RCA cleaning was performed between each polishing step, and RCA cleaning was also performed on the wafer after the final polishing step.
(1) Two-stage pre-polishing process (rough polishing process)
Abrasive type: Potassium hydroxide aqueous solution (aqueous slurry) containing abrasive grains
Abrasive pH: 11
Abrasive grain: colloidal silica (particle size and concentration: listed in Table 1)
Polishing conditions: wafer rotation speed 50 rpm, pressurization 30 kPa, abrasive supply amount: 30 ml / min Polishing allowance: 10 μm on both sides of the wafer
(2) Polishing process before finishing Abrasive type: Potassium hydroxide aqueous solution containing abrasive grains (aqueous slurry)
Abrasive pH: 11
Abrasive grain: colloidal silica (particle size and concentration: listed in Table 1)
Polishing conditions: wafer rotation speed 60 rpm, pressurization 30 kPa, abrasive supply amount: 30 ml / min Polishing allowance: 2 μm on both sides of the wafer
(3) Finishing (final) polishing step Abrasive type: potassium hydroxide aqueous solution containing no abrasive grains Abrasive pH: 11
Polishing conditions: wafer rotation speed 65 rpm, pressure 10 kPa, abrasive supply amount: 30 ml / min Polishing allowance: 0.1 μm on both sides of the wafer

Evaluation Method (1) Measurement of Abrasive Grain Size The average grain size of the abrasive grains was measured using N4 PLUS (trade name) manufactured by BECKMAN COULTER.
(2) Measurement of zeta potential of pre-finished abrasive grains Measurement was performed using ELS-Z (trade name) manufactured by Otsuka Electronics Co., Ltd.
(3) Measurement of zeta potential on silicon wafer surface in pre-finish polishing step: Measured using ELS-Z (trade name) manufactured by Otsuka Electronics Co., Ltd.
(4) Measurement of number of LPDs (Light Point Defect) Using the ScanScan SP-1 (trade name) manufactured by KLA-Tencor, LPD remaining on the wafer surface after the final cleaning is detected, and the size is 0.05 μm. The number of LPDs was measured. If the number of LPDs to be measured is less than 20, it can be determined that there are few polishing-induced defects and high surface quality.

Evaluation results As shown in Table 1, in any of Examples 1 to 5, the number of LPDs on the surface of the 200 mm diameter wafer after the final cleaning was less than 20 in comparison with Comparative Examples 1 to 3. . From the above results, it was confirmed that the present invention can produce a semiconductor wafer having high surface quality in which the occurrence of polishing-induced defects is suppressed.

  The semiconductor wafer manufacturing method of the present invention is useful in the field of manufacturing highly integrated semiconductor devices.

Claims (8)

A method for manufacturing a semiconductor wafer including a polishing step for polishing a semiconductor wafer surface,
The polishing process includes at least three stages including, in this order, a two-step pre-finishing polishing process performed two stages before the final polishing process, a pre-finishing polishing process performed one stage before the final polishing process, and a final polishing process in this order. Consisting of a polishing process, and
The polishing agent used in the pre-finish polishing step satisfies the following (1) and (2):
(1) The particle size of the abrasive grains contained (hereinafter referred to as “pre-finished abrasive grains”) is determined by the abrasive grains (hereinafter referred to as “finish 2” It is more than the particle size of “pre-stage polishing abrasive”.
(2) The concentration of the abrasive grains before finishing is equal to or less than the concentration of the abrasive grains before finishing 2 stages of the polishing agent used in the polishing process before 2 stages of finishing. 2. The method of manufacturing a semiconductor wafer according to claim 1, wherein the grain size of the pre-finishing abrasive grains is 1 to 4 times the grain size of the two-stage pre-finishing abrasive grains. 3. The method of manufacturing a semiconductor wafer according to claim 1, wherein a concentration of the pre-finishing abrasive grains is in a range of 0.01 to 0.3 times a concentration of the pre-finishing two-stage polishing abrasive grains. The method for producing a semiconductor wafer according to any one of claims 1 to 3, wherein a particle diameter of the pre-finishing abrasive grains is 70 nm or more and 200 nm or less. The method for producing a semiconductor wafer according to any one of claims 1 to 4, wherein the concentration of the pre-finish abrasive grains is in a range of 0.05 mass% to 0.3 mass%. The method for producing a semiconductor wafer according to claim 1, wherein the pre-finish polishing abrasive has a zeta potential of less than −30 mV. The method for producing a semiconductor wafer according to claim 1, wherein a zeta potential on the wafer surface in the pre-finish polishing step is less than 0 mV. The method for producing a semiconductor wafer according to claim 1, wherein the pre-finish polishing abrasive is colloidal silica.