JP5471574B2 - Electronic circuit - Google Patents

Description

  The present invention relates to an electronic circuit, and more particularly to an electronic circuit having an oscillation circuit.

  The oscillation circuit is realized by forming a negative resistance circuit by applying positive feedback to an active element such as a transistor. For example, Patent Document 1 describes a current reuse type negative resistance circuit that applies positive feedback from a source to a gate.

JP 2008-035083 A

  For example, even if an attempt is made to obtain an oscillation frequency relatively higher than the cutoff frequency ft of a transistor used as an active element, sufficient reflection characteristics of the negative resistance circuit may not be obtained at a desired frequency. For this reason, oscillation may become unstable.

  The present invention has been made in view of the above problems, and an object thereof is to improve reflection characteristics in a negative resistance circuit.

  The present invention provides a first transistor having a control terminal, a first terminal, and a second terminal, a control terminal connected to the second terminal of the first transistor, a first terminal, and a second terminal to which a DC power source is connected. A positive feedback circuit that commonly feeds back a signal from the first terminal of the first transistor and the first terminal of the second transistor to a control terminal of the first transistor; A first capacitor connected between the first terminal of the transistor and the positive feedback circuit; a first node between the second terminal of the first transistor and the control terminal of the second transistor; An electronic circuit comprising: a path connecting the second node between the first terminal of the second transistor and the first capacitor in a DC manner. According to the present invention, since a plurality of stages of transistors can be positively fed back in common, the reflection characteristic of the negative resistance circuit can be improved.

  In the above configuration, a distributed constant line provided between the first node and the second node may be provided. According to this configuration, the reflection characteristic of the negative resistance circuit can be further improved.

  In the above configuration, the distributed constant line may be configured to be capacitive. According to this configuration, the reflection characteristic of the negative resistance circuit can be further improved.

  The said structure WHEREIN: It can be set as the structure which comprises the spiral inductor connected in series with the said distributed constant line between the said 1st node and the said 2nd node. According to this configuration, it is possible to reduce the line length of the distributed constant line and reduce the size.

  The said structure WHEREIN: It can be set as the structure which comprises the 1st resistance provided between the said 1st node and the said 2nd node.

  In the above configuration, the feedback circuit may include an inductance element.

  In the above configuration, the feedback circuit may include a second resistor connected in series with the inductance element and a second capacitor connected in parallel with the second resistor. According to this configuration, it is possible to suppress loss due to the second resistance.

According to the present invention, since a plurality of stages of transistors can be positively fed back in common, the reflection characteristic of the negative resistance circuit can be improved.

FIG. 1 is a circuit diagram of an electronic circuit according to a comparative example. FIG. 2 is a circuit diagram of the electronic circuit according to the first embodiment. FIG. 3 is a circuit diagram of an electronic circuit according to the second embodiment. FIG. 4 is a circuit diagram of an electronic circuit according to the third embodiment. FIG. 5 is a circuit diagram of an electronic circuit according to the fourth embodiment. FIG. 6 is a diagram illustrating the transistor S21 and the gain Gamax used in the simulation. FIG. 7 is a diagram illustrating a simulation result of the reflection characteristic S11 with respect to the frequency. FIG. 8 is a circuit diagram of an electronic circuit according to the fifth embodiment. FIG. 9 is a diagram illustrating a simulation result of the reflection characteristic S11 with respect to the frequency. FIG. 10 is a circuit diagram of an electronic circuit in accordance with the sixth embodiment. FIG. 11 is a diagram illustrating a simulation result of the reflection characteristic S11 with respect to the frequency. FIG. 12 is a circuit diagram of an electronic circuit according to the seventh embodiment. FIG. 13 is a diagram illustrating a simulation result of the reflection characteristic S11 with respect to the frequency.

  First, a comparative example will be described. FIG. 1 is a circuit diagram of an electronic circuit according to a comparative example. As shown in FIG. 1, the electronic circuit 100 a according to the comparative example includes a negative resistance circuit 90 and a resonance circuit 92. The circuit on the right side from the input terminal IN in FIG. 1 is the negative resistance circuit 90, and the circuit on the left side is the resonance circuit 92. The negative resistance circuit 90 outputs an oscillation signal, and the resonance circuit 92 fixes the oscillation frequency of the negative resistance circuit 90 to the resonance frequency. As the resonance circuit 92, for example, a resonance distributed constant line LC is used.

  The negative resistance circuit 90 mainly includes a transistor Q and a positive feedback circuit 20. The transistor Q is, for example, a bipolar transistor. The base of the transistor Q is connected to a resonant distributed constant line LC via a matching distributed constant line L21. Further, a DC (Direct Current) voltage is supplied to the base of the transistor Q from the power supply Vcc2 through an inductor L12 and a capacitor C12 which are low-pass filters. Resistors R21 and R22 are resistors for voltage supply.

  The emitter of the transistor Q is grounded via the positive feedback circuit 20. The positive feedback circuit 20 is, for example, a capacitor C20. The emitter of the transistor Q is grounded in parallel with the capacitor C20 via a resistor R20 and a spiral inductor L20 in series. The resistor R20 and the spiral inductor L20 ground the emitter in a DC manner.

  Power is supplied to the collector of the transistor Q from the power supply Vcc1 through an inductor L11 and a capacitor C11 that are low-pass filters. Further, a matching distributed constant line L22 and a DC cut capacitor C21 are connected between the collector and the output terminal OUT.

  For example, when an InGaP HBT (Heterojunction Bipolar Transistor) having a cutoff frequency ft of 35 GHz is used as the transistor Q, the reflection characteristic S11 viewed from the input terminal IN through the negative resistance circuit 90 becomes low at a high frequency. For example, even if the matching state is adjusted to improve the reflection characteristic S11, S11 is only about 3 dB at the oscillation frequency of 38 GHz. When the 38 GHz oscillation signal is multiplied and used in the 76 GHz band, for example, in order to stably maintain an oscillation state at −40 ° C. to 125 ° C., S11 of the negative resistance circuit 90 is preferably 6 dB or more. As described above, when a transistor having a relatively low cutoff frequency ft is used to generate an oscillation signal having a relatively high oscillation frequency, there is a problem that a stable oscillation state with low reflection characteristics cannot be obtained.

  An embodiment that solves the above problems will be described below.

  Example 1 is an example in which a bipolar transistor is used as a transistor. FIG. 2 is a circuit diagram of the electronic circuit according to the first embodiment. As shown in FIG. 2, the negative resistance circuit 90 of the electronic circuit 100 according to the first embodiment includes a first transistor Q1 and a second transistor Q2. The base (control terminal) of the first transistor Q1 is connected to the resonance circuit 92 through a matching distributed constant line L5. The emitter (first terminal) of the first transistor Q1 is connected to the node N3. The node N3 is grounded via the positive feedback circuit 22. Here, in the positive feedback circuit 22, for example, a second resistor R2 and a distributed constant line L1 are connected in series. The collector (second terminal) of the first transistor Q1 is connected to the base (control terminal) of the second transistor Q2 via the first line 10. As the first line 10, a matching distributed constant line L3, a DC cut capacitor C3, and a matching distributed constant line L4 are connected in series. Thus, the collector of the first transistor Q1 is input to the base of the second transistor Q2. Also, a first node N1 between the collector of the first transistor Q1 and the base of the second transistor Q2, and a second node N2 between the emitter (first terminal) of the second transistor Q2 and the first capacitor C1 Are connected in a DC manner via the second path 12. The second line 12 has a distributed constant line L2 and a first resistor R1 connected in series.

  The emitter of the second transistor Q2 is connected to the node N3 via the first capacitor C1 for DC cut. The collector of the second transistor Q2 is connected to the output terminal OUT via a matching distributed constant line L6 and a DC cut capacitor C4 in series. A DC voltage is supplied from the power supply Vcc1 to the node between the distributed constant line L6 and the capacitor C4 via the capacitor C11 and the inductor L11 that form a low-pass filter. As a result, the DC power source Vcc1 is connected to the collector of the second transistor Q2. A voltage is supplied from the power supply Vcc2 to the base of the first transistor Q1 and the base of the second transistor Q2. A voltage is applied to each base so as to have a potential difference of about 1.3 V with respect to each emitter. The resistors R11 to R14 are resistors for voltage division, and the capacitor C12 is a capacitor for a low-pass filter.

  In the electronic circuit 100, since the first capacitor C1 is provided between the emitter of the second transistor Q2 and the third node N3, a DC current flows from the emitter of the second transistor Q2 to the third node N3. I can't. Therefore, from the power source Vcc1, as indicated by a dotted arrow in the figure, the inductor L11, the distributed constant line L6, the second transistor Q2, the second line (resistor R1, distributed constant line L), the first transistor Q1, the second resistor R2 A DC current flows through the distributed constant line L1. On the other hand, the high frequency component of the output signal of the first transistor Q1 is mainly output to the base of the second transistor Q2 via the first line 10. Here, for example, when the distributed constant line L2 is a 4 / λ line (λ is a wavelength of a signal having a use frequency), the second line 12 is opened as a high-frequency signal.

  A high frequency signal is fed back from the emitter of the first transistor Q1 to the base of the first transistor Q1 through the positive feedback circuit 22 and the resonance circuit 92. For example, by setting the first capacitor C1 to have a capacitance value that allows the high-frequency signal to pass, the high-frequency signal from the emitter of the second transistor Q2 is fed back to the base of the first transistor Q1 via the positive feedback circuit 22. As described above, the positive feedback circuit 22 feeds back the high frequency signals of the emitter of the first transistor Q1 and the emitter of the second transistor Q2 in common to the base of the first transistor Q1.

  According to the first embodiment, the DC current supplied to the first transistor Q1 is also supplied to the first transistor Q1 via the second path 12. On the other hand, the high frequency output signal of the first transistor Q1 is supplied to the base of the second transistor Q2 via the first path 10 different from the second path 12. The emitters of the first transistors Q1 and Q2 are fed back to the base of the first transistor Q1 via the positive feedback circuit 22 in common. With such a configuration, since the two stages of the first transistor Q1 and the second tricycle transistor Q2 can be positively fed back in common, the reflection characteristic of the negative resistance circuit 90 can be improved. Furthermore, since a common DC current is used in the first transistor Q1 and the second transistor Q2, the current can be reduced.

  In the comparative example, the transistor Q connected to the grounded emitter has an opposite phase between the base and the emitter of the transistor Q. Therefore, in order to provide positive feedback from the emitter to the collector of the transistor Q, the capacitor C20 is used as the positive feedback circuit 20. On the other hand, in the first embodiment, the first transistor Q1 and the second transistor Q2 that are grounded in the emitter are cascaded in two stages. For this reason, the base of the first transistor Q1 and the emitter of the second transistor Q2 are in phase. For this reason, the distributed constant line L1 of the positive feedback circuit 20 of the first embodiment may be an inductance element. Since the inductor L20 in FIG. 1 is not necessary, the size can be reduced. Also, the characteristics of the capacitor are likely to vary with respect to the inductor. In the first embodiment, the positive feedback circuit 20 can be downsized to reduce variation in characteristics.

  In the first embodiment, an example in which the number of transistors is two has been described. However, the number of transistors may be three or more.

  Example 2 is an example in which an FET (Field Effect Transistor) is used as a transistor. FIG. 3 is a circuit diagram of an electronic circuit according to the second embodiment. Compared to FIG. 2 of the first embodiment, a first transistor Q11 and a second transistor Q12 that are FETs are used instead of the first transistors Q1 and Q2 that are bipolar transistors. The power source is not connected to the first path 10, and the DC cut capacitor C3 and the distributed constant line L4 are not connected. Further, the power supply Vcc2 is not connected. This is because in the bipolar transistor, the base is set to a positive potential (eg, 1.3 V or more) with respect to the emitter, but in the FET, the potential difference between the source and the gate may be 0 V or less. For example, in FIG. 3, the resistor R1 is set such that the gate is −0.25 V with respect to the source of the second transistor Q12. Thus, by providing the first resistor R1 between the first node N1 and the second node N2, a voltage can be applied to the source of the gate of the second transistor Q12. Also for the first transistor Q11, the resistance values of the resistor R11 and the second resistor R2 are set so that the gate is −0.25 V with respect to the source.

  As in the second embodiment, FETs can be used as the first transistor and the second transistor. In this case, the source corresponds to the first terminal, the drain corresponds to the second terminal, and the gate corresponds to the control terminal.

  Example 3 is an example of a VCO (Voltage Control Oscillator). FIG. 4 is a circuit diagram of an electronic circuit according to the third embodiment. As shown in FIG. 4, the resonance circuit 92a includes a variable capacitance diode D30, a resistor R30, and a capacitor C30. The cathode of the diode D30 is connected to the other end opposite to the one end connected to the negative resistance circuit 90 of the distributed constant line LC. The anode of the diode D30 is grounded. The other end of the distributed constant circuit LC is applied with a control voltage Vc via a resistor R30. A capacitor C30 for a low-pass filter is connected to the control terminal Vc. By applying a control voltage to the control terminal Vc, the capacitance value of the diode D30 can be changed and the resonance frequency can be set to a desired frequency. As in the third embodiment, the electronic circuit may be a VCO.

  The fourth embodiment is a specific example of the first embodiment. FIG. 5 is a circuit diagram of an electronic circuit according to the fourth embodiment. Referring to FIG. 5, as compared with FIG. 2 of the first embodiment, a second capacitor C2 is connected in parallel with the second resistor R2. A matching capacitor C5 is connected between the node between the distributed constant line L6 and the capacitor C4 and the ground. By setting the second capacitor C2 to have a low impedance at the oscillation frequency, it is possible to suppress loss due to the second resistor R2.

Each element of FIG. 5 was set as shown in Table 1, and a simulation was performed. In the following, for the distributed constant line, the simulation is performed assuming that the substrate thickness is 75 μm, the relative dielectric constant is 13.1, the wiring thickness is 3 μm, the wiring width is 10 μm, Tan δ is 0.007, and the numbers in the table are the lengths. Is going. When the oscillation frequency is 38 GHz, the length of the distributed constant line is about 4 / λ when the length is 740 μm. When the length of the distributed constant line L1 in Table 1 is 550 μm, it becomes inductive at about λ / 5.4 and corresponds to 0.85 nH. When the length of the distributed constant line L2 is 2340 μm, it becomes capacitive at about 4 / 5λ and becomes 0.019 pF.

  FIG. 6 is a diagram illustrating the transistor S21 and the gain Gamax used in the simulation. As the transistor, an InGaP HBT (Heterojunction Bipolar Transistor) having an emitter size of 20 × 2 μm was used. From FIG. 6, S21 becomes 0 dB at approximately 32.5 GHz. That is, the cutoff frequency ft of the HBT used for the simulation is about 32.5 GHz. At a frequency of 38 GHz to be used, S21 is -1.58 dB and Gamax is 5.26 dB.

  FIG. 7 is a diagram illustrating a simulation result of the reflection characteristic S11 with respect to the frequency. At 38 GHz, the reflection characteristic S11 when the negative resistance circuit 90 is viewed from the input terminal IN is 6 dB or more. When the simulation was performed by changing the length of the distributed constant line L2, it was found that the length of the distributed constant line L2 does not have to be ¼λ (that is, open), and in the case of capacitive, S11 can be increased. Therefore, the length of the distributed constant line L2 is preferably, for example, {(1/4 to 1/2) + n / 2} λ (n is an integer). Further, when the length of the distributed constant line L1 is changed and simulated, the distributed constant line L1 is preferably inductive, for example, {(1/20 to 1/4) + n / 2} (n is an integer). It turned out that it is preferable. Note that L1 is open when 1 / 4λ, L2 is short when 1 / 2λ, and open when 1 / 4λ, but it has been confirmed that S11 can be increased even in such a case.

  As in the fourth embodiment, the distributed constant line L2 is provided between the first node N1 and the second node N2. Thereby, the reflection characteristic of the negative resistance circuit 90 can be improved. In particular, the reflection characteristics of the negative resistance circuit 90 can be further improved by making the distributed constant line L2 capacitive.

  Further, the positive feedback circuit 22 may include a second resistor R2 connected in series to the distributed constant line L1 that is an inductance element, and a second capacitor C2 connected in parallel to the second resistor R2. Thereby, the loss by 2nd resistance R2 can be suppressed.

  The fifth embodiment is an example in which a matching distributed constant line is further added to the fourth embodiment. FIG. 8 is a circuit diagram of an electronic circuit according to the fifth embodiment. Referring to FIG. 8, compared to FIG. 5 of the fourth embodiment, a matching distributed constant line L7 is provided between the emitter of the first transistor Q1 and the node N3, and the emitter of the second transistor Q2, the first capacitor C1, and the like. Between them, a matching distributed constant line L8 is connected. Other configurations are the same as those in FIG.

Each element of FIG. 8 was set as shown in Table 2, and a simulation was performed.

  FIG. 9 is a diagram illustrating a simulation result of the reflection characteristic S11 with respect to the frequency. As shown in FIG. 9, the S11 at 38 GHz can be close to 10 dB. Thus, S11 can be further improved by adding the distributed constant lines L7 and L8.

  The sixth embodiment is an example in which the distributed constant line L2 of the fourth embodiment is changed. FIG. 10 is a circuit diagram of an electronic circuit in accordance with the sixth embodiment. Referring to FIG. 10, compared to FIG. 5 of the fourth embodiment, the distributed constant line L2 is changed to one in which the distributed constant line L21, the spiral inductor L20, and the distributed constant line L22 are connected in series. Other configurations are the same as those in FIG.

Each element of FIG. 10 was set as shown in Table 3, and a simulation was performed. Here, the distributed constant line L21, the spiral inductor L20, and the distributed constant line L22 have a line length of about 2 / 5λ.

  FIG. 11 is a diagram illustrating a simulation result of the reflection characteristic S11 with respect to the frequency. As shown in FIG. 11, S11 of 38 GHz can be set to the same level as in the fourth embodiment. This is presumably because the parallel capacitance component of the spiral inductor L20 is added, and L21, L20, and L22 have the same degree of capacitance as 5 / 4λ of the distributed constant line L2 of the fourth embodiment. Thus, the spiral inductor L20 is connected in series with the distributed constant lines L21 and L22 between the first node N1 and the second node N2. As a result, the line length can be shortened and the size can be reduced.

  Example 7 is an example in which Example 5 and Example 6 are combined. FIG. 12 is a circuit diagram of an electronic circuit according to the seventh embodiment. Referring to FIG. 12, compared to FIG. 5 of the fourth embodiment, the distributed constant line L2 is changed to one in which the distributed constant line L21, the spiral inductor L20, and the distributed constant line L22 are connected in series. A matching distributed constant line L7 is connected between the emitter of the first transistor Q1 and the node N3, and a matching distributed constant line L8 is connected between the emitter of the second transistor Q2 and the first capacitor C1. Yes. Other configurations are the same as those in FIG.

Each element of FIG. 12 was set as shown in Table 4, and a simulation was performed.

  FIG. 13 is a diagram illustrating a simulation result of the reflection characteristic S11 with respect to the frequency. As shown in FIG. 13, the S11 characteristic can be made comparable to that in FIG. 9 of the fifth embodiment. Thus, the reflection characteristic S11 can be improved. Further, as in the sixth embodiment, by replacing a part of the distributed constant line L2 with an inductor, the line length can be shortened and the size can be reduced.

  Although the embodiments of the present invention have been described in detail above, the present invention is not limited to such specific embodiments, and various modifications and changes can be made within the scope of the gist of the present invention described in the claims. It can be changed.

10 1st path 12 2nd path 22 Positive feedback circuit C1 1st capacitor C2 2nd capacitor Q1 1st transistor Q2 2nd transistor N1 1st node N2 2nd node R1 1st resistance R2 2nd resistance L2 Distributed constant line L20 Spiral Inductor

Claims (7)

A first transistor having a control terminal, a first terminal and a second terminal;
A second transistor having a control terminal connected to the second terminal of the first transistor, a first terminal and a second terminal to which a DC power source is connected;
A positive feedback circuit that feeds back a signal between the first terminal of the first transistor and the first terminal of the second transistor to the control terminal of the first transistor;
A first capacitor connected between the first terminal of the second transistor and the positive feedback circuit;
A first node between the second terminal of the first transistor and the control terminal of the second transistor; a second node between the first terminal of the second transistor and the first capacitor; A path connecting the two in a DC manner,
An electronic circuit comprising:   The electronic circuit according to claim 1, further comprising a distributed constant line provided between the first node and the second node.   The electronic circuit according to claim 2, wherein the distributed constant line is capacitive.   3. The electronic circuit according to claim 2, further comprising a spiral inductor connected in series with the distributed constant line between the first node and the second node.     5. The electronic circuit according to claim 1, further comprising a first resistor provided between the first node and the second node. 6.   The electronic circuit according to claim 1, wherein the positive feedback circuit includes an inductance element.   The electronic circuit according to claim 6, wherein the positive feedback circuit includes a second resistor connected in series with the inductance element, and a second capacitor connected in parallel with the second resistor.

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