CN210297638U

CN210297638U - Stable constant-current bias CASCODE MMIC VCO

Info

Publication number: CN210297638U
Application number: CN201921390678.XU
Authority: CN
Inventors: 高怀
Original assignee: Xiamen Innotion Technology Co ltd
Current assignee: Xiamen Innotion Technology Co ltd
Priority date: 2019-08-26
Filing date: 2019-08-26
Publication date: 2020-04-10
Anticipated expiration: 2029-08-26

Abstract

The utility model discloses a stabilize constant current biasing CASCODE MMIC VCO, it includes: VCO, buffer amplifier, constant current bias circuit, holding circuit and output matching circuit. The VCO is an oscillation frequency selection circuit controlled by external voltage, an oscillation tube of the VCO is connected with a second-stage buffer amplifier by adopting cascode, and a radio-frequency signal of the VCO is subjected to cascade amplification by the buffer amplifier and then reaches a load by an output matching circuit. The constant current bias circuit is used for providing constant current bias for the VCO, and the holding circuit is a resistor connected with the base electrode and the collector electrode of the buffer amplifier. When the power supply voltage changes, the constant current source biasing and holding circuit is adopted to keep the static current of the VCO and the static bias point of the buffer amplifier unchanged. Therefore, the circuit can stably oscillate under different power supply voltages, keeps the oscillation frequency and the amplitude-frequency characteristic in the working bandwidth unchanged, and has good and stable working performance.

Description

Stable constant-current bias CASCODE MMIC VCO

Technical Field

The utility model relates to a CASCODE MMIC VCO (adopt the common-emitter common-base to enlarge the monolithic microwave integrated voltage-controlled oscillation circuit of structure), especially relate to a stable constant current biasing CASCODE MMIC VCO.

Background

The VCO (voltage controlled oscillator) adopting a Cascode structure can perform cascade amplification on radio frequency signals, reduce load traction effect, enable the VCO to have larger output power and good output isolation, and be widely applied to the design of MMIC (monolithic microwave integrated circuit) VCOs.

A conventional Cascode VCO is usually biased by means of a resistor divider. Taking BJT/HBT as an example, fig. 1 is an implementation of a conventional Cascode VCO circuit. Transistors Q1 and Q2 adopt a cascode cascade mode, VCC passes through a resistor R_b1、R_b2And R_b3The circuit is voltage biased.

Assuming that the transistor operates in the amplification region, as can be seen from the figure,

V_B1＝V_beon

it is clear that the bias voltage of a transistor is a linear function of the supply voltage, and when the supply voltage changes, the dc operating point of the transistor changes accordingly. Thereby, the operating state and circuit performance of the VCO will change and even stop oscillating. Since the operating voltage of the VCO is usually uncertain and varies within a certain range in practical applications, this problem will cause the performance index of the VCO to deteriorate and even stop operating.

SUMMERY OF THE UTILITY MODEL

The utility model aims at: aiming at the situation that the working performance of the traditional CASCODE VCO is easily influenced by power supply voltage, a CASCODE MMIC VCO circuit structure capable of stably working in a wider power supply voltage variation range is provided, so that when the power supply voltage is varied, the oscillation frequency and amplitude-frequency characteristics in the working bandwidth are kept unchanged.

The technical scheme of the utility model is that:

a high stability constant current bias CASCODE MMIC VCO comprising: VCO, buffer amplifier, constant current bias circuit, holding circuit and output matching circuit.

The constant current bias circuit provides constant current bias for the VCO, the VCO output is connected with the output matching circuit through the buffer amplifier, and the holding circuit is connected with the buffer amplifier, so that the static bias point of the buffer amplifier is kept unchanged.

Among them, the VCO is a feedback type oscillation circuit using capacitance three-point (Coplitts). The circuit comprises an oscillation transistor Q1, capacitors C1-C5 and L1-L3, wherein an external adjustable voltage source VT is connected between ports 12.

The buffer amplifier includes an amplifying transistor Q2, a capacitor C6, and an inductor L4. VCC is connected with the collector of Q2 through big inductance RFC, and 7 ports are connected with output matching circuit and output radio frequency signal, and 4 ports and 5 ports are connected with the port that VCO corresponds.

The constant current bias circuit is a reference current source circuit structure and has the function of generating stable current output which does not change along with the voltage of a power supply. The output end generates a constant current I_b2The base of the oscillation transistor Q1 is connected.

The holding circuit is a resistor R, and two ends of the holding circuit are respectively connected to the 6 port and the 7 port of the buffer amplifier.

The output matching circuit is a filter formed by passive devices and has the functions of filtering harmonic components in the oscillating signal and matching impedance.

The utility model has the advantages that:

1. the utility model provides a high stable constant current biasing CASCODE MMIC VCO on the basis of two-stage cascade VCO structure, adopts the constant current source to carry out the biasing to the VCO. So that when the supply voltage changes, the quiescent current flowing through the VCO transistor Q1 and the buffer amplifier Q2 is substantially constant, and further the bias voltage of the buffer amplifier Q2 is made constant by the holding circuit, thereby ensuring that its quiescent operating point is constant.

2. The buffer amplifier can be seen as the load impedance of the VCO. Since the dc operating point of the transistor Q2 remains unchanged, the input resistance of the buffer amplifier, i.e., the load impedance of the VCO, remains unchanged. This avoids the frequency pulling effect that results when the VCO load varies, thereby ensuring the frequency stability of the VCO. Furthermore, the current gain of Q2 is constant and the output impedance is constant, i.e., has a constant source impedance to the load. Therefore, the output power of the radio frequency signal can be kept constant for different oscillation frequencies, namely, the amplitude-frequency characteristic in the working bandwidth is constant.

The quiescent current of the VCO oscillator tube Q1 is unchanged, so that the open-loop gain of the VCO is unchanged, and the load is unchanged, thereby ensuring that the starting condition of the VCO is unchanged and stable oscillation can be maintained.

4. Supply voltage V_CCThe change results in a voltage V between the emitter and the collector of the transistor Q1_CE1Equivalent changes occur. When V is_CE1While changing, the interelectrode capacitance C of the transistor_CEAnd C_CBChanges will occur which will result in a change in the oscillation frequency, but the effect of the change in capacitance between the transistor poles can be minimized as long as certain measures are taken in the Coplitts circuit, such as making the feedback capacitance across the collector and emitter sufficiently large, or making the coupling capacitance connecting the resonant network sufficiently small. This has been widely verified both theoretically and practically.

To sum up, the utility model provides a high stable constant current bias CASCODE MMIC VCO adopts constant current source biasing and holding circuit to make the quiescent current of VCO and the quiescent bias point of buffer amplifier remain unchanged. Therefore, the circuit can stably oscillate under different power supply voltages, keeps the oscillation frequency and the amplitude-frequency characteristic in the working bandwidth unchanged, and has good and stable working performance.

Drawings

Fig. 1 is a conventional cascodee VCO dc bias circuit.

Fig. 2 is a circuit block diagram of the constant current bias CASCODE VCO of the present invention.

Fig. 3 is a schematic diagram of the VCO of the present invention.

Fig. 4 is a schematic diagram of a buffer amplifier according to the present invention.

Fig. 5 is a holding circuit of the present invention.

Fig. 6 is a constant current bias circuit of the present invention.

Fig. 7 is a diagram of the VCO and buffer amplifier connection of the present invention.

Detailed Description

As shown in fig. 2, the utility model provides a high stable constant current biasing CASCODE MMIC VCO the utility model discloses an among the concrete implementation, the utility model provides a high stable constant current biasing CASCODE MMIC VCO includes: VCO, buffer amplifier, constant current bias, hold circuit and output match.

As shown in fig. 3, the VCO is a feedback type oscillation circuit using capacitance three-point (Coplitts). The circuit comprises an oscillation transistor Q1, capacitors C1-C5 and inductors L1-L3. C1-C3 are feedback capacitors. C_vBeing a varactor, inductors L1, L2, C4, C5 and C_vThe series and parallel connection form an equivalent inductance L _ var. When the external voltage VT changes, the inductance value of L _ var changes, the oscillation frequency changes, and the intelligent adjustment of the VCO oscillation frequency is realized. The 4 port and the 5 port are respectively connected with the corresponding ports of the buffer amplifier, and the radio frequency signal is input into the buffer amplifier. The 3 port is connected with a constant current bias circuit, so that the base stage of the oscillating transistor Q1 obtains stable current bias Ib 1. When the base current Ib of the oscillation transistor Q1 is constant, the current flowing through the oscillation transistor Q1 remains constant ignoring the effect of the base width modulation. Therefore, the open-loop gain of the VCO is unchanged, and the load is unchanged, so that the starting condition of the VCO is unchanged, and stable oscillation can be kept.

As shown in fig. 4, a buffer amplifier is connected to the subsequent stage of the VCO and functions to buffer and amplify the signal. The 4 port and the 5 port are respectively connected with corresponding ports of the VCO, namely an oscillating transistor Q1 and an amplifying transistor Q2 are cascaded in a Cascode connection mode, and a collector of Q1 is connected with an emitter of Q2. Since the collector current of Q1 is constant, the quiescent current flowing through Q2 also remains constant.

As shown in fig. 5, the holding circuit is a resistor R, and its two ends are respectively connected to the 6 port and the 7 port of the buffer amplifier, and its function is to make the bias voltage of the amplifying transistor Q2 constant. Obviously, the voltage V across the emitter and collector of the transistor_CE2Equal to the voltage drop across resistor R plus the turn-on voltage V_beonSince the emitter current of Q2 remains constant, the base current remains constant and the voltage drop across resistor R remains constantRemain unchanged. Thus V_CE2The static operating point of Q2 remains constant.

Thus, the input/output resistance of the buffer amplifier is not changed, and the signal gain is also not changed.

The rf signal of the VCO enters the buffer amplifier through port 5 for amplification, whereby the influence of the buffer amplifier can be regarded as the load impedance of the VCO, and the impedance is determined by the coupling capacitance C6 and the input impedance of transistor Q2. The quiescent operating point of Q2 is constant, the input resistance of the buffer amplifier is constant, and the load impedance of the VCO is constant. This avoids the frequency pulling effect that results when the VCO load varies, thereby ensuring the frequency stability of the VCO. Furthermore, the current gain of the buffer amplifier is constant and the output impedance is constant, i.e. has a constant source impedance to the load. Therefore, the output power of the radio frequency signal can be kept constant for different oscillation frequencies, namely, the amplitude-frequency characteristic in the working bandwidth is constant.

The only effect that the supply voltage variation has on the circuit is the voltage V between the emitter and collector of transistor Q1_CE1A change occurs. When V is_CE1While changing, the interelectrode capacitance C of the transistor_CEAnd C_CBChanges will occur and the oscillation frequency will change, but the effect of the change in the inter-electrode capacitance of the transistor can be minimized as long as certain measures are taken in the coplits oscillation circuit, such as making the feedback capacitance C2 across the collector and emitter sufficiently large, or making the coupling capacitance C4 connecting the resonant network sufficiently small. This has been widely verified both theoretically and practically.

The constant current bias circuit is used for generating stable current output which does not change along with the power supply voltage. The output matching circuit has the functions of filtering harmonic components in the oscillation signals and matching impedance by adopting a passive device to form a filter. Fig. 6 shows a circuit form of the present invention for constant current bias. The collector of the transistor T1 is connected to the base of the transistor T2, the node is grounded through the filter capacitor C7, the collector of the transistor T2 is connected to the power supply voltage VCC, the collector of the transistor T1 is connected to the power supply voltage VCC through the bias resistor R1, the emitter of the transistor T1 is grounded, the voltage dividing resistors R2 and R3 are connected in series between the emitter of the transistor T2 and the ground, the node between the voltage dividing resistors R2 and R3 is connected to the base of the transistor T1, and the emitter of the transistor T2 provides the constant current output Ib2 for the VCO through the current limiting resistor R4. When the voltage of the power supply voltage VCC increases, the base voltage VB2 of the transistor T2 increases and the emitter voltage VE2 also increases, the base voltage VR1 of the transistor T1 increases through the series voltage division of the resistors R1 and R2, the collector current I3 flowing through the transistor T1 increases, the base current I2 of the transistor T2 decreases according to KCL law, the current I1 flowing through the emitter of the transistor T2 decreases, and the current flows through the resistors R2 and R3, so the voltage drop VE2 across the resistors decreases. It can be seen that this is a negative feedback circuit, and VE2 remains substantially unchanged when the power supply voltage VCC changes, and thus the output current Ib2 also remains substantially unchanged. In this embodiment, only an implementation form of the constant current bias circuit is provided, and in practical application, any one of the constant current bias circuits may be used to perform current bias on the VCO.

Claims

1. A stable constant current biased cascod MMIC VCO, comprising: the VCO comprises a VCO, a buffer amplifier, a constant current bias circuit, a holding circuit and an output matching circuit;

the external adjustable voltage source (VT) is connected with the VCO, the constant current bias circuit is connected with the VCO, and the constant current bias circuit provides constant current bias for the VCO; the VCO oscillation signal is buffered and amplified through the buffer amplifier and then output through the output matching circuit, the holding circuit is connected with the buffer amplifier, and the holding circuit enables the static working point of the buffer amplifier to be unchanged.

2. The stable constant current bias CASCODE MMIC VCO as claimed in claim 1, wherein:

the output end of the constant current bias circuit is connected with the base of an oscillating transistor (Q1) in the VCO and provides a constant base bias current (Ib2) for the oscillating transistor, so that the static working current of the oscillating transistor (Q1) in the VCO is constant;

an oscillation transistor (Q1) in the VCO and an amplifying transistor (Q2) in the buffer amplifier are cascaded by adopting a cascade connection mode.

3. The stable constant current bias CASCODE MMIC VCO as claimed in claim 2, wherein:

the VCO is a feedback type oscillation circuit with three points of capacitance, and comprises an oscillation transistor (Q1), capacitors (C1-C5), inductors (L1-L3) and a variable capacitance diode (C1)_V) (ii) a Inductors (L1, L2), capacitors (C4, C5) and varactors (C5)_V) The series and parallel connection form an equivalent inductor (L _ var);

the collector of the oscillating transistor (Q1) is connected with the emitter of the amplifying transistor (Q2) in the buffer amplifier, and the collector of the oscillating transistor (Q1) is connected with the feedback capacitor (C3) in series to the ground; when the collector current of the oscillation transistor (Q1) is constant, the quiescent current flowing through the amplification transistor (Q2) is also constant;

the emitter of the oscillation transistor (Q1) is connected with the base of the amplifying transistor (Q2) through a coupling capacitor (C6), so that the radio frequency signal of the VCO enters the buffer amplifier for amplification;

the holding circuit is a resistor (R) which is connected between the collector and the base of an amplifying transistor (Q2) in the buffer amplifier in a bridging way, and the bias voltage of the buffer amplifier is kept unchanged;

the collector of the amplifying transistor (Q2) in the buffer amplifier is connected with the output end as the output matching circuit.

4. A stable constant current bias cascodemmic VCO of claim 3, wherein:

in the constant current bias circuit, a collector of a first transistor (T1) is connected with a base of a second transistor (T2), the node is grounded through a filter capacitor (C7), a collector of the second transistor (T2) is connected with a power supply Voltage (VCC), a collector of the first transistor (T1) is connected with the power supply Voltage (VCC) through a bias resistor, an emitter of the first transistor (T1) is grounded, voltage dividing resistors (R2 and R3) are connected between an emitter of the second transistor (T2) and the ground in series, a node between the voltage dividing resistors (R2 and R3) is connected with a base of the first transistor (T1), and an emitter of the second transistor (T2) provides a constant current output (Ib2) for the VCO through a current limiting resistor.