JP5462109B2 - Semiconductor device driving apparatus - Google Patents

Description

  The present invention relates to a driving device for a semiconductor element having a switching function. More specifically, the present invention relates to a semiconductor element driving apparatus capable of reducing a surge voltage while suppressing an increase in switching loss during switching of the semiconductor element.

Conventionally, since a synchronous motor driven by a three-phase AC is generally used in an electric vehicle, an inverter that drives a synchronous motor by converting a DC output of a battery (DC power supply) into a three-phase AC. Is installed. In addition, the inverter mounted on the electric vehicle in this way is particularly referred to as an “electric vehicle inverter”.
Many inverters for electric vehicles employ PWM (Pulse Width Modulation) control and employ IGBTs (Insulated Gate Bipolar Transistors) as power semiconductor elements for realizing the PWM control ( (See Patent Documents 1 to 3).

The IGBT is a self-extinguishing semiconductor element that is driven by a gate-emitter voltage Vge and can be turned on and off by an input signal to the gate.
Here, the turn-off switching means that the collector-emitter of the IGBT is switched from a conductive state to a cut-off state. Turn-on switching refers to switching between the collector-emitter of the IGBT from the cutoff state to the conductive state.

  In an inverter for an electric vehicle, a FWD (Free Wheeling Diode) is used as a pair for such an IGBT. That is, the FWD is a free-wheeling diode for the IGBT, and is connected in parallel with the IGBT and in a direction opposite to the input / output direction of the IGBT.

  In addition, an inverter for an electric vehicle is provided with a circuit for driving the IGBT (hereinafter referred to as “semiconductor element driving circuit”). That is, the semiconductor element drive circuit controls the turn-on and turn-off of the IGBT by changing the value of the gate-emitter voltage Vge of the IGBT.

JP 2007-306166 A JP 2008-78816 A JP 2008-199821 A

However, a surge voltage is generated during a transient period during switching such as turning on or turning off the IGBT. Hereinafter, an outline of the surge voltage will be described.
The circuit (bus) to which the IGBT is connected has stray inductance. Such stray inductance becomes an inertial force with respect to the current and acts to prevent the change of the current. Therefore, if the current is to decrease rapidly, an electromotive force is generated in the stray inductance in a direction that prevents the current from decreasing. That is, in the electric vehicle inverter, an electromotive force is generated in a direction in which the power supply voltage of the battery is added in series. The voltage based on the electromotive force generated in this way is called “surge voltage”.
In an inverter for an electric vehicle, two IGBTs connected in series are used as one unit, and a plurality of units such as three units are connected in parallel to a load corresponding to three phases of the synchronous motor. Within one unit, when one IGBT is turned on, the other IGBT is turned off. Therefore, during the transition period during switching within one unit, the collector current of one of the IGBTs suddenly decreases, so that a large surge voltage is generated and superimposed on the power supply voltage and applied between the collector and emitter of the IGBT. Is done.

For this reason, the IGBT needs to have an element breakdown voltage that can withstand such a surge voltage. Accordingly, as a matter of course, as the surge voltage increases, the required element breakdown voltage increases, and the IGBT also increases in size. In the case of an industrial inverter used in a plant or the like, a large IGBT can be adopted because there is a sufficient installation space in the factory. However, in an inverter for an electric vehicle, it is difficult to secure such an installation space in the electric vehicle, and it is very difficult to employ a large IGBT.
Therefore, downsizing is required for the IGBT mounted on the inverter for electric vehicles. In order to reduce the size of the IGBT, on the contrary, the element withstand voltage may be kept low, and for this purpose, the surge voltage may be reduced.

  As described above, since a surge voltage is generated by a rapid decrease in current, the surge voltage can be reduced by slowing the degree of change in the decrease in current. In other words, if the current and voltage rise and fall times during IGBT switching are hereinafter referred to as “switching speed”, the surge voltage can be reduced by reducing the switching speed.

However, if the switching speed is decreased to reduce the surge voltage, the loss of IGBT or FWD (hereinafter referred to as “switching loss”) during the transitional time during switching increases.
On the other hand, when the switching speed is increased in order to reduce the switching loss, the surge voltage increases as described above.
Thus, there is a trade-off relationship between surge voltage and switching loss. Hereinafter, the characteristics of surge voltage and switching loss having such a relationship are referred to as “trade-off characteristics of surge voltage and switching loss”.

Therefore, in the inverter for electric vehicles, it is desired to improve the trade-off characteristics between the surge voltage and the switching loss, in other words, to reduce the surge voltage while suppressing the increase of the switching loss when switching the IGBT. ing.
Although several methods are disclosed in Patent Documents 1 to 3 in order to meet such a demand, it cannot be said that these conventional methods sufficiently meet the demand. For this reason, it is the situation where the new method which can fully respond to the said request is calculated | required.

  As mentioned above, although the inverter for electric vehicles was demonstrated to the example, size reduction is not only requested | required only for the inverter for electric vehicles, but is requested | required with respect to the various apparatuses which employ | adopt the semiconductor element which has a switching function. Therefore, a new method capable of sufficiently satisfying the demand is not only an IGBT for an electric vehicle inverter but also a situation that is widely applicable to semiconductor devices having a switching function.

  The present invention has been made in view of such a situation, and is a semiconductor element driving device having a switching function, and at the time of switching of the semiconductor element, the surge voltage is reduced while suppressing an increase in switching loss. An object of the present invention is to provide a semiconductor device driving apparatus capable of performing the above.

The semiconductor element drive device of the present invention (for example, the upper semiconductor element drive circuit among the upper and lower electronic circuits in the embodiment)
The semiconductor device has a switching function that turns on or off according to the voltage of the drive signal applied to the gate (for example, the voltage between the gate and the emitter in the embodiment), and the bus and the emitter are inserted into the bus by the semiconductor element. A semiconductor device driving device for supplying a driving signal to a gate of a semiconductor device to conduct or cut off,
A buffer circuit including a base resistor (eg, a buffer in the embodiment);
A feedback unit (for example, a di / dt feedback unit in the embodiment) that generates a feedback voltage based on a time change of the current flowing through the bus and applies the feedback voltage as a part of the voltage of the drive signal;
With
The feedback unit includes a transformer (for example, a transformer in the embodiment), and a secondary side of the transformer is connected to both ends of the base resistor of the buffer circuit.
It is a drive device of a semiconductor element.

According to the present invention, the feedback unit can perform the “di / dt self-feedback operation” of the present invention, which will be described later in the section “Description of Embodiment”.
Thereby, at the time of switching of a semiconductor element, an increase in switching loss can be suppressed and a surge voltage can be reduced.

  In this case, the transformer may be an air core transformer.

  ADVANTAGE OF THE INVENTION According to this invention, the drive device and method of the semiconductor element which have a switching function, The drive device of the semiconductor element which can reduce a surge voltage, suppressing the increase in switching loss at the time of switching of a semiconductor element And a method can be provided.

It is a figure which shows schematic structure of one Embodiment of an electronic circuit containing the semiconductor element drive circuit to which "di / dt self-feedback operation" of this invention was applied. The control block which can implement | achieve "di / dt self-feedback operation | movement" of this invention is shown. It is a figure explaining the conventional method in which the trade-off characteristic of a surge voltage and switching loss arises. 6 is a timing chart showing how the gate is driven when the IGBT is turned off when the “di / dt self-feedback operation” of the present invention is applied. FIG. 2 is a diagram showing a schematic configuration of a turn-off basic model in which the “di / dt self-feedback operation” of the present invention is applied at the time of turn-off as the electronic circuit of FIG. 1. It is a flowchart of the turn-off basic model of the electronic circuit of FIG. It is a timing chart which shows the result of the operation | movement at the time of each turn-off of the electronic circuit of the turn-off basic model of FIG. 6, and the conventional electronic circuit. It is a figure which shows an example of the relationship between the surge voltage and loss at the time of each turn-off of the electronic circuit of the turn-off basic model of FIG. 6, and the conventional electronic circuit. FIG. 2 is a diagram showing a schematic configuration of a turn-on basic model in which the “di / dt self-feedback operation” of the present invention is applied at the time of turn-on as the electronic circuit of FIG. 1. It is a flowchart of the turn-off basic model of the electronic circuit of FIG. FIG. 11 is a timing chart showing results of operations at turn-on of each of the electronic circuit of the turn-on basic model of FIG. 10 and the conventional electronic circuit. It is a figure which shows an example of the relationship between the surge voltage and loss at the time of each turn-on of the electronic circuit of the turn-on basic model of FIG. 10, and the conventional electronic circuit. It is a figure which shows the example of a structure of a part of inverter with which the electronic circuit of FIG. 1 was mounted. 14 is a timing chart showing a comparison of results of operations at the time of turn-off between the conventional electronic circuit and the electronic circuit of FIG. 13. FIG. 14 is a timing chart showing a comparison of results of operations at the time of turn-on between the conventional electronic circuit and the electronic circuit of FIG. 13. It is a figure which shows the comparison of the short circuit interruption | blocking characteristic of the conventional electronic circuit and the electronic circuit of FIG. It is a figure which shows the comparison of the dependence of the gate voltage of the loss generated at the time of a short circuit between the conventional electronic circuit and the electronic circuit of FIG. FIG. 14 is a diagram illustrating an example of a configuration of a part of an inverter on which the electronic circuit of FIG. 1 is mounted, which is an example different from FIG. 13. FIG. 9 is a diagram for explaining an example of a method of completing the function on the upper side and the lower side in an inverter when the electronic circuit of FIG. 8 is provided on the upper side and the lower side and connected in series. It is a figure explaining the reverse recovery electric current discharge | released when the carrier accumulate | stored in the base layer of FWD on the commutation side in the reverse recovery area vicinity of FIG. 19 is excessive. 6 shows a timing chart of the reverse recovery current when the resistance value of the upper IGBT in the reverse recovery section is varied. FIG. 19 is a diagram illustrating a configuration example of a part of an inverter in which the electronic circuit of FIG. 1 is mounted with the electronic circuit having a configuration in which the LPF insertion method is applied to the configuration of the electronic circuit of FIG. 18. FIG. 23 is a timing chart showing a comparison of operation results when the electronic circuit of FIG. 22 is turned on when the delay amount of the LPF is changed. It is a figure which shows an example of the relationship between a surge voltage and loss at the time of each turn-on of the electronic circuit of FIG. 22, and the conventional electronic circuit.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 is a diagram showing a schematic configuration of an embodiment of an electronic circuit 1 including a semiconductor element driving circuit 13 of the present invention.

  The electronic circuit 1 can be employed as a part of a power module of an electric vehicle inverter, for example. The electronic circuit 1 includes an IGBT 11, an FWD 12, and a semiconductor element driving circuit 13.

The IGBT 11 and the FWD 12 are connected in parallel and in the input / output direction opposite to each other.
The IGBT 11 has a switching function for connecting or disconnecting a bus such as a power supply line of the inverter. Depending on the magnitude of the voltage of the drive signal applied to the gate of the IGBT 11, that is, the gate-emitter voltage Vge. Turn on or turn off depending on the size.
That is, the semiconductor element drive circuit 13 controls the turn-on and turn-off of the IGBT 11 by changing the gate-emitter voltage Vge of the IGBT 11.

  The semiconductor element drive circuit 13 includes a gate resistor 21, a voltage source 22, and a di / dt feedback unit 23.

The voltage source 22 outputs a gate voltage Vgg, one end of which is connected to the emitter of the IGBT 11 and the other end is connected to the gate of the IGBT 11 via the gate resistor 21.
That is, the gate resistor 21 has one end connected to the voltage source 22 and the other end connected to the gate of the IGBT 11. The gate resistor 21 has a function of suppressing vibration of the gate-emitter voltage Vge of the IGBT 11 seen in the turn-on or turn-off transition period, adjusting the switching speed of the IGBT 11, and the like according to the resistance value Rg. .
When the voltage source 22 raises the gate voltage Vgg to a high value (high), the gate-emitter voltage Vge of the IGBT 11 also becomes a high value (high), and the IGBT 11 is turned on. On the other hand, when the voltage source 22 makes the gate voltage Vgg low (low), the gate-emitter voltage Vge of the IGBT 11 also becomes low (low), and the IGBT 11 is turned off.

The di / dt feedback unit 23 generates a feedback voltage VFB based on a change in current time flowing through the bus connected to the IGBT 11, and as a part of the gate-emitter voltage Vge of the IGBT 11, that is, a part of the voltage of the drive signal. to add.
In FIG. 1, the reference voltage VFB is not added to clarify that the feedback voltage VFB is added as a part of the voltage of the drive signal, but an arrow indicating the feedback voltage VFB has an external control point. A power supply is shown. However, as will be described later with regard to some implementation examples, a configuration capable of adding the feedback voltage VFB as a part of the voltage of the drive signal is sufficient, and a device called an external control power supply is included in the semiconductor element drive circuit 13. It is not always necessary to provide it.
Specifically, here, the di / dt feedback unit 23 generates the feedback voltage VFB based on the temporal change of the collector current Ic of the IGBT 11 which is the main current of the electronic circuit 1, that is, the time differential value dIc / dt, and the IGBT 11 Are added as a part of the gate-emitter voltage Vge.
Such an operation of the di / dt feedback unit 23 is an operation to which the present invention is applied. Hereinafter, the operation is particularly referred to as “di / dt self-feedback operation” to be distinguished from other conventional operations.

式（１）において、Ｉｃｅは、ＩＧＢＴ１１のコレクタ−エミッタ間の電流（コレクタ電流Ｉｃと等価）を示している。ｇｍは、ＩＧＢＴ１１の相互コンダクタンスを示している。Ｖｇｅは、ＩＧＢＴ１１のゲート−エミッタ間の電圧を示している。ＶＴｈは、ＩＧＢＴ１１の閾値電圧を示している。
式（１）から、式（２）が得られる。

式（２）に示すように、ＩＧＢＴ１１のコレクタ−エミッタ間の電流ＩｃＥの時間変化は、ＩＧＢＴ１１のゲート−エミッタ間の電圧Ｖｇｅと、ＩＧＢＴ１１の相互コンダクタンスｇｍの時間変化に依存する。
ＩＧＢＴ１１の相互コンダクタンスｇｍは、式（３）のように示される。

式（３）において、αPNPは、エミッタ注入効率を示している。μnsは、チャネル内電子の平均移動度を示す。
式（３）から、式（４）が得られる。

ここで、式（５）に示すようにＫを定義する。

以上の式（２）乃至式（５）から、式（６）が得られる。

また、ＩＧＢＴ１１のゲート−エミッタ間の電圧Ｖｇｅは、式（７）のように示される。

式（７）において、ＶＦＢは、帰還電圧を示す。ここで、簡素化のためにゲート抵抗Ｒｇ＝０とすると、式（７）から、式（８）が得られる。

式（８）から、式（９）が得られる。

式（９）より、ゲイン（大きさ）は２ｇｍに、ＩＧＢＴ１１のコレクタ−エミッタ間の電流Ｉｃｅ（コレクタ電流Ｉｃと等価）の時間的変化、即ち時間微分値ｄＩｃ／ｄｔは、帰還電圧ＦＢに、それぞれ比例することがわかる。
ここで、ＩＧＢＴ１１のコレクタ−エミッタ間の電流Ｉｃｅ（コレクタ電流Ｉｃと等価）の時間的変化、即ち時間微分値ｄＩｃ／ｄｔに比例した電圧を、帰還電圧ＶＦＢとしてフィードバックさせると、式（１０）及び式（１１）が得られる。

式（１１）より、ＩＧＢＴ１１のコレクタ−エミッタ間の電流Ｉｃｅ（コレクタ電流Ｉｃと等価）の時間的変化、即ち時間微分値ｄＩｃ／ｄｔは、自身の２階微分に比例することがわかる。
このように、本発明の「ｄｉ／ｄｔ自己帰還動作」では、ＩＧＢＴ１１のコレクタ電流Ｉｃの時間的変化、即ち時間微分値ｄＩｃ／ｄｔに比例した電圧が、帰還電圧ＶＦＢとなり、ＩＧＢＴ１１のゲート−エミッタ間の電圧Ｖｇｅの一部として加算される。これにより、ＩＧＢＴ１１のサージ電圧の発生が開始する領域であって、コレクタ電流Ｉｃの時間変化の変曲する領域において、最も高いゲインを得ること、即ち、ｄＩｃ／ｄｔに作用させることができる。 Hereinafter, the “di / dt self-feedback operation” of the present invention will be described in more detail.
Expressions (1) to (11) are expressions explaining the principle of the “di / dt self-feedback operation” of the present invention.

In Expression (1), Ice indicates a current between the collector and the emitter of the IGBT 11 (equivalent to the collector current Ic). gm indicates the mutual conductance of the IGBT 11. Vge represents a voltage between the gate and the emitter of the IGBT 11. VTh indicates the threshold voltage of the IGBT 11.
From equation (1), equation (2) is obtained.

As shown in Expression (2), the time change of the collector-emitter current IcE of the IGBT 11 depends on the time change of the gate-emitter voltage Vge of the IGBT 11 and the mutual conductance gm of the IGBT 11.
The mutual conductance gm of the IGBT 11 is expressed as in Expression (3).

In equation (3), αPNP represents the emitter injection efficiency. μns represents the average mobility of electrons in the channel.
From equation (3), equation (4) is obtained.

Here, K is defined as shown in Expression (5).

From the above equations (2) to (5), equation (6) is obtained.

Further, the voltage Vge between the gate and the emitter of the IGBT 11 is expressed as shown in Expression (7).

In Formula (7), VFB represents a feedback voltage. Here, assuming that the gate resistance Rg = 0 for simplification, Expression (8) is obtained from Expression (7).

From equation (8), equation (9) is obtained.

From the equation (9), the gain (magnitude) is 2 gm, and the temporal change of the collector-emitter current Ice (equivalent to the collector current Ic) of the IGBT 11, that is, the time differential value dIc / dt is expressed by the feedback voltage FB. It can be seen that each is proportional.
Here, when the voltage proportional to the time change of the current Ice between the collector and the emitter 11 of the IGBT 11 (equivalent to the collector current Ic), that is, the time differential value dIc / dt is fed back as the feedback voltage VFB, the equation (10) and Equation (11) is obtained.

From the equation (11), it can be seen that the temporal change of the collector-emitter current Ice (equivalent to the collector current Ic) of the IGBT 11, that is, the time differential value dIc / dt, is proportional to its second-order differential.
Thus, in the “di / dt self-feedback operation” of the present invention, the time change of the collector current Ic of the IGBT 11, that is, the voltage proportional to the time differential value dIc / dt becomes the feedback voltage VFB, and the gate-emitter of the IGBT 11. It is added as a part of the voltage Vge between. As a result, the highest gain can be obtained in the region where the surge voltage generation of the IGBT 11 starts and the time variation of the collector current Ic changes, that is, it can act on dIc / dt.

FIG. 2 shows a control block obtained by the above-described equations (10) and (11), that is, a control block capable of realizing the “di / dt self-feedback operation” of the present invention.
As shown in FIG. 2, the “di / dt self-feedback operation” of the present invention is realized by a feedback loop control system including an addition block B1, a gain block B2, and a time differentiation block B3.
The addition block B1 corresponds to the gate of the IGBT 11. That is, in the addition block B1, the positive (+) input corresponds to the input from the voltage source 22 to the gate of the IGBT 11, and the negative (−) input corresponds to the input from the di / dt feedback unit 23 to the gate of the IGBT 11. To do.
The input from the di / dt feedback unit 23 to the gate of the IGBT 11 is time change of the collector current Ic of the IGBT 11, that is, voltage information obtained by further time-differentiating the time differential value dIc / dt in the time differential block B3.
Thus, in the “di / dt self-feedback operation” of the present invention, voltage information obtained by further time-differentiating the time differential value dIc / dt of the collector current Ic of the IGBT 11 is negatively fed back to the gate of the IGBT 11 as the feedback voltage VFB. It is realized by doing.

  Here, the polarity of the feedback voltage VFB is a direction in which the gate-emitter voltage Vge of the IGBT 11 is lowered when the IGBT 11 is turned on, and a direction in which the gate-emitter voltage Vge of the IGBT 11 is raised when the IGBT 11 is turned off. . That is, the voltage Vge between the gate and the emitter of the IGBT 11 is automatically set in accordance with the degree of current change so that the inflection point (second-order time derivative of the current) of the current time change becomes zero at the gate of the IGBT 11. The surge voltage from the IGBT 11 is automatically suppressed by increasing / decreasing automatically. Further, the time change of the collector current Ic of the IGBT 11, that is, the state of the time differential value dIc / dt changes every moment, but this time changing state is fed back, so the voltage between the gate and the emitter of the IGBT 11 is fed back. Vge is always optimally adjusted.

The feedback gain in this case is determined by the product of the gain of the gain block B2, that is, the control gain Again set in advance in the feedback loop control system and the mutual conductance gm of the IGBT 11.
In general, since the mutual conductance gm of the IGBT 11 has a large gain, even if the control gain Again is a relatively small value, it influences the current change and ideally improves the trade-off characteristics between the surge voltage and the switching loss. Effect occurs. Furthermore, this action automatically optimizes the variation in switching speed of each IGBT 11.
In other words, the conventional technique of Patent Document 1 needs to match the control parameter to the worst value of the IGBT, but by applying the “di / dt self-feedback operation” of the present invention, it does not depend on individual differences. It is possible to automatically drive the IGBT 11 in an always optimal state.

As described above, by applying the “di / dt self-feedback operation” of the present invention, the trade-off characteristic between the surge voltage and the switching loss can be improved.
Here, with reference to FIG. 3, the details of the trade-off characteristics between the surge voltage and the switching loss will be described by explaining a method generally performed conventionally (hereinafter referred to as “conventional method”). .

FIG. 3 is a diagram for explaining a conventional method in which a trade-off characteristic between surge voltage and switching loss occurs.
FIG. 3A is a timing chart showing how the gate is driven when the IGBT is turned off when the conventional method is applied. Specifically, FIG. 3A shows a timing chart for each of the gate-emitter voltage Vge, the collector current Ic, and the collector-emitter voltage Vce in order from the top. .
In any timing chart of FIG. 3A, the solid line shows a waveform when the degree of change in the gate-emitter voltage Vge is relatively large, and the broken line shows the change in the gate-emitter voltage Vge. The waveform when the degree of is relatively small is shown.
FIG. 3B shows a correspondence relationship between the degree of change in the gate-emitter voltage Vge and the surge voltage and switching loss.

As shown in FIG. 3A, the collector current Ic and the collector-emitter voltage Vce change in different ways depending on the degree of change in the gate-emitter voltage Vge.
Therefore, in the conventional technique, the collector current Ic and the collector − are determined by uniquely determining the degree of change in the gate-emitter voltage Vge by the resistance value Rg of the gate resistance (corresponding to the gate resistance 21 in FIG. 1). The method of changing the voltage Vce between the emitters was determined, and thereby the surge voltage and the degree of switching characteristics were determined.
That is, if the degree of change in the gate-emitter voltage Vge in the transition period is increased, the change rate of the collector current Ic becomes higher as shown in FIGS. 3 (A) and 3 (B). The voltage increases. On the other hand, the switching loss is reduced by the steep rise and fall rates of the collector current Ic and the collector-emitter voltage Vce.
Conversely, if the degree of change of the gate-emitter voltage Vge in the transition period is reduced, the change rate of the collector current Ic becomes low as shown in FIGS. 3A and 3B. The surge voltage becomes smaller. On the other hand, the switching loss increases as the rising and falling speeds of the collector current Ic and the collector-emitter voltage Vce become slower.
In the conventional method, only one of the state in which the degree of change in the gate-emitter voltage Vge in the transition period is increased and the state in which the change is decreased can be selected. Therefore, even if one of the characteristics of the surge voltage and the switching loss can be reduced, the other characteristic is increased as a trade-off.
That is, when the conventional method is applied, the surge voltage and the switching loss are in a trade-off relationship, and only one of the characteristics can be improved. The characteristics of surge voltage and switching loss having such a relationship are called trade-off characteristics of surge voltage and switching loss.

Such a trade-off characteristic between the surge voltage and the switching loss can be improved by applying the “di / dt self-feedback operation” of the present invention.
FIG. 4 is a timing chart showing how the gate is driven when the IGBT 11 is turned off when the “di / dt self-feedback operation” of the present invention is applied.
FIG. 4A shows a conventional gate-emitter voltage Vge when the “di / dt self-feedback operation” is not applied, and the feedback voltage generated by the “di / dt self-feedback operation” of the present invention. It is a timing chart of VFB. That is, in FIG. 4A, the solid line indicates the waveform of the conventional gate-emitter voltage Vge, and the broken line indicates the waveform of the feedback voltage VFB.
FIG. 4B is a timing chart of the gate-emitter voltage Vge when the “di / dt self-feedback operation” of the present invention is applied. That is, as can be easily understood by comparing FIG. 4A and FIG. 4B, the gate-emitter voltage Vge when the “di / dt self-feedback operation” of the present invention is applied is shown. Is a voltage obtained by adding the feedback voltage VFB to the conventional gate-emitter voltage Vge, and is hereinafter referred to as “current-feedback gate-emitter voltage Vge”.
FIG. 4C is a timing chart of the collector current Ic.
FIG. 4D is a timing chart of the collector-emitter voltage Vce.

As shown in FIGS. 4A to 4C, when the change in the collector current Ic is small, the time differential value dIc / dt is close to zero. Therefore, since the feedback voltage VFB is also close to 0, the gate-emitter voltage Vge for current self-feedback is almost the same as the conventional gate-emitter voltage Vge. For this reason, the degree of change in the voltage Vge between the gate and the emitter of the current self-feedback is almost as large as the conventional gate-emitter voltage Vge.
As a result, the rising speed of the collector-emitter voltage Vce becomes as steep as the conventional one, and the switching loss is reduced.

Thereafter, when the collector current Ic starts to decrease, the time differential value dIc / dt becomes a certain value or more. As a result, a feedback voltage VFB of a certain level or more is generated, and the voltage obtained by adding the feedback voltage VFB to the conventional gate-emitter voltage Vge is the current self-feedback gate-emitter voltage Vge. Become. For this reason, the degree of change in the gate-emitter voltage Vge for current self-feedback is smaller than the conventional gate-emitter voltage Vge.
As a result, the degree of change in the collector current Ic is suppressed as compared with the conventional case, and as shown in FIG. 4D, the surge voltage is also compared with the conventional one (see FIG. 3A). It is suppressed.

  As described above, by applying the “di / dt self-feedback operation” of the present invention, the degree of change in the voltage Vge between the gate and the emitter of the current self-feedback is automatically adjusted in each section. It is possible to achieve an effect of reducing the surge voltage while suppressing an increase in loss. That is, the effect can be understood as an effect that can improve the trade-off characteristics between the surge voltage and the switching loss.

FIG. 5 is a diagram showing a schematic configuration of an embodiment of the electronic circuit 1 including the semiconductor element driving circuit 13 when the “di / dt self-feedback operation” of the present invention is applied at the time of turn-off.
Comparing FIG. 1 and FIG. 5, the configuration of the electronic circuit 1 other than the di / dt feedback unit 23 is the same. That is, FIG. 5 is different from FIG. 1 in that a configuration example of the di / dt feedback unit 23 is shown. Therefore, the difference from FIG. 1, that is, the configuration of the di / dt feedback unit 23 will be described below.
Note that the electronic circuit 1 when the “di / dt self-feedback operation” of the present invention is applied at the time of turn-off is embodied (implemented) in various forms based on the configuration shown in FIG. Therefore, the configuration shown in FIG. 5 of the electronic circuit 1 is hereinafter referred to as a “turn-off basic model”.

The di / dt feedback unit 23 includes a di / dt detection unit 31, a gain unit 32, and a voltage source 33.
The di / dt detector 31 detects the temporal change of the collector current Ic of the IGBT 11, that is, the time differential value dIc / dt.
The gain unit 32 multiplies the time differential value dIc / dt detected by the di / dt detection unit 31 by a predetermined gain.
The voltage source 33 outputs a voltage having a magnitude corresponding to the time differential value dIc / dt multiplied by a predetermined gain by the gain unit 32 as the feedback voltage VFB.

FIG. 6 is a flowchart of the turn-off basic model of the electronic circuit 1 of FIG.
In FIG. 6, a change in the gate-emitter voltage Vge due to the IGBT 11 being turned off becomes a change in the collector current Ic through the IGBT 11, and in one direction until the surge voltage ΔVcep is reached through the floating inductance Ls ( The flow in the lower direction in FIG. Therefore, such a flow is hereinafter referred to as “conventional flow”.
In the turn-off basic model, the change in the feedback voltage VFB corresponding to the change in the collector current Ic is further negatively fed back to the conventional flow and added to the change in the gate-emitter voltage Vge.

FIG. 7 shows the turn-off basic model of the electronic circuit 1 of FIGS. 5 and 6 and the result of the operation at the time of turn-off of each of the electronic circuits operating in accordance with the conventional flow (hereinafter referred to as “conventional electronic circuit”). It is a timing chart.
FIG. 7A is a timing chart of the gate-emitter voltage Vge.
FIG. 7B is a timing chart of the collector current Ic.
FIG. 7C is a timing chart of the feedback voltage VFB.
FIG. 7D is a timing chart of the collector-emitter voltage Vce.
7A, 7B, and 7D, the solid line indicates the waveform of the turn-off basic model of the electronic circuit 1, and the broken line indicates the waveform of the conventional electronic circuit. Since the feedback voltage VFB does not exist in the conventional electronic circuit, the feedback voltage VFB shown in FIG. 7C is naturally based on the turn-off basic model of the electronic circuit 1.

The detailed principle is as described above with reference to FIG. 4 and will be briefly described here.
As shown in FIG. 7C, in the section until the collector current Ic starts to decrease in FIG. 7B, that is, before the “action section” in the figure, the turn-off of the electronic circuit 1 is performed. In the basic model, the feedback voltage VFB is not generated.
Therefore, as shown in FIG. 7A, the gate-emitter voltage Vge (solid line waveform) of the turn-off basic model of the electronic circuit 1 is equal to the gate-emitter voltage Vge (dashed line) of the conventional electronic circuit. Waveform) will change almost in the same way.
As a result, as shown in FIG. 7D, the rising speed of the collector-emitter voltage Vce (solid line waveform) of the turn-off basic model of the electronic circuit 1 is the same as the collector-emitter voltage of the conventional electronic circuit. It is as steep as Vce (dashed waveform).
As a result, the switching loss of the turn-off basic model of the electronic circuit 1 can be maintained at a low level substantially the same as that of the conventional electronic circuit.

On the other hand, in the section where the collector current Ic in FIG. 7B is decreasing, that is, the “action section” in the figure, as shown in FIG. 7C, the feedback voltage in the turn-off basic model of the electronic circuit 1 is shown. VFB occurs.
Therefore, as shown in FIG. 7A, the gate-emitter voltage Vge (solid line waveform) of the turn-off basic model of the electronic circuit 1 is equal to the gate-emitter voltage Vge (dashed line) of the conventional electronic circuit. Waveform) is added with feedback voltage VFB. As a result, the degree of change in the gate-emitter voltage Vge (solid line waveform) of the turn-off basic model of the electronic circuit 1 is compared with the gate-emitter voltage Vge (dashed line waveform) of the conventional electronic circuit. Get smaller.
As a result, as shown in FIG. 7B, the degree of change in the collector current Ic (solid line waveform) of the turn-off basic model of the electronic circuit 1 is compared with the collector current Ic (dashed line waveform) of the conventional electronic circuit. To be suppressed.
As a result, as shown in FIG. 7D, the surge voltage ΔVcep (the difference in level of the solid line waveform) of the turn-off basic model of the electronic circuit 1 is changed to the surge voltage ΔVcep (the height of the broken line waveform) of the conventional electronic circuit. (Difference) is suppressed.

FIG. 8 is a diagram illustrating an example of the relationship between the surge voltage and the loss at the time of turn-off of each turn-off basic model of the electronic circuit 1 and the conventional electronic circuit.
In FIG. 8, the vertical axis represents the surge voltage ΔVcep, and the horizontal axis represents the switching loss. In addition, the solid line is a curve obtained by connecting plots of measured values when the feedback gain is changed for the turn-off basic model of the electronic circuit 1. On the other hand, the broken line is a curve obtained by connecting plots of measured values when the feedback gain is changed for a conventional electronic circuit.
As shown in FIG. 8, by optimizing the feedback gain of the turn-off basic model of the electronic circuit 1, for example, by adopting the feedback gain corresponding to the plot indicated by the tip of the white arrow in the figure, the conventional circuit As compared with, the surge voltage ΔVcep can be greatly suppressed without increasing the switching loss.
As an actual measurement, it was also found that the higher the turn-off speed of the IGBT 11, the greater the effect of improving the surge voltage ΔVcep.

The basic model for turning off the electronic circuit 1 when the “di / dt self-feedback operation” of the present invention is applied at the time of turning off has been described above.
Next, an embodiment of the electronic circuit 1 when the “di / dt self-feedback operation” of the present invention is applied at turn-on will be described.

  FIG. 9 is a diagram showing a schematic configuration of one embodiment of the electronic circuit 1 including the semiconductor element driving circuit 13 when the “di / dt self-feedback operation” of the present invention is applied at the time of turn-on.

In FIG. 9, for example, the IGBT 11U of the electronic circuit 1U is connected in series in the same direction as an IGBT 11D of another electronic circuit (not shown in FIG. 9, but used in conjunction with FIG. 13 to be described later). ing. Although not shown, the electronic circuit including the IGBT 11D is provided with a circuit having the same configuration and function as the semiconductor element driving circuit 13U in FIG.
The IGBT 11U and the IGBT 11D are connected in series, for example, in an inverter, and are connected in parallel with a main circuit power source (not shown in FIG. 9, refer to the main circuit power source 101 in FIG. 13 described later) and a smoothing capacitor. Specifically, the positive terminal of the main circuit power supply is connected to the collector side of the IGBT 11U, and the negative terminal of the main circuit power supply is connected to the emitter side of the IGBT 11D (not shown) (see FIG. 13 described later).

To compare the electronic circuit 1 of FIG. 1 with the electronic circuit 1U of FIG. 9 (to exclude the reference symbol U), the configuration of the electronic circuit 1U of FIG. 9 other than the di / dt feedback unit 23U Is similar to the electronic circuit 1 of FIG. That is, FIG. 9 is different from FIG. 1 in that a configuration example of the di / dt feedback unit 23U is shown. Therefore, the difference from FIG. 1, that is, the configuration of the di / dt feedback unit 23U will be described below.
The electronic circuit 1U when the “di / dt self-feedback operation” of the present invention is applied at the time of turn-on is embodied (implemented) in various forms based on the configuration shown in FIG. Therefore, the configuration shown in FIG. 9 of the electronic circuit 1 is hereinafter referred to as a “turn-on basic model”.

  The di / dt feedback unit 23U includes a di / dt detection unit 51, a gain unit 52, a voltage source 53, a commutation side current IFWD detection unit 54, and a commutation current IFWD direction determination unit 55 (reverse determination circuit 55). And a multiplication unit 56.

Here, each of the IGBT 11U and the IGBT 11D is controlled by the semiconductor element drive circuit 13U of the electronic circuit 1U and the semiconductor element drive circuit of the electronic circuit (not shown) so that when one is in a conductive state, the other is in a cut-off state. Driven.
That is, when the IGBT 11U changes from turn-off to turn-on, the IGBT 11D (not shown) changes from turn-on to turn-off. In this case, the commutation current IFWD flowing in the FWD 12D paired with the IGBT 11D flows in the direction from the cathode of the FWD 12 toward the load L such as a motor as shown in FIG. In this case, a surge voltage is generated at the voltage Vrr of the FWD 12D.
Therefore, the di / dt detector 51 of the turn-on basic model of the electronic circuit 1 detects the temporal change of the commutation current IFWD, that is, the time differential value dI / dt.
The gain unit 52 multiplies the time differential value dI / dt detected by the di / dt detection unit 51 by a predetermined gain.
The voltage source 53 outputs a voltage having a magnitude corresponding to the time differential value dI / dt multiplied by a predetermined gain by the gain unit 352 as the feedback voltage VFB.

In this case, since the period affecting the generation of the surge voltage is only the reverse recovery period, the turn-on basic model of the electronic circuit 1U has a reverse determination function, and the feedback voltage VFB is applied only for the reverse recovery period. ing.
That is, of the di / dt feedback unit 23U, the components that realize the reverse determination function are commutation side current IFWD detection unit 54, commutation current IFWD direction determination unit 55 (reverse determination circuit 55), and multiplication unit 56. And.
The commutation side current IFWD detector 54 detects the commutation current IFWD.
The commutation current IFWD direction determination unit 55 determines the direction of the commutation current IFWD.
The commutation current IFWD direction determination unit 55 determines that the direction of the commutation current IFWD is the direction corresponding to the reverse recovery section, that is, the direction of flowing from the cathode of the FWD 12D shown in FIG. It is determined that When it is determined that it is the reverse recovery section, “1” indicating the determination result is supplied to the multiplication unit 56.
On the other hand, in other cases, it is determined that it is not the reverse recovery section, and “0” indicating the determination result is supplied to the multiplication unit 56.
Multiplier 56 multiplies the output signal of gain unit 52 by the determination result of commutation current IFWD direction determination unit 55.
That is, in the reverse recovery section, since the determination result of the commutation current IFWD direction determination unit 55 is “1”, the output signal of the gain unit 52 is output from the multiplication unit 53 and applied as the feedback voltage VFB. Is done.
On the other hand, in the case other than the reverse recovery section, the determination result of the commutation current IFWD direction determination unit 55 is “0”, so the output of the multiplication unit 56 is also 0, and the application of the feedback voltage VFB is prohibited. Is done.

FIG. 10 is a flowchart of the turn-on basic model of the electronic circuit 1U of FIG.
In FIG. 10, the change in the gate-emitter voltage Vge due to the turn-on of the IGBT 11U becomes a change in the commutation current IFWD of the FWD 12D paired with the IGBT 11D connected in series with the IGBT 11U via the IGBT 11U. A flow in one direction (downward in the figure) until the surge voltage ΔVrrp is reached via the inductance Ls has existed conventionally. Therefore, such a flow is hereinafter referred to as “conventional flow”.
In the turn-on basic model, the change direction of the commutation current IFWD is further determined with respect to such a conventional flow, and when the change direction corresponds to the reverse recovery section, it corresponds to the change of the commutation current IFWD. The feedback voltage VFB changes negatively and is added to the gate-emitter voltage Vge.

FIG. 11 shows the turn-on basic model of the electronic circuit 1U of FIGS. 9 and 10 and the result of operation of each of the electronic circuits operating in accordance with the conventional flow (hereinafter referred to as “conventional electronic circuit”). It is a timing chart.
FIG. 11A is a timing chart of the gate-emitter voltage Vge of the IGBT 11U.
FIG. 11B is a timing chart of the commutation current IFWD of the FWD 12D paired with the IGBT 11D connected in series with the IGBT 11U.
FIG. 11C is a timing chart of the temporal change of the commutation current IFWD, that is, the time differential value dI / dt.
FIG. 11D is a waveform timing chart showing the current direction of the commutation current IFWD.
FIG. 11E is a timing chart of the feedback voltage VFB.
FIG. 11G is a timing chart of the voltage Vrr of the FWD 12D.
In FIG. 11A, FIG. 11B, FIG. 11C, and FIG. 11F, the solid line indicates the waveform of the turn-on basic model of the electronic circuit 1U, and the broken line indicates the conventional electronic circuit. The waveform is shown. Since the feedback voltage VFB does not exist in the conventional electronic circuit, the direction of the commutation current IFWD shown in FIG. 11D and the feedback voltage VFB shown in FIG. This is due to the basic model.

The principle of the turn-on basic model of the electronic circuit 1U will be briefly described with reference to FIG.
In this example, a period in which the current direction of the commutation current IFWD in FIG. 11D is negative (−) is a reverse recovery section.
Therefore, in the period in which the current direction of the commutation current IFWD in FIG. 11D is plus (+), the feedback voltage VFB is not generated in the turn-on basic model of the electronic circuit 1 as shown in FIG.
Thereafter, when the current direction of the commutation current IFWD in FIG. 11D is reversed from plus (+) to minus (−), the feedback voltage VFB in the turn-on basic model of the electronic circuit 1 is obtained as shown in FIG. Will occur.
Thereafter, as shown in FIG. 11C, when the commutation current IFWD changes with time, that is, while the time differential value dI / dt is negative (−), the feedback voltage VFB is generated in the turn-on basic model of the electronic circuit 1. Will continue.
Then, as shown in FIG. 11C, when the time change of the commutation current IFWD, that is, the time differential value dI / dt is inverted from minus (−) to plus (+), in the turn-on basic model of the electronic circuit 1 The feedback voltage VFB disappears.
As described above, the feedback voltage VFB is generated when the current direction of the commutation current IFWD is negative (−) and the time variation of the commutation current IFWD, that is, the time differential value dI / dt is negative (−). . That is, the feedback voltage VFB is generated during the optimum feedback gain and the reverse recovery interval of the FWD 12D.
As a result, as shown in FIG. 11F, the surge voltage ΔVrrp (the difference in height of the waveform of the solid line) of the turn-on basic model of the electronic circuit 1 (at the voltage Vrr of the FWD 12D) is the surge voltage Δ of the conventional electronic circuit. It is suppressed as compared with Vrrp (the difference in level of the broken line waveform).

FIG. 12 is a diagram illustrating an example of the relationship between the surge voltage and the loss at the time of turn-on of each turn-on basic model of the electronic circuit 1 and the conventional electronic circuit.
In FIG. 12, the vertical axis represents the surge voltage ΔVrrp, and the horizontal axis represents the switching loss. In addition, the solid line is a curve connecting the plotted values of actual measurement values when the feedback gain is changed for the turn-on basic model of the electronic circuit 1. On the other hand, the broken line is a curve obtained by connecting plots of measured values when the feedback gain is changed for a conventional electronic circuit.
As shown in FIG. 12, by optimizing the feedback gain of the turn-on basic model of the electronic circuit 1, for example, by adopting the feedback gain corresponding to the plot indicated by the tip of the white arrow in FIG. As compared with, the surge voltage ΔVrrp can be significantly suppressed without increasing the switching loss.

The electronic circuit 1 to which the present invention is applied will be described with reference to FIG. 1, and then the basic turn-off model of the electronic circuit 1 will be described with reference to FIGS. 5 and 6. The turn-on basic model of the electronic circuit 1U has been described with reference to FIG.
According to such an electronic circuit 1, the following effects (1) and (2) can be obtained.

(1) The semiconductor element drive circuit 13 of the electronic circuit 1 includes the di / dt feedback section 23 capable of performing the “di / dt self-feedback operation” of the present invention.
Thereby, the trade-off characteristic of surge voltage and switching loss can be improved.

(2) By applying the “di / dt self-feedback operation” of the present invention at the time of turn-off, that is, by applying the basic turn-off model of the electronic circuit 1 of FIG. Without increasing, the surge voltage can be significantly suppressed as compared with the conventional case.
Suppression of the surge voltage leads to an effect that the operation of the IGBT 11 becomes possible to near the withstand voltage. In addition, maintaining (not increasing) the switching loss suppresses the manufacturing variation of the IGBT 11, thereby reducing the design margin and reducing the overall size of the electronic circuit 1 and reducing the cost.

  (3) On the other hand, by applying the “di / dt self-feedback operation” of the present invention at the time of turn-on, that is, by applying the turn-on basic model of the electronic circuit 1 in FIG. The surge voltage can be significantly suppressed as compared with the conventional one without increasing the conventional voltage.

  Note that the turn-off basic model and the turn-on basic model have been described as separate in the above description for convenience, but are not mutually exclusive, as shown in the form of mounting the electronic circuit 1 described below, It can be used in combination.

  Next, three mounting modes will be described as mounting modes of the electronic circuit 1 capable of achieving such effects (1) to (3). That is, hereinafter, each of the three mounting forms is referred to as a “first electronic circuit mounting form”, a “second electronic circuit mounting form”, and a “third electronic circuit mounting form”, respectively. I will explain it individually.

[First electronic circuit mounting form]
FIG. 13 shows a configuration example of a part of an inverter in which the electronic circuit 1U of the present invention is mounted.
As shown in FIG. 13, the IGBT 11U and IGBT 11D of the electronic circuit 1U are connected in series in the same direction, and the electronic circuit including the IGBT 11D is not shown, but has the same configuration and function as the semiconductor element driving circuit 13U of FIG. A circuit is provided.
The series connection of the IGBT 11U and the IGBT 11D is connected in parallel with the main circuit power supply 101 and a smoothing capacitor (not shown). Specifically, the positive terminal of the main circuit power supply 101 is connected to the collector side of the IGBT 11U of the electronic circuit 1U, and the negative terminal of the main circuit power supply 101 is connected to the emitter side of the IGBT 11D.
For example, when this inverter is adopted as an inverter for an electric vehicle, the series connection of the IGBT 11U of the electronic circuit 1U and the IGBT 11D of the electronic circuit (not shown) is taken as one unit, and the load L corresponding to the three phases of the synchronous motor is For example, a plurality of units such as 3 units are connected in parallel.

  The semiconductor element drive circuit 13U includes a gate resistor 21, a voltage source 22, a turn-off di / dt feedback unit 23OFF, a turn-on di / dt feedback unit 23ON, transistors 81A and 81B, an addition unit 82, and a switching unit. 83.

  Compared with the semiconductor element drive circuit 13 of FIG. 1 and the like, the semiconductor element drive circuit 13U of FIG. 13 further includes transistors 81A and 81B, and the circuit configuration is changed. This is to increase the current capacity. That is, the semiconductor element drive circuit 13 of FIG. 13 includes a buffer circuit (push-pull circuit) for driving an IGBT, which is a method often used in the related art, which is constituted by a transistor.

The di / dt feedback unit 23OFF for turn-off is implemented by mounting the di / dt feedback unit 23 of the basic turn-off model of the electronic circuit 1 of FIGS.
The turn-off di / dt feedback unit 23OFF includes a current detection unit 61, a gain unit 62, and a differentiation unit 63.
That is, the current detection unit 61 and the differentiation unit 63 correspond to the di / dt detection unit 31 in FIG. The gain unit 62 corresponds to the gain unit 32 of FIG. The adding function of the adding unit 62 corresponds to the voltage source 33 in FIG.

The turn-on di / dt feedback section 23ON is implemented by the di / dt feedback section 23U of the turn-on basic model of the electronic circuit 1U of FIGS.
The turn-on di / dt feedback unit 23ON includes a current detection unit 71, a gain unit 72, a differentiation unit 73, a comparison unit 74, a comparison unit 75, a multiplication unit 76, and a multiplication unit 77. .
That is, the current detection unit 71 and the differentiation unit 73 correspond to the di / dt detection unit 51 in FIG. The current detection unit 71 also corresponds to the commutation side current IFWD detection unit 54 of FIG. The gain unit 72 corresponds to the gain unit 52 of FIG. The multiplication unit 77 corresponds to the multiplication unit 56 in FIG.
Moreover, the comparison part 74, the comparison part 75, and the multiplication part 76 respond | correspond to the commutation side current IFWD detection part 54 of FIG. That is, the comparison unit 74 determines whether or not the direction of the commutation current IFWD is negative (−). Further, the comparison unit 75 determines whether the commutation current IFWD changes with time, that is, whether the time differential value dI / dt is negative (−) or not.
In this case, the comparison unit 74 and the comparison unit only when the current direction of the commutation current IFWD is negative (−) and the temporal change of the commutation current IFWD, that is, the time differential value dI / dt is negative (−). Since the output of 75 becomes “1”, the output signal of the differentiating unit 73 is output from the multiplying unit 77 and applied as the feedback voltage VFB.
On the other hand, in other cases, the output of at least one of the comparison unit 74 and the comparison unit 75 is “0”, so the output of the multiplication unit 77 is also 0, and the application of the feedback voltage VFB is prohibited.

The switching unit 83 switches the input signal and outputs it to the adding unit 62. That is, the voltage of the input signal switched by the switching unit 83 is applied as the feedback voltage VFB.
Specifically, when the IGBT 11U switches to turn-off, the switching unit 83 inputs the output signal of the turn-off di / dt feedback unit 23OFF and outputs the voltage as the feedback voltage VFB.
On the other hand, when the IGBT 11U switches to turn-on, the switching unit 83 inputs the output signal of the turn-on di / dt feedback unit 23ON and outputs the voltage as the feedback voltage VFB.

  13 is the operation of the electronic circuit 1 of FIG. 1, the operation of the turn-off basic model of the electronic circuit 1 of FIGS. 5 and 6, or the operation of the electronic circuit 1U of FIGS. It is basically the same as the operation of the turn-on basic model. Therefore, the description of the operation of the electronic circuit 1U in FIG. 13 is omitted here.

FIG. 14 is a timing chart showing a comparison of operation results at the time of turn-off between the conventional electronic circuit and the electronic circuit 1U of the present invention shown in FIG.
FIG. 14A is a timing chart of a conventional electronic circuit when the resistance value Rg of the gate resistance is small.
FIG. 14B is a conventional electronic circuit timing chart when the resistance value Rg of the gate resistance is large.
FIG. 14C is a timing chart of the electronic circuit 1U of the present invention in FIG. 13 when the resistance value Rg of the gate resistor 21 is small.
In the case of the conventional electronic circuit of FIG. 14A, the surge voltage was 201 [V], and the switching loss was 11 [mJ].
In the case of the conventional electronic circuit of FIG. 14B, the surge voltage was 99 [V] and the switching loss was 37 [mJ].
In the case of the electronic circuit 1U of the present invention shown in FIG. 14C, the surge voltage was 100 [V] and the switching loss was 13 [mJ].
As described above, in the electronic circuit 1U of the present invention shown in FIG. 13, the “di / dt self-feedback operation” of the present invention at the turn-off time does not change the rising of the voltage Vce between the collector and the emitter (hence switching loss is reduced). It was confirmed that the effect of reducing the surge voltage can be obtained without increasing it.

FIG. 15 is a timing chart showing a comparison of the results of the turn-on operation between the conventional electronic circuit and the electronic circuit 1U of the present invention shown in FIG.
FIG. 15A is a timing chart of a conventional electronic circuit when the resistance value Rg of the gate resistance is small.
FIG. 15B is a conventional electronic circuit timing chart when the resistance value Rg of the gate resistance is large.
FIG. 15C is a timing chart of the electronic circuit 1U of the present invention in FIG. 13 when the resistance value Rg of the gate resistor 21 is small.
In the case of the conventional electronic circuit of FIG. 15A, the surge voltage was 167 [V], and the switching loss was 2 [mJ].
In the case of the conventional electronic circuit of FIG. 15B, the surge voltage was −9 [V] and the switching loss was 20 [mJ].
In the case of the electronic circuit 1U of the present invention of FIG. 15C, the surge voltage was 47 [V] and the switching loss was 11 [mJ].
As described above, in the electronic circuit 1U of the present invention shown in FIG. 13, the “di / dt self-feedback operation” of the present invention at the time of turn-on does not change the falling of the collector-emitter voltage Vce (hence switching loss). It was confirmed that the effect of reducing the surge voltage can be obtained without increasing the voltage).

Furthermore, the timing of rising and falling of each switching waveform (the waveform of the collector-emitter voltage Vce) in FIG. 14 at the time of turn-off and FIG. .
14A and 15A for the conventional electronic circuit when the resistance value Rg of the gate resistance is large, and FIGS. 14C and 15C for the electronic circuit 1 of the present invention. Compare with.
As is clear from such a comparison, the gate drive method employed by the conventional electronic circuit at both turn-off and turn-on by using the “di / dt self-feedback operation” of the present invention is as follows. It can be seen that the dead time can be shortened.
This means that it contributes to the voltage utilization rate improvement by PWM control, and it means that the efficiency of a power converter device can be improved in the future.

FIG. 16 is a diagram showing a comparison of short-circuit breaking characteristics between the conventional electronic circuit and the electronic circuit 1U of the present invention shown in FIG.
FIG. 16A is a diagram showing a short-circuit breaking characteristic of a conventional electronic circuit.
FIG. 16B is a diagram showing a short-circuit breaking characteristic of the electronic circuit 1U of the present invention shown in FIG.
In the case of the conventional electronic circuit of FIG. 16A, the surge voltage was 137 [V], the maximum current was 2513 [A], and the short-circuit loss was 1145 [mJ].
In the case of the electronic circuit 1 of the present invention shown in FIG. 13 of FIG. 16B, the surge voltage was 37 [V], the maximum current was 476 [A], and the short-circuit loss was 150 [mJ].
Thus, by using the “di / dt self-feedback operation” of the present invention, it is possible to achieve the effect of reducing the maximum current at the time of short circuit, and as a result, the loss at the time of short circuit is reduced. It was.
This makes it possible to design an IGBT in pursuit of simplification of a short circuit protection circuit and loss performance.

FIG. 17 is a diagram showing a comparison of the dependence of the gate voltage (gate-emitter voltage Vge) on the loss generated at the time of short circuit between the conventional electronic circuit and the electronic circuit 1U of the present invention shown in FIG.
In FIG. 17, the vertical axis represents the loss [mJ / chip] generated at short circuit, and the horizontal axis represents the gate-emitter voltage Vge [V] of the IGBT (IGBT 11U in FIG. 13).
In principle, the IGBT can obtain the minimum conduction loss by using the gate-emitter voltage Vge as high as possible.
However, in the gate driving method adopted by the conventional electronic circuit, the loss generated at the time of short circuit increases with the gate-emitter voltage Vge. Accordingly, the upper limit value of the gate-emitter voltage Vge is naturally limited. However, use exceeding the breakdown voltage of the gate oxide film is prohibited.
On the other hand, it can be seen that by using the “di / dt self-feedback operation” of the present invention, the dependency of the loss generated at the time of a short circuit on the gate voltage (gate-emitter voltage Vge) is greatly reduced.
This means that not only the loss of the IGBT can be reduced, but also the accuracy of the power source for driving the gate can be relaxed, and this can contribute to further cost reduction.

As described above, the electronic circuit 1U in FIG. 13 has a switching function that turns on or off according to the voltage of the drive signal applied to the gate, and the first semiconductor element in which the collector and the emitter are inserted into the bus, A drive signal is supplied to the gate of the first semiconductor element in order to turn on or off the bus by a serial connection of the first semiconductor element and the second semiconductor element, each of which is a second semiconductor element, each of which is connected in parallel with a free-wheeling diode. The semiconductor element driving circuit 13U is provided.
Here, in the example of FIG. 13, the IGBT 11U is adopted as the first semiconductor element, and the IGBT 11D is adopted as the second semiconductor element. FWD12U is adopted as the free wheel diode connected in parallel to the first semiconductor element, and FWD 12D is used as the free wheel diode connected in parallel to the second semiconductor element.
The semiconductor element drive circuit 13U generates a feedback voltage VFB based on a time change of the current flowing through the bus, and applies a feedback voltage VFB as a part of the voltage of the drive signal as a turn-off di / dt feedback unit. And a turn-on di / dt feedback section 23ON.
The di / dt feedback section 23OFF for turn-off is the collector current of the first semiconductor element (example of FIG. 13) when the first semiconductor element is switched from on to off, that is, when the IGBT 11U is turned off in the example of FIG. Then, the feedback voltage VFB is generated based on the time change of the collector current Ic) of the IGBT 11U.
The turn-on di / dt feedback unit 23ON is a return current (which flows through the free-wheeling diode on the second semiconductor element side) when the first semiconductor element is switched from off to on, that is, when the IGBT 11U is turned on in the example of FIG. In the example of FIG. 13, the feedback voltage VFB is generated based on the commutation current IFWD of the FWD 12D.
In this case, the turn-on di / dt feedback unit 23ON returns when the direction of the return current is the direction corresponding to the reverse recovery section, that is, the direction of flowing from the cathode of the FWD 12D shown in FIG. The voltage VFB is generated. In other cases, the generation of the feedback voltage VFB is prohibited.

  The electronic circuit 1U of FIG. 13 having such a configuration can naturally exhibit the effects (1) to (3) described above, and further has the following effects (4) to (8). It becomes possible.

(4) With the “di / dt self-feedback operation” of the present invention, the feedback amount is automatically adjusted according to the characteristics of individual semiconductor elements such as the IGBT 11, for example, according to the switching speed at turn-off or turn-on. Therefore, it is possible to absorb the influence of variations in characteristics of semiconductor elements. In other words, adjustment for each semiconductor element is not necessary.
(5) The “di / dt self-feedback operation” of the present invention operates only during the period in which the surge voltage is generated, and does not affect the rise and fall of the collector-emitter voltage Vce of the semiconductor element such as the IGBT 11. Therefore, the trade-off characteristics between surge voltage and switching loss can be further improved. That is, the effect (1) becomes more remarkable.
(6) With the “di / dt self-feedback operation” of the present invention, the gate voltage (the gate-emitter voltage Vge) is kept low with a rapid increase in current, reducing the saturation current and improving the short-circuit withstand capability. Can be achieved. This also contributes to the effect (4) and the absorption of the influence of variations in the characteristics of the semiconductor elements, in other words, the adjustment for each semiconductor element becomes unnecessary.
(7) The resistance value Rg of the soft blocking gate resistor 21 can be set low, and the setting range is widened. As a result, it is not necessary to design a strict resistance value Rg by a test or the like.
(8) Not only the characteristic difference of semiconductor elements but also the influence of circuit impedance difference (difference in stray inductance or resistance) can be automatically eliminated as the entire electronic circuit 1.

  The first electronic circuit mounting mode has been described above as the mounting mode of the electronic circuit 1 of the present invention. Next, a second electronic circuit mounting form will be described.

[Second electronic circuit mounting form]
FIG. 18 is a configuration example of a part of an inverter in which the electronic circuit 1 of the present invention is mounted, and shows an example different from the example of FIG.
FIG. 18A is a circuit diagram of the electronic circuit 1, and FIG. 18B is a perspective view illustrating a schematic configuration example of the appearance of the transformer 121 that is one component of the electronic circuit 1.

The semiconductor element drive circuit 13 of the electronic circuit 1 in FIG. 18 includes a gate resistor 21, a voltage source 22, a di / dt feedback unit 23, and a buffer 111.
The buffer 111 is at least a part of a buffer circuit (push-pull circuit) for driving an IGBT constituted by transistors 111ta and 111tb, which is a conventionally used method.

  Compared with the semiconductor element driving circuit 13 of FIG. 1 and the like, the semiconductor element driving circuit 13 of FIG. 13 is further provided with a buffer 111 to change the circuit configuration. This is to increase the current capacity. That is, the semiconductor element driving circuit 13 of FIG. 18 includes a buffer circuit (push-pull circuit) for driving the IGBT, which is configured by a transistor that is a conventionally used method.

The di / dt feedback unit 23 in FIG. 18 is implemented by the di / dt feedback unit 23 of the turn-off basic model of the electronic circuit 1 in FIGS. 5 and 6.
The di / dt feedback unit 23 in FIG. 18 includes a transformer 121 and a resistor 122.
That is, the transformer 121 corresponds to the di / dt detection unit 31 and the gain unit 32 of FIG. A resistor 122 is connected in series to the path connecting the voltage source 22 and the buffer 111, and both ends of the resistor 122 are connected to the secondary side of the transformer 121. Between the ends of the resistor 122 on the path, This corresponds to the voltage source 33 in FIG.

式（１２）において、ｋは、トランス１２１の１次側と２次側との結合係数を示している。Ｌｐは、トランス１２１の１次側インダクタンスを示している。Ｌｓｅｃは、トランス１２１の２次側インダクタンスを示している。Ｉｃｅは、ＩＧＢＴ１１のコレクタ−エミッタ間の電流（コレクタ電流Ｉｃと等価）を示している。 That is, the di / dt feedback unit 23 in FIG. 18 magnetically couples the main current path through which the collector current Ic (main current) of the IGBT 11 flows and the gate current path through which the gate current flows.
In this case, the feedback voltage VFB is expressed by the following equation (12).

In Expression (12), k represents a coupling coefficient between the primary side and the secondary side of the transformer 121. Lp represents the primary side inductance of the transformer 121. Lsec indicates the secondary side inductance of the transformer 121. Ice indicates a current between the collector and the emitter of the IGBT 11 (equivalent to the collector current Ic).

As shown in FIG. 18B, the transformer 121 is arranged on a bar of the bus 131 that becomes a main current path (bus) through which the collector current Ic (main current) of the IGBT 11 flows.
Here, as described above, the semiconductor element drive circuit 13 of FIG. 13 includes a buffer circuit (push-pull circuit) for driving the IGBT configured by the transistors 111ta and 111tb, which is a conventionally used method. Therefore, the base resistance of the buffer circuit can be employed as the resistor 122 as it is.
Here, the electromotive force generated in the transformer 121 supplies current in a direction that is consumed by the resistor 122 and in a direction that turns on the transistor 111ta of the buffer 111 again or turns on the transistor 111tb. At this time, the current is amplified and supplied through the transistors 111ta and 111tb of the buffer 111 in the direction of charging or discharging the gate capacitance of the IGBT 11. That is, of the current generated from the secondary coil of the transformer 121, the current flowing through the transistors 111ta and 111tb of the buffer 111 is amplified by the current amplification gain hef of the transistors 111ta and 111tb of the buffer 111. Thus, the “di / dt self-feedback operation” of the present invention can be established with the transformer 121 having a smaller inductance value. Although not shown, it is possible to employ a transistor composed of a MOSFET in the buffer 111. In this case, the same effect can be obtained.
As described above, the di / dt feedback unit 23 in FIG. 18 can be realized by a very simple circuit in which the secondary side of the transformer 121 is connected in parallel to both ends of the resistor 122 as a base resistor.

As shown in FIG. 18 (B), the collector current Ic (main current) of the IGBT 11 flows to the bus 131 serving as the main current path (bus), and the magnetic lift H generated at that time is coupled to the transformer 121. An electromotive force Ldi / dt is generated. This electromotive force Ldi / dt is input (negative feedback) to the gate of the IGBT 11 as the feedback voltage VFB.
By adopting the di / dt feedback section 23 of FIG. 18 having such a configuration, it is possible to adjust in advance the gain (in this case, the degree of coupling with the inductance) that determines the feedback amount. By appropriately performing such adjustment, the negative feedback operation to the gate in accordance with the temporal change rate of the current in the transition period of the switching operation, that is, the “di / dt self-feedback operation” of the present invention becomes possible. .
Thereby, it can be expected that there is no reaction with respect to the unnecessary current gradient, and the generated loss is greatly reduced.
Further, the magnetic circuit serving as the di / dt feedback unit 23 in FIG. 18 employs, as the transformer 121, a circuit in which a coil pattern is formed on the bus 131 of the printed circuit board and functions as an insulating transformer, for example. As shown in FIG. 5B, it can be realized with an extremely simple structure in which the transformer 121 is simply bonded to the bar of the bus 131 of the main circuit.
In this case, since the magnetic circuit is insulated, a signal can be taken from anywhere on the bus 131.
Further, by forming the di / dt feedback portion 23 of FIG. 18 on a circuit board such as a printed circuit board, the electronic circuit 1 of the present invention of FIG. As a result, the cost can be reduced.
Furthermore, the following effects can be obtained as a secondary effect of employing the transformer 121 as a component of the di / dt feedback unit 23 of FIG. In other words, by adopting a circuit configuration that consumes the energy stored in the stray inductance of the bars of the existing bus 131 on the secondary side of the transformer 121, the effective inductance is reduced, and as a result, it contributes to the reduction of the surge voltage. It is possible to achieve the effect of. In the example of FIG. 18, the energy stored in the stray inductance is consumed as Joule heat and base current in the resistor 122 as the base resistance of the buffer circuit.

By the way, like the di / dt feedback section 23 in FIG. 18, the main current path (bus line) through which the commutation current IFWD of the commutation side FWD 12D (not shown in FIG. 18) flows, and the gate current through which the gate current flows. It is also possible to mount a porcelain circuit that magnetically couples the path to the di / dt feedback unit 23U of the turn-on basic model of the electronic circuit 1U of FIGS.
However, in the inverter, a series connection set of an upper electronic circuit 1U and a lower electronic circuit 1D (the lower side is not shown in FIG. 10) is used. In this case, it is necessary to take out the current signal from each of the upper FWD 12U and the lower FWD 12D, and considering the configuration of the di / dt feedback unit 23 on the turn-off side, the circuit configurations of the electronic circuits 1U and 1D and The structure is expected to be complicated.
Actually, in order to reduce the number of parts and to ensure the independence between the upper side and the lower side (a factor that hinders the degree of freedom in design), it is necessary to adopt a method that completes the functions on the upper side and the lower side.
FIG. 19 is a diagram for explaining an example of such a method.
19, among the upper electronic circuit 1U and the lower electronic circuit 1D (the lower side is not shown in FIG. 10), the upper waveform is expressed as “hi”, and the lower waveform is “ "Lo".
As shown as a waveform in FIG. 19, the commutation current IFWD (Lo) of the FWD 12D has a characteristic of being superimposed as a short-circuit current on the collector current Ic of the IGBT 11 that is turned on. By utilizing this characteristic, it is possible to adopt a method of indirectly observing a change in the current of the FWD 12D by the transformer 121 on the turn-on side.
By adopting such a method, it is possible to share parts, and as a result, it is possible to suppress an increase in cost and complete functions on the upper side and the lower side.
As a result, a plurality of electronic circuits 1 of the present invention can be realized with a simple configuration in which one transformer 121 is disposed on the nearest bus (such as the bus 131) for each power semiconductor element such as the IGBT 11, and the turn-off is realized. The surge voltage can be automatically adjusted during both the turn-on and turn-on operations.

As described above, the electronic circuit 1 of FIG. 18 has a switching function that turns on or off in accordance with the voltage of the drive signal applied to the gate, and the busbar is formed by the semiconductor element in which the collector and the emitter are inserted into the busbar. The semiconductor element drive circuit 13 supplies a drive signal to the gate of the semiconductor element.
Here, in the example of FIG. 18, IGBT11 is employ | adopted as a semiconductor element.
The semiconductor element driving circuit 13U includes a buffer circuit including a base resistance (in the example of FIG. 18, composed of a resistor 122 as a base resistance and a buffer 111), and a feedback voltage based on a change in current flowing through the bus. And a di / dt feedback section 23 that generates VFB and applies the feedback voltage VFB as part of the voltage of the drive signal.
The di / dt feedback unit 23 includes a transformer 121, and the secondary side of the transformer 121 is connected to both ends of a base resistor (a resistor 122 in the example of FIG. 18) of the buffer circuit.

  The electronic circuit 1 of FIG. 18 having such a configuration can naturally exhibit the effects (1) to (3) described above, and further has the following effects (9) to (11). It becomes possible.

(9) In the di / dt feedback section 23 in FIG. 18, the gain of the transistor can be utilized by performing (current) feedback to the base of the buffer circuit, and thus the transformer 121 can be made small.
In other words, the “di / dt self-feedback operation” of the present invention can be realized even with a very small signal. For example, if the transformer 121 has an inductance on the order of several nH, a sufficient feedback gain can be obtained.
Thus, even if an air core transformer that does not use a core material is adopted as the transformer 121, the effect of the “di / dt self-feedback operation” of the present invention can be enjoyed. In this case, by not using the core material, the influence of temperature can be completely ignored, and the current flowing through the bus 131 serving as the main current path (bus) can be directly observed without delay. dt) A sensing function can be realized.

  (10) The di / dt feedback unit 23 in FIG. 18 employs a conventional base resistor as the resistor 122 and is connected to the resistor 122 in parallel to the secondary side of the transformer 121. Even if 121 has an open failure, the switching operation can be continued.

  (11) When viewed from the viewpoint of the whole inverter in which a plurality of electronic circuits 1 of the present invention shown in FIG. 18 are mounted, the IGBT 11 has only one transformer 121 per element and does not add any active elements. The switching operation by the “di / dt self-feedback operation” of the present invention becomes possible.

  As described above, the first electronic circuit mounting mode and the second electronic circuit mounting mode have been described as mounting modes of the electronic circuit 1 of the present invention. Next, a third electronic circuit mounting form will be described.

[Third electronic circuit mounting form]
First, the background art that is the basis for adopting the third electronic circuit mounting form will be described.
For example, the turn-on basic model of the upper electronic circuit 1U in FIG. 10 is connected in series with the lower electronic circuit 1D (the lower side is not shown in FIG. 10) of the same turn-on basic model, and the series connection Is mounted on the inverter. In this case, a turn-on timing chart is as shown in FIG. 19, for example.

FIG. 20 shows a current irr (hereinafter referred to as “reverse recovery current irr”) released when the carrier Qrr stored in the base layer of the lower FWD 12D is excessive in the section trrb of FIG. .
FIG. 20A shows timing charts of the collector current Ic and the collector-emitter voltage Vce for the upper IGBT 11U and the commutation current IFED of the lower FWD 12D in the section trrb of FIG.
FIG. 20B shows an equivalent circuit in which the reverse recovery current irr flows. In FIG. 20B, R (igbt) represents the resistance value of the upper IGBT 11U in the reverse recovery section.
As shown in FIG. 20, when the carrier Qrr stored in the base layer of the lower FWD 12D is excessive, the reverse recovery current irr flows as the commutation current IFWD by the excess, and this is the collector for the upper IGBT 11U. Superposed on the current Ic, it becomes a factor of a surge voltage caused by the voltage Vrr of the lower FWD 12D.

FIG. 21 shows a timing chart of the reverse recovery current irr when 100 [mΩ], 300 [mΩ], and 500 [mΩ] are adopted as the resistance value R (igbt) of the upper IGBT 11U in the reverse recovery section. ing.
As shown in FIG. 21, as the resistance value R (igbt) of the upper IGBT 11U in the reverse recovery section increases, the peak current value Irrp of the reverse recovery current irr also decreases and the time change (slope) becomes slow. You can see that
That is, the magnitude of the peak current value Irrp of the reverse recovery current irr depends on the magnitude of the surge voltage at the voltage Vrr of the lower FWD 12D. Accordingly, the surge voltage is suppressed as the resistance value R (igbt) of the upper IGBT 11U in the reverse recovery section increases.
In this way, if it is desired to suppress the surge voltage at the voltage Vrr of the lower FWD 12D, the saturation current is sufficiently reduced in the process of releasing excess carriers Qrr stored in the base layer of the lower FWD 12D, and the reverse It can be seen that the peak current value Irrp of the recovery current irr may be suppressed.

As described above, when the upper IGBT 11U is turned on, the reverse recovery current irr flows due to the excess carrier Qrr stored in the base layer of the lower FWD 12D. This time change of the reverse recovery current irr appears as a time change of the commutation current IFD of the lower FWD 12D in the section trrb of FIG. 19, that is, a time change of the collector current Ic for the upper IGBT 11U. When such a current-time change becomes steep, a surge voltage due to the voltage Vrr of the lower FWD 12D is generated.
For this reason, in order to suppress the generation of the surge voltage, it is necessary to sufficiently suppress such a current time change in the section trrb of FIG. For this purpose, it is necessary to shift the gate of the lower IGBT 11D in advance to the saturation region sufficiently.
On the other hand, before entering the reverse recovery section of the lower FWD 12D, the “di / dt self-feedback operation” of the present invention is not activated, and the collector-emitter voltage Vce of the upper IGBT 11U is sharply lowered. It is better to minimize the increase in switching loss.
As a method for enabling these, by inserting a marginal filter circuit having a signal transmission delay (delay due to first-order delay) function such as a method of providing a switch and controlling time and a low-pass filter (LPF: Low PassFilter), There is a method for intentionally delaying the “di / dt self-feedback operation” of the present invention. Here, the latter method is hereinafter referred to as “LPF insertion method”.

FIG. 22 shows an example of the configuration of the electronic circuit 1 of the present invention, and shows an example of the configuration when the LPF insertion method is further applied to the configuration of the example of FIG.
Accordingly, in FIG. 22, the same parts as those in FIG. 18 are denoted by the same reference numerals, and description thereof will be omitted.
22 and FIG. 18, in the di / dt feedback unit 23 of FIG. 22, the LPF circuit 201 is connected in parallel to both ends of the resistor 122 as the base resistance of the buffer circuit in the configuration of FIG. 18. The difference is that it is inserted into the secondary side of the transformer 121 to be operated.
In order to realize the “di / dt self-feedback operation” of the present invention at the time of turn-on using the di / dt feedback unit 23 of FIG. 22, the method described with reference to FIG. 19 may be applied. That is, when a series connection set of the upper electronic circuit 1 and the lower electronic circuit 1 (the lower side is not shown in FIG. 22) is used, a method of completing the function between the upper side and the lower side is used. It is good to apply.

The di / dt feedback unit 23 in FIG. 22 can maintain the conventional switching even if the transformer 121 has an open failure, similarly to the di / dt feedback unit 23 in FIG.
Further, as shown in FIG. 22, the LPF circuit 201 is provided with two current paths by changing the direction of the rectifier element (rectifier diode in the example of FIG. 22). Thereby, each switching characteristic at the time of turn-on and turn-off can be adjusted by only one transformer 121.
That is, the time change of the current flowing through the bus bar interrupted or turned on by the IGBT 11 is different between the turn-off time and the turn-on time of the IGBT 11, that is, the current decreases in the turn-off direction. There is a characteristic that the current increases in the turn-on state. Due to such characteristics, the directions of the electromotive forces generated on the secondary side of the transformer 121 are opposite to each other. Therefore, in the LPF circuit 201, the current path is branched into a current path 212 at the time of turn-on and a current path 211 at the time of turn-off by two rectifier elements (rectifier diodes in the example of FIG. 22). Thus, by appropriately adding a filter or an element functioning as an attenuation term to each of the paths 211 and 212, the characteristics at the time of turn-off and at the time of turn-on can be optimally adjusted.
For example, in the LPF circuit 201 in the example of FIG. 22, an LPF (primary delay) is realized by adding an RL circuit including a resistor R and a coil inductance Ld in the current path 211 at the time of turn-on. That is, by varying the inductance Ld, the delay amount (time constant) can be easily and appropriately adjusted.

In this way, by applying the LPF insertion method, an effect of ideally improving the trade-off characteristics between the surge voltage and the switching loss can be obtained.
Furthermore, this action means that the individual switching speed variations of the IGBTs are automatically optimized.
In the conventional technology such as Patent Document 1, it is necessary to match the control parameter to the worst value of the IGBT characteristics, but by applying the LPF insertion method, it is always in an optimal state no matter what IGBT is adopted as the IGBT 11. It is possible to produce an effect that it can be automatically driven.

FIG. 23 is a timing chart showing a comparison of the operation results when the electronic circuit 1 of the present invention shown in FIG. 22 is turned on when the delay amount (inductance Ld) of the LPF is changed.
FIG. 23A is a timing chart of a conventional electronic circuit shown as a reference.
FIG. 23B is a timing chart of the electronic circuit 1 of the present invention of FIG. 22 when the inductance Ld = 10 [μH].
FIG. 23C is a timing chart of the electronic circuit 1 of the present invention shown in FIG. 22 when the inductance Ld = 50 [μH].
FIG. 23D is a timing chart of the electronic circuit 1 of the present invention of FIG. 22 when the inductance Ld = 100 [μH].
FIG. 23E is a timing chart of the electronic circuit 1 of the present invention shown in FIG. 22 when the inductance Ld = 150 [μH].
FIG. 23F is a timing chart of the electronic circuit 1 of the present invention shown in FIG. 22 when the inductance Ld = 200 [μH].
As shown in FIG. 23, by appropriately adjusting the delay amount (inductance Ld) of the LPF, the “di / dt self-feedback operation” of the present invention at the turn-on time causes the collector-emitter voltage Vce to rise sharply. It has been confirmed that the effect of reducing the surge voltage in the voltage Vrr of the FWD 12 on the commutation side can be obtained without changing the descent (and therefore without increasing the switching loss).

FIG. 24 is a diagram illustrating an example of the relationship between the surge voltage and the loss at the turn-on time of each of the electronic circuit 1 of FIG. 22 to which the LPF insertion method is applied and the conventional electronic circuit.
In FIG. 24, the vertical axis represents the surge voltage, and the horizontal axis represents the switching loss. Further, the solid line is a curve obtained by connecting plots of measured values when the delay amount (inductance Ld) of the LPF is changed for the electronic circuit 1 of FIG. 22 to which the LPF insertion method is applied. On the other hand, the broken line is a curve obtained by connecting plots of measured values when the gate resistance Rg is changed for a conventional electronic circuit.
As shown in FIG. 24, by optimizing the delay amount (inductance Ld) of the LPF of the electronic circuit 1 in FIG. 22, for example, the inductance Ld corresponding to the plot shown above where “Ld” in FIG. By adopting it, it is possible to significantly suppress the surge voltage without increasing the switching loss as compared with the conventional electronic circuit.

As described above, the electronic circuit 1 of FIG. 22 has a switching function that turns on or off according to the voltage of the drive signal applied to the gate, and the first semiconductor element in which the collector and the emitter are inserted into the bus, A drive signal is transmitted to the gate of the first semiconductor element in order to conduct or cut off the bus by the series connection of the first semiconductor element and the second semiconductor element, each of which is a second semiconductor element, and each of which is connected in parallel with a free-wheeling diode. The semiconductor element driving circuit 13 is supplied to the circuit.
Here, in the example of FIG. 22, only one electronic circuit 1 is shown, but this is a case where two electronic circuits 1 are provided on the upper side and the lower side when mounted on an inverter or the like. The electronic circuit 1 shown in 22 is assumed to be the upper one (electronic circuit 1U in another example).
In this case, an IGBT 11U (IGBT 11U shown in FIG. 22) is adopted as the first semiconductor element, and an IGBT 11D (not shown in FIG. 22) is adopted as the second semiconductor element. FWD12U (FWD12 shown in FIG. 22) is adopted as the freewheeling diode connected in parallel to the first semiconductor element, and FWD12D (see FIG.22) is used as the freewheeling diode connected in parallel to the second semiconductor element. Is not shown).
The semiconductor element drive circuit 13U includes a di / dt feedback unit 23 that generates a feedback voltage VFB based on a time change of the current flowing through the bus and applies the feedback voltage VFB as a part of the voltage of the drive signal.
The di / dt feedback unit 23 is configured to correct the collector current of the first semiconductor element (FIG. 22) when the first semiconductor element is switched from ON to OFF, that is, when the IGBT 11U illustrated in the example of FIG. In the example, the feedback voltage VFB is generated based on the time change of the collector current Ic) of the IGBT 11.
Further, the di / dt feedback unit 23 turns the free-wheeling diode on the second semiconductor element side when the first semiconductor element is switched from off to on, that is, when the IGBT 11 illustrated in the example of FIG. 22 is turned on. A feedback voltage VFB is generated based on the flowing back current (commutation current IFWD of FWD 12D not shown in the example of FIG. 22).
The di / dt feedback unit 23 includes an LPF circuit 201 as a delay filter that delays the timing at which the feedback voltage VFB is applied as part of the voltage of the drive signal.

  The electronic circuit 1 of FIG. 22 having such a configuration can naturally exhibit the effects (1) to (3) described above, and can further exhibit the following effect (12). Become.

(12) By appropriately adjusting the delay amount of the delay filter (inductance Ld in the example of FIG. 22), the collector-emitter voltage Vce of the switching at turn-on by the “di / dt self-feedback operation” of the present invention. The surge voltage at the free-wheeling diode voltage Vrr can be reduced without hindering steep falling (and therefore without increasing the switching loss).
That is, by appropriately adjusting the delay amount of the delay filter (inductance Ld in the example of FIG. 22), the timing at which the “di / dt self-feedback operation” of the present invention is activated is specified, so that the surge voltage and the switching loss. The trade-off characteristic can be improved.

It should be noted that the present invention is not limited to the above-described embodiment, and modifications, improvements, and the like within the scope that can achieve the object of the present invention are included in the present invention.
For example, the present invention can be applied to drive not only an IGBT but also any semiconductor element having a switching function.
That is, the present invention has, for example, a switching function that turns on or off according to the voltage of the drive signal applied to the gate, and the conductor and the emitter are turned on or off by the semiconductor element inserted in the bus. In addition, the present invention can be widely applied to drive circuits that supply drive signals to the gates of semiconductor elements. In this case, the drive circuit includes a feedback unit that generates a feedback voltage based on a time change of the current flowing through the bus and applies the feedback voltage as a part of the voltage of the drive signal.
In other words, the present invention can be applied not only to inverters used in electric vehicles, trains, industrial devices, etc., but also to any current switch using any voltage or current drive type semiconductor element. it can.

1 Electronic circuit 11 IGBT
12 FWD
DESCRIPTION OF SYMBOLS 13 Semiconductor element drive circuit 21 Gate resistance 22 Voltage source 23 di / dt feedback part 24 Gain part 25 Resistance 31 di / dt detection part 32 Gain part 33 Voltage source 51 di / dt detection part 52 Gain part 53 Switching part 54 Commutation side Current IFWD detection section 55 Commutation current IFWD direction determination section 56 Multiplication section 61 Current detection section 62 Gain section 63 Differentiation section 71 Current detection section 72 Gain section 73 Differentiation section 74 Comparison section 75 Comparison section 76 Multiplication section 77 Multiplication section 121 Transformer 122 Resistor 201 LPF circuit

Claims (2)

The semiconductor device has a switching function for turning on or off in accordance with the voltage of the drive signal applied to the gate, and the drive signal is supplied to the semiconductor device so that the collector and the emitter are inserted into the bus. In a driving device for a semiconductor element supplied to a gate,
A buffer circuit including a base resistor;
A feedback unit that generates a feedback voltage based on a second-order time derivative of the collector current flowing through the bus, and applies the feedback voltage as part of the voltage of the drive signal;
With
The feedback unit includes a transformer, and a secondary side of the transformer is connected to both ends of the base resistor of the buffer circuit.
Semiconductor device drive device. The transformer is an air-core transformer.
The driving device for a semiconductor element according to claim 1.

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