JP5434119B2 - Imaging device - Google Patents

Description

  The present invention relates to an imaging apparatus.

  A CMOS type imaging device mounted on a video camera, an electronic camera, or the like has a plurality of pixels arranged in a two-dimensional matrix of N rows × M columns having a photoelectric conversion unit that accumulates electric charges according to the amount of incident light. Has been. In addition, the imaging device includes a transistor for outputting the electric charge accumulated in the photoelectric conversion unit included in each pixel as an electric signal, and a vertical signal line for reading out the electric signal output from each transistor for each row. A scanning circuit and a horizontal output circuit for outputting an electric signal to the outside of the imaging device in a column order in the row direction are integrated (for example, see Patent Document 1).

  In order to supply the ground potential to various circuits for reading out signals from the transistors and vertical signal lines provided corresponding to the photoelectric conversion units of the above-described pixels, the imaging apparatus has, for example, parallel to the vertical signal lines. Thus, a ground line (GND line) is provided.

  In the conventional CMOS type image pickup device, the grounding of the constant current source arranged at the output end of each vertical signal line, the grounding of the constant current source inside the column amplifier, and the grounding of the pixel for each column are arranged in the row direction. Each row position is connected to the arranged ground line. The ground lines arranged in the row direction are connected to an external ground potential by providing external ground points on the left and right ends of the ground line (left and right ends of the chip) due to the mask pattern configuration at the time of semiconductor manufacturing.

  By the way, in the case of a relatively large imaging device, the row length is large, and the total length of the ground wire is on the order of several tens of millimeters. Therefore, the electrical resistance of the ground wire itself inside the column amplifier cannot be ignored. Become. When the operation current of the column amplifier corresponding to each vertical signal line flows into this ground line, a potential difference is generated between the left and right and the center of the screen in the column amplifier ground line.

  When a high-brightness object is photographed, the operational state of the column amplifier changes and the operational current of the column amplifier may also vary, so the potential difference of the column amplifier ground line also varies. When the column amplifier ground line and the pixel unit ground line are connected in common, the potential fluctuation of the column amplifier ground line is transmitted to the pixel unit, resulting in smears on both sides of the image of the high-brightness subject. There is a case to let you.

  It is an object of the present invention to provide an imaging device that can reduce the deviation between the pixel ground line potential and the ground potential.

An image pickup apparatus according to a first aspect is arranged in a two-dimensional manner, and includes a pixel having a photoelectric conversion unit that converts light into an electric signal, a pixel arranged in a column direction, and an electricity read out from the pixel. A plurality of vertical signal lines that receive signals, a pixel ground line that supplies a ground potential to each pixel, a signal amplifying unit that amplifies an electrical signal read to the vertical signal line, and a pixel ground line are provided separately from each other, And an amplifier ground line for supplying a ground potential to each signal amplifier. The pixel ground line includes a plurality of column direction ground lines corresponding to each column of the pixel array and a plurality of row direction ground lines corresponding to each row of the pixel array, and the column direction ground line and the row direction ground line are Combined in a mesh.

According to the example of the imaging device of the present invention, it is possible to reduce the deviation between the pixel ground line potential and the ground potential.

It is a figure showing one embodiment of an imaging device. It is a figure explaining the connection of a joint ground line, a pixel ground line, and an amplification part ground line. It is a figure explaining the connection of a joint ground line, a pixel ground line, and a current source ground line. It is a timing diagram showing a read operation. It is a figure explaining the fluctuation | variation of the grounding line potential by a high-intensity subject. It is a figure which shows another embodiment of a joint grounding wire. It is a figure which shows another embodiment of an imaging device.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 shows an embodiment of an imaging apparatus. The imaging apparatus 101 includes pixels P (i, j) (i = 1 to M, j = 1 to N) arranged in a two-dimensional matrix of M rows and N columns, and vertical signal lines VLINE ( j) (j = 1 to N), constant current source PW (j) (j = 1 to N) and signal amplification / accumulation unit 103 _j (j = 1 to N), vertical scanning circuit 104, and horizontal output circuit 105.

  The vertical scanning circuit 104 outputs a timing signal for reading the signal of the pixel P (i, j) to the vertical signal line VLINE (j) arranged for each column in a row unit. For example, the timing signal φSEL (i), the timing signal φRES (i), and the timing signal φTX (i) corresponding to the row number i are from the pixel P (i, 1) to the pixel P (i, N) of the row number i. To all N columns of pixels. These timing signals will be described in detail later.

  A signal read from each pixel P (i, j) is read to the vertical signal line VLINE (j) corresponding to each column. Further, a constant current source PW (j) constituting a source follower circuit is arranged for each column on the vertical signal line VLINE (j) of each column.

  The ground of each pixel P (i, j) is supplied by a column direction pixel ground line PxGNDv (j) (j = 1 to N) arranged in the column direction for each column. The column direction pixel ground lines PxGNDv (j) are connected to each other by row direction pixel ground lines PxGNDh (i) (i = 1 to M) arranged between the pixel arrays in the row direction.

That is, in the imaging device shown in FIG. 1, in the imaging unit 102 in which pixels are arranged in a two-dimensional matrix, the column direction pixel ground line P xGNDv (j) corresponding to each column and the row direction pixel ground corresponding to each row. A pixel ground line in which the line PxGNDh (i) is coupled in a mesh shape is formed.

  On the other hand, the ground of the signal amplifying / accumulating unit 103 that amplifies and accumulates the signal output to the vertical signal line VLINE (j) of each column is connected to another amplifying unit ground line (AmpGND) 106 arranged in the row direction. It is connected. Further, another current source ground line (PwGND) 107 is arranged in the row direction for grounding the constant current source PW (j) arranged corresponding to the vertical signal line VLINE (j) of each column. .

  In the imaging apparatus shown in FIG. 1, the mesh pixel ground line arranged inside the imaging unit 102 and the above-described amplifier grounding line 106 and current source grounding line 107 are coupled grounding arranged in the column direction. They are connected to each other by lines 108. The coupled ground line 108 is provided with a ground terminal for supplying a ground potential. Further, as shown in FIG. 1, each row direction ground line PxGNDh (i) included in the pixel ground line can be connected to the coupled ground line 108, respectively.

  In this configuration, only the coupled ground line 108 is connected at the element end, but except for that, the pixel ground line is not directly connected to either the amplifier ground line 106 or the current source ground line 107. . That is, the pixel ground line, the amplifier ground line 106 and the current source ground line 107 are separated. Therefore, compared to the conventional configuration in which the column-direction ground line PxGNDv (j) of each column is connected to the amplifier unit ground line 106 and the current source ground line 107 at each column position, the amplifier unit ground due to the operation of the amplification storage unit 103 is achieved. The variation in the potential of the pixel ground line due to the variation in the potential of the line 106 can be suppressed, and the deviation between the potential of the pixel ground line and the ground potential can be reduced.

  Further, by reducing the impedance of the coupled ground line 108 provided outside the imaging unit 102, the impedances of the pixel ground line, the amplifier ground line 106, and the current source ground line 107 connected to the coupled ground line 108, respectively. Can be reduced. Thereby, the difference between the potential of these ground lines and the supplied ground potential can be further suppressed.

  For details of the method of forming each row direction pixel ground line PxGNDh (i) by the semiconductor and wiring pattern of the imaging unit 102, refer to Japanese Patent Application No. 2008-319422 “Imaging Device” filed earlier by the present applicant. I want.

  Hereinafter, the detailed configuration and operation of each unit illustrated in FIG. 1 will be described. FIG. 2 is a diagram illustrating the connection between the coupled ground line, the pixel ground line, and the amplifier ground line, and FIG. 3 illustrates the connection between the coupled ground line, the pixel ground line, and the current source ground line. The figure is shown.

In FIG. 2, among the pixels P (i, j) arranged in a two-dimensional matrix, each pixel P (M, j), P (M, j + 1)... P (M belonging to the row indicated by the row number M. , N) and a detailed configuration of signal amplification / accumulation units 103 _j , 103 _{j + 1} ,..., 103 _N corresponding to the columns to which these pixels belong. FIG. 3 shows each pixel P (i, j) (i = 1, 2, j = 1 to N) included in the row indicated by row numbers 1 and 2 and a constant current source corresponding to each column. PW (j) (j = 1 to N) is shown.

  As shown in FIG. 2, the pixel P (i, j) includes a photodiode PD, a transfer transistor Tr1, an amplification transistor Tr2, a selection transistor Tr3, and a reset transistor Tr4. Note that VDD indicates a power source, GND indicates ground, and FD indicates a floating diffusion portion (floating diffusion region).

  In FIG. 2, light incident on the photodiode PD is photoelectrically converted and accumulated as electric charges. The electric charge accumulated in the photodiode PD is transferred to the FD section when the timing signal φTX (i) is input to the gate of the transfer transistor Tr1, and is amplified by the amplifying transistor Tr2. The signal amplified by the amplifying transistor Tr2 is read out to the vertical signal line VLINE (j) when the timing signal φSEL (i) is input to the gate of the selection transistor Tr3. When the timing signal φRES (i) is input to the gate of the reset transistor Tr4, the FD section is reset to the reset voltage (VDD−Vt−ΔVt). Here, Vt is a threshold voltage, and ΔVt is a fluctuation due to the back gate effect.

  In the image pickup apparatus shown in FIG. 2, a dark signal including a noise component before image signal accumulation and an image signal including information on subject light incident on the light receiving surface of the image pickup apparatus are perpendicular to each pixel P (i, j). Read out to the signal line VLINE (j). First, the reset transistor Tr4 is turned on in advance according to the timing signal φRES (i) to reset the FD unit. Subsequently, when the reset is released, the FD portion enters a floating state. In this state, when the potential of the FD portion is applied to the gate of the amplification transistor Tr2, a signal read to the vertical signal line VLINE (j) is a dark signal. Here, the reference of the potential of the FD portion is the potential of the column direction ground line PxGNDv (j) to which the ground of each pixel P (i, j) is connected. On the other hand, in the image signal, the charge generated by the photodiode PD is transferred from the transfer transistor Tr1 to the FD unit according to the timing signal φTx (i) in response to the incidence of the subject light, and is accumulated in the FD unit. This signal is read out to the vertical signal line VLINE (n) when a potential corresponding to the electric charge is applied to the gate of the amplification transistor Tr2.

The signal read out to the vertical signal line VLINE (j) in each column in this way is amplified by a column amplifier (CAMP _j ) provided in the corresponding signal amplification / accumulation unit 103j. In FIG. 2, the column amplifiers (CAMP _j ) in each column are shown surrounded by a chain line.

The column amplifier (CAMP _j ) in each column includes a capacitor Cf and a capacitor Cin, and is an inverting amplifier having an amplification factor determined by a ratio of capacitance values of these capacitors. A reference potential Vref is applied to a negative input terminal of a differential amplifier included in the column amplifier by a reference voltage line (not shown), while a corresponding vertical signal line is connected to a positive input terminal via a capacitor Cin. VLINE (j) is connected.

The source and drain of the amplifier reset transistor Tr5 are connected to both ends of the capacitor Cf of the feedback circuit of the column amplifier (CAMP _j ). When the timing signal φCARST is applied to the gate of the transistor Tr5, the charge accumulated in the capacitor Cf is discharged and reset. Note that the imaging apparatus 101 performs CARST cancellation in a state where the dark signal read from the pixel after the pixel reset is connected to the capacitor Cin. In this state, a Vref potential that is a reference level output is output from the column amplifier. Subsequently, the image signal is read out, but the difference from the dark signal is multiplied by the gain and output from the column amplifier. Therefore, the column amplifier (CAMP _j ) subtracts the dark signal from the image signal when reading out, thereby reducing the variation between the pixels in each column.

The output of the column amplifier (CAMP _j ) is connected to the drains of the image signal storage transistor Tr6 and the dark signal storage transistor Tr7. After the column amplifier (CAMP _j ) is reset, when the timing signal φTD is input to the gate of the dark signal storage transistor Tr7, the dark signal storage transistor Tr7 is turned on, and the capacitor Cd is connected to the column amplifier (CAMP _j ). It is charged until the output voltage is reached. After the image signal is read from the pixel, when the timing signal φTS is input to the gate of the image signal storage transistor Tr6, the image signal storage transistor Tr6 is turned on, and the capacitor Cs is connected to the column amplifier (CAMP _j ). It is charged until the output voltage is reached. As shown in FIG. 2, the ground terminal of the differential amplifier of each signal amplification / storage unit 103j and the ground terminals of the capacitors Cs and Cd corresponding to the image signal and dark signal are connected to the amplification unit ground line 106. .
Accordingly, the voltage of the capacitor Cs based on the potential of the amplifier ground line 106 is input to the horizontal output circuit 105 as an image signal, and the voltage of the capacitor Cd is also input as a dark signal.

The horizontal output circuit 105 inputs the image signal accumulated in the capacitor Cs for each column and the dark signal accumulated in the capacitor Cd, and outputs them to the outside in the column order in units of rows. At this time, in order to further reduce the variation between columns of the column amplifier (CAMP _j ), the image signal accumulated in the capacitor Cs by the output amplifier (not shown) of the horizontal output circuit 105 and the capacitor Cd are accumulated. The dark signal is read out separately, and the dark signal is subtracted from the image signal outside the element to obtain a signal from which the column amplifier CAMP (x) has been removed from the column. Note that the process of subtracting the dark signal from the image signal may be performed outside the imaging apparatus 101 as described above, or may be performed inside the element using a differential amplifier.

  Here, a series of operations from reading out dark signals and image signals from the respective pixels P (i, j) to holding the respective signals in the capacitors Cd and Cs in each column will be described with reference to the timing chart of FIG. I will explain.

  FIG. 4 shows the timing when signals are read from the i-th row and the (i + 1) -th row. In FIG. 4, in a period T1, signals for one row read from N pixels P (i-1, j) (j = 1 to N) in the (i-1) th row are output from the horizontal output circuit 103 in the column order. A period during which data is read out and output to the outside of the imaging apparatus 101 is shown.

  In the next period T2, a dark signal and an image signal for one row are read from each pixel P (i, j) (j = 1 to N) in the i-th row, and each signal is supplied to the capacitor Cd and the capacitor Cs in each column. Indicates the period until is held. At the start of the period T2, first, the timing signal φSEL (i) is turned on in the period T5, and at the same time, the timing signal φRES (i) is turned off in the period T5. Since the timing signal φSEL (i) is on, the timing signal φTX (i) is off, and the timing signal φRES (i) is off, as described with reference to FIG. The data is read out to the vertical signal line VLINE (j) of each column via Tr2 and the selection transistor Tr3.

Next, since the timing signal φTD (i) is turned on in the period T6, the dark signal read to the vertical signal line VLINE (j) during the period T6 is timingd via the column amplifier CAMP _j and the transistor Tr7. The signal φTD (i) is accumulated in the capacitor Cd in each column until it is turned off.

  Next, after the timing signal φTD (i) is turned off, the timing signal φTX (i) is turned on in the period T7. In the period T7, the charge generated by the photodiode PD in response to the incidence of the subject light is transferred to the FD portion via the transfer transistor Tr1, and the image signal corresponding to the amount of the charge is transferred to the vertical signal line VLINE (j). Is read out.

The image signal read out to the vertical signal line VLINE (j) of each column in this way is sent to the timing signal via the column amplifier CAMP _j and the transistor Tr6 when the timing signal φTS is turned on in the period T8. Accumulated in the capacitor Cs of each column until φTS is turned off.

  As described above, when the dark signal and the image signal are accumulated in the capacitors Cd and Cs in each column, the pixels P (i, j) (j = 1 to N) in the i-th row are stored. Reading of the dark signal and the image signal ends, the timing signal φSEL (i) is turned off, and the timing signal φRES (i) is turned on.

  In the next period T3, the horizontal output circuit 105 reads out the dark signal and the image signal for the N columns in the m-th row stored in the capacitors Cd and Cs in each column in order of columns, and outputs to the outside of the imaging device 101. Output to.

  In the next period T4, similarly to the timing signals φSEL (i), φRES (i), φTX (i) in the period T2, the timing signals φSEL (i + 1), φRES (i + 1), φTX in the (i + 1) th row. The dark signal and the image signal are read out from each pixel P (i + 1, j) (j = 1 to N) in the (i + 1) th row by (i + 1), and are stored in the capacitor Cd and the capacitor Cs in each column, respectively. . The dark signals and image signals for the N columns of the (i + 1) th row respectively stored in the capacitors Cd and Cs of each column are read in the column order by the horizontal output circuit 105 and output to the outside of the imaging device 101. The

  Similarly, the image signal and dark signal of each row from row numbers 1 to M are sequentially read into the horizontal output circuit 105 and output to the outside of the imaging device 101.

  As described above, the FD portion of each pixel P (i, j) is reset with reference to VDD, and dark signals and image signals are also generated with reference to the reset potential. Therefore, even if a difference occurs in the ground potential between the pixels due to the distributed resistance of the pixel ground line, if there is no temporal change and it is constant, the signal output is not affected because it is canceled at the time of reading.

  However, when the effective pixel region arranged in a two-dimensional matrix includes a high-luminance subject such as a light source, the output of the amplification transistor Tr2 of the pixel P (i, j) in the row on which the subject image is projected is excessive. Thus, the potential of the vertical signal line VLINE (j) is lower than the overdrive voltage necessary for the operation of the constant current source PW (j). As a result, the constant current source PW (j) in each column cannot maintain the constant current, and the current value flowing into the current source ground line 107 is reduced.

Meanwhile, since the saturation column amplifier CAMP _j, it decreases the operating point potential of the column amplifier CAMP _j common current source (not shown), also decreases slightly currents of the common current source of the column amplifier CAMP _j.

  As a result, for example, as shown by a solid line in FIG. 5, the potential of the amplifier grounding line 106 or the current source grounding line 107 when acquiring a dark signal for a row with a high-intensity subject is the high-intensity subject indicated by a broken line. As compared with the potential of the amplifier grounding line 106 or the current source grounding line 107 when the dark signal is acquired for the row having no current, the potential is slightly lowered to cause a potential difference.

  In an imaging device having a conventional configuration in which the amplifier grounding line 106, the current source grounding line 107, and the pixel grounding line are coupled for each pixel column, the above-described potential difference causes the high-luminance portion of the image to be finally output. It was the cause of smears on both sides.

  On the other hand, in the imaging device 101 shown in FIG. 1, the above-described amplifier grounding line 106, current source grounding line 107, and pixel grounding line are coupled by a coupled grounding line 108 provided outside the effective pixel region. Has been. That is, the pixel ground line that applies the ground potential to each pixel P (i, j) arranged in the effective pixel region, the amplifier ground line 106, and the current source ground line 107 are separated. Therefore, the potential difference as shown in FIG. 5 is not transmitted to the amplification transistor Tr2 as a difference in ground potential of the FD portion of each pixel P (i, j). Therefore, fluctuations in the potentials of the amplification unit ground line 106 and the current source ground line 107 due to the presence or absence of a high-luminance subject do not cause a difference in the output of the dark signal read from each pixel.

  As described above, the imaging apparatus 101 illustrated in FIG. 1 can reduce a phenomenon in which smear appears on both sides of a high-luminance portion of an image acquired when a high-luminance subject is photographed.

  The arrangement of the ground lines is not limited to the arrangement shown in FIG. 1, and any arrangement can be applied as long as the pixel ground line and the amplifier ground line 106 can be separated.

  For example, as shown in FIG. 6, the pixel ground line PxGND formed in a mesh shape is connected to the coupled ground lines 108a and 108b arranged on both sides of the effective pixel region, and the coupled ground lines 108a and 108b are provided. The ground terminal can also be connected to an external ground terminal. Further, the amplifier grounding line 106 and the current source grounding line 107 can be coupled by the above-described two coupled grounding lines 108a and 108b, and the impedance of the grounding line can be further reduced.

  Further, the amplifier grounding line 106 and the current source grounding line 107 are separated from the coupled grounding line 108, and an external grounding terminal is provided for each of the pixel grounding line PxGND, the amplifier grounding line 106, and the current source grounding line 107 for grounding. You can also Further, the pixel ground line PxGND is not limited to the mesh shape shown in FIGS. 1 and 6. For example, a configuration in which the row direction pixel ground line PxGNDh (i) of each row is coupled by the coupled ground line 108 can be adopted. It is.

  Further, as shown in FIG. 7, the column amplifiers can be arranged on both the upper side and the lower side of the screen. In this way, it is only necessary to arrange one column amplifier circuit with a width corresponding to two columns of pixels, so that it is effective to secure a layout space for the column amplifier, particularly when the pixel pitch is reduced to increase the number of pixels. It is. Furthermore, since the output circuit can be arranged at two places at the top and bottom, it is also effective in increasing the frame rate by increasing the number of channels. At this time, in order to maintain the vertical symmetry of the image, it is preferable to arrange the pixel current sources at the top and bottom of the screen. In the arrangements shown in FIGS. 1 and 6, the amplifier grounding line (106) and the current source grounding line (107) are separated. However, in the arrangement shown in FIG. The amplifier grounding line and the current source grounding line are shared. Even with such an arrangement, fluctuations in the potentials of the amplifier and the current source ground line due to the presence or absence of the subject in the high brightness portion are prevented from causing a difference in the output of the dark signal read from each pixel. It is possible to reduce the phenomenon of smear.

DESCRIPTION OF SYMBOLS 101 ... Imaging device, 102 ... Imaging part, 103 ... Signal amplification / accumulation part, 104 ... Vertical scanning circuit, 105 ... Horizontal output circuit, 106 ... Amplifying part ground line (AMPGND), 107 ... Current source ground line (PWGND), 108: Coupled ground line, PW (j): Constant current source, VLINE: Vertical signal line, PxGNDv (j): Column direction pixel ground line, PxGNDh (i): Row direction pixel ground line, CAMP _j : Column amplifier, PD ... photodiode, FD ... floating diffusion part, Tr1 to Tr7 ... transistor, Cin, Cf, Cd, Cs ... capacitor.

Japanese Patent Application Laid-Open No. 11-196331

Claims (1)

A pixel having a two-dimensionally arranged photoelectric conversion unit that converts light into an electrical signal;
A plurality of vertical signal lines connected in the column direction with the pixels arranged in the column direction and receiving electrical signals read from the pixels;
A plurality of column direction ground lines corresponding to each column of the pixel array and a plurality of row direction ground lines corresponding to each row of the pixel array, wherein the column direction ground line and the row direction ground line are meshed A pixel ground line coupled to each other and supplying a ground potential to each of the pixels;
A signal amplifying unit for amplifying the electrical signal read to the vertical signal line;
An image pickup apparatus comprising: an amplification unit ground line that is provided separately from the pixel ground line and supplies a ground potential to each signal amplification unit.

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