JP5428925B2 - Information processing apparatus, information processing method, and information processing program - Google Patents

Description

  The present invention relates to an information processing apparatus, an information processing method, and an information processing program.

  As a standard for performing high-speed information communication, OTN (Optical Transport Network) using an optical communication line is known. A communication device that complies with the OTN regulations maps an existing SONET / SDH (Synchronous Optical Network / Synchronous Digital Hierarchy) signal to an OTN frame. Then, the communication device multiplexes ODU (Optical Channel Data Unit) in which the SONET / SDH signal is mapped to the OTN frame, and transmits the multiplexed signal to the opposite device.

  Here, an example of a communication device executed by a communication device that conforms to the OTU rules will be described with reference to FIG. FIG. 10 is a diagram for explaining an example of the communication apparatus. In the example illustrated in FIG. 10, when the communication apparatus A receives a Sonet frame via the Sonet Ports # 1 to # 4, the communication apparatus A generates four ODUs # 1 to # 4 in which the received Sonet frame is mapped to an OTN frame.

  And the communication apparatus A multiplexes each ODU1 # 1- # 4, and maps it to ODU2. Here, when multiplexing each ODU1 # 1- # 4 by asynchronous (Asynchronous) mapping, the communication apparatus A performs phase absorption by executing stuff processing on each ODU1 # 1- # 4. Then, the communication device A performs the stuff process and also executes a process of storing a JC (Justification Control) byte that is a 2-bit signal indicating the phase absorption amount in the payload of each ODU1 # 1 to # 4. Thereafter, the communication apparatus A transmits ODU2 to which the respective ODU1 # 1 to # 4 are mapped to the communication apparatus B.

  On the other hand, when the communication device B acquires the ODU2 transmitted from the communication device A, the communication device B performs demapping of each ODU1 # 1 to # 4 mapped to the ODU2 and stores the demapping in each ODU1 # 1 to # 4. The destuffing process is executed in accordance with the JC byte. Then, the communication apparatus B extracts the Sonet frame from the demapped ODU1 frame, and transmits the extracted Sonet frame to the client via the Sonet Ports # 5 to # 8.

  This communication apparatus A generates an ODU1-AIS signal in which all payloads of ODU1 are “1” and transmits the communication apparatus B to the communication apparatus B when a failure of the SonetPort or the like occurs. When the communication device B receives the ODU1-AIS transmitted from the communication device A, the communication device B generates a Sonet AIS-L and transmits it to the client, thereby notifying the client that a failure has occurred in the communication device A. .

  Here, the processing in which the communication apparatus A transmits ODU1-AIS will be described using a specific example with reference to FIG. FIG. 11 is a diagram for explaining an example of transmission of ODU1-AIS. In the example illustrated in FIG. 11, the communication device A generates ODU1 # 1-AIS in which “1” is stored in all payloads of ODU1 # 1 because the failure of SonetPort # 1 has occurred. Then, the communication apparatus A multiplexes ODU1 # 1-AIS together with other ODU1 # 2 to # 4, maps the multiplexed signal to ODU2, and then transmits ODU2 to the communication apparatus B.

  Thereafter, when the communication device B acquires the ODU2 transmitted from the communication device A, the communication device B demaps each signal mapped to the ODU2, and executes the destuffing process according to the JC byte of each demapped signal.

  However, the communication device B cannot properly perform the destuffing process because the JC byte of the ODU1 # 1-AIS is “1”, and reduces the accuracy of the clock signal extracted from the line. There is. In this case, since the communication apparatus B generates the Sonet AIS-L according to the clock signal with low accuracy, if the accuracy of the clock signal deteriorates beyond the rules of the Sonet, the communication device B does not generate a normal Sonet AIS-L and the client Cannot detect AIS-L normally.

  For this reason, the communication device B is provided with fixed oscillators # 1 to # 4 that oscillate a clock signal having an accuracy satisfying the rules of Sonet for each line through which the Sonet frame is transmitted to the client, thereby preventing loss of synchronization. Here, a method for preventing a loss of synchronization by installing a fixed oscillator will be described with reference to FIG. FIG. 12 is a diagram for explaining a method of installing a conventional fixed oscillator. Referring to the example of FIG. 12, when the communication apparatus B detects ODU1 # 1-AIS, the communication apparatus B does not use the clock signal extracted from ODU1 # 1, but according to the clock signal oscillated by the fixed oscillator # 1. Generate Sonet AIS-L. Then, the communication device B transmits the generated Sonet AIS-L to the client.

JP 2000-269949 A JP 2008-177773 A

  However, the above-described method of installing a fixed oscillator has a problem that the circuit scale increases because an individual fixed oscillator is installed for each line through which a Sonet frame is transmitted to a client. For example, in the method of installing the fixed oscillator described above, the circuit scale becomes large because a fixed oscillator for clock switching and a switching circuit are installed in the communication device for each line through which the Sonet frame is transmitted to the client.

  The technology disclosed in the present application has been made in view of the above-described problems, and aims to maintain the accuracy of a clock signal without increasing the circuit scale of a communication device.

  According to one aspect of the technology disclosed in the present application, an error in the opposite device is detected using a multiplexed signal transmitted from the opposite device. In addition, the technology disclosed in the present application extracts a stuff signal indicating the amount of phase compensation of each signal during phase synchronization from a plurality of signals obtained by demultiplexing the multiplexed signal, and detects an error in the opposite device. If so, the extracted stuff signal is replaced with a predetermined stuff signal. And the technique disclosed in this application performs the destuffing process which correct | amends the phase of each signal using the replaced stuff signal.

  The technique disclosed in the present application, according to one aspect, has the effect of maintaining the accuracy of the clock signal without increasing the mounting area of the device.

FIG. 1 is a block diagram for explaining the information processing apparatus according to the first embodiment. FIG. 2 is a diagram for explaining the JC byte. FIG. 3 is a block diagram for explaining the demapping processing apparatus according to the second embodiment. FIG. 4 is a flowchart for explaining the flow of processing according to the second embodiment. FIG. 5 is a block diagram for explaining the demapping processing apparatus according to the third embodiment. FIG. 6 is a block diagram for explaining the demapping processing apparatus according to the fourth embodiment. FIG. 7 is a diagram illustrating the JC byte and the clock deviation physical strength. FIG. 8 is a diagram for explaining the data flow of the counting process according to the fourth embodiment. FIG. 9 is a diagram for explaining a computer that executes an information processing program. FIG. 10 is a diagram for explaining an example of the communication apparatus. FIG. 11 is a diagram for explaining an example of transmission of ODU1-AIS. FIG. 12 is a diagram for explaining a conventional method.

  Hereinafter, an information processing apparatus according to the present application will be described with reference to the accompanying drawings.

  In Example 1 below, an example of an information processing apparatus according to the present application will be described with reference to FIG. FIG. 1 is a block diagram for explaining the information processing apparatus according to the first embodiment. Note that the information processing apparatus is, for example, a destuffing processing apparatus that performs destuffing processing of signals.

  As illustrated in FIG. 1, the information processing apparatus 1 includes a detection unit 2, an extraction unit 3, a replacement unit 4, and a destuffing processing unit 5. In addition, the information processing apparatus 1 is connected to the opposite apparatus 6 and receives a multiplexed signal transmitted from the opposite apparatus 6.

  The detection unit 2 detects an error in the opposing device 6 using the multiplexed signal transmitted from the opposing device 6. The extraction unit 3 extracts a stuff signal indicating the amount of compensation of the phase of each signal during phase synchronization from a plurality of signals obtained by demultiplexing the multiplexed signal. The replacement unit 4 replaces the stuff signal extracted by the extraction unit 3 with a predetermined stuff signal when an error of the opposing device 6 is detected by the detection unit 2. The destuffing processing unit 5 corrects the phase of each signal using the stuff signal replaced by the replacement unit 4.

  As described above, when the information processing apparatus 1 detects an error of the opposing apparatus 6, the information processing apparatus 1 replaces the stuff signal of each demultiplexed signal with a predetermined stuff signal, and replaces the predetermined stuff signal with the replaced stuff signal. Use to correct the phase of each signal. Here, when an error occurs, the opposite device 6 rewrites all payloads of signals to be multiplexed to “1”, so that all stuff signals stored in the payload are also rewritten to “1”. For this reason, if an error occurs in the opposing device 6, if the destuffing process is performed using the rewritten stuff signal, the information processing apparatus 1 cannot appropriately perform the destuffing process, and the clock signal Will reduce the accuracy.

  Therefore, the information processing apparatus 1 uses a predetermined stuff signal instead of a stuff signal extracted from a plurality of signals obtained by demultiplexing a multiplexed signal when detecting an error of the opposite apparatus 6. Destuffing processing for correcting the phase of each signal is executed. Further, when the information processing apparatus 1 does not detect the error of the opposite apparatus 6, the phase of each signal is obtained using a stuff signal extracted from a plurality of signals obtained by demultiplexing the multiplexed signal. The destuffing process which corrects is performed. For this reason, the information processing apparatus 1 has an effect of maintaining the accuracy of the clock signal without installing a fixed oscillator.

  In the following second embodiment, a destuffing processing apparatus that performs destuffing processing of an acquired signal will be described.

  First, prior to the description of the destuffing processing apparatus according to the second embodiment, an outline of a communication method defined in OTU (Optical Transport Network Over Head) will be described. A communication device that complies with the OTU regulations maps the transmitted information to the payload of OPU1, and generates OPU1 with OPU1OH (Optical-channel Payload Unit 1 Over Head) added to the payload of OPU1 to which the information is mapped To do. Next, the communication apparatus generates an ODU1 signal obtained by adding ODU1OH, which is overhead, to OPU1, and multiplexes the generated ODU1 signals asynchronously. And a communication apparatus produces | generates OPU2 which attached OPU2OH which is overhead to the some multiplexed ODU1 signal.

  In addition, the communication device generates an ODU2 signal obtained by adding ODU2OH, which is an overhead, to the generated OPU2. Then, the communication apparatus generates an OTU2 signal obtained by adding OTU2OH, which is an overhead, to the generated ODU2. Thereafter, the communication device transmits the generated OTU2 signal to the opposite device.

  Here, when a plurality of ODU1 signals are asynchronously multiplexed, the communication apparatus stuffs each signal in order to compensate for a phase difference caused by the difference between the frequency of each signal and the frequency at which each signal is stored in the OPU2. Performs stuff processing to insert bytes. For example, the communication device inserts a stuff byte into each ODU1 # 1 to # 4 in order to compensate for a phase difference caused by a difference between the frequency of each ODU1 # 1 to # 4 and the frequency at which the signal is stored in the OPU2. Synchronize the phase.

  In addition, the communication device uses a JC (Justification Control) byte as a stuff signal indicating the amount of compensation of the phase of each ODU1 # 1 to # 4 during the phase synchronization of each ODU1 # 1 to # 4. 4 is stored in the overhead portion of OPU1.

  Here, FIG. 2 is a diagram for explaining the JC byte. As illustrated in FIG. 2, each ODU1 signal has a plurality of JC bytes in the overhead portion of the OPU1 included in each ODU1 signal. Each ODU1 signal has NJ (Negative Justification Opportunity) and PJ (Positive Justification Opportunity) in the overhead part of OPU1 separately from the JC byte. NJ and PJ are areas for absorbing a difference in bit amount that is increased or decreased by the stuffing process.

  Next, the JC byte will be described. The JC byte is a 2-bit signal indicating the amount of compensation of the phase of each ODU1 # 1 to # 4. For example, when the JC byte of ODU1 # 1 is “00”, it indicates that no stuff byte is inserted in ODU1 # 1 because stuff processing is unnecessary.

  When the JC byte of ODU1 # 1 is “01”, it indicates that the stuff byte has been inserted by stuffing so as not to shift the phase of ODU1 # 1 in the negative direction. Hereinafter, such a staff process is referred to as a negative justification process.

  Further, when the JC byte of ODU1 # 1 is “11”, this indicates that the stuff byte is inserted so as to shift the phase of ODU1 # 1 in the positive direction by the stuff process. Hereinafter, such staff processing is referred to as positive justification processing.

  Further, when the JC byte of ODU1 # 1 is “10”, the phase of ODU1 # 1 is corrected by double the amount by which the phase of ODU1 # 1 is shifted when the JC byte is “11” by the stuffing process. It indicates that the stuff byte has been inserted so as to shift in the direction of. Hereinafter, such a staff process is referred to as a double positive justification process.

  In the following example, it is assumed that the destuffing processing apparatus acquires ODUs 1 # 1 to # 4 in a multiplexed state as a plurality of ODU (Optical Channel Data Unit) 1 signals. The JC bytes of the signals ODU1 # 2 to # 4 are “01”, “00”, and “10”. Further, it is assumed that the opposite device has shifted the phase of ODU1 # 1 in the negative direction, but because ODU1 # 1 becomes an AIS signal, the JC byte is rewritten from the original “01” to “11”.

  Next, the configuration of the destuffing processing apparatus will be described with reference to FIG. FIG. 3 is a block diagram for explaining the destuffing processing apparatus according to the second embodiment. As illustrated in FIG. 3, the demapping processing apparatus 10 includes a demultiplexing unit 11, a JC byte extraction unit 12, an alarm collection unit 13, and a selection condition generation unit 14. In addition, the demapping processing apparatus 10 includes a steady stuff information storage unit 15, an insertion stuff generation unit 16, a generation stuff memory unit 17, a selection unit 18, a stuffing processing unit 19, and a demapping unit 20.

  Further, the demapping processing device 10 is connected to the ODU2 termination unit 30 and the sonnet mapping unit 40. The ODU2 termination unit 30 includes an OTUOH termination unit 31 and an OPUOH (Over Head) termination unit 32. The sonnet mapping unit 40 includes an ES (Elastic Store) 41, a PC (Phase Frequency Comparator) 42, a VCXO (Voltage Controlled Xtal Oscillator) 43, and a mapping unit 44.

  Next, each part 31-32 which the ODU2 termination | terminus part 30 has is demonstrated. The OTUOH termination unit 31 extracts OTU2OH from an OTU2 signal transmitted from a not-shown opposite device. In addition, the OTUOH termination unit 31 transmits the extracted OTU2OH to the alarm collection unit 13. Further, the OTUOH termination unit 31 acquires an ODU2 signal obtained by removing the OTU2OH from the acquired OTU2 signal.

  When acquiring the ODU2 signal, the OTUOH termination unit 31 extracts the ODU2OH from the acquired ODU2 signal. Then, the OTUOH termination unit 31 transmits the extracted ODU2OH to the alarm collection unit 13. The OTUOH termination unit 31 transmits OPU2 obtained by removing ODU2OH from the acquired ODU2 signal to the OPUOH termination unit 32.

  The OPUOH termination unit 32 acquires the OPU 2 transmitted from the OTUOH termination unit 31. When acquiring the OPU2, the OPUOH termination unit 32 extracts the OPU2OH from the acquired OPU2. Then, the OPUOH termination unit 32 transmits the extracted OPU2OH to the alarm collection unit 13. Further, the OPUOH termination unit 32 transmits a signal obtained by removing the OPU2OH from the acquired OPU2 to the demultiplexing unit 11. That is, the OPUOH termination unit 32 transmits the multiplexed ODU1 # 1 to # 4 to the demultiplexing unit 11.

  Next, each part 11-20 which the demapping processing apparatus 10 has is demonstrated. The steady staff information storage unit 15 stores a predetermined staff signal. Specifically, the steady staff information storage unit 15 stores the JC byte that has the highest probability of being stored in each of the ODUs 1 # 1 to # 4. For example, the regular staff information storage unit 15 stores “01”, “01”, “00”, and “10” as JC bytes that have the highest probability of being stored in each of the ODUs 1 # 1 to # 4.

  The demultiplexer 11 demultiplexes the multiplexed information. Specifically, the demultiplexing unit 11 acquires a plurality of multiplexed signals from the OPUOH termination unit 32. Then, the demultiplexing unit 11 demultiplexes the multiplexed signals and acquires the multiplexed signals as individual signals. Thereafter, the demultiplexing unit 11 transmits the acquired signals to the JC byte extraction unit 12.

  For example, the demultiplexing unit 11 acquires ODU1 # 1 to # 4 multiplexed from the OPUOH termination unit 32. Then, the demultiplexing unit 11 demultiplexes the acquired ODU1 # 1 to # 4, and acquires ODU1 # 1 to # 4 as individual signals. Thereafter, the demultiplexing unit 11 transmits the acquired ODU1 # 1 to # 4 to the JC byte extraction unit 12.

  The JC byte extraction unit 12 extracts a stuff signal indicating the amount of compensation of the phase of each signal during phase synchronization from a plurality of signals obtained by demultiplexing the multiplexed signal. Specifically, the JC byte extraction unit 12 acquires a plurality of signals from the demultiplexing unit 11. In addition, the JC byte extraction unit 12 extracts JC bytes from the acquired signals. Then, the JC byte extraction unit 12 transmits the extracted JC byte to the selection unit 18. Further, the JC byte extraction unit 12 transmits the acquired signals to the selection unit 18.

  For example, the JC byte extraction unit 12 acquires ODU1 # 1 to # 4 from the demultiplexing unit 11 as individual signals. Then, the JC byte extraction unit 12 extracts JC bytes “11”, “01”, “00”, and “10” stored in the respective ODUs 1 # 1 to # 4. Then, the JC byte extraction unit 12 transmits the extracted JC bytes and the ODUs 1 # 1 to # 4 to the selection unit 18.

  The alarm collection unit 13 detects an error in the opposite device using the multiplexed signal transmitted from the opposite device. Specifically, the alarm collection unit 13 acquires the OTU2OH and ODU2OH transmitted from the OTUOH termination unit 31. In addition, the alarm collection unit 13 acquires the OPU2OH transmitted from the OPUOH termination unit 32. Then, the alarm collection unit 13 determines whether an error has occurred in a counter device or a communication path (not shown) based on the acquired OTU2OH, ODU2OH, and OPU2OH.

  If the alarm collection unit 13 determines that an error has occurred, the alarm collection unit 13 determines whether the JC byte of each ODU1 # 1 to # 4 is corrupted due to the type of error that has occurred. When the alarm collecting unit 13 determines that the generated error is an error in which the JC bytes of the respective ODUs 1 # 1 to # 4 are destroyed, the alarm collecting unit 13 notifies the selection condition generating unit 14 that the error has occurred.

  For example, the alarm collection unit 13 analyzes the acquired OTU2OH, ODU2OH, or OPU2OH, and determines whether information indicating an error is stored. When the information indicating that an error has occurred is stored in the OTU2OH, ODU2OH, or OPU2OH, the alarm collection unit 13 determines the type of error that has occurred.

  And the alarm collection part 13 determines with ODU1-AIS (Alarm Indication Signal) having generate | occur | produced. If the ODU1-AIS signal is stored in ODU1 # 1, the JC byte of ODU1 # 1 is rewritten with the bit value “1”. Therefore, the alarm collection unit 13 transmits a disable signal indicating that an error that corrupts the JC byte has occurred to the selection condition generation unit 14.

  When the selection condition generation unit 14 obtains from the alarm collection unit 13 that an error that destroys the JC byte has occurred, the selection condition generation unit 14 transmits a signal instructing replacement of the JC byte to the selection unit 18.

  For example, the select condition generation unit 14 acquires a disable signal from the alarm collection unit 13. When the disable signal is acquired from the alarm collection unit 13, the selection condition generation unit 14 transmits a signal instructing replacement of the JC byte to the selection unit 18.

  The insertion staff generation unit 16 acquires the JC byte stored in the regular staff information storage unit 15 and generates an insertion staff to be transmitted to the selection unit 18 described later based on the acquired JC byte. Then, the insertion stuff generation unit 16 transmits the generated insertion stuff to the generation stuff memory unit 7.

  For example, the insertion staff generation unit 16 sets “01”, “01”, “00”, and “10” as the JC bytes having the highest probability of being stored in each of the ODUs 1 # 1 to # 4, respectively. 15 from. Then, the insertion staff generation unit 16 transmits the acquired JC bytes “01”, “01”, “00”, and “10” as the insertion staff to the generation staff memory unit 17.

  The generation stuff memory unit 17 stores the insertion stuff transmitted to the selection unit 18. For example, the generation staff memory unit 17 acquires “01”, “01”, “00”, and “10” that are the insertion staff transmitted from the insertion staff generation unit 16. Then, the generation staff memory unit 17 stores the acquired insertion staffs.

  The selector 18 replaces the stuff signal extracted by the JC byte extractor 12 with a predetermined stuff signal when an error of the opposing device is detected by the alarm collector 13. Specifically, the selection unit 18 acquires the JC bytes extracted from the demultiplexed ODUs 1 # 1 to # 4 and the ODUs 1 # 1 to # 4 from the JC byte extraction unit 12.

  When the selection unit 18 acquires a signal instructing replacement of the JC byte from the selection condition generation unit 14, the selection unit 18 acquires each insertion stuff stored in the generation stuff memory unit 17.

  Further, when the selection unit 18 receives a signal instructing replacement of the JC byte from the selection condition generation unit 14, the selection unit 18 replaces the stuff signal extracted by the JC byte extraction unit 12 with each of the acquired insertion stuffs. Then, the selection unit 18 transmits each insertion staff to the destuffing processing unit 19 together with each ODU1 # 1 to # 4 as an extracted JC byte.

  On the other hand, when the selection condition generation unit 14 does not transmit a signal instructing the replacement of the JC byte, the selection unit 18 extracts the JC byte extracted by the JC byte extraction unit 12 and each of the ODU1 # 1 to # 4. Are transmitted to the destuffing processing unit 19 as they are.

  For example, the selection unit 18 acquires the JC bytes “11”, “01”, “00”, “10” of each ODU1 # 1 to # 4 and each ODU1 # 1 to # 4. When the selection unit 18 obtains a signal instructing the replacement of the JC byte, the selection unit 18 stores each of the insertion staffs “01”, “01”, “00”, “10” stored in the generation staff memory unit 17. get.

  Further, when the selection unit 18 acquires a signal instructing the replacement of the JC byte, the selection unit 18 sets the JC bytes “11”, “01”, “00”, and “10” of each ODU1 # 1 to # 4. Each insertion staff is replaced with “01”, “01”, “00”, “01”. Then, the selection unit 18 transmits each ODU 1 # 1 to # 4 and the replaced JC byte to the destuff processing unit 19. That is, when the selection unit 18 acquires a signal instructing replacement of JC bytes, the selection unit 18 transmits the ODUs 1 # 1 to # 4 and the generated insertion stuff to the destuffing processing unit 19.

  The destuffing processing unit 19 executes destuffing processing for correcting the phases of the respective ODUs # 1 to # 4 using the JC bytes replaced by the selection unit 18. Specifically, the destuffing processing unit 19 acquires the JC byte of each ODU1 # 1 to # 4 and each ODU1 # 1 to # 4 from the selection unit 18.

  Then, the destuffing processing unit 19 uses the acquired JC byte to execute a destuffing process that returns the phase of each ODU1 # 1 to # 4 to the phase before the stuffing process. Thereafter, the destuffing processing unit 19 transmits the ODUs 1 # 1 to # 4 subjected to the destuffing processing to the demapping unit 20.

  For example, the destuffing processing unit 19 acquires the replaced JC byte “01” and ODU1 # 1 for ODU1 # 1. Then, the destuffing processing unit 19 identifies from the replaced JC byte “01” that the negative justification processing has been performed on the ODU1 # 1.

  For this reason, the destuffing processing unit 19 executes the destuffing process so as to shift the phase of the ODU1 # 1 in the positive direction, and returns the phase of the ODU1 # 1 to the phase before the stuffing process. Thereafter, the destuffing processing unit 19 transmits the ODU1 # 1 subjected to the destuffing processing to the demapping unit 20.

  Further, for example, the destuffing processing unit 19 acquires the replaced JC byte “01” and ODU1 # 2 for ODU1 # 2. Then, the destuffing processing unit 19 identifies from the replaced JC byte “01” that the negative justification processing has been performed on the ODU1 # 2.

  For this reason, the destuffing processing unit 19 executes the destuffing process so as to shift the phase of ODU1 # 2 in the positive direction, and returns the phase of ODU1 # 1 to the phase before the stuffing process. Thereafter, the destuffing processing unit 19 transmits the ODU1 # 2 subjected to the destuffing process to the demapping unit 20.

  Further, for example, the destuffing processing unit 19 acquires the replaced JC byte “00” and ODU1 # 3 for ODU1 # 3. Then, the destuffing processing unit 19 identifies from the replaced JC byte “00” that destuffing processing is not necessary for ODU1 # 3. Thereafter, the destuffing processing unit 19 transmits ODU1 # 3 to the demapping unit 20.

  For example, the destuffing processing unit 19 acquires the replaced JC byte “10” and ODU1 # 2 for ODU1 # 4. Then, the destuffing processing unit 19 identifies that the double positive justification processing has been performed on the ODU1 # 4 from the replaced JC byte “10”.

  For this reason, the destuffing processing unit 19 executes the destuffing process so as to shift the phase of ODU1 # 2 in the negative direction by a normal multiple, and returns the phase of ODU1 # 4 to the phase before the stuffing process. Thereafter, the destuffing processing unit 19 transmits the ODU1 # 4 subjected to the destuffing process to the demapping unit 20.

  Here, in the conventional demapping processing apparatus, even when an error occurs, the demapping processing is executed while the JC byte of ODU1 # 1 is not replaced with “11”. For this reason, the conventional demapping processing apparatus identifies that the positive justification processing has been performed on ODU1 # 1.

  Then, the conventional demapping processing device executes the destuffing process so as to shift the phase of ODU1 # 1 in the negative direction. On the other hand, the staff process performed on ODU1 # 1 is a negative justification process. For this reason, the conventional demapping processor cannot return the phase of ODU1 # 1 to the phase before the stuffing process, and as a result, the conventional demapping processor has a clock extracted from ODU1 # 1. Deteriorating the accuracy of the signal.

  When the demapping processing device 10 detects an error in the opposite device, the demapping processing device 10 replaces the acquired JC byte of each of the ODUs # 1 to # 4 with a predetermined JC byte and executes the destuffing process. For this reason, the demapping processing device 10 executes accurate destuffing processing even when an error that destroys the JC bytes of the ODUs 1 # 1 to # 4 occurs in the opposite device. As a result, the demapping processing apparatus 10 can accurately acquire the clock signal extracted from each of the ODUs 1 # 1 to # 4 without installing a conventional fixed oscillator.

  Further, when the demapping processing device 10 does not detect the error of the opposite device, the demapping processing device 10 executes the destuffing process using the acquired JC bytes of the ODUs 1 # 1 to # 4 as they are. For this reason, the demapping processing apparatus 10 can execute the same processing as the conventional demapping processing apparatus when no error has occurred in the opposing apparatus.

  The demapping unit 20 executes a demapping process for acquiring information mapped to the acquired signal. Specifically, the demapping unit 20 acquires the ODU1 signal subjected to the destuffing process from the destuffing processing unit 19. Further, the demapping unit 20 executes demapping processing and acquires information mapped to the acquired ODU1 signal.

  Here, the demapping unit 20 extracts the clock signal mapped to the ODU1 signal. Then, the demapping unit 20 transmits the acquired information to the ES 41 of the sonnet mapping unit 40. Further, the demapping unit 20 transmits the extracted clock signal to the PC 42 of the sonnet mapping unit 40.

  For example, the demapping unit 20 acquires ODUs 1 # 1 to # 4 that have been destuffed by the destuffing unit 19. And the demapping part 20 performs a demapping process, and acquires the information mapped by each ODU1 # 1- # 4. Further, the demapping unit 20 extracts the clock signals mapped to the respective ODUs 1 # 1 to # 4. Then, the demapping unit 20 transmits the acquired information to the ES 41. In addition, the demapping unit 20 transmits the extracted clock signal to the PC 42.

  Next, each part 41-44 which the sonnet mapping part 40 has is demonstrated. ES41 is a memory. Specifically, the ES 41 is a FIFO (First In First Out) type memory, and stores the acquired information when the information transmitted from the demapping unit 20 is acquired. Further, the ES 41 receives a timing signal oscillated from the VCXO 43 described later, and transmits the stored information to the mapping unit 44 in the stored order in accordance with the received timing signal.

  PC42 is a phase comparator. Specifically, when the PC 42 acquires the clock signal transmitted from the demapping unit 20, the PC 42 performs phase comparison between the acquired clock signal and a signal fed back from the VCXO 43 described later. Then, the PC 42 supplies a control voltage according to the error obtained by the phase comparison to the VCXO 43.

  The VCXO 43 is a voltage controlled oscillator. Specifically, the VCXO 43 oscillates a timing signal having a frequency corresponding to the voltage supplied from the PC 42 to the ES 41, the PC 42, and the mapping unit 44.

  The mapping unit 44 maps information to the Sonet frame, and transmits the Sonet frame on which the information is mapped to the client. Specifically, the mapping unit 44 acquires information stored in the ES 41 in accordance with the timing signal oscillated from the VCXO 43. Further, the mapping unit 44 maps the acquired information to the Sonet frame in accordance with the timing signal oscillated from the VCXO 43. Then, the mapping unit 44 transmits the Sonet frame in which the information is mapped to the client.

  Therefore, the sonnet mapping unit 40 can map the signal acquired by the demapping unit 20 to the Sonet frame in accordance with the clock signal extracted by the demapping unit 20.

  For example, the demultiplexing unit 11, the JC byte extraction unit 12, the alarm collection unit 13, the selection condition generation unit 14, the insertion stuff generation unit 16, the selection unit 18, the destuffing processing unit 19, and the demapping unit 20 are an electronic circuit It is. For example, the OTUOH termination unit 31, the OPUOH termination unit 32, the PC 42, the VCXO 43, and the mapping unit 44 are electronic circuits. Here, as an example of the electronic circuit, an integrated circuit such as an application specific integrated circuit (ASIC) or a field programmable gate array (FPGA), or a central processing unit (CPU) or a micro processing unit (MPU) is applied.

  Further, the regular staff information storage unit 15, the generated staff memory unit 17, and the ES 41 are storage devices. Here, as an example of the storage device, a semiconductor memory device such as a random access memory (RAM), a read only memory (ROM), a flash memory, a hard disk, an optical disk, or the like is applied.

  Next, the flow of processing executed by the demapping processing apparatus 10 will be described with reference to FIG. FIG. 4 is a flowchart for explaining the flow of processing according to the second embodiment. The demapping processing apparatus 10 starts processing using the acquisition of multiplexed ODUs 1 # 1 to # 4 as a trigger.

  First, the demapping processor 10 acquires multiplexed ODUs 1 # 1 to # 4 (step S101). Next, the demapping processing apparatus 10 demultiplexes the multiplexed ODU1 # 1 to # 4 and acquires ODU1 # 1 to # 4 as individual signals (step S102). Next, the demapping processing apparatus 10 acquires the JC bytes stored in the respective ODUs 1 # 1 to # 4 (step S103).

  Further, the demapping processing device 10 determines whether or not an error of the opposite device is detected (step S104). When the demapping processing device 10 determines that an error of the opposite device has been detected (Yes in step S104), the extracted JC byte is replaced with a predetermined JC byte.

  Then, the demapping processing apparatus 10 executes the destuffing process for each ODU1 # 1 to # 4 using the replaced predetermined JC byte (step S105). On the other hand, when the demapping processing device 10 determines that the error of the opposite device has not been detected (No at Step S104), the extracted JC bytes are not replaced, and each of the ODU1 # 1 to # 4 is not replaced. Destuffing processing is executed (step S106).

  Next, the demapping processing apparatus 10 executes a demapping process for acquiring information stored in each of the ODUs 1 # 1 to # 4 that has been subjected to the destuffing process (step S107). Then, the demapping processing device 10 transmits information acquired as a result of the demapping processing to the sonnet mapping unit 40 (step S108), and thereafter ends the processing.

[Effect of Example 2]
As described above, the demapping processing apparatus 10 according to the second embodiment detects an error of the opposite apparatus using the multiplexed signal. Further, the demapping processor 10 extracts JC bytes from a plurality of signals obtained by demultiplexing the multiplexed signal. When the demapping processing device 10 detects an error in the opposite device, the demapping processing device 10 replaces the extracted JC byte with a predetermined JC byte, and performs destuffing processing of each signal using the replaced JC byte. Run.

  For this reason, the demapping processing device 10 can execute an appropriate destuffing process on each signal even when an error occurs in the opposite device. As a result, the demapping processing apparatus 10 can acquire a clock signal with high accuracy from each signal, so that the accuracy of the clock signal can be maintained without installing a fixed oscillator for each multiplexed signal. .

  Further, since the demapping processing apparatus 10 can maintain the accuracy of the clock signal, the ODU1-AIS signal can be mapped to the Sonet frame without installing a fixed oscillator.

  In the following third embodiment, a demapping processing apparatus will be described. In the following description, the same process as the process executed by each unit shown in the second embodiment is described to that effect and a detailed description is omitted.

  First, the demapping processing apparatus according to the third embodiment will be described with reference to FIG. FIG. 5 is a block diagram for explaining the demapping processing apparatus according to the third embodiment. In the example illustrated in FIG. 5, the demapping processing device 50 includes a demultiplexing unit 51, a JC byte extraction unit 52, an alarm collection unit 53, and a selection condition generation unit 54. Further, the demapping processing device 50 includes a destuff prediction generation unit 55, a generation stuff memory unit 56, a selection unit 57, a destuffing processing unit 58, and a demapping unit 59.

  Further, the demapping processing device 50 is connected to the ODU2 termination unit 30 and the sonnet mapping unit 40. Here, it is assumed that the ODU2 termination unit 30 and the sonnet mapping unit 40 perform the same processing as in the second embodiment, and a description thereof is omitted.

  Further, the demultiplexing unit 51, the selection condition generation unit 54, and the generation stuff memory unit 56 execute the same processing as the demultiplexing unit 11, the selection condition generation unit 14, and the generation stuff memory unit 17 according to the second embodiment. The explanation will be omitted. Further, the destuffing processing unit 58 and the demapping unit 59 are assumed to execute the same processing as the destuffing processing unit 19 and the demapping unit 20 according to the second embodiment, and the description thereof is omitted.

  The JC byte extraction unit 52 exhibits the same function as the JC byte extraction unit 12 according to the second embodiment. Further, the JC byte extraction unit 52 transmits the extracted JC byte to the destuff prediction generation unit 55.

  For example, the JC byte extraction unit 52 acquires the ODUs 1 # 1 to # 4 from the demultiplexing unit 51 as individual signals. The JC byte extraction unit 52 extracts JC bytes “01”, “01”, “00”, and “10” stored in the ODUs 1 # 1 to # 4, respectively. Then, the JC byte extraction unit 52 transmits the JC bytes “01”, “01”, “00”, and “10” to the destuff prediction generation unit 55.

  The alarm collection unit 53 exhibits the same function as the alarm collection unit 13 according to the second embodiment. When the alarm collection unit 53 determines that an error that causes the JC byte to be corrupted has occurred, the alarm collection unit 53 transmits a signal indicating that an error that causes the JC byte to be corrupted has occurred to the destuff prediction generation unit 55. To do.

  For example, the alarm collection unit 53 analyzes the acquired OTU2OH or OPU2OH and determines whether or not information indicating an error is stored. Then, when information indicating that an error has occurred in OTU2OH or OPU2OH is stored, the alarm collection unit 53 transmits a disable signal to the selection condition generation unit 54 and the destuffing prediction generation unit 55.

  The destuff prediction generation unit 55 collects the JC bytes extracted by the JC byte extraction unit 52 when no error of the opposite device is detected by the alarm collection unit 53. Specifically, the destuff prediction generation unit 55 acquires the JC byte transmitted from the JC byte extraction unit 52. Then, the destuff prediction generation unit 55 stores the acquired JC byte when the disable signal is not acquired from the alarm collection unit 53 within a predetermined time after acquiring the JC byte.

  On the other hand, when the destuff prediction generation unit 55 acquires the disable signal from the alarm collection unit 53 within a predetermined time after acquiring the JC byte, the destuff prediction generation unit 55 discards the acquired JC byte without storing it.

  In addition, when a new JC byte is transmitted from the JC byte extraction unit 52, the destuff prediction generation unit 55 acquires the transmitted new JC byte. The destuff prediction generation unit 55 discards the stored JC byte and acquires a new JC byte when a disable signal is not acquired within a certain time after acquiring a new JC byte. Store the JC byte. Further, when the destuff prediction generation unit 55 acquires a disable signal, the destuff prediction generation unit 55 transmits each stored JC byte as an insertion stuff to the generation stuff memory unit 56.

  For example, the destuff prediction generation unit 55 acquires JC bytes “10”, “01”, “00”, and “10” transmitted from the JC byte extraction unit 52. Then, when the destuff prediction generation unit 55 does not acquire a signal indicating that an error has occurred from the alarm collection unit 53 within a predetermined time after acquiring each JC byte, each of the acquired JC bytes Store bytes. Further, the destuff prediction generation unit 55 acquires a signal indicating that an error has occurred within a certain time after acquiring the new JC bytes “01”, “01”, “00”, and “10”. If not, the stored JC bytes are discarded and new JC bytes are stored.

  In addition, for example, when the destuff prediction generation unit 55 acquires a signal indicating that an error has occurred, the stored JC bytes “01”, “01”, “00”, and “10” are inserted. The data is transmitted to the generation stuff memory unit 56 as a stuff.

  The selector 57 has the same function as the selector 18 according to the second embodiment. Further, when an error of the opposite device is detected by the alarm collection unit 53, the selection unit 57 uses the JC byte extracted by the JC byte extraction unit 52, and is finally collected by the destuff prediction generation unit 55. Replace with bytes.

  Specifically, the selection unit 57 acquires the JC byte extracted from each ODU 1 # 1 to # 4 and each ODU 1 # 1 to # 4 from the JC byte extraction unit 52. When the selection unit 57 acquires a signal instructing replacement of JC bytes from the selection condition generation unit 54, the selection unit 57 acquires each insertion stuff stored in the generation stuff memory unit 56. Then, the selection unit 57 replaces the stuff signal extracted by the JC byte extraction unit 52 with each acquired insertion stuff.

  Here, each insertion staff stored in the generation staff memory unit 56 is an insertion staff transmitted from the destuff prediction generation unit 55. That is, each insertion stuff stored in the generation stuff memory unit 56 is a JC byte extracted immediately before an error occurs in the opposing device. For this reason, the selector 57 replaces the JC byte extracted by the JC byte extractor 52 with the JC byte collected last by the destuff prediction generation unit 55 when an error of the opposite device is detected.

  Hereinafter, as an example of processing of the selection unit 57, a case where the JC byte immediately before the error is detected is “01”, “01”, “00”, “10” will be described. In the following example, it is assumed that the JC byte of ODU1 # 1 is rewritten from “01” to “11” in order to use ODU1 # 1 as the ODU1-AIS signal.

  For example, the selection unit 57 acquires the JC bytes “11”, “01”, “00”, and “10” from the JC byte extraction unit 52. When the selection unit 57 receives a signal instructing replacement of JC bytes from the selection condition generation unit 54, the selection unit 57 inserts the insertion stuff “01”, “01”, “00”, “ 10 ”is acquired.

  Then, the selection unit 57 converts each JC byte “11”, “11”, “00”, “10” acquired from the JC byte extraction unit 52 into the acquired insertion staff “01”, “01”, “ Replace with “00” and “10”. That is, when an error that destroys the JC byte occurs, the selection unit 57 replaces the JC byte of ODU1 # 1 to # 4 with the JC byte immediately before the error is detected. For this reason, the destuffing processing unit 58 performs the destuffing process using the JC byte immediately before the error is detected.

  Usually, since the JC byte rarely changes for each multiplexed signal, it can be estimated that the JC byte changed due to the error of the opposite device is the same JC byte as the normal JC byte of the signal acquired immediately before. . As a result, the demapping processing device 50 performs accurate destuffing processing, and thus extracts a clock signal with high accuracy.

  For example, the demultiplexing unit 51, the JC byte extracting unit 52, the alarm collecting unit 53, the select condition generating unit 54, the destuffing prediction generating unit 55, the selecting unit 57, the destuffing processing unit 58, and the demapping unit 59 are electronic Circuit. Here, as an example of the electronic circuit, an integrated circuit such as an application specific integrated circuit (ASIC) or a field programmable gate array (FPGA), or a central processing unit (CPU) or a micro processing unit (MPU) is applied.

  The generation stuff memory unit 56 is a semiconductor memory device such as a RAM (Random Access Memory), a ROM (Read Only Memory), and a flash memory, or a storage device such as a hard disk or an optical disk.

[Effect of Example 3]
As described above, the demapping processing apparatus 50 according to the third embodiment collects JC bytes extracted from the respective ODUs 1 # 1 to # 4 when no error of the opposing apparatus is detected. Then, when an error of the opposite device is detected, the demapping processing device 50 replaces the acquired JC bytes of ODU1 # 1 to # 4 with the last collected JC byte.

  That is, the demapping processing device 50 performs the destuffing processing of the acquired signal using the normal JC byte collected immediately before the error is detected, not the JC byte changed due to the error of the opposite device. For this reason, the demapping processing device 50 performs more accurate replacement with the JC byte than replacement with the previously stored JC byte. As a result, the demapping processing device 50 performs the appropriate destuffing process even when an error that breaks the JC byte occurs, so that the clock system can be maintained. Further, since the demapping processing device 50 can acquire a clock signal with high accuracy from each signal, the accuracy of the clock signal is maintained without installing a fixed oscillator for each multiplexed signal.

  In a fourth embodiment below, a destuffing processing device that performs destuffing processing of an acquired signal will be described. In the following description, those that perform the same processing as the respective units shown in the second embodiment or the third embodiment are described as such, and the description thereof is omitted.

  First, the demapping processing apparatus according to the fourth embodiment will be described with reference to FIG. FIG. 6 is a block diagram for explaining the demapping processing apparatus according to the fourth embodiment. In the example illustrated in FIG. 6, the demapping processing device 60 includes a demultiplexing unit 61, a JC byte extraction unit 62, an alarm collection unit 63, a selection condition generation unit 64, and a destuff prediction generation unit 65. In addition, the demapping processing device 60 includes a generation stuff memory unit 72, a selection unit 73, a stuffing processing unit 74, and a demapping unit 75.

  The demultiplexing unit 61 has the same function as the demultiplexing unit 11 of the second embodiment or the demultiplexing unit 51 of the third embodiment, and a description thereof is omitted. The select condition generating unit 64 has the same function as the select condition generating unit 14 of the second embodiment or the select condition generating unit 54 of the third embodiment, and a description thereof is omitted. Moreover, the destuffing process part 74 and the demapping part 75 shall have the function similar to each part 19-20 which concerns on Example 2, or each part 58-59 of Example 3, and abbreviate | omits description. The ODU2 termination unit 30 and the sonnet mapping unit 40 have the same functions as those of the ODU2 termination unit 30 and the sonnet mapping unit 40 described in the second or third embodiment. Omitted.

  The alarm collection unit 63 exhibits the same functions as the alarm collection unit 13 of the second embodiment and the alarm collection unit 53 of the third embodiment. Further, when the alarm collecting unit 63 determines that an error that breaks the JC byte has not occurred, the count trigger signal for counting the JC byte is set to each of the counting units 67 to 70, the selection condition generating unit 64, the monitoring frame counter. It transmits to the part 66.

  The destuff prediction generation unit 65 performs the same function as the destuff prediction generation unit 55 according to the third embodiment, and the destuff prediction generation unit 65 is predicted to be extracted by the JC byte extraction unit 62 after the next time. A predicted JC byte is generated.

  Specifically, the destuffing prediction generation unit 65 includes a monitoring frame counter unit 66, a “00” count unit 67, a “01” count unit 68, a “10” count unit 69, a “11” count unit 70, an insertion stuff generation unit. Part 71.

  Based on the number of JC bytes extracted by the JC byte extraction unit 62, the monitoring frame counter unit 66 calculates the number of frames from which JC bytes have been extracted while no error is detected. Here, the frame indicates multiplexed ODNs 1 # 1 to # 4.

  Here, FIG. 7 is a diagram showing the JC byte and the clock deviation physical strength. As shown in FIG. 7, a 15231-byte signal is stored in one frame. For this reason, when the ODUs 1 # 1 to # 4 are asynchronously multiplexed, the communication device compliant with the OTN system can perform a phase absorption of 65.65 ppm as a whole by ± 1 byte stuff processing.

  For this reason, when a stuffing process of ± 1 byte is executed every 64 frames, a total of about 1 ppm of phase absorption can be performed. Therefore, the destuff prediction generation unit 65 averages the JC bytes for 64 frames acquired in a state where no error is detected, and sets the averaged JC bytes as the predicted JC bytes. The destuffing prediction generation unit 65 sets 64 frames as the minimum frame unit, and updates the predicted JC byte for each minimum frame unit.

  Returning to FIG. 6, the processing executed by the monitoring frame counter unit 66 will be specifically described. When the monitor frame counter unit 66 acquires the counter trigger signal from the alarm collection unit 63, the monitoring frame counter unit 66 determines that the alarm collection unit 63 has not detected an error. Then, the monitoring frame counter unit 66 sets the value obtained by dividing the number of JC bytes extracted by the JC byte extraction unit 62 by “4” while no error is detected as the number of frames from which the JC bytes are extracted.

  Further, the monitoring frame counter unit 66 calculates a quotient value obtained by dividing the calculated number of frames by “64”, and sets the calculated value as the minimum frame unit. Then, when the minimum frame unit changes, the monitoring frame counter unit 66 transmits the value calculated as the minimum frame unit to the count units 67 to 70.

  For example, when the total number of JC bytes extracted by the JC byte extraction unit 62 is “256”, the monitoring frame counter unit 66 calculates that the number of frames from which the JC bytes are extracted is “64”. To do. Further, the monitoring frame counter unit 66 calculates that the minimum frame unit is “1”. Here, the monitoring frame counter unit 66 determines that the minimum frame unit has changed from “0” to “1”. Therefore, the monitoring frame counter unit 66 notifies the count units 67 to 70 of “1” indicating the minimum frame unit.

  The “00” count unit 67 counts the cumulative number of times that the JC byte of each ODU1 # 1 to # 4 is “00” while no error is detected. Specifically, the “00” count unit 67 acquires the JC bytes of the ODUs 1 # 1 to # 4 from the JC byte extraction unit 62. The “00” counting unit 67 determines that no error is detected when the count trigger signal is acquired from the alarm collecting unit 63.

  If the “00” counting unit 67 determines that no error has been detected, the “00” counting unit 67 counts the cumulative number of times that the acquired JC byte is “00” for each ODU1 # 1 to # 4. Thereafter, when the value indicating the minimum frame unit is acquired from the monitoring frame counter unit 66, the “00” count unit 67 notifies the insertion staff generation unit 71 of the cumulative number of times that the JC byte is “00”.

  For example, the “00” counting unit 67 acquires the JC byte from the JC byte extracting unit 62 and counts the cumulative number of times that the JC byte is “00”. Then, the “00” count unit 67 counts “0”, “0”, “64”, and “0” as the cumulative number of times that the JC bytes of the ODUs 1 # 1 to # 4 are “00”. Further, when the “00” count unit 67 acquires a value indicating the minimum frame unit “1” from the monitoring frame counter unit 66, the cumulative number of times that the JC bytes of the respective ODUs 1 # 1 to # 4 are “00”. “0”, “0”, “64”, and “0” are notified to the insertion staff generation unit 71.

  The “01” count unit 68 counts the cumulative number of times that the JC byte of each ODU1 # 1 to # 4 was “01” while no error was detected. Specifically, the “01” count unit 68 acquires the JC bytes of the ODUs 1 # 1 to # 4 from the JC byte extraction unit 62. The “01” count unit 68 determines that no error is detected when the count trigger signal is acquired from the alarm collection unit 63.

  If the “01” counting unit 68 determines that no error is detected, the “01” counting unit 68 counts the cumulative number of times that the acquired JC byte is “01” for each of the ODUs 1 # 1 to # 4. Thereafter, when the “01” count unit 68 acquires a value indicating the minimum frame unit from the monitoring frame counter unit 66, the “01” count unit 68 notifies the insertion staff generation unit 71 of the cumulative number of times that the JC byte is “01”.

  For example, the “01” count unit 68 acquires the JC byte from the JC byte extraction unit 62 and counts the cumulative number of times that the JC byte is “01”. Then, the “01” count unit 68 counts “64”, “64”, “0”, and “0” as the cumulative number of times that the JC bytes of the ODUs 1 # 1 to # 4 are “01”. Further, when the “01” count unit 68 acquires a value indicating the minimum frame unit “1” from the monitoring frame counter unit 66, the accumulated number of times that the JC bytes of the respective ODUs 1 # 1 to # 4 are “01”. “64”, “64”, “0”, and “0” are notified to the insertion staff generation unit 71.

  The “10” counting unit 69 counts the cumulative number of times that the JC byte of each ODU1 # 1 to # 4 was “10” while no error was detected. Specifically, the “10” counting unit 69 acquires the JC bytes of the ODUs 1 # 1 to # 4 from the JC byte extracting unit 62. Further, the “10” counting unit 69 determines that no error is detected when the count trigger signal is acquired from the alarm collecting unit 63.

  If the “10” counting unit 69 determines that no error has been detected, the “10” counting unit 69 counts the cumulative number of times the acquired JC byte is “10” for each of the ODUs 1 # 1 to # 4. Thereafter, when the value indicating the minimum frame unit is acquired from the monitoring frame counter unit 66, the “10” count unit 69 notifies the insertion staff generation unit 71 of the cumulative number of times that the JC byte is “01”.

  For example, the “10” counting unit 69 acquires the JC byte from the JC byte extracting unit 62 and counts the cumulative number of times that the JC byte is “10”. Then, the “10” counting unit 69 counts “0”, “0”, “0”, “64” as the cumulative number of times that the JC byte of each ODU1 # 1 to # 4 is “10”. Further, when the “10” count unit 69 acquires the value indicating the minimum frame unit “1” from the monitoring frame counter unit 66, the cumulative number of times that the JC bytes of the respective ODUs 1 # 1 to # 4 are “10”. “0”, “0”, “0”, and “64” are notified to the insertion staff generation unit 71.

  The “11” counting unit 70 counts the cumulative number of times that the JC bytes of the ODUs 1 # 1 to # 4 are “11” while no error is detected. Specifically, the “11” count unit 70 acquires the JC bytes of the ODUs 1 # 1 to # 4 from the JC byte extraction unit 62. Further, the “11” counting unit 70 determines that no error is detected when the count trigger signal is acquired from the alarm collecting unit 63.

  If the “11” counting unit 70 determines that no error is detected, the “11” counting unit 70 counts the cumulative number of times that the acquired JC byte is “11” for each of the ODUs 1 # 1 to # 4. Thereafter, when the value indicating the minimum frame unit is acquired from the monitoring frame counter unit 66, the “11” count unit 70 notifies the insertion staff generation unit 71 of the cumulative number of times that the JC byte is “11”.

  For example, the “11” counting unit 70 acquires the JC byte from the JC byte extracting unit 62 and counts the cumulative number of times that the JC byte is “11”. Then, the “11” count unit 70 counts “0”, “0”, “0”, and “0” as the cumulative number of times that the JC bytes of the ODUs 1 # 1 to # 4 are “11”. Further, when the “11” count unit 70 acquires a value indicating the minimum frame unit “1” from the monitoring frame counter unit 66, the accumulated number of times that the JC bytes of the respective ODUs 1 # 1 to # 4 are “11”. “0”, “0”, “0”, and “0” are notified to the insertion staff generation unit 71.

  That is, the count units 67 to 70 individually count the JC bytes stored in the ODUs 1 # 1 to # 4 while no error is detected. Each count unit 67 to 70 notifies the insertion stuff generation unit 71 of the count value when notified from the monitoring frame counter unit 66 that the JC bytes for the minimum frame unit have been counted.

  The insertion staff generation unit 71 collects the JC bytes extracted by the JC byte extraction unit 62 when no error of the opposing device is detected. Also, based on the collected JC bytes, the JC byte extraction unit 62 generates JC bytes that are predicted to be extracted next time.

  Specifically, the insertion staff generation unit 71 determines the number of times that the JC bytes of the ODUs 1 # 1 to # 4 are “00”, “01”, “10”, and “11” from the count units 67 to 70, respectively. get. Further, the insertion stuff generation unit 71 acquires the minimum frame unit from the monitoring frame counter unit 66. Then, the insertion staff generation unit 71 divides the number of times that the JC bytes of the ODUs 1 # 1 to # 4 are “00”, “01”, “10”, and “11” by the acquired minimum frame unit. That is, the insertion staff generation unit 71 calculates the number of times that the JC byte of each ODU1 # 1 to # 4 is “00”, “01”, “10”, and “11” for each minimum frame unit.

  Further, the insertion stuff generation unit 71 determines the most extracted JC byte among the JC bytes of the respective ODUs # 1 to # 4 based on the value obtained by dividing the count value of each JC byte by the minimum frame unit. . Then, the insertion staff generation unit 71 sets the determined JC byte as a predicted JC byte predicted to be extracted by the JC byte extraction unit 62 from the next time. Thereafter, the insertion stuff generation unit 71 transmits the predicted JC byte to the generation stuff memory unit 72 as the insertion stuff.

  Here, a specific example of the process of generating the predicted JC byte based on the number of times the insertion staff generation unit 71 has been calculated will be described. For example, the insertion staff generation unit 71 obtains the number of times “0”, “0”, “64”, “0” from which the JC byte of each ODU 1 # 1 to # 4 was “00” from the “00” count unit 67. get. Further, the insertion staff generation unit 71 obtains the number of times “64”, “64”, “0”, “0” from which the JC byte of each ODU1 # 1 to # 4 is “01” from the “01” count unit 68. get.

  Further, the insertion staff generation unit 71 obtains the number of times “0”, “0”, “0”, “64” in which the JC byte of each ODU 1 # 1 to # 4 is “10” from the “10” counting unit 69 get. Further, the insertion staff generation unit 71 obtains the number of times “0”, “0”, “0”, “0” from which the JC byte of each ODU1 # 1 to # 4 is “11” from the “11” count unit 70 get.

  Further, the insertion stuff generation unit 71 acquires the minimum frame unit “1” from the monitoring frame counter unit 66. Then, the insertion staff generation unit 71 divides the number of times that the JC bytes of the ODUs 1 # 1 to # 4 are “00”, “01”, “10”, and “00” by the minimum frame unit “1”.

  Here, the insertion staff generation unit 71 determines that the most extracted JC byte for ODU1 # 1 is “01”. Therefore, the insertion staff generation unit 71 sets the predicted JC byte for ODU1 # 1 to “01”. Similarly, the insertion staff generation unit 71 sets the predicted JC byte for ODU1 # 2 to “01”. Similarly, the insertion staff generation unit 71 sets the predicted JC byte for ODU1 # 3 to “00”. Similarly, the insertion staff generation unit 71 sets the predicted JC byte for ODU1 # 4 to “10”.

  Thereafter, the insertion staff generation unit 71 transmits the predicted JC bytes “01”, “01”, “00”, and “10” for each of the ODUs 1 # 1 to # 4 to the generation staff memory unit 72 as the insertion stuff.

  In this way, the destuffing prediction generation unit 65 counts the number of each JC byte while no error is detected, and generates a predicted JC byte based on the counted number of each JC byte. Each count unit 67 to 70 notifies the insertion stuff generation unit 71 of the count value for each minimum frame unit. As a result, the destuff prediction generation unit 65 generates a new prediction JC byte for each minimum frame unit.

  The selection unit 73 has the same function as the selection unit 18 according to the second embodiment or the selection unit 57 according to the third embodiment. Further, when an error of the opposite device is detected by the alarm collection unit 63, the selection unit 73 uses the stuff signal extracted by the JC byte extraction unit 62 as the JC byte generated by the destuff prediction generation unit 65. Replace.

  Specifically, the selector 73 acquires the JC bytes extracted from the ODUs 1 # 1 to # 4 and the ODUs 1 # 1 to # 4 from the JC byte extractor 62. When the selection unit 73 acquires a signal that supports replacement of the JC byte from the selection condition generation unit 64, the selection unit 73 acquires each insertion stuff stored in the generation stuff memory unit 72. Then, the selection unit 73 replaces the stuff signal extracted by the JC byte extraction unit 62 with each acquired insertion stuff.

  Here, each insertion stuff stored in the generated stuff memory unit 72 is a predicted JC byte predicted for each frame by the destuff prediction generation unit 65. That is, each insertion stuff stored in the generated stuff memory 72 is a predicted JC byte predicted to be extracted by the JC byte extractor 62 after the next time. For this reason, the selector 73 replaces the JC byte extracted by the JC byte extractor 62 with the predicted JC byte predicted by the destuff prediction generator 65 when an error of the opposite device is detected.

  For example, the selection unit 73 acquires JC bytes “11”, “01”, “00”, and “10” extracted by the JC byte extraction unit 62. Here, it is assumed that the JC byte of ODU1 # 1 is rewritten from “01” to “11” in order to make ODU1 # 1 an ODU1-AIS signal.

  When the selection unit 73 receives a signal instructing the replacement of the JC byte from the selection condition generation unit 64, the selection unit 73 stores the insertion stuffs “01”, “01”, “00”, “ 10 ”is acquired. Then, the selection unit 73 replaces each JC byte extracted by the JC byte extraction unit 62 with the insertion stuff stored in the generation stuff memory unit 72. That is, the selection unit 73 replaces the JC byte of each ODU1 # 1 to # 4 with the predicted JC byte.

  In this way, the demapping processing device 60 performs destuffing processing using the predicted JC byte. As a result, the demapping processor 60 can perform accurate destuffing processing even when an error is detected, and thus extracts a clock signal with high accuracy.

  For example, the demultiplexing unit 61, the JC byte extracting unit 62, the alarm collecting unit 63, the select condition generating unit 64, the destuffing prediction generating unit 65, the selecting unit 73, the destuffing processing unit 74, and the demapping unit 75 are electronic Circuit. The monitoring frame counter unit 66, the “00” count unit 67, the “01” count unit 68, the “10” count unit 69, the “11” count unit 70, and the insertion stuff generation unit 71 are electronic circuits. Here, as an example of the electronic circuit, an integrated circuit such as an application specific integrated circuit (ASIC) or a field programmable gate array (FPGA), or a central processing unit (CPU) or a micro processing unit (MPU) is applied.

  The generation stuff memory unit 72 is a semiconductor memory device such as a random access memory (RAM), a read only memory (ROM), or a flash memory, or a storage device such as a hard disk or an optical disk.

  Next, the flow of the counting process in which the counting units 67 to 70 count JC bytes will be briefly described with reference to FIG. FIG. 8 is a diagram for explaining the data flow of the counting process according to the fourth embodiment.

  In the example illustrated in FIG. 8, first, the alarm collection unit 63 determines whether an error has occurred in the opposing device, and further determines whether the generated error is an error that breaks the JC byte. If the alarm collecting unit 63 determines that the error that has occurred is not an error that corrupts the JC byte, the alarm collecting unit 63 transmits a count trigger signal to each of the counting units 67 to 70.

  The JC byte extraction unit 62 extracts the JC bytes of the respective ODUs 1 # 1 to # 4 and transmits them to the counting units 67 to 70. Each count unit 67 to 70 counts each JC byte transmitted by the JC byte extraction unit 62 when the count trigger signal is acquired from the alarm collection unit 63. When each of the counting units 67 to 70 is notified from the monitoring frame counter unit 66 that the JC bytes for the minimum frame unit have been counted, the count of each JC byte counted for ODU1 # 1 to # 4 is counted. The value is transmitted to the insertion staff generation unit 71.

  The insertion stuff generation unit 71 averages each count value by the number of minimum frames acquired from the monitoring frame counter unit 66, and generates a predicted JC byte based on each averaged count value. Then, the insertion stuff generation unit 71 transmits the generated predicted JC byte to the generation stuff memory unit 72 for each ODU1 # 1 to # 4.

  On the other hand, if the alarm collecting unit 63 determines that the error that has occurred is an error that corrupts the JC byte, the alarm collecting unit 63 sends a disable signal to each of the counting units 67 to 70, the selection condition generating unit 64, and the monitoring frame counter unit 66 Send to. The selection condition generation unit 64 acquires a signal indicating that each of the ODUs 1 # 1 to # 4 has been acquired from the JC byte extraction unit 62, and acquires a disable signal from the alarm collection unit 63. Then, if both signals are acquired within a predetermined time, the select condition generating unit 64 transmits a signal instructing replacement of the JC byte to the select unit 73.

  The selector 73 acquires the JC bytes of the ODUs 1 # 1 to # 4 from the JC byte extractor 62. When a signal instructing replacement of JC bytes is acquired from the selection unit 73, the JC bytes of the respective ODUs 1 # 1 to # 4 are replaced with the insertion staff acquired from the generation stuff memory unit 72. That is, the selector 73 replaces the JC byte and the predicted JC byte of each ODU1 # 1 to # 4.

[Effect of Example 4]
As described above, the demapping processing device 60 collects the JC bytes of the respective ODUs 1 # 1 to # 4 when the error of the opposite device is not detected, and based on the collected JC bytes, the prediction JC Generate bytes. Then, when an error of the opposite device is detected, the demapping processing device 60 replaces the JC byte of each ODU1 # 1 to # 4 with the predicted JC byte.

  That is, the demapping processor 60 creates a predicted JC byte so as to follow the change in units of the minimum frame even when the JC byte stored in each of the ODUs 1 # 1 to # 4 changes. For this reason, since the demapping processing device 60 can replace the JC bytes in consideration of the trend of the JC bytes of the respective ODUs 1 # 1 to # 4, it can perform more reliable replacement of the JC bytes. As a result, the demapping processing device 60 can acquire a clock signal with high accuracy from each signal, so that the accuracy of the clock signal can be maintained without installing a fixed oscillator for each multiplexed signal. .

  Although the embodiments of the present invention have been described so far, the embodiments may be implemented in various different forms other than the embodiments described above. Therefore, another embodiment included in the present invention will be described below as a fifth embodiment.

(1) Prediction JC Byte The demapping processing device 60 according to the fourth embodiment described above employs 64 frames as the minimum frame unit, and generates a prediction JC byte for each minimum frame unit. However, the embodiment is not limited to this. For example, the demapping processing apparatus may generate a predicted JC byte every 128 frames, or may generate a predicted JC byte every frame. Good.

  Further, the demapping processing device 60 according to the fourth embodiment described above calculates the average value of each JC byte for each ODU1 # 1 to # 4, and sets the JC byte that is the maximum average value as the predicted JC byte. However, the embodiment is not limited to this, and a predicted JC byte is generated using a statistical method that takes into account parameters such as the time at which each JC byte is extracted and the number of times it is continuously extracted. Also good.

(2) Timing for Acquiring JC Bytes The demapping processing device 60 according to the third embodiment and the fourth embodiment described above extracts the JC bytes of the respective ODU1 # 1 to # 4 while no error is detected, The extracted JC bytes were collected. However, the embodiment is not limited to this. For example, when an error is not detected for a certain period or longer, collection of JC bytes may be temporarily suspended.

(3) Program By the way, the information processing apparatus according to the first embodiment and the demapping processing apparatus according to the second to fourth embodiments have been described in the case where various processes are realized using hardware. However, the embodiment is not limited to this, and may be realized by executing a program prepared in advance by a computer included in the information processing apparatus. Therefore, an example of a computer that executes a program having the same function as that of the information processing apparatus described in the first embodiment will be described below with reference to FIG. FIG. 9 is a diagram for explaining an example of a computer that executes the destuffing process.

  In the computer 200 illustrated in FIG. 9, a RAM (Random Access Memory) 120, a ROM (Read Only Memory) 130, and an HDD (Hard Disk Drive) 150 are connected by a bus 170. Further, the computer 200 illustrated in FIG. 9 is connected to a CPU (Central Processing Unit) 140 via a bus 170. Further, an I / O (Input Output) 160 is connected to the bus 170 for connection to a Sonnet mapping apparatus that maps information to a Sonnet frame.

  In the ROM 130, a detection program 132, an extraction program 133, a replacement program 134, and a destuffing program 135 are stored in advance. When the CPU 140 reads out and executes the programs 132 to 134 from the ROM 130, in the example illustrated in FIG. 9, the programs 132 to 134 function as the detection process 142, the extraction process 143, and the replacement process 144. Further, when the CPU 140 reads out the destuffing program 135 from the ROM 130 and executes it, the destuffing program 135 functions as the destuffing process 145 in the example shown in FIG. In addition, each process 142-145 exhibits the same function as each part 2-5 shown in FIG. Moreover, each process 142-145 can also be made to exhibit the function equivalent to each part which concerns on Examples 2-4.

  The program described in this embodiment can be realized by executing a program prepared in advance on a computer such as a personal computer or a workstation. This program can be distributed via a network such as the Internet. The program is recorded on a computer-readable recording medium such as a hard disk, a flexible disk (FD), a CD-ROM (Compact Disc Read Only Memory), an MO (Magneto Optical Disc), a DVD (Digital Versatile Disc). The The program can also be executed by being read from a recording medium by a computer.

DESCRIPTION OF SYMBOLS 1 Information processing apparatus 2 Detection part 3 Extraction part 4 Replacement part 5 Destuffing process part 6 Opposite apparatus 10 Demapping processing apparatus 11 Demultiplexing part 12 JC byte extraction part 13 Alarm collection part 18 Selection part 19 Destuffing process part

Claims (5)

A detection unit that detects an error of the opposite device using the multiplexed signal transmitted from the opposite device;
An extraction unit that extracts a stuff signal indicating the amount of phase compensation of each signal during phase synchronization from a plurality of signals obtained by demultiplexing the multiplexed signal;
When an error of the opposing device is detected by the detection unit, a replacement unit that replaces the stuff signal extracted by the extraction unit with a predetermined stuff signal,
An information processing apparatus comprising: a destuffing processing unit that performs destuffing processing for correcting the phase of each signal using the stuffing signal replaced by the replacement unit. In the case where an error of the opposing device is not detected by the detection unit, the detection unit further includes a collection unit that collects the staff signal extracted by the extraction unit,
The replacement unit replaces the stuff signal extracted by the extraction unit with the stuff signal last collected by the collection unit when an error of the opposing device is detected by the detection unit. The information processing apparatus according to claim 1. Based on the stuff signal collected by the collection unit, further comprising a prediction generation unit that generates the stuff signal predicted to be extracted from the next time the extraction unit,
The replacement unit replaces the stuff signal extracted by the extraction unit with the stuff signal generated by the prediction generation unit when an error of the opposite device is detected by the detection unit. The information processing apparatus according to claim 2. A detection step of detecting an error of the opposite device using the multiplexed signal transmitted from the opposite device;
An extraction step of extracting a stuff signal indicating the amount of phase compensation of each signal during phase synchronization from a plurality of signals obtained by demultiplexing the multiplexed signal;
When an error of the opposing device is detected in the detection step, a replacement step of replacing the stuff signal extracted in the extraction step with a predetermined stuff signal;
A destuffing process step of performing a destuffing process of correcting the phase of each signal using the stuff signal replaced in the replacing step. A detection procedure for detecting an error in the opposite device using the multiplexed signal transmitted from the opposite device;
An extraction procedure for extracting a stuff signal indicating the amount of phase compensation of each signal during phase synchronization from a plurality of signals obtained by demultiplexing the multiplexed signal;
When an error of the opposing device is detected by the detection procedure, a replacement procedure for replacing the stuff signal extracted by the extraction procedure with a predetermined stuff signal;
An information processing program causing a computer to execute a destuffing process procedure for performing a destuffing process for correcting the phase of each signal using the stuff signal replaced by the replacement procedure.

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