JP5425593B2 - EUV mask defect inspection method, EUV mask manufacturing method, EUV mask inspection apparatus, and semiconductor device manufacturing method - Google Patents

Description

  The present invention relates to an EUV (Extreme Ultra Violet) mask defect inspection method, an EUV mask inspection apparatus, an EUV mask manufacturing method, and a semiconductor device manufacturing method using the same, and in particular, a multilayer having high defect detection sensitivity and detection reliability. The present invention relates to a defect inspection method for a film mask.

  A semiconductor device (semiconductor device) is a photolithographic process in which exposure is applied to a mask, which is an original plate on which a circuit pattern is drawn, and the circuit pattern is transferred onto a semiconductor substrate (also referred to as a wafer) via a reduction optical system. Is repeatedly mass-produced.

  In recent years, the miniaturization of semiconductor devices has progressed, and methods for increasing the resolution by shortening the exposure wavelength of photolithography have been studied. Until now, ArF lithography using an argon fluoride (ArF) excimer laser beam with a wavelength of 193 nm has been developed, but EUV lithography (hereinafter referred to as EUVL) using EUV light with a wavelength of 13.5 nm which is much shorter than that has been developed. (Referred to as EUV Lithography) is under development. Since a transmission mask cannot be used in this wavelength range, a multilayer reflective substrate using reflection by a multilayer film such as molybdenum (Mo) and silicon (Si) is used. Such a mask for EUVL (hereinafter referred to as an EUV mask or a reflective mask) is a multilayer mask blank in which a multilayer film such as Mo and Si is deposited on a quartz glass or a low thermal expansion glass substrate. An absorber pattern is formed on the surface. Here, the mask blank is a state in which only a reflective film made of a multilayer film or the like is formed on the substrate surface, and an absorber pattern is not formed (a state in which an unpatterned absorber film is formed on the multilayer film) (Including the mask).

  For example, Japanese Unexamined Patent Application Publication No. 2003-114200 (Patent Document 1) discloses a technique using a dark field inspection image as a method of detecting defects inside a multilayer film using EUV light.

  For example, Japanese Patent Laid-Open No. 6-349715 (Patent Document 2) discloses a technique using a bright field in X-ray microscopy as a method of detecting defects inside a multilayer film using EUV light. .

  Further, for example, US Patent Application Publication No. 2004/0057107 (Patent Document 3) uses a dark field image inspection and a Fresnel zone plate as a method for detecting defects inside a multilayer film using EUV light. A dark-field bright-field combination technique for performing defect identification using a bright-field system is disclosed.

  For example, Japanese Patent Application Laid-Open No. 2007-219130 (Patent Document 4) discloses a technique for determining whether a defect is a convex defect or a concave defect based on the asymmetry of the focus position of the detected image signal.

  In addition, for example, in Japanese Patent Laid-Open No. 11-354404 (Patent Document 5), a peelable pattern is formed on a multilayer mask, the pattern is actually transferred, and the multilayer is inspected by inspecting the pattern. Techniques to do this are disclosed.

  Further, for example, in Japanese Patent Application Publication No. 2002-532738 (Patent Document 6), when an absorber pattern is formed with a phase defect already present, the contour of the absorber pattern is corrected and the pattern is transferred by the exposure apparatus. A technique for improving the projected image is disclosed.

JP 2003-114200 A JP-A-6-349715 US Patent Application Publication No. 2004/0057107 JP 2007-219130 A Japanese Patent Laid-Open No. 11-354404 Japanese translation of PCT publication No. 2002-532738

  The followings were found by the inventors' investigation on EUVL technology.

  In the dark field detection method using EUV light disclosed in Patent Document 1, although the defect portion can be detected as a bright spot with high sensitivity, it is not considered to specify the degree and position of the detected phase defect. Further, in the X-ray microscope method using the bright field as in Patent Document 2 described above, since only the reflectance of the multilayer film is examined, it is difficult to detect all defects that cause a phase change. Moreover, it does not consider about specifying the grade and position of a defect. In addition, as disclosed in Patent Document 3, the exposure wavelength inspection method that combines the bright-field inspection and the dark-field inspection has a complicated inspection apparatus, and at the same time has a high detection sensitivity even in a high-speed dark-field inspection. not high. Further, in the inspection of the mask blank, no consideration is given to specifying the degree and position of the defect. In the methods described in Patent Documents 4 and 5, the presence or absence of a defect on the mask blank can be determined, but the specification of the degree of defect and the position of the defect is not taken into consideration.

  Thus, in any of the defect inspection methods described above, when a multilayer film defect that is difficult to correct is detected, even if it is a micro-sized defect, the mask is not transferred to the step of forming the absorber pattern. The blank is handled as a defective product and will be disposed of. According to the inventors' knowledge, the mask blank can be usable if the phase defect is in a position to be covered after forming the absorber pattern. However, specifying the defect position coordinates in the mask blank at the time of inspecting the phase defect and clarifying the relative position with the absorber pattern to be formed thereafter are the above-mentioned techniques examined by the present inventors in advance. It is difficult.

  Further, the method described in Patent Document 6 provides a method for handling the EUV mask as a non-defective product even if a phase defect remains after the absorber pattern is formed. However, a so-called defect inspection method for specifying where the phase defects remaining after the absorber pattern is formed is not disclosed.

  Therefore, an object of the present invention is to inspect the EUV mask in which the absorber pattern is formed on the multilayer mask blank and detect the phase defect of the multilayer film and the defect of the absorber pattern that affect the transfer of the mask pattern, It is an object of the present invention to provide a defect inspection method for an EUV mask in which the position of these defects can be specified as a relative position with respect to a reference mark constituted by an absorber pattern.

  Another object of the present invention is to provide a manufacturing method capable of manufacturing a highly reliable EUV mask even when the presence of a defect is found by the defect inspection method.

  Another object of the present invention is to provide a manufacturing method of a semiconductor device using a method of forming a pattern on a semiconductor substrate using an EUV mask obtained by the above manufacturing method.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  In the present application, a plurality of inventions are disclosed. An outline of one embodiment of the inventions will be briefly described as follows.

  A defect inspection method for an EUV mask having a multilayer film formed on a mask substrate and an absorber pattern disposed on the multilayer film, the defect inspection method having the following steps. First, the EUV mask is placed on a mask stage movable in a two-dimensional direction. Thereafter, the position of the reference mark arranged on the EUV mask is detected. Subsequently, the region to be inspected on the EUV mask is irradiated with EUV light, the scattered light excluding the specular reflection light is collected and enlarged to form an image, and the dark field enlarged image is obtained by an image detector having a large number of pixels. Obtained as a pixel signal. Next, the predicted value of the pixel signal from the inspection region on the EUV mask is obtained from the design data of the absorber pattern by numerical calculation. Then, by comparing the actually acquired pixel signal with the predicted value of the pixel signal obtained by numerical calculation, it is determined whether there is a defect in the inspection area on the EUV mask. The position of the inspection area is recorded as a relative position from the reference mark. Thereafter, the mask stage is moved, and the above process is repeated for the other inspection area on the EUV mask.

  Of the plurality of inventions disclosed in the present application, the effects obtained by the above-described embodiment will be briefly described as follows.

  That is, in an EUV mask defect inspection method, an EUV mask in which an absorber pattern is formed on a multilayer mask blank is inspected to detect multilayer film phase defects and absorber pattern defects that affect the transfer of the mask pattern. Then, the coordinates of these defects can be specified as relative positions with respect to the reference marks formed by the absorber pattern.

  Further, in the EUV mask manufacturing method, a highly reliable EUV mask can be manufactured even when the presence of defects is found by the inspection method.

  Moreover, in the manufacturing method of a semiconductor device, the method of forming a pattern on a semiconductor substrate using the EUV mask obtained by the said manufacturing method can be provided.

It is explanatory drawing of the EUV mask inspection apparatus used for the defect inspection method of the EUV mask which is Embodiment 1 of this invention. It is explanatory drawing of the defect inspection method of the EUV mask which is Embodiment 1 of this invention. It is explanatory drawing of the defect inspection method of the EUV mask which is Embodiment 1 of this invention, Comprising: (a) shows the case where a defect exists, (b) shows the case where a defect does not exist. It is a figure explaining the defect inspection method of the EUV mask which is Embodiment 1 of this invention, Comprising: (a) shows the top view of an EUV mask, (b) is along the AA line of (a). The viewed cross-sectional views are shown, and (c) to (e) are explanatory diagrams of the signal intensity obtained by the measurement. (A)-(e) is explanatory drawing of the defect inspection method of the EUV mask which is Embodiment 1 of this invention, Comprising: The left side is a pixel when a defect does not exist, The right side is a case where a defect exists Pixels. (A) is explanatory drawing of the EUV mask used as the defect inspection object of EUV mask which is Embodiment 1 of this invention, (b) and (c) are explanatory drawings of the reference mark of the EUV mask. . It is a flowchart for demonstrating the defect inspection method of the EUV mask which is Embodiment 1 of this invention. It is explanatory drawing of the defect inspection method of the EUV mask which is Embodiment 2 of this invention. It is a time chart for demonstrating the defect inspection method of the EUV mask which is Embodiment 2 of this invention. It is a flowchart for demonstrating the defect inspection method of the EUV mask which is Embodiment 2 of this invention. It is another flowchart for demonstrating the defect inspection method of the EUV mask which is Embodiment 2 of this invention. It is explanatory drawing of the manufacturing method of the EUV mask which is Embodiment 3 of this invention, Comprising: (a) shows a mode that a phase defect exists, (b) shows a mode that EUV mask is corrected. (A) And (b) is explanatory drawing of the manufacturing method of the EUV mask which is Embodiment 3 of this invention. It is a flowchart for demonstrating the manufacturing method of the EUV mask which is Embodiment 3 of this invention. It is a figure explaining the defect inspection method of EUV mask which is Embodiment 4 of this invention, Comprising: (a) shows the top view of EUV mask, (b) is along the BB line of (a). A cross-sectional view is shown. (A) is sectional drawing in the manufacturing process of the semiconductor device which is Embodiment 5 of this invention, (b) follows (a), (c) follows (b), (d) (C) is a cross-sectional view in the process following (c), (e) following (d), and (f) following (e). It is explanatory drawing of the EUV mask inspection apparatus which is Embodiment 6 of this invention. It is explanatory drawing of the defect inspection method of the EUV mask which is Embodiment 6 of this invention. It is explanatory drawing of the other defect inspection method of the EUV mask which is Embodiment 6 of this invention. (A) is explanatory drawing which shows the EUV mask in the defect inspection process which is Embodiment 6 of this invention, Comprising: (b) and (c) are finely moved to the horizontal direction in an order from the state of (a). (D) and (e) show a state of slight movement in the vertical direction in order from the state of (a). (A)-(c) is a graph of the EUV light intensity signal obtained with the defect inspection method of the EUV mask which is Embodiment 6 of this invention. It is explanatory drawing which shows the planar shape of the defect detected by the defect inspection method of the EUV mask which is Embodiment 6 of this invention. It is a figure which shows the EUV mask which the present inventors examined, Comprising: (a) is a top view, (b) shows sectional drawing. It is explanatory drawing of the EUV mask inspection apparatus which the present inventors examined. (A) And (b) is explanatory drawing of the mask blank which has a phase defect in the EUV mask which the present inventors examined. (A) And (b) is explanatory drawing of the EUV mask which has a phase defect and a pattern defect in the EUV mask which the present inventors examined.

  In the following embodiments, when it is necessary for the sake of convenience, the description will be divided into a plurality of sections or embodiments. However, unless otherwise specified, they are not irrelevant to each other. There are some or all of the modifications, details, supplementary explanations, and the like. Further, in the following embodiments, when referring to the number of elements (including the number, numerical value, quantity, range, etc.), especially when clearly indicated and when clearly limited to a specific number in principle, etc. Except, it is not limited to the specific number, and may be more or less than the specific number. Further, in the following embodiments, the constituent elements (including element steps and the like) are not necessarily indispensable unless otherwise specified and apparently essential in principle. Needless to say. Similarly, in the following embodiments, when referring to the shapes, positional relationships, etc. of the components, etc., the shapes are substantially the same unless otherwise specified, or otherwise apparent in principle. And the like are included. The same applies to the above numerical values and ranges. Also, components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiments, and the repetitive description thereof is omitted as much as possible. Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

(Embodiment 1)
First, the EUVL technology examined in advance by the present inventors and the found problems will be described in detail with reference to the drawings.

  FIG. 23A is a plan view of the EUV mask M examined by the present inventors as viewed against the pattern surface. The EUV mask M has a device pattern area MDE having a pattern of the semiconductor integrated circuit device in the central portion, and alignment mark areas MA1, MA2, including a mask alignment mark and a wafer alignment mark in the peripheral portion. MA3 and MA4 are arranged.

  FIG. 23B is a cross-sectional view of the main part in the device pattern area MDE of the EUV mask M. A multilayer film ML as described above is deposited on a substrate MS such as quartz glass or a low thermal expansion material, and a capping layer CAP is deposited thereon. On top of this, an absorber pattern ABS is provided via a buffer layer BUF. On the other hand, a metal film CF for electrostatic chucking of the mask is coated on the back side of the substrate MS.

  FIG. 24 is an explanatory view showing means for reducing and transferring the pattern on the EUV mask M onto the wafer by the EUV projection exposure apparatus EP. EUV light (extreme ultraviolet light) LL having a central wavelength of 13.5 nm emitted from the light source 80 illuminates the pattern surface of the EUV mask M through an illumination optical system 81 formed of a multilayer film reflecting mirror. The reflected light from the pattern surface is passed through a reduction projection optical system 82 composed of a multilayer film reflecting mirror, and the pattern is transferred onto the wafer 83. The wafer 83 is mounted on a stage 84, and a large number of patterns are transferred to a desired area of the wafer 83 by repeating the movement of the stage 84 and pattern transfer.

  In EUVL, since the exposure wavelength is as short as 13.5 nm, even when a slight surface height or depth abnormality of about several nanometers occurs, a phase difference occurs in the reflected light due to the surface abnormality, It becomes a factor which causes a defect in transferring the absorber pattern. FIG. 25A is an explanatory diagram showing an example in which a convex phase defect 91 is generated because fine particles P01 are sandwiched when the multilayer film ML is deposited on the substrate MS. FIG. 25B is an explanatory diagram showing an example in which a concave phase defect 92 is generated as a result of depositing the multilayer film ML with the minute depression P02 existing on the substrate MS. . When the buffer layer BUF and the absorber pattern ABS are formed while leaving these phase defects 91 and 92, a convex shape is formed at the center of the adjacent absorber pattern ABS, as shown in the explanatory diagram of FIG. The phase defect 91 may remain or, as shown in the explanatory diagram of FIG. 26B, a concave phase defect 92 may exist in the center of the adjacent absorber pattern ABS. In addition, a pattern defect 93 may occur when the buffer layer BUF and the absorber pattern ABS are formed.

  When such defects 91, 92, and 93 are present, the pattern projection image transferred onto the wafer 83 is disturbed and a defect in the transfer pattern occurs. In a conventional transmissive mask blank for optical lithography, irregularities of about several nm on the surface can be ignored. However, the EUV mask M has a large qualitative difference in defect transfer as compared with the conventional transmission mask, and it is necessary to avoid the generation of a mask blank defect that gives a phase difference.

  Therefore, it is necessary to detect the phase defects 91 and 92 at a stage before the absorber pattern ABS is deposited on the multilayer film ML, that is, at the stage shown in FIG. For mask blank defect inspection in the previous stage of forming the absorber pattern ABS, a laser beam is irradiated obliquely on the mask blank, and foreign matter is detected from the irregularly reflected light, and the same wavelength as the wavelength used for mask pattern exposure There is an at-wavelength defect inspection method in which defects are detected using EUV light. Since the method using laser light as inspection light has sensitivity only on the surface of the multilayer film, it is difficult to detect defects inside or at the bottom of the multilayer film.

  From such a point of view, the present inventors examined the introduction of the techniques disclosed in Patent Documents 1-6. As described above, according to these techniques, the presence or absence of a defect on the mask blank can be determined, but the specification of the degree and position of the defect is not taken into consideration. For example, the phase defect on the mask blank may be a minute size or a position that is completely covered by the absorber and does not affect the pattern transfer. In the above-described technique examined in advance by the present inventors, it is difficult to determine the degree of such a phase defect even if it has such a small effect, and it is treated as a defective product and disposed of. It will be. Further, even a phase defect that can be corrected at the defect detection stage cannot be corrected if it is difficult to specify its position, and is also treated as a defective product and disposed of. In other words, in the technology examined in advance by the present inventors, it is possible to specify the defect position coordinate in the mask blank at the time of inspecting the phase defect, and to clarify the relative position with the absorber pattern formed thereafter. Have difficulty.

  Based on the above, in the first embodiment, the phase defects 91 and 92 and the pattern defect 93 of the EUV mask in which the absorber pattern ABS is formed on the mask blank on which the multilayer film ML is formed are detected by the dark field inspection optical system. A technique for detection by comparing an obtained inspection image with a dark field projection image calculated from pattern design data will be described.

  The EUV mask inspection apparatus EC1 according to the first embodiment will be described with reference to FIG. The EUV mask inspection apparatus EC1 includes a light source 1 that generates EUV inspection light BM, a mask stage 2 for mounting the EUV mask M, an illumination optical system CIO, an imaging optical system DPO, and a two-dimensional array sensor (image detector). SE, sensor circuit 5, pattern memory 6, threshold setting circuit 8, comparison circuit 9 with threshold, timing control circuit 10, mask stage control circuit 11, and system control computer 18 for controlling the operation of the entire apparatus. The

  The imaging optical system DPO is composed of a concave mirror L1 and a convex mirror L2, and is a Schwarzschild optical system with a condensing numerical aperture NA = 0.2, a central light shielding numerical aperture NA = 0.1, and a magnification of 26 times. The EUV mask M to be inspected for the presence of phase defects and pattern defects is placed on the mask stage 2. The mask stage 2 is movable in a two-dimensional direction (for example, an X direction and a Y direction that intersect each other). The EUV inspection light BM having a central wavelength of 13.5 nm emitted from the light source 1 is converted into a focused beam through the illumination optical system CIO, and then bent by the multilayer mirror PM to irradiate a predetermined region of the EUV mask M. Of the reflected light from the EUV mask M, the light scattered by the pattern portion and the defect portion forms a focused beam SLI via the imaging optical system DPO and is condensed on the two-dimensional array sensor SE. That is, a dark field inspection image of the EUV mask M is formed on the two-dimensional array sensor SE, and as a result, the phase defect remaining on the EUV mask M is detected as a bright spot in the inspection image. The two-dimensional array sensor SE has a large number of pixels and takes an inspection image as a pixel signal. Further, light scattered at the edge of the absorber pattern is also captured, and only a small signal can be obtained as compared with the bright spot of the phase defect. However, when a defect exists in the absorber pattern, the intensity of the detection signal changes.

  The position of the EUV mask M is obtained as position information of the mask stage 2 by reading the position of the length measuring mirror 3 fixed to the mask stage 2 with the laser length measuring device 4. This information is sent to the position circuit 12 and can be recognized by the system control computer 18.

  On the other hand, the present EUV mask inspection apparatus EC1 is provided with an optical microscope ALO that can optically observe the pattern formed on the EUV mask M or the contour position of the EUV mask M to grasp the pattern position.

  Further, a part of the EUV inspection light BM is branched by the beam splitter BSP, the light amount is monitored by the sensor 7, and a threshold value for signal processing can be set by the threshold value setting circuit 8. Further, there are provided various data files 13 for storing various data related to the mask pattern, threshold data files 14 for storing threshold data, and a recording device 15 for recording detection results of defect positions, etc. 16 and the image output unit 17 can be observed.

  Next, the mask pattern image inspection method will be described with reference to FIG. 2 regarding the EUV mask defect inspection method of the first embodiment. The inspection image acquisition region 21 on the EUV mask M is divided into strip-like inspection stripes 22 having a width of about 200 to 500 μm. First, a predetermined inspection region is defined in the inspection stripe 22 and irradiated with EUV light. Then, by the mechanism of the EUV mask inspection apparatus EC1 described with reference to FIG. 1, the scattered light except the specular reflection light from the region to be inspected is collected and enlarged to form an image, and the dark field enlarged image is formed into a large number of pixels. The pixel signal is obtained by a two-dimensional array sensor (image detector) SE having 24. In this state, the mask stage is scanned, and the same magnified image is continuously captured in the direction indicated by the arrow 23. As the sensor, a TDI (Time Delay Integration) sensor in which the pixel direction orthogonal to the scanning direction is 1024 pixels and the number of pixels in the integration direction is 512 stages is used. This TDI sensor transfers charges one by one in the direction indicated by the arrow 25 in synchronization with the scanning of the mask stage, so that charges can be accumulated and output by the number of accumulation stages. The stripe width and the number of pixels of the sensor are not limited to the above values.

  FIG. 3A is an explanatory diagram showing the positional relationship with pixels when a mask pattern including absorber patterns ABS of various shapes and some defects (defects DEF1 to DEF5) is taken into the sensor. is there. In the figure, the dotted line 26 in the vertical direction represents the boundary line of the pixel in the charge accumulation direction (that is, the pattern scanning direction) of the TDI sensor, and the dotted line 27 in the horizontal direction represents the boundary line in the pixel direction of the TDI sensor. On the other hand, FIG. 3B is an explanatory diagram showing a design value of an ideal absorber pattern ABS having no defect and a pixel boundary line virtually overlapped therewith.

  The pattern shown in FIG. 3B is generated from pattern design data, for example. By comparing the outputs of the corresponding pixels in FIG. 3A and FIG. 3B, it can be determined that there is a defect if there is a difference. This comparison is basically performed on a pixel-by-pixel basis, but various signal processing algorithms that refer to signal intensities obtained from surrounding pixels are applied.

  As an example, defect detection when a multilayer phase defect 31 is present in the middle of adjacent absorber patterns ABS will be described with reference to FIG. FIG. 4B is a cross-sectional view taken along line AA of the plan view of FIG. The width and interval of the absorber pattern ABS are both 140 nm. The phase defect 31 has a Gaussian shape, the full width at half maximum is 60 nm, and the height is 2 nm. FIG. 4C shows a projected image light intensity distribution 32 obtained when this pattern is observed with a dark field inspection optical system. On the other hand, when the absorber pattern ABS is not present and only the phase defect 31 is present, that is, when the same phase defect 31 is present in the state of the mask blank before the absorber pattern ABS is formed, FIG. The light intensity distribution 33 of the dark field inspection image shown in FIG. Conversely, when a so-called non-defective mask in which the phase defect 31 does not exist and only the absorber pattern ABS exists, a light intensity distribution 34 shown in FIG. 4E is obtained from the dark field inspection image. Comparing these three types of signals, it can be seen that the dark field detection signal also captures the scattered light component at the edge of the absorber pattern ABS, but if a phase defect exists, an inspection signal with a high light intensity appears.

  The signal obtained by the actual two-dimensional array sensor SE is obtained as an array of pixel light intensities accumulated for each pixel, not the light intensity distributions 32, 33 and 34 of the dark field inspection image as described above. As an example, when an imaging optical system DPO having a condensing numerical aperture NA = 0.2 and a central light-shielding numerical aperture NA = 0.1 is employed, and the size of one pixel corresponding to the mask is 200 μm × 200 μm, it becomes 1. The inspection signal for one pixel with respect to high intensity illumination light is 0.033 in the case of FIG. 4C, 0.025 in the case of FIG. 4D, and 0.019 in the case of FIG. It was. Therefore, for example, if the threshold value is set to 0.022, the phase defect can be detected by capturing a signal in which a pixel including the phase defect exceeds the threshold value regardless of the presence or absence of the absorber pattern ABS.

  Next, examples of pixels recognized as defects DEF1 to DEF5 are extracted from FIG. 3A and described in comparison with pixels in the case where the defects DEF1 to DEF5 do not exist (FIG. 3B). The figure is shown in FIG. The left side of FIG. 5 is a pixel when defects DEF1 to DEF5 are not present, and the right side of FIG. 5 is a pixel when defects DEF1 to DEF5 are present. FIG. 5A shows a case where a hollow type defect DEF1 exists in the absorber pattern ABS when a part of the dense absorber line pattern group is captured by pixels larger than the line width. FIG. 5B shows a case where the protrusion type defect DEF2 exists in the contour portion of the absorber pattern ABS. FIG. 5C shows a case where only the phase defect DEF3 exists in a region where the absorber pattern ABS does not exist. FIG. 5D shows a case where a pinhole-like defect DEF4 exists in the absorber. FIG. 5E shows the case of a dot-like defect DEF5 in which the absorber material is finely adhered to the multilayer film surface.

  Similar to the example shown in FIG. 4, the dark field inspection image is calculated to obtain the pixel signal intensity, and the pixel signal intensity is compared for each defect DEF1 to DEF5 when the defect DEF1 to DEF5 is present and not present. Went. The absorber pattern line width is set to 128 nm. As a result, for the hollow defect DEF1 in FIG. 5A, the detected signal intensity was 0.008 when there was no defect, and 0.0142 when there was a defect. Further, regarding the protruding defect DEF2 of FIG. 5B, the detected signal intensity was 0.008 when there was no defect, and 0.0110 when there was a defect. For the phase defect DEF3 in FIG. 5C, the detected signal intensity was 0.002 when there was no defect, and 0.0117 when there was a defect. In addition, regarding the pinhole-shaped defect DEF4 of FIG. 5D, the detected signal intensity was 0.0 when there was no defect and 0.0013 when there was a defect. Further, regarding the dot-like defect DEF5 of FIG. 5E, the detected signal intensity was 0.002 when there was no defect and 0.0026 when there was a defect. Like these, the defect signal intensity level and the signal level difference due to the presence or absence of the defect are different depending on the type of defect, but there is a clear difference in the pixel intensity of both, so if this difference exceeds a predetermined threshold, It can be judged that there is a defect.

  Here, the pixel intensity when there is no defect can be obtained by numerical calculation of the predicted value of the pixel signal by using the design data of the absorber pattern ABS of the inspection target area to be inspected.

  FIG. 6A is an explanatory diagram showing a reference mark formed by a pattern arrangement on the EUV mask M and an absorber pattern. As described above, the central portion of the EUV mask M has the device pattern area MDE having a pattern to be transferred in the manufacturing process of the semiconductor device, and the mark for aligning the EUV mask M or wafer alignment is provided in the peripheral portion. Alignment mark areas MA1, MA2, MA3, MA4 including marks are arranged. Reference marks 41 and 44 as shown in FIG. 6B or FIG. 6C are formed at a plurality of locations in the alignment area. FIG. 6B shows a reference mark 41 made of a cross-shaped multilayer film reflection region REF and a virtually overlapped pixel boundary line (broken line) in the absorber pattern ABS. The multilayer film reflection region REF is a region where the lower multilayer film ML is exposed through the opening of the absorber pattern ABS. FIG. 6C shows a reference mark 44 made of a cross-shaped absorber pattern ABS and a pixel boundary line in the multilayer film reflection region REF.

  In either case, the thickness of the reference marks 41 and 44 is sufficiently larger than the pixel width. Therefore, for example, as shown in FIG. 6B, in the reference mark inspection image, there are a large number of pixels 42 including only the absorber pattern ABS and pixels 43 including only the multilayer film reflection region REF. When the reference marks 41 and 44 are observed in the dark field by the mask inspection apparatus used in the first embodiment, the signal intensity obtained from the pixel 42 including only the absorber pattern ABS is almost zero. On the other hand, the signal intensity obtained by the pixel 43 including only the multilayer film reflection region REF is an intensity obtained by capturing the scattered light component due to the roughness of the multilayer film surface. According to the present inventors' previous studies, it has been found that a detection signal of at least about 0.002 with respect to the illumination intensity 1 can be obtained. Therefore, it is possible to distinguish the signal intensity obtained between the pixel 43 and the pixel 42. That is, the positions of the reference marks 41 and 44 can be detected by dark field inspection using EUV light. Here, deep ultraviolet (DUV light) may be used instead of EUV light. In any case, the position of the reference mark is detected by an optical mark detection method using EUV light or DUV light.

  The flow of the defect inspection method for the EUV mask of the first embodiment using the inspection means described above is summarized as shown in FIG. In step S101 shown in FIG. 7, after the EUV mask M is placed on the mask stage 2 in the EUV mask inspection apparatus EC1 described with reference to FIG. 1, the reference marks 41 and 44 placed on the EUV mask M are displayed. The mask stage 2 is positioned by the mask stage control circuit 11 so as to be on the optical axis of the imaging optical system DPO. This position is read by a laser length measuring device 4 made of an interferometer and stored as reference coordinates on the EUV mask M.

  Subsequently, in step S102, the mask stage 2 is moved and positioned to the inspection start position (inspected area) of the first strip area when the inspection area of the EUV mask M is divided into strips. Next, the pixel light intensity as the inspection signal is continuously collected by the method described with reference to FIG. 2 while the mask stage 2 is continuously moved, and stored in the pattern memory 6 (step S103). At the same time, the number of the pixel in the inspection area is designated (step S104), and the inspection signal intensity of the designated pixel is compared with the inspection signal calculation value of the defect-free pattern calculated from the pattern data (step S105). This comparison corresponds to a comparison between the inspection signal intensity of the pattern shown in FIG. 3A and the inspection signal intensity calculated from the pattern data of FIG. More specifically, an intensity difference that is a difference in intensity between the pixel signals is taken.

  Next, in step S106, the signal intensity difference obtained in step S105 is compared with a predetermined threshold value (predetermined threshold value). When the threshold value is exceeded, it is determined that a defect exists at a position on the EUV mask M corresponding to the pixel, and the defect information, for example, the defect position as a relative position with respect to the center position of the reference mark 41 is stored in the recording device 15. Recording is performed (step S107). If the intensity difference is sufficiently larger than a predetermined threshold value, it becomes a candidate for the phase defect described in FIG. 4 above, and if it is smaller, it is interpreted as a defect of the absorber pattern ABS.

  Subsequently, it is determined whether or not the comparison process for all the pixels in the strip-shaped region has been completed (step S108). If there are remaining pixels to be compared, the pixel number is updated (step S109), and the process returns to step S105 again. Continue the comparison process.

  When the inspection in the strip-shaped area is completed, it is determined in step S110 whether or not the inspection process for all designated areas on the EUV mask M has been completed. If there remains an area to be inspected, the strip-shaped inspection area is updated in step S111, the process proceeds to step S102, and the determination process for the presence / absence of a defect is repeated. In this way, the comparative inspection is performed until the inspection of the designated inspection area on the EUV mask M is completed.

  In the first embodiment, by using the above-described defect inspection method for the EUV mask M, phase defects remaining on the multilayer ML reflective surface on the EUV mask M on which the absorber pattern ABS is formed, and the absorber A defect of the pattern ABS can be detected. Furthermore, the position of the defect can be clearly detected as a relative position with respect to the reference marks 41 and 44 formed by the absorber pattern ABS.

(Embodiment 2)
In the second embodiment, a method will be described in which two chip patterns on which the same pattern is drawn are scanned and detected by a sensor having a plurality of pixels, and the difference between the two patterns is compared and detected by an appropriate defect detection algorithm. .

  FIG. 8 is an explanatory view showing a state where two dies 51 and 52 (chip A1 and chip A2) having the same pattern are drawn on the EUV mask M. FIG. Observation is performed with a sensor having a plurality of pixels. The EUV mask M is provided with the reference marks 41 and 44 as described in the first embodiment. The mask stage 2 on which the EUV mask M is placed is continuously moved, and a plurality of dies that are continuously present in the longitudinal direction of the strip-shaped inspection region 53 are scanned through at a time to acquire an image. Thereby, a chip image can be taken in efficiently. For this purpose, the images are taken continuously and the captured images are taken into the memory, and the images stored in the memory are compared with each other after completion of taking in all the signals of the strip-shaped inspection area 53 or simultaneously with the taking-in. The comparison between the images is the same processing as the pixel-by-pixel comparison between the inspection image shown in FIG. 3A and the signal intensity calculated from the design value shown in FIG. .

  FIG. 9 is a time chart for explaining a process of inspecting and processing one strip-shaped inspection region 53 in the EUV mask defect inspection method of the second embodiment. As illustrated in FIG. 8, the EUV mask M to be inspected here includes two strips that are adjacent to each other in a plan view when viewed in the longitudinal direction (for example, the X direction) of the strip-shaped inspection region 53. Dies (referred to as the first die 51 and the second die 52, or the first chip A1 and the second chip A2) are arranged. The first die 51 (first chip A1) and the second die (second chip A2) are formed with the absorber pattern ABS having the same planar pattern shape.

  At time T1, scanning of the EUV mask M is started and the two-dimensional array sensor SE is set in a standby state. When the sensor pixel reaches the first inspection area of the first die 51 (first chip A1) at time T2, the correlation between the position of the mask stage 2 and the sensor image is stored and the first die is simultaneously stored. The inspection image data (first pixel signal) of 51 (first chip A1) is captured. Thereafter, data is taken into the pattern memory 6. At time T3, the image data capturing from the first die 51 (first chip A1) is terminated. At time T4 when the mask stage 2 continues to move and the pixel of the sensor reaches the second inspection area of the second die 52 (second chip A2), the second die 52 (second chip A2) Acquisition of inspection image data (second pixel signal) is started. At time T5, the capturing of image data from the second die 52 (second chip A2) is terminated. Between time T4 and time T5, a die-to-die comparison process using the above-described image processing is performed.

  As a method for performing die-to-die comparison, inspection image data (second pixel signal) taken from the second die 52 (second chip A2) is input to the comparison circuit 9. In parallel with this, the inspection image data (first pixel signal) is sequentially read from the pattern memory 6 from the memory address corresponding to the segment of the first die 51 (first chip A1) recorded in advance. To the comparison circuit 9. The comparison circuit 9 compares the two pixel signal data and performs defect determination. The comparison circuit 9 compares the two inspection image data (pixel signal data) according to an appropriate algorithm, and if the difference is larger than a predetermined threshold value (predetermined threshold value), the two are not matched, so that it is determined that there is a defect. If it is not immediately possible to determine whether the first die 51 (first chip A1) or the second die 52 (second chip A2) is defective, the positional information of both is used as the defect position coordinates for the reference marks 41 and 44. Record as.

  There may be three die (chip) configuration numbers in the X direction (for example, the first chip A1, the second chip A2, and the third chip A3). At this time, when the inspection image of the third chip A3 is captured, the inspection image data of the first chip A1 is read again from the pattern memory 6 and sent to the comparison circuit 9, and at the same time, the inspection image of the third chip A3 Data is sent to the comparison circuit 9 in parallel, and defect determination is performed. The same applies when the number of die configurations in the X direction is four or more. When the image of a plurality of chips in one strip-shaped inspection area 53 has been captured, the comparison determination process in the comparison circuit 9 is awaited, and the process proceeds to capturing the inspection image of the next strip-shaped inspection area. The mask inspection is completed at the stage when the processing of the predetermined all strip inspection region is completed.

  When comparing chips that are repeated in the width direction (or short direction, for example, Y direction) of the strip-shaped inspection region 53, a strip for inspection based on the start Y coordinate of each chip. The position (Y coordinate) of the inspection area 53 is adjusted to match the degree of contact of the image pixels.

  The flow of the defect inspection method for the EUV mask of the second embodiment using the inspection means described above is summarized as shown in FIG. In step S201, as described with reference to FIG. 1 above, after the EUV mask M is placed on the mask stage 2 in the EUV mask inspection apparatus EC1, the reference mark 41 on the EUV mask M is the imaging optical system DPO. The mask stage 2 is positioned by the mask stage control circuit 11 so as to be on the optical axis. This position is read by the laser length measuring device 4 made of an interferometer and stored as the origin coordinates of the pattern position on the EUV mask M.

  Subsequently, in step S202, the mask stage 2 is moved and positioned to the inspection start position of the first strip region when the inspection region of the EUV mask M is divided into strips. Next, while continuously moving the mask stage 2, the inspection images are continuously collected by the method described with reference to FIG. 2 (step S203).

  When the pixel of the sensor reaches the first inspection area of the first die 51 (first chip A1), the inspection image data (first pixel signal) of the first die 51 (first chip A1) Capture is performed (step S204). Here, the inspection image corresponding to the first die 51 (first chip A1) is taken into the pattern memory 6 together (step S205). Next, when the sensor pixel reaches the second inspection region of the second die 52 (second chip A2) by continuous continuous movement of the mask stage 2, the second die 52 (second chip A2) is reached. ) Inspection image data (second pixel signal). At the same time, these data and the inspection image data of the first die 51 (first chip A1) read from the pattern memory 6 are input to the comparison circuit 9 (step S206). The comparison circuit 6 compares the images of the two dies 51 and 52 (two chips A1 and A2) to determine whether there is a defect (step S207). An image comparison method will be described later together with a method for recording detected defect positions.

  Next, it is determined whether or not there are three or more dies (chips) in one strip inspection area (step S208). If there are any, the same comparison is made for the third and subsequent dies (chips). Processing and determination of the presence / absence of a defect are continued (step S209). When all the processes on one strip inspection area are completed, it is determined whether the defect inspection of the predetermined area on the mask is completed (step S210). If not completed, the next strip inspection area is designated (step S211), the EUV mask M is positioned to start the next inspection by the new positioning of the mask stage 2, and the process returns to step S202 to repeat the comparative inspection. When the processing on all the strip-shaped inspection areas in the predetermined area on the EUV mask M is completed, the defect inspection is terminated.

  Here, the image comparison method performed in step S207 and the detected defect position recording method described with reference to FIG. 10 will be described with reference to the flowchart of FIG. In the comparison circuit 6, the corresponding pixels of the inspection images of the first die 51 (first chip A1) and the second die 52 (second chip A2) are compared. More specifically, first, in step S221, the pixel number of the first pixel to be compared is designated.

  Next, the inspection signal intensity difference between the corresponding pixels is compared. Prior to that, the first die 51 (first chip A1) and the second die 52 are used to determine the presence or absence of a phase defect in step S222. It is determined whether each pixel signal intensity with (second chip A2) exceeds the first threshold value. The first threshold value is a pixel signal intensity threshold value set to determine the presence or absence of a phase defect as described with reference to FIG. If both pixel signals exceed the first threshold value, the position is calculated from the pixel number on the assumption that both have a phase defect, and is recorded as relative coordinates with respect to the reference marks 41 and 44 (step). S223). Even when only one of them exceeds, it is recorded as a phase defect candidate position, and this is also recorded as a defect position candidate for other pixels. However, in this case, there is a possibility that there is no defect, but at least in a comparative inspection between dies (chips), it is recorded as a defect position candidate.

  If any die (chip) is less than the first threshold value in step S222, the difference between the pixel intensity of the first die area and the pixel intensity of the second die area is calculated in the next step S224. Then, it is determined whether or not the difference exceeds a predetermined second threshold value. If it exceeds, the intensity of both pixels will be different, so the position corresponding to any pixel is recorded in the recording device 15 as relative defect coordinates with respect to the reference marks 41 and 44 as defect candidates. Which die (chip) has a defect is confirmed by another method, and a defect position candidate to be confirmed is recorded in the comparative inspection between the dies (chips) (step S225).

  It is determined whether or not the pixel intensities of all the given strip-shaped areas have been compared (step S226). If pixels still remain, the pixel number is updated (step S227), and the process proceeds to step S222. When the comparison process is completed for all the pixels, the process of step S207 shown in FIG. 10 is completed.

  As described above, according to the defect inspection method for the EUV mask M according to the second embodiment, the EUV light is used for the pattern defect inspection of the EUVL mask M having a plurality of dies (chips) on which the same pattern is repeatedly drawn. The position where the phase defect remaining in the multilayer film ML and the defect of the absorber pattern ABS exist can be detected by the die-to-die comparison by the dark field inspection using the inspection light as the inspection light. In particular, defect existence candidate positions can be specified without calculating an inspection reference image from pattern design data, and these defect positions are detected as relative positions with respect to a reference mark formed by the absorber pattern ABS on the EUV mask M. can do. As a result, the step of calculating the inspection reference image from the pattern design data can be omitted, and a faster and more accurate defect inspection method for the EUV mask M can be realized.

(Embodiment 3)
The third embodiment includes the same steps as the EUV mask defect inspection method described in the first or second embodiment, and it is determined that the detected phase defect affects the transfer of the absorber pattern ABS. Next, a method of manufacturing an EUV mask that can reduce or eliminate the influence of the phase defect by correcting the shape of the absorber pattern in the vicinity of the phase defect will be described.

  FIG. 12A is an explanatory diagram illustrating an example in which the detected phase defect 61 exists in the middle of the adjacent absorber pattern ABS. The presence of the phase defect 61 is detected by the dark field inspection function of the inspection apparatus described with reference to FIG. 1 of the first embodiment, and the position of the phase defect 61 is determined with respect to the reference marks 41 and 44 configured by the absorber pattern. Stored as coordinates. Therefore, for example, the position and shape of the absorber pattern ABS close to the phase defect 61 can be grasped by referring to the pattern graphic information stored in the various data files 13 shown in FIG.

  When the EUV mask M as shown in FIG. 12A is used as it is and the mask pattern is transferred onto the wafer, the images of the two absorber patterns ABS approach each other at the center, and the line width accuracy deteriorates. This is because the reflectance of the phase defect portion decreases and the projected image light intensity on the wafer surface becomes lower than the original value.

  Therefore, in order to prevent the reduction of the projected image light intensity, a so-called absorber pattern correction process such as removing a part of the absorber pattern ABS around the phase defect is introduced. That is, as shown in FIG. 12B, a part of the absorber pattern ABS represented by the main part 62 and the main part 63 is removed from the absorber pattern ABS. This removal employs a general pattern correction method that takes in coordinates to be removed in the absorber pattern ABS and uses a focused ion beam (FIB). As a result, it is possible to manufacture an EUV mask M that suppresses or avoids a reduction in the intensity of the projection image light generated at the phase defect portion and provides a pattern projection image with a sufficiently small dimensional error. Such correction of the absorber pattern ABS in the EUV mask M can be applied to a case where a defect exists in the contour of the absorber pattern ABS in addition to the reduction of the transfer effect of the phase defect as described above.

  In the EUV mask manufacturing method examined in advance by the present inventors, phase defect inspection is performed at the stage of the mask blank before the absorber pattern is formed. Therefore, when the presence of a phase defect is detected, the mask blank is treated as a defective product. Even if there is a phase defect at the position covered by the absorber due to the subsequent formation of the absorber pattern, when the absorber pattern is drawn, the position information of the phase defect detected in advance is used as the drawing position. It was difficult to reflect. On the other hand, in the manufacturing method of the EUV mask M of the third embodiment, if the phase defect present on the mask blank is not extremely large, it is sent to the absorber pattern ABS forming process, and then the absorber pattern ABS and By determining the relative position with respect to the remaining phase defect and correcting the shape of the absorber pattern ABS, the influence of the phase defect on the transfer can be avoided.

  Moreover, in the manufacturing method of the EUV mask of this Embodiment 3, it is possible to select the case where it is not necessary to correct the phase defect by performing the phase defect inspection as described above after forming the absorber pattern ABS. it can. More specific description will be given below.

  FIG. 13A shows an explanatory diagram when the phase defect 72 remains under the absorber in the EUV mask M including the absorber pattern ABS having a large number of hole patterns 71. Such a phase defect 72 cannot be detected by the inspections of the first and second embodiments. However, since the phase defect 72 buried in the absorber pattern ABS does not affect the transfer pattern in this way, it does not need to be detected or corrected. That is, it is rather preferable that such a phase defect 72 is not detected in the defect inspection methods of the first and second embodiments. Also in the manufacturing method of the EUV mask of the third embodiment, the phase defect 72 covered with the absorber pattern ABS is not subjected to the correction process as described in FIG. Can perform the manufacturing process.

  FIG. 13B shows a case where the phase defect 73 exists at a position away from the absorber pattern ABS. According to the defect inspection methods of the first and second embodiments, the phase defect 73 is naturally detected. On the other hand, according to the defect inspection methods of the first and second embodiments, since the position of the defect can be specified, it can be determined that the phase defect 73 exists at a position sufficiently away from the absorber pattern ABS. it can. Accordingly, if the phase defect 73 is not transferred alone, it can be determined that there is no need for correction even if it exists.

  The flow of the manufacturing method of the EUV mask of the third embodiment using the inspection means described above is summarized as shown in FIG. First, a cleaned mask substrate is prepared (step S301), and then a Mo, Si multilayer film and a capping layer that reflect EUV light are formed, and a multilayer mask blank is produced (step S302). A conventional inspection of the mask blank is performed as necessary to confirm that there are no obvious defects.

  Subsequently, in step S303, the buffer layer and the absorber material (absorber film) are deposited. Thereafter, the absorber film or the like is patterned (processed) by a common photolithography method or etching method to form an absorber pattern. Thereafter, a pattern defect inspection applied to a conventional optical lithography mask may be performed. In that case, defect inspection of a conventional absorber pattern using inspection light such as deep ultra violet (DUV light) is performed, and an absorber such as a contour abnormality, a pinhole or an absorber remaining in the absorber pattern If a pattern defect is found, defect information is stored. The steps up to here are the same as the conventional manufacturing method of the EUVL mask examined by the present inventors in advance.

  Next, the EUV mask is inspected by the method described in the first and second embodiments. That is, in step S304, the EUV mask M is placed on the EUV mask inspection apparatus EC1 described in FIG. 1 to detect the position of the reference mark constituted by the absorber pattern. Subsequently, in step S305, the EUV mask M is detected. The entire pattern formation area is inspected by the dark field inspection method. When a defect is detected, the position is recorded as a relative position with respect to the reference marks 41 and 44 constituted by the absorber pattern ABS. After the inspection of the entire EUV mask M is completed, it is determined whether or not a phase defect has been detected and its position has been recorded, that is, whether or not there is a defect (step S306). Here, the determination of the presence / absence of a defect includes not only the phase defect but also the determination of the presence / absence of a defect in the absorber pattern ABS itself.

  If no defect is detected, a good mask is assumed. If a phase defect is detected, it is determined whether it affects the transfer image of the device pattern composed of the adjacent absorber pattern ABS (step S307). If this defect is not a defect that affects the transfer pattern, for example, as described with reference to FIG. If it is determined that a phase defect is detected and affects the transfer image of the device pattern composed of the adjacent absorber pattern ABS, in step S308, this is the effect of the phase defect due to the contour correction of the absorber pattern ABS. It is determined whether or not it can be avoided. When it is determined that the influence of the phase defect can be corrected by correcting the contour of the absorber pattern ABS, the absorber pattern ABS is corrected as shown in FIG. 12B (step S309), and finally the non-defective product is obtained. It can be a mask. Only when it is determined that the influence of the phase defect cannot be avoided by the contour correction of the absorber pattern ABS, the EUV mask M to be inspected is treated as a defective product. Also, when a defect of the absorber pattern ABS itself is detected, correction is also performed in step S309.

  Here, whether or not the influence of the remaining phase defect on the pattern transfer can be avoided by correcting the contour of the absorber pattern ABS is determined based on the result of the optical projection image light intensity simulation. Here, in the manufacturing method of the EUV mask according to the third embodiment, the relative positional relationship between the defect and the absorber pattern can be specified by adopting the defect inspection method as in the first and second embodiments. The above determination is possible.

  In the third embodiment, the absorber pattern defect inspection similar to the method applied to the conventional photolithography mask may be performed after the absorber pattern ABS is formed, and then the phase defect inspection is performed. As shown, after the absorber pattern ABS is formed, dark field defect inspection using EUV light may be performed before the defect inspection process of the absorber pattern ABS, which is the prior art.

  As described above, according to the manufacturing method of the EUV mask M of the third embodiment, the occurrence of defects in the pattern projection image due to the phase defects remaining in the multilayer film of the EUV mask M on which the absorber pattern ABS is formed, This can be avoided by correcting the absorber pattern ABS. In addition, it is possible to determine whether or not the detected phase defect needs to be corrected. As a result, even if a phase defect remains in the completed EUV mask M, the frequency with which it can be used as a non-defective product is increased, and the yield of the mask can be greatly improved. As a result, a highly reliable EUV mask can be manufactured. Moreover, it can contribute to the cost reduction of the EUV mask to manufacture.

(Embodiment 4)
The fourth embodiment shows an example in which the EUV mask defect inspection process described in the first and second embodiments is applied to the inspection of pinhole defects in the absorber film in the mask blank.

  FIG. 15A is a plan view showing the mask blank MB in a state where the buffer layer BUF and the absorber film AB1 are sequentially deposited on the multilayer film ML and the capping layer CAP. FIG.15 (b) is sectional drawing seen along the BB line of Fig.15 (a). Here, the absorber film AB1 is a film before being patterned into an absorber pattern ABS by patterning by a later photolithography method or the like. Thus, at the stage where the absorber film AB1 is deposited on the buffer layer BUF, the absorber film AB1 may not normally cover the buffer layer BUF, and a pinhole defect 74 may occur.

  When this mask blank MB is inspected by the EUV mask inspection apparatus EC1 described with reference to FIG. 1, the inspection signal taken in almost all the pixels of the two-dimensional sensor SE is a dark field inspection image on the surface of the absorber film AB1, Its strength is almost zero. However, the pixel including the pinhole defect 74 collects a slight reflected light from the pinhole defect 74 and a diffracted light component from the edge of the pinhole and has a pixel intensity greater than zero. This corresponds to the pixel intensity including the defect DEF4 shown in FIG. Therefore, the pinhole defect 74 can be detected with a relatively high signal contrast in the dark field inspection.

  As described above, according to the defect inspection method for the EUV mask of the fourth embodiment, the pinhole defect 74 that may be generated when the absorber film AB1 is deposited on the multilayer film ML has a relatively large pixel size. Can be detected. In addition, if the pinhole defect 74 is detected in the state of the mask blank MB with the absorber film AB1 deposited, if it is determined that it is a fatal size, it is sent to the subsequent EUV mask manufacturing process. Therefore, it is possible to prevent the EUV mask manufacturing yield from being lowered.

(Embodiment 5)
In the fifth embodiment, a manufacturing method of a semiconductor device using the EUV mask M manufactured by the manufacturing method of the third embodiment will be described. The mask manufactured by the EUV mask manufacturing method of the third embodiment is placed on the above-described reflective exposure apparatus (see FIG. 24 above), and performs pattern transfer. EUVL is employed in a process that requires fine pattern transfer in a semiconductor device manufacturing process.

  16A to 16F are cross-sectional views for explaining the method for manufacturing the semiconductor device of the fifth embodiment. Here, a case of manufacturing a semiconductor integrated circuit having a twin well type CMIS (Complimentary MIS) circuit is illustrated, but the present manufacturing method can be applied to other various types of circuits.

  A silicon substrate (semiconductor substrate) 101 s constituting the semiconductor wafer 101 is made of, for example, a substantially disc-shaped n-type Si (silicon) single crystal. For example, an n well 102n and a p well 102p are formed on the silicon substrate 101s. For example, an n-type impurity P (phosphorus) or As (arsenic) is introduced into the n-well 102n. Further, for example, p-type impurity B (boron) is introduced into the p-well 102p. The n well 102n and the p well 102p are formed as follows.

  First, a wafer alignment mark for mask alignment is formed on the silicon substrate 101s (not shown). This wafer alignment mark can be formed at the time of well formation by adding a selective oxidation step. Subsequently, as shown in FIG. 16A, an oxide film 103 is formed on the silicon substrate 101s, and an implantation (abbreviation of ion implantation, also referred to as ion implantation) mask is formed on the oxide film 103. The resist pattern 104 is formed using ordinary photolithography. Thereafter, P (phosphorus) or As is ion-implanted to form an n-well 102n. Thereafter, an ashing process is performed to remove the resist pattern 104, and the oxide film 103 is removed.

  Next, as shown in FIG. 16B, an oxide film 105 is formed on the silicon substrate 101s. Then, a resist pattern 106 for an implantation mask is formed on the oxide film 105 by using normal photolithography. Thereafter, B (boron) is ion-implanted to form a p-well 102p. Thereafter, an ashing process is performed to remove the resist pattern 106, and the oxide film 105 is removed.

  Next, as shown in FIG. 16C, a separation part 107 made of, for example, a silicon oxide film is formed in the shape of groove type isolation on the upper main surface of the silicon substrate 101s. For this isolation shape, for example, the minimum dimension is as small as about 36 nm on the wafer, and the dimensional accuracy is required to be as severe as about 3.5 nm. As a lithography method at the time of processing with such a fine dimension, it is preferable to apply EUV lithography technology.

  In the active region surrounded by the isolation portion 107, an nMIS transistor Qn and a pMIS transistor Qp are formed. The gate insulating film 108 of each transistor is made of, for example, a silicon oxide film and is formed by a thermal oxidation method or the like. Further, the gate electrode 109 of each transistor is required to have a strict value such as a minimum dimension as small as about 32 nm on the wafer and a dimensional accuracy of about 3 nm. Therefore, for example, after depositing a gate forming film made of low-resistance polysilicon using a chemical vapor deposition (CVD) method or the like, a patterned photoresist is formed using EUV lithography (first lithography). Then, the gate electrode 109 is formed by an etching process. Lithography in this process is generally referred to as gate layer lithography, and requires extremely fine pattern transfer with high dimensional accuracy.

  The semiconductor region 110 of the nMIS transistor Qn is formed in a self-aligned manner with respect to the gate electrode 109 by introducing, for example, P or As into the silicon substrate 101s using the gate electrode 109 as a mask, by ion implantation or the like. In addition, the semiconductor region 111 of the pMIS transistor Qp is formed in a self-aligned manner with respect to the gate electrode 109 by introducing, for example, B (boron) into the substrate 101s using the gate electrode 109 as a mask to the substrate 101s. The

  Here, the gate electrode 109 is not limited to being formed of a single film of low-resistance polysilicon, and can be variously changed. For example, the gate electrode 109 may have a so-called polycide structure in which a silicide layer such as tungsten silicide or cobalt silicide is provided on a low-resistance polysilicon film. Alternatively, the gate electrode 109 may have a so-called polymetal structure in which a barrier conductor film such as titanium nitride or tungsten nitride is interposed on a low resistance polysilicon film and a metal film such as tungsten is further provided.

  Next, as shown in FIG. 16D, an interlayer insulating film 112 made of a silicon oxide film is deposited on the silicon substrate 101s by using, for example, a CVD method. Thereafter, a polysilicon film for wiring is deposited on the upper surface of the interlayer insulating film 112 by a CVD method or the like. Subsequently, the polysilicon film is patterned by a photolithography method, an etching method, or the like, and then impurities are introduced into a predetermined region of the patterned polysilicon film to thereby form the wiring 113L made of the polysilicon film and the resistance. 113R is formed.

  Next, as shown in FIG. 16E, a silicon oxide film 114 is deposited on the silicon substrate 101s by using, for example, a CVD method or the like. Then, a photoresist film (not shown) is formed on the interlayer insulating film 112 and the silicon oxide film 114 using EUV lithography (second lithography), and a part of the semiconductor regions 110 and 111 and the wiring 113L is etched. A connection hole (also referred to as a contact hole) 115 is formed so that is exposed. Since fine holes are difficult to resolve due to the influence of light diffraction, it is preferable to apply EUV lithography technology having high resolution to the lithography for connection holes.

  Next, as shown in FIG. 16F, a metal film made of titanium (Ti), titanium nitride (TiN), tungsten (W), or the like on the silicon substrate 101s by using, for example, a sputtering method or a CVD method. Are sequentially deposited. Thereafter, a photoresist film patterned by EUV lithography (third lithography) is formed on the metal film (not shown), and the first wiring layer 116 is formed by an etching process. The first wiring layer 116 includes a fine dense pattern and an isolated pattern, and has a complicated layout shape because the wiring is routed around the neighboring wiring and the wiring is connected. For this reason, high resolution and dimensional accuracy are also required in photolithography of the first wiring layer 116.

  Thereafter, the final product can be manufactured by forming the second wiring layer (not shown) and the like in the same manner as the first wiring layer 116. In the above-described series of semiconductor device manufacturing processes, the gate layer lithography shown in FIG. 16C, the connection hole lithography shown in FIG. 16E, or the first wiring layer shown in FIG. Lithography requires sufficiently high resolution performance.

  The EUV mask described with reference to the first to fourth embodiments is used for patterning the photoresist mask in the gate layer lithography in FIG. 16C and the first wiring layer lithography in FIG. It is preferable to use an EUV mask whose defect-free state has been confirmed using the defect inspection method and the EUV mask manufacturing method. Further, even when a fine defect is detected, when an EUV mask is manufactured, if there is no absorber pattern near the defect and the defect alone is not substantially transferred onto the wafer, the defect There is a possibility that the same handling can be performed. Thus, by using the manufacturing method of the semiconductor device of the fifth embodiment, it is possible to process a fine pattern with a high yield. As a result, a more reliable semiconductor device can be manufactured.

  In the connection hole lithography shown in FIG. 16 (e), the EUV mask defect inspection method and the EUV mask manufacturing method described with reference to the first to fourth embodiments are used in the vicinity of the connection hole formation planned region. It is more preferable to use an EUV mask that has been confirmed to be free of defects. As described above, since the area of the connection hole is small and the pattern density is about 5%, the ratio of occurrence of defects near the connection hole is small, and the yield of the mask that can be used by this method is high. Therefore, the yield of the semiconductor integrated circuit manufactured according to the present embodiment is higher than that manufactured by performing conventional mask defect inspection.

  As described above, by employing the semiconductor device manufacturing method of the fifth embodiment, the mask blank is inspected using the EUV mask inspection apparatus and the defect inspection method described in the first, second, or fourth embodiment. In addition, the EUV mask manufactured by the manufacturing method described with reference to Embodiment 3 can be used, and pattern transfer using a highly reliable EUV mask can be performed. Therefore, it is possible to improve the performance, reliability, and yield of the semiconductor device manufactured by the semiconductor device manufacturing method of the fifth embodiment. And it can also contribute to the cost reduction of a semiconductor device.

(Embodiment 6)
FIG. 17 is an explanatory diagram showing an EUV mask inspection apparatus EC2 according to the sixth embodiment. The EUV mask inspection apparatus EC2 includes a light source (EUV light source) 1 that generates EUV inspection light (EUV light) BM, a mask stage 2 on which a reflective mask blank or EUV mask M is placed, an illumination optical system CIO, and an image. Optical system DPO, two-dimensional array sensor (image detector) SE, sensor circuit 5, pattern memory 6, threshold setting circuit 8, threshold comparison circuit 9, timing control circuit 10, mask stage control circuit 11, and the entire apparatus A system control computer 18 for controlling the operation of the system.

  The imaging optical system DPO includes a concave mirror L1 and a convex mirror L2, and is, for example, a Schwarzschild optical system with a converging numerical aperture NA = 0.2, a central light-shielding numerical aperture NA = 0.1, and a magnification of 20 times. The EUV mask M to be inspected for the presence of phase defects and pattern defects is placed on the mask stage 2. The EUV inspection light BM having a central wavelength of 13.5 nm emitted from the light source 1 is converted into a focused beam through the illumination optical system CIO, and then bent by the multilayer mirror PM to irradiate a predetermined region of the multilayer mask M. Of the reflected light from the multilayer mask M, the light scattered at the defect portion forms a focused beam SLI via the imaging optical system DPO and is condensed on the two-dimensional array sensor SE. That is, a dark field inspection image of the EUV mask M is formed on the two-dimensional array sensor SE, and as a result, the phase defect remaining on the EUV mask M is detected as a bright spot in the inspection image.

  Here, light scattered at the edge of the absorber pattern is also captured, and only a signal smaller than the bright point of the phase defect can be obtained. However, if a defect exists in the absorber pattern, the intensity of the detection signal changes. Here, the EUV mask M is formed on a mask substrate formed of a low thermal expansion material such as quartz glass so that a sufficient reflectance can be obtained with respect to exposure light having a wavelength (for example, 13.5 nm). A multilayer film in which silicon) and Mo (molybdenum) are alternately laminated is formed. A reflective exposure mask is formed by forming an absorber pattern having a desired pattern shape on the multilayer film.

  The position of the EUV mask M is obtained as position information of the mask stage 2 by reading the position of the length measuring mirror 3 fixed to the mask stage 2 with the laser length measuring device 4. This information is sent to the position circuit 12 and can be recognized by the system control computer 18. In addition, an optical microscope ALO that can grasp the pattern position by optically observing the pattern formed on the EUV mask M or the contour position of the EUV mask M is provided. Further, a part of the EUV inspection light BM is branched by the beam splitter BSP, the light amount is monitored by the sensor 7, and a threshold for signal processing can be set by the threshold setting circuit 8. Further, there are provided various data files 13 for storing various data related to the mask pattern, threshold data files 14 for storing threshold data, and a recording device 15 for recording detection results of defect positions, etc. 16 and the image output unit 17 can be observed. The above configuration is substantially the same as the configuration of the EUV mask inspection apparatus EC1 described with reference to FIG. 1 in the first embodiment. Regarding the configuration not specifically mentioned above, it is assumed that the EUV mask inspection apparatus EC2 of the sixth embodiment has the same configuration as the EUV mask inspection apparatus EC1 of the first embodiment. Omitted.

  The EUV mask inspection apparatus EC2 of the sixth embodiment further includes a fine movement drive unit 1001 and a drive control circuit 1002 that finely move the position of the two-dimensional array sensor SE in the two-dimensional direction (X and Y directions intersecting each other). It is provided. The fine movement driving unit 1001 can move the two-dimensional array sensor SE by a distance smaller than the pixel size of the detector of the two-dimensional array sensor SE, that is, the pixel size (pixel size). For example, when a 2D array sensor SE has a pixel size of 10 μm and an imaging optical system DPO with a magnification of 20 times, the pixel size is 500 nm in terms of on-mask conversion, so the mask is moved by a distance smaller than 500 nm. It corresponds to that. For example, a piezoelectric element is used as a drive source of such fine movement drive unit 1001.

  Hereinafter, an EUV mask defect inspection method using the EUV mask inspection apparatus EC2 will be described. As a first step, the entire mask inspection is performed in the same procedure as the defect inspection method of the second embodiment.

  In this inspection, the presence / absence of a defect is determined, and the defect position is specified with substantially the same position accuracy as the inspection pixel size of the image detector. The pixel size of the image detector used here is 10 μm on the actual detector, and a Schwarzschild optical system with a magnification of 20 times is used. Therefore, on the mask conversion, the pixel size is 500 nm. The error is large to use for correction. In EUVL, a typical transfer dimension is 32 nm. This is 128 nm on a commonly used tetraploid mask.

  According to the inventors' prior examination from this point of view, there are two reasons why the inspection pixels converted on the mask are made fine. One problem is that the smaller the pixel, the longer the inspection time. For example, when the pixel size is set to 50 nm, which is 1/10 of the current state, the inspection time is almost inversely proportional to the pixel area, and therefore it takes 100 times as long. The current inspection time is 2 to 10 hours on the entire mask surface, and 200 to 1000 hours, which is 100 times that, is not practical. Another problem is the problem of detector blur. A CCD (Charge Coupled Device) is used as an image detector. In this device, incident EUV light interacts with atoms in the Si layer to emit secondary electrons, and the EUV light reacts to the electrons. Is detected. In the wavelength band of EUV light, secondary electrons are emitted from the relatively surface layer of the Si layer, so that these electrons diffuse widely. Therefore, the diffusion area ranges from several to several tens of microns. Even if the pixel size of the pixel is reduced, the surrounding pixels within several to several tens of microns on the detector are sensitive. It becomes difficult to make it.

  Therefore, in the defect inspection method for the EUV mask according to the sixth embodiment, as a second step, the defect detected in the first step is acquired by finely moving the relative position of the EUV mask M and the detector. Identify the exact position and shape.

  First, the mask stage 2 is moved to a place where a defect is observed (first inspection region or second inspection region), and the two-dimensional array sensor SE is moved to a desired direction (first direction) using the fine movement driving unit 1001. The EUV image signal is collected.

  FIG. 18 shows an example of a die-to-die comparison sequence in the defect inspection method for the EUV mask according to the sixth embodiment. Here, as in the second embodiment, the first chip A1 (first die) and the second chip A2 (second die) are arranged on the same EUV mask M, and the die-die Chips to be compared. A case where a subscript is added to this code to finely move it in a desired direction is shown. More specifically, the first position A11 indicates the first position (first inspected area) in the first chip A1, and the second position A12, the third position are sequentially described thereafter. The case where the position A13, the fourth position A14,..., The nth position A1n, etc. are finely moved is shown. Similarly, the first position A21 indicates the first position (second inspection region) in the second chip A2, and the second position A22, the third position A23, The case where the fourth position A24,..., The nth position A2n, etc. are finely moved is shown.

  As the flow of the time axis, data at the first position (first position A11) of the first chip A1 is fetched and stored in the memory. Subsequently, the relative position of the first chip A1 with respect to the two-dimensional array sensor SE is slightly moved by a first distance in a desired direction (first direction), and data at the second position A12 is captured and stored in the memory. . Here, by moving the two-dimensional array sensor SE, the relative position of the first chip A1 with respect to the two-dimensional array sensor SE is slightly moved so as to be shifted by the first distance. This procedure is continued until a predetermined nth position A1n, and data (first auxiliary pixel signal) at each position in the first inspection area of the first chip A1 is fetched and stored in the memory.

  Thereafter, the mask stage 2 is moved to the location of the second chip A2, and the data at the first position (first position A21) of the second chip A2 is captured and stored in the memory. Subsequently, the relative position of the second chip A2 with respect to the two-dimensional array sensor SE is finely moved, and the data at the second position A22 is captured and stored in the memory. Here, by moving the two-dimensional array sensor SE, the relative position of the second chip A2 with respect to the two-dimensional array sensor SE is slightly moved so as to be shifted by the first distance. The direction (first direction) and the amount (first distance) of fine movement at this time are the same as the direction and amount finely moved from the first position A11 to the second position A12 in the first chip A1. This procedure is continued until a predetermined nth position A2n, and data (second auxiliary pixel signal) at each position in the second inspection area of the second chip A2 is fetched and stored in the memory.

  Here, as described above, the two-dimensional array sensor SE is moved by the fine movement driving unit 1001 by a distance smaller than the pixel size of the detector of the two-dimensional array sensor SE, that is, the pixel size (pixel size). Can be moved. Therefore, the first distance can also be set as a distance smaller than the pixel size of the two-dimensional array sensor SE.

  Next, each data of the first chip A1 and the second chip A2 is read from the memory, and die-to-die comparison is performed. Here, in particular, the difference in signal intensity at the corresponding position between the first chip A1 and the second chip A2 is taken as data D1, D2, D3,..., Dn. More specifically, the intensity of the signal (first auxiliary pixel signal) at the first position A11 of the first chip A1 and the signal at the first position A21 of the second chip A2 (second The intensity of the auxiliary pixel signal) is read from the memory, and the auxiliary intensity difference which is the difference between these intensities is taken as data D1. At this stage, the influence of the mask absorber pattern of the detection signal is removed, and the situation is as if there is only a phase defect on the multilayer film. Subsequently, the signal intensity at the second position A12 of the first chip A1 and the signal intensity at the second position A22 of the second chip A2 are read from the memory, and the difference is taken as data D2. .

  This procedure is continued and calculation is performed up to the data Dn obtained by comparing the signal intensities at the nth positions A1n and A2n, and the data is stored. Thereafter, the data D1 to data Dn, which are auxiliary intensity differences at each position, are analyzed to identify the defect position. In this way, it can be attributed to the example of FIG. 25 showing the case where there is a defect on the multilayer film.

  An example of another die-to-die comparison sequence in the defect inspection method for the EUV mask of the sixth embodiment is shown in FIG. As the flow of the time axis, data at the first position (first position A11) of the first chip A1 is fetched and stored in the memory. The first chip A1 is finely moved in the first direction by the first distance, and the data at the second position A12 is captured and stored in the memory. Here, by moving the two-dimensional array sensor SE, the relative position of the first chip A1 with respect to the two-dimensional array sensor SE is slightly moved so as to be shifted by the first distance. This procedure is continued until a predetermined nth position A1n, and data (first auxiliary pixel signal) at each position is captured and stored in the memory.

  Thereafter, the mask stage 2 is moved to the location of the second chip A2, and data at the first position (first position A21) of the second chip A2 is captured. Here, at the same time, the data at the first position A11 of the first chip A1 is read from the memory, the difference between the signal intensities is taken, and the data D1 is stored in the memory. Thereafter, the second chip A2 is finely moved in the first direction by the first distance, and the data (second auxiliary pixel signal) at the second position A22 is captured. The direction and amount of fine movement at this time are the same as the direction (first direction) and amount of fine movement from the first position A11 to the second position A12 in the first chip A1. Here, by moving the two-dimensional array sensor SE, the relative position of the second chip A2 with respect to the two-dimensional array sensor SE is slightly moved so as to be shifted by the first distance. Similarly to the above, at this time, the data (first auxiliary pixel signal) at the second position A12 of the first chip A1 is read from the memory, and an auxiliary intensity difference which is a difference between these signal intensities is taken. And stored in the memory as data D2. This procedure is continued until a predetermined nth position A2n, and data Dn is stored in the memory. Thereafter, the data D1 to Dn as the auxiliary intensity difference at each position are analyzed to identify the defect position.

  Here, as described above, the two-dimensional array sensor SE is moved by the fine movement driving unit 1001 by a distance smaller than the pixel size of the detector of the two-dimensional array sensor SE, that is, the pixel size (pixel size). Can be moved. Therefore, the first distance can also be set as a distance smaller than the pixel size of the two-dimensional array sensor SE.

  As described above, according to the method described with reference to FIG. 19, the memory consumption is small and the processing time can be shortened as compared with the method described with reference to FIG. On the other hand, according to the method described with reference to FIG. 18, the difference image calculation of each data (for example, data D1) is performed at each position (for example, the first position A11) as compared with the method described with reference to FIG. ) And the like can be set regardless of the data acquisition time, and the setting freedom of the central processing unit can be increased.

  The data collection process will be described in detail with reference to the explanatory diagram of FIG. Here, in order to make the explanation easy to understand, a case where one phase defect 1101 exists on the EUV mask M is shown. Further, the influence of the absorber when there is a mask absorber pattern in the periphery is eliminated by die-to-die comparison with a chip on which the same pattern is arranged.

  FIG. 20 shows a pixel 1102 of the two-dimensional array sensor SE, that is, a pixel array matrix. 20A, 20B, and 20C show a case where the two-dimensional array sensor SE is slightly moved relative to the mask stage 2 in the X direction (lateral direction) with the initial position as a base point. 20 (a), (d), and (e) show cases where the two-dimensional array sensor SE is finely moved relative to the mask stage 2 in the Y direction (vertical direction). This fine movement may be step feed or scan. The fine movement mechanism was piezo drive. Here, in consideration of the throughput of the EUV mask M whole surface scanning, the size of the pixel 1102 of the two-dimensional array sensor SE is 10 μm on the sensor. According to our verification, the size of the phase defect 1101 is usually much smaller. For example, when the present inventors conducted a destructive inspection of the mask blank, a typical phase defect has a height from the surface of the multilayer film of about 1.5 nm and a width of about 40 nm.

  According to the defect inspection method of the sixth embodiment, accurate position information of the phase defect 1101 can be obtained by finely moving the two-dimensional array sensor SE and taking a signal at each sensor pixel (pixel). That is, in FIG. 20A, a strong signal is obtained at the center pixel, and in FIG. 20B, the signal intensity at the center pixel is slightly attenuated, and the signal of the pixel on the left side of the middle row is strengthened. In c), the signal intensity at the center pixel is greatly attenuated, and the signal of the pixel on the left side of the middle row is increased. In this way, an accurate defect position can be identified from the movement distance and signal intensity of each pixel compared to the pixel size.

  A graph of a defect image signal captured by the two-dimensional array sensor SE is shown in FIG. FIG. 21A shows an EUV light intensity distribution (image) 1201 on the two-dimensional array sensor SE in a stationary state. This is a dark field image, and an image that is larger than the size of the defect itself due to the addition of aberration of the imaging optical system. FIG. 21B shows what is received as a signal 1202 by the two-dimensional array sensor SE. The signal 1202 is discrete in units of pixels (pixels) of the two-dimensional array sensor SE, and the signal 1202 is observed over several pixels due to the addition of blur at the sensor. The blur in the two-dimensional array sensor SE means that secondary electrons are emitted in various directions when EUV light incident on the sensor hits the sensor substance and emits secondary electrons. In other words, since such secondary electrons diffuse in the material, this phenomenon is a so-called bleed. For this reason, the position of the defect remains in the range of several tens of μm on the two-dimensional array sensor SE. Since the magnification of the imaging optical system is 20, the position specifying accuracy is about 1 μm even when expressed on the mask at the stage of mask blank entire surface inspection.

  On the other hand, when the signal analysis is performed by finely moving the two-dimensional array sensor SE as in the defect inspection method according to the sixth embodiment, an envelope obtained by integrating the signal waveform at each fine movement position is obtained and used as necessary. When the smoothing process is performed, a position where an EUV light intensity distribution 1203 capable of accurately grasping the center position can be obtained as shown in FIG. According to the verifications by the present inventors, the defect inspection method according to the sixth embodiment was able to specify the defect position with a fineness 50 times or more compared with the case of only full scan. That is, the position of the defect could be specified on the mask blank with an accuracy of several tens of nm. In particular, the position specifying accuracy in the case of the 40 nm defect is about 30 nm, which is sufficient accuracy for repairing the defect as a mask.

  In addition, it is possible to measure the planar shape of the defect by performing fine movement in both the X and Y directions and acquiring signals by the method as in the sixth embodiment. The planar shape of the defect is useful for performing defect relief. As an example, FIG. 22 shows an explanatory diagram for explaining a planar shape of a typical defect obtained as a result of measurement. A defect shape such as a circular defect 1301, an elliptical defect 1302, or a defect 1303 close to a linear shape can be detected by specifying the position. Further, for example, in the case of an elliptical defect 1302, in addition to the center position, the orientation of the major axis and the minor axis can be grasped, and important data for defect repair can be obtained. The center of gravity can also be obtained from the peak position of the signal intensity.

  The structure in which the fine movement driving unit 1001 is provided in the two-dimensional array sensor SE as means for finely moving the relative position between the EUV mask M and the two-dimensional array sensor SE in the EUV mask inspection apparatus EC2 has been described. This method is effective in maintaining the fine movement accuracy because the fine movement is performed on the enlarged image via the imaging optical system DPO.

  In addition, there is a method in which the mask stage 2 is provided with a fine movement mechanism. In this method, the drive unit is concentrated on the stage, and the two-dimensional array sensor SE is semi-fixed, so that the structure around the sensor can be made simple and lightweight. Further, the fine movement mechanism of the mask stage 2 and the fine movement mechanism of the two-dimensional array sensor SE can be combined. Essentially, the relative position between the two-dimensional array sensor SE and the mask blank is finely moved more finely than the pixel size of the sensor.

  In the present embodiment, the case of the EUV mask M with the absorber pattern is shown as the defect inspection target. However, the present invention is not limited to this, and a multilayer blank with a fiducial mark can be the inspection target. In that case, die-to-die comparison can be omitted.

  As described above, according to the EUV mask inspection apparatus and the EUV mask defect inspection method of the sixth embodiment, the position and shape of the phase defect of the EUV mask can be accurately measured. Furthermore, since the absorber pattern can be formed on the EUV mask blank so as to avoid the influence of the defect by using the obtained defect position information, the manufacturing yield of the EUV mask can be improved. it can.

  Although the invention made by the present inventors has been specifically described based on the embodiment, the present invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention. Needless to say.

  The present invention can be widely used in the manufacturing industry of semiconductor devices using extreme ultraviolet light (EUV light) having a wavelength of around 13.5 nm.

DESCRIPTION OF SYMBOLS 1 Light source 2 Mask stage 3 Measurement mirror 4 Laser length measuring device 5 Sensor circuit 6 Pattern memory 7 Sensor 8 Threshold setting circuit 9 Comparison circuit 10 Timing control circuit 11 Mask stage control circuit 12 Position circuit 13 Various data files 14 Threshold data file DESCRIPTION OF SYMBOLS 15 Recording apparatus 16 Pattern monitor 17 Image output part 18 System control computer 21 Inspection image acquisition area 22 Inspection stripe 31 Phase defect 32, 33, 34 Light intensity distribution 41, 44 Reference mark 42, 43 Pixel 51 First die 52 Second Die 53 inspection area 61 phase defect 62, 63 main part 71 hole pattern 72, 73 phase defect 74 pinhole defect 80 light source 81 illumination optical system 82 reduction projection optical system 83 wafer 84 stage 91, 92 phase defect 93 pattern defect DESCRIPTION OF SYMBOLS 101 Semiconductor wafer 101s Silicon substrate 102n n well 102p p well 103,105 oxide film 104,106 resist pattern 107 isolation part 108 gate insulating film 109 gate electrode 110,111 semiconductor region 112 interlayer insulating film 113L wiring 113R resistance 114 silicon oxide film 115 Connection hole 116 First wiring layer 1001 Fine movement drive unit 1002 Drive control circuit 1101 Phase defect 1102 Pixel 1201, 1203 EUV light intensity distribution 1202 Signal 1301, 1302, 1303 Defect A1 First chip A2 Second chip A3 Third chip AB1 Absorber film ABS Absorber pattern ALO Optical microscope BM EUV inspection light BSP Beam splitter BUF Buffer layer CAP Capping layer CF Metal film CIO Illumination light System DEF1, DEF2, DEF3, DEF4, DEF5 defect DPO imaging optical system EC1, EC2 EUV mask inspection device EP EUV projection exposure apparatus L1 concave L2 convex LL EUV light (extreme ultraviolet)
M EUV mask MA1, MA2, MA3, MA4 alignment mark area MB mask blank MDE device pattern area ML multilayer film MS substrate NA numerical aperture P01 minute particle P02 minute depression PM multilayer mirror Qn nMIS transistor Qp pMIS transistor REF multilayer reflection Region S101 to S111 Step S201 to S211 Step S221 to S227 Step S301 to S309 Step SE Two-dimensional array sensor SLI Focused beam

Claims (13)

A defect inspection method for an EUV mask comprising a multilayer film formed on a mask substrate and an absorber pattern disposed on the multilayer film,
(A) placing the EUV mask on a mask stage movable in a two-dimensional direction;
(B) detecting a position of a reference mark arranged on the EUV mask;
(C) irradiating a region to be inspected on the EUV mask with EUV light;
(D) Collecting scattered light excluding specularly reflected light from the region to be inspected on the EUV mask to form an enlarged image, and obtaining an enlarged dark field image as a pixel signal by an image detector having a large number of pixels. And a process of
(E) obtaining a predicted value of the pixel signal from the inspection area on the EUV mask from the design data of the absorber pattern by numerical calculation;
(F) Presence / absence of defects in the region to be inspected on the EUV mask by comparing the pixel signal acquired in the step (d) with the predicted value of the pixel signal obtained in the step (e) A step of determining
(G) In the step (f), when the defect is detected in the inspection area on the EUV mask, the position of the inspection area is recorded as a relative position from the reference mark. ,
After the step (g), the mask stage is moved, and the step (c) to the step (g) are repeatedly performed on another inspection region on the EUV mask. EUV mask defect inspection method. The EUV mask defect inspection method according to claim 1,
In the step (f),
Taking the intensity difference between the intensity of the pixel signal obtained in the step (d) and the predicted value of the intensity of the pixel signal obtained in the step (e),
A defect inspection method for an EUV mask, wherein, when the intensity difference is larger than a predetermined threshold value, it is determined that the defect exists in the inspection region on the EUV mask. In the EUV mask defect inspection method according to claim 2,
In the step (f),
The predetermined threshold has a first threshold and a second threshold;
The first threshold value is larger than the second threshold value,
If the intensity difference is greater than the first threshold, determine that the defect is a phase defect;
A defect inspection method for an EUV mask, wherein the defect is determined to be a defect of the absorber pattern when the intensity difference is larger than the second threshold and smaller than the first threshold. . In the EUV mask defect inspection method according to claim 3,
In the step (b),
A defect inspection method for an EUV mask, wherein the position of the reference mark is detected by an optical mark detection method using EUV light or DUV light. A defect inspection method for an EUV mask comprising a multilayer film formed on a mask substrate and an absorber pattern disposed on the multilayer film,
On the EUV mask, a first die and a second die having the absorber pattern having the same planar pattern shape are disposed adjacent to each other in a plane.
(A) placing the EUV mask on a mask stage movable in a two-dimensional direction;
(B) detecting a position of a reference mark arranged on the EUV mask;
(C) irradiating EUV light to a first inspection region of the first die on the EUV mask;
(D) The scattered light except the specular reflection light from the first inspection area of the first die on the EUV mask is collected and enlarged to form an image, and the dark field enlarged image has a large number of pixels. Acquiring as a first pixel signal by an image detector;
(E) irradiating the second inspection area of the second die on the EUV mask with the EUV light;
(F) The scattered light except the specular reflection light from the second inspection area of the second die on the EUV mask is collected and enlarged to form an image, and the dark field enlarged image is obtained by the image detector. Acquiring as a second pixel signal;
(G) comparing the first pixel signal with the second pixel signal to thereby provide the first region to be inspected of the first die and the second die of the second die on the EUV mask. Determining the presence or absence of defects in the inspected area;
(H) In the step (g), when the defect is detected in the first inspection area or the second inspection area on the EUV mask, the first inspection area or the second inspection area And recording the position of the relative position from the reference mark,
The second inspection region of the second die irradiated with the EUV light in the step (e) is the first inspection region of the first die irradiated with the EUV light in the step (c). And a region having the same plane pattern corresponding to
After the step (h), the mask stage is moved so that the other areas to be inspected on the first die and the second die on the EUV mask are moved from the step (c) (h) process and facilities repeatedly,
In the step (g),
Taking an intensity difference which is a difference between the intensity of the first pixel signal acquired in the step (d) and the intensity of the second pixel signal acquired in the step (f);
When the difference in intensity is larger than a predetermined threshold, it is determined that the defect exists in the first inspection area or the second inspection area on the EUV mask, and
The threshold has a first threshold and a second threshold;
The first threshold value is larger than the second threshold value,
If the intensity difference is greater than the first threshold, determine that the defect is a phase defect;
A defect inspection method for an EUV mask , wherein the defect is determined to be a defect of the absorber pattern when the intensity difference is larger than the second threshold and smaller than the first threshold. . The EUV mask defect inspection method according to claim 5 ,
In the step (g), when the defect is detected in the first inspection area or the second inspection area,
(I) obtaining the intensity of the first auxiliary pixel signal by shifting the relative position of the first die with respect to the image detector in the first direction by a first distance;
(J) shifting the relative position of the second die relative to the image detector by the first distance in the first direction to obtain the intensity of a second auxiliary pixel signal;
(K) A step of taking an auxiliary intensity difference which is a difference between the intensity of the first auxiliary pixel signal acquired in the step (i) and the intensity of the second auxiliary pixel signal acquired in the step (j). When,
(L) acquiring the intensity of auxiliary pixel signals in a plurality of corresponding regions in the first die and the second die by repeating the step (k) from the step (i);
(M) identifying the position of the defect in the first inspection area or the second inspection area from the auxiliary intensity difference,
In the step (i) and the step (j),
The defect inspection method for an EUV mask, wherein the first distance is a distance smaller than a pixel size of the image detector. The EUV mask defect inspection method according to claim 6 ,
In the step (i) and the step (j), the relative positions of the first die and the second die with respect to the image detector are shifted by the first distance by moving the image detector. An EUV mask defect inspection method characterized by the above. The EUV mask defect inspection method according to claim 7 ,
A defect inspection method for an EUV mask, wherein in the step (i) and the step (j), the image detector is moved by a piezo element. The EUV mask defect inspection method according to claim 8 ,
The defect inspection method for an EUV mask, wherein the step (k) is performed immediately after the step (j). (A) a step of sequentially forming a multilayer film and an absorber film on a mask substrate;
(B) processing the absorber film to form an absorber pattern;
(C) performing a defect inspection on the surface of the mask substrate and determining the presence and position of the defect;
(D) based on the determination result of the step (c), correcting the absorber pattern of the defective portion,
The step (c)
(C1) placing the mask substrate on a mask stage movable in a two-dimensional direction;
(C2) detecting a position of a reference mark arranged on the mask substrate;
(C3) irradiating the region to be inspected on the mask substrate with EUV light;
(C4) Collecting scattered light excluding specular reflection light from the region to be inspected on the mask substrate to form an enlarged image, and obtaining the dark field enlarged image as a pixel signal by an image detector having a large number of pixels And a process of
(C5) obtaining a predicted value of the pixel signal from the inspection area on the mask substrate by numerical calculation from design data of the absorber pattern;
(C6) By comparing the pixel signal acquired in the step (c4) with the predicted value of the pixel signal obtained in the step (c5), the presence or absence of a defect in the inspection region on the mask substrate A step of determining
(C7) In the step (c6), when the defect is detected in the inspection area on the mask substrate, the position of the inspection area is recorded as a relative position from the reference mark. ,
After the step (c7), the mask stage is moved, and the steps (c3) to (c7) are repeatedly performed on the other inspection regions on the mask substrate. A method for manufacturing an EUV mask. A mask stage on which an EUV mask is placed;
An EUV light source for irradiating the EUV mask placed on the mask stage with EUV light;
An imaging optical system for enlarging and imaging EUV reflected light of the EUV light irradiated on the EUV mask;
An image detector having a number of pixels for obtaining the EUV reflected light as a pixel signal;
The mask stage is movable in a two-dimensional direction;
The EUV mask inspection apparatus, wherein the image detector is movable in a two-dimensional direction at a distance smaller than the pixel size. The EUV mask inspection apparatus according to claim 11 ,
The EUV mask inspection apparatus, wherein the image detector is movable in a two-dimensional direction at a distance smaller than the pixel size by a fine movement driving unit including a piezoelectric element. (A) depositing a gate forming film on the semiconductor substrate;
(B) processing the gate forming film by first photolithography to form a gate electrode;
(C) depositing an interlayer insulating film so as to cover the semiconductor substrate;
(D) processing the interlayer insulating film by second photolithography to form a connection hole;
(E) depositing a metal film to cover the semiconductor substrate;
(F) forming a first wiring layer by processing the metal film by third photolithography,
In the step (b), the step (d), and the step (f), the first photolithography and the second photo using the different EUV masks manufactured by the EUV mask manufacturing step, respectively. Lithography and third photolithography process the gate formation film, the interlayer insulating film, and the metal film, respectively
The EUV mask manufacturing process includes:
(G) a step of sequentially forming a multilayer film and an absorber film on the mask substrate;
(H) processing the absorber film to form an absorber pattern;
(I) performing a defect inspection on the surface of the mask substrate and determining the presence and position of the defect;
(J) based on the determination result of the step (i), correcting the absorber pattern of the defective portion,
The step (i)
(I1) placing the mask substrate on a mask stage movable in a two-dimensional direction;
(I2) detecting a position of a reference mark arranged on the mask substrate;
(I3) irradiating a region to be inspected on the mask substrate with EUV light;
(I4) Scattered light excluding specularly reflected light from the inspection area on the mask substrate is collected and enlarged to form an image, and the dark field enlarged image is obtained as a pixel signal by an image detector having a large number of pixels. And a process of
(I5) obtaining a predicted value of the pixel signal from the inspection area on the mask substrate by numerical calculation from design data of the absorber pattern;
(I6) By comparing the pixel signal acquired in the step (i4) with the predicted value of the pixel signal obtained in the step (i5), the presence or absence of a defect in the inspection region on the mask substrate A step of determining
(I7) In the step (i6), when the defect is detected in the inspection area on the mask substrate, the position of the inspection area is recorded as a relative position from the reference mark. ,
After the step (i7), the mask stage is moved, and the steps (i3) to (i7) are repeatedly performed on the other inspection area on the mask substrate. A method for manufacturing a semiconductor device.