JP5417831B2 - Power control device - Google Patents

Description

  The present invention relates to a power supply control device that performs PWM control of power to be supplied to a load.

  Conventionally, in a system for controlling a plurality of loads, communication is integrated into one system between one or a small number of control devices having an arithmetic processing function and a communication function and a communication terminal associated with each load. In general, the load is connected by a line, and the control device controls each load by transmitting a control signal to each communication terminal via the communication line. On the other hand, power supply lines for supplying power to each load are often individually wired from a power supply to each load or a drive circuit for each load, and in this case, power supply lines corresponding to the number of loads are required.

  Incidentally, in recent years, in vehicles such as automobiles, the number of loads controlled by a control device tends to increase with each model change. The increase in the number of wires and the increase in wire harnesses accompanying this increase in the weight of the vehicle body, and further results in a decrease in fuel consumption. Therefore, it is urgent to consolidate not only communication lines but also power lines. It has become a challenge.

On the other hand, for example, in Patent Document 1, even when the battery is arranged at the rear part of the vehicle body by connecting the bases for supplying power to each load with an integrated cable called a power bus. For example, a technique for eliminating the necessity of directly connecting a battery and a starter and an alternator with a thick and long cable, and preventing an increase in the number of wires and an enlargement of a wire harness is disclosed.
Japanese Patent Laid-Open No. 2003-137044

  However, in the technique disclosed in Patent Document 1, since the power supply currents of a plurality of loads flow through a common power bus, the voltage drop determined by the product of the power supply current of one load and the resistance of the power bus is different from that of other loads. Appears as a drop in power supply voltage. For this reason, there exists a possibility that the performance which other load may exhibit when one load act | operates may fall, for example so that the brightness | luminance of a lamp | ramp may fall when a heater act | operates.

  Further, even when PWM control is performed on the power supplied to the load based on the fluctuating power supply voltage value, there is a time delay until the PWM control follows the fluctuation of the power supply voltage value. At the moment when the load is turned on, there is a problem that the performance of the load whose supplied power is PWM-controlled decreases for a moment.

  The present invention has been made in view of such circumstances, and an object of the present invention is to share a part of or all of a power supply and a power supply line with a load whose power supply is PWM-controlled according to the voltage value of the power supply. An object of the present invention is to provide a power supply control device capable of preventing an instantaneous decrease in the performance of a load subjected to PWM control even when another load is turned on.

A power supply control device according to the present invention includes a voltmeter that detects a voltage value of a power supply, and PWM that performs PWM control so that the power to be supplied from the power supply to a load is kept constant based on the voltage value detected by the voltmeter In a power supply control device including a control unit, a detection unit that detects in time series a signal that specifies ON / OFF of a second load to which power is to be supplied from the power supply, and the detection unit specifies OFF Storage means for storing the voltage value detected by the voltmeter when the signal is detected, and the PWM control section stores the voltage stored by the storage means when the detection means detects a signal designating ON. PWM control is performed based on a voltage value lower than the value.

In the present invention, on / off of the second load to which power is to be supplied from the power source to which PWM-controlled power is to be supplied to the load is detected. PWM control is performed based on a voltage value lower than the stored power supply voltage value.
Thus, when PWM control is performed based on a voltage value obtained by subtracting an appropriate value from the power supply voltage value when the second load is detected to be off, the power supply voltage value is reduced by turning on the second load. Even if the voltage drops, the PWM-controlled power is kept constant.

A power supply control device according to the present invention includes a voltmeter that detects a voltage value of a power supply, and PWM that performs PWM control so that the power to be supplied from the power supply to a load is kept constant based on the voltage value detected by the voltmeter In a power supply control device comprising a control unit, detection means for detecting in time series a signal designating on / off of a second load to which power is to be supplied from the power supply, and the detection means designates on Storage means for storing the voltage value detected by the voltmeter when the signal is detected when the detection means detects off, and the PWM control unit outputs a signal for designating on by the detection means When detected, PWM control is performed based on the voltage value stored in the storage means.

In the present invention, on / off of the second load to which power is to be supplied from the power source to which PWM controlled power is to be supplied is detected, and the power supply voltage when on is detected The value is stored when OFF is detected, and then PWM control is performed based on the stored power supply voltage value when ON is detected.
As a result, when the second load is detected to be on, the PWM control is performed based on the low power supply voltage value detected before the second load switches from the previous on to the off. Even if the power supply voltage value decreases, the PWM-controlled power is kept constant.

A power supply control device according to the present invention includes a voltmeter that detects a voltage value of a power supply, and a first PWM that performs PWM control of power to be supplied from the power supply to a load based on the voltage value detected by the voltmeter in a first period . a control unit, the power supply control device and a second 2PWM controller for PWM control with a long second period than the first circumferential-life so as to maintain a constant power to be supplied to the different loads from the load from the power source, Detection means for detecting the on / off period of PWM control by the second PWM control unit in time series, and storage means for storing a voltage value detected by the voltmeter when the detection means detects the off period. wherein the first 1PWM control section, when the detecting means detects the on period, and wherein that you have to be PWM controlled based on a voltage value lower than the voltage value wherein the storage means has stored.

In the present invention, the on / off period of the control period of the second PWM control unit is detected. When the on period is detected, the voltage is lower than the power supply voltage value stored when the off period is detected. The first PWM control unit performs PWM control based on the value.
Thus, when the first PWM control unit performs PWM control based on the voltage value obtained by subtracting an appropriate value from the power supply voltage value when the off period of the control cycle of the second PWM control unit is detected, Even if the power supply voltage value decreases due to the ON period of the control cycle of the 2PWM control unit, the power PWM-controlled by the first PWM control unit is kept constant.

A power supply control device according to the present invention includes a voltmeter for detecting a voltage value of a power supply and a first cycle so as to keep constant the power to be supplied from the power supply to the load based on the voltage value detected by the voltmeter. comprising a first 1PWM controller for PWM control, and a second 2PWM controller for PWM control with a long second period than the first circumferential-life so as to maintain a constant power to be supplied to the different loads from the load from the power supply In the power supply control device, the detection means for detecting the on / off period of the PWM control by the second PWM control unit in time series, and the voltage value detected by the voltmeter when the detection means detects the on period, Storage means for storing when the detection means detects an off period, and the first PWM control unit, based on the voltage value stored by the storage means when the detection means detects an on period, Characterized in that you have to be controlled.

In the present invention, the ON / OFF period of the control period of the second PWM control unit is detected, the power supply voltage value when the ON period is detected is stored when the OFF period is detected, and then When the ON period is detected, the first PWM control unit performs PWM control based on the stored power supply voltage value.
Thereby, when the ON period of the control cycle of the second control unit is detected, the first PWM control unit performs PWM control based on the low power supply voltage value detected before the control cycle is switched from the previous ON period to the OFF period. Therefore, even if the power supply voltage value decreases due to the control period of the second PWM control unit being in the ON period, the power PWM-controlled by the first PWM control unit is kept constant.

According to the present invention, PWM control is performed based on a voltage value obtained by subtracting an appropriate value from the power supply voltage value when the second load is turned off (or the off period of the control period of the second PWM control unit). When the second load is turned on (or the control period of the second PWM control unit is turned on), the power controlled by PWM control is kept constant even when the power supply voltage value decreases. .
Further, since the second load is PWM controlled based on the low power supply voltage value detected before the second load is switched from on to off (or the control period of the second PWM control unit is switched from the on period to the off period), the second load Even if the power supply voltage value is reduced by turning on (or when the control period of the second PWM control unit becomes the on period), the PWM-controlled power is kept constant.
Therefore, even if a load whose supply power is PWM-controlled according to the voltage value of the power supply and another load that shares part or all of the power supply and the power supply line are turned on, the performance of the load that is PWM-controlled It is possible to prevent an instantaneous drop.

Hereinafter, the present invention will be described in detail with reference to the drawings illustrating embodiments thereof.
(Embodiment 1)
FIG. 1 is a block diagram showing a schematic configuration of a first embodiment of a power supply control device 100 according to the present invention. In the figure, reference numeral 1 denotes an alternator that generates electric power in conjunction with an engine 2 provided in a vehicle (not shown). (Not shown) is attached. The alternator 1 and the battery 3 constitute an in-vehicle power source.

  The power supply control device 100 includes a control unit 4 having a CPU 41. The CPU 41 includes a ROM 42 for storing information such as programs, a RAM (storage means) 43 for storing temporarily generated information, and a timer for measuring time. 44 and input / output ports 45, 46, 47, 48, 49 for inputting / outputting various signals are connected to each other by a bus. The input / output port 45 is connected to the output terminal of the brake control unit 8 to which the brake pedal switch 8a is connected to the input terminal. The input / output port 46 is connected to the air conditioner 9 integrated with the defogger switch 9a. The output terminal is connected.

The power supply control device 100 also includes a voltmeter 5 that detects voltage values supplied from the alternator 1 and the battery 3 (hereinafter referred to as on-vehicle power source), left and right brake lamps (loads) 6b and 6b, and a defogger from the on-vehicle power source. (Second load, load different from the load) 7b includes a brake lamp relay 6a and a defogger relay 7a, each of which is a semiconductor relay that opens and closes current supplied to 7b. The voltage value detected by the voltmeter 5 is given to the input / output port 47. The brake lamp relay 6a and the defogger relay 7a are connected to the input / output ports 49 and 48 via the drive circuits 6 and 7, respectively.
The drive circuit 6 and the brake lamp relay 6a, and the drive circuit 7 and the defogger relay 7a may be replaced with a semiconductor relay in which the drive circuit is integrated.

  In the configuration described above, when the user performs an operation of depressing / releasing a brake pedal (not shown), the brake control unit 8 detects the on / off of the brake pedal switch 8a and indicates a brake signal indicating on / off of braking. Is given to the input / output port 45. When the CPU 41 of the control unit 4 detects that the brake signal is turned on, the CPU 41 gives a pulse width-modulated PWM signal to the drive circuit 6 via the input / output port 49, and turns on / off the brake lamp relay 6a at the PWM cycle. Turn off. Thereby, the current supplied to the brake lamps 6b and 6b is PWM-controlled.

  Since the duty ratio of the PWM signal is determined based on the voltage value detected by the voltmeter 5, the wiring from the voltmeter 5 to the brake lamp relay 6a is made as short as possible, and the voltage drop during this period Is preferably negligible.

  In addition, when the user performs a toggle operation to press the defogger switch 9a, a defogger signal designating on / off of the defogger 7b is given from the air conditioner 9 to the input / output port 46. When the CPU 41 of the control unit 4 detects on / off of the defogger signal, the CPU 41 gives a signal for turning on / off the defogger relay 7 a to the drive circuit 7 via the input / output port 48. As a result, the current supplied to the defogger 7b is turned on / off.

  Here, the wiring of the power source from the in-vehicle power source to the defogger relay 7a and the wiring of the power source from the in-vehicle power source to the voltmeter 5 and the brake lamp relay 6a are shared at least from the in-vehicle power source to the power control device 100. Yes. For this reason, when the defogger 7b is turned on, the voltage drop determined by the product of the internal resistance of the in-vehicle power source and the resistance of the wiring of the power source from the in-vehicle power source to the power control device 100 and the load current of the defogger 7b, The voltage value detected by the voltmeter 5 decreases.

FIG. 2 is a timing chart for explaining the effect of turning on the defogger 7b on the illuminance of the brake lamps 6b and 6b. FIG. 2A is a timing chart when the power supplied to the brake lamps 6b and 6b is PWM-controlled regardless of whether the defogger signal is on, and FIG. 2B is a case where the defogger signal is on. 7 is a timing chart when the duty ratio of PWM control is changed in synchronization with the ON.
In the figure, the abscissa represents time, and the ordinate represents the defogger signal on / off, the magnitude of the load current of the defogger 7b, and the power supply voltage at the site to which the voltmeter 5 is connected (hereinafter referred to as the ordinate) in order from the above chart. The magnitude of the power supply voltage), the duty ratio of the PWM control related to the brake lamps 6b and 6b, and the intensity of the illuminance of the brake lamps 6b and 6b.

  In FIG. 2A, when the defogger signal is turned on at time T0, the CPU 41 detects the defogger signal being turned on and turns on the defogger relay 7a. In this case, since the load current of the defogger 7b rises in a step shape, the power supply voltage falls in a step shape due to the influence of the voltage drop described above. On the other hand, the current supplied to the brake lamps 6b and 6b is PWM-controlled with a duty ratio determined by the power supply voltage value, and this duty ratio is calculated so as to increase following a decrease in the power supply voltage.

  Incidentally, since PWM control is generally accompanied by a time delay, the duty ratio of the PWM control gradually increases to an appropriate value at time T1 later than time T0. This delay becomes significant when the PWM control is performed based on, for example, a value obtained by integrating the voltage value detected by the voltmeter 5 with time. For this reason, from time T0 to time T1, the result is that the duty ratio of the PWM control becomes insufficient with respect to the appropriate value, and during this time, a phenomenon occurs in which the illuminance of the brake lamps 6b and 6b decreases.

On the other hand, as shown in FIG. 2B, when the defogger signal is turned on and the load current of the defogger 7b rises and the power supply voltage falls, the power supply detected and stored during the off period of the defogger signal By calculating the duty ratio of the PWM control based on a voltage value lower than the voltage value, it is possible to avoid a decrease in illuminance of the brake lamps 6b and 6b due to a delay in the PWM control. Duty ratio in this case, the voltage value voltmeter 5 is detected before the defogger signal is turned on, may be calculated based on the value obtained by subtracting the amount of the above-mentioned voltage drop.

  FIG. 3 is a flowchart showing the processing procedure of the CPU 41 for detecting the on / off of the defogger signal and storing the voltage value detected by the voltmeter 5 when the defogger signal is off, and FIG. 4 is supplied to the brake lamps 6b and 6b. It is a flowchart which shows the process sequence of CPU41 which carries out PWM control of the electric power which should be. FIG. 5 is a flowchart showing the processing procedure of the CPU 41 according to the on-time calculation subroutine. The following processing is started at regular intervals counted by the timer 44 and executed according to a control program stored in the ROM 42 in advance.

In the first embodiment, the process shown in FIG. 4 is started every control cycle of PWM control. The process shown in FIG. 3 may be started at the same cycle as the process shown in FIG. 4 or may be started at a different cycle.
The “on flag”, “change flag”, “Vmem”, “PWM counter”, “Vtgt”, and “on time” are variables stored in the RAM 43, and these variables are not shown in the initialization process. Among them, it is assumed that the CPU 41 clears it to “0”. “PWM cycle” and “Vc” are known constants. Further, “Vt” and “D” are variables temporarily stored in the register of the CPU 41.

  When the processing of FIG. 3 is started, the CPU 41 takes in the voltage value detected by the voltmeter 5 via the input / output port 47 (step S11), and stores the taken-in voltage value as “Vt” in the register. Thereafter, the CPU 41 captures a defogger signal via the input / output port 46 (step S12), and determines whether or not the captured defogger signal is on (step S13). When it determines with it being ON (step S13: YES), CPU41 determines whether the "ON flag" which memorize | stores the state of a defogger signal is "1" which shows the state of ON (step S14).

  When it determines with it being "1" (step S14: YES), CPU41 complete | finishes a process. If it is determined that it is not “1” (step S14: NO), the CPU 41 writes “1” in the “on flag” (step S15), and “1” in the “change flag” indicating that the defogger signal has changed to on. "Is written (step S16). Thereafter, the CPU 41 outputs a signal for turning on the defogger relay 7a to the drive circuit 7 via the input / output port 48 (step S17), and ends the process.

  When it is determined in step S13 that the defogger signal is not on (step S13: NO), the CPU 41 determines whether or not the above-described “on flag” is “0” indicating an off state (step S19). When determining that it is not “0” (step S19: NO), the CPU 41 writes “0” in the “on flag” (step S20). Thereafter, the CPU 41 outputs a signal for turning off the defogger relay 7a to the drive circuit 7 via the input / output port 48 (step S21).

When the process of step S21 is completed, or when it is determined in step S19 that the “on flag” is “0” (step S19: YES), the CPU 41 writes “Vt” stored in the register to “Vmem”. (Step S23) The process ends.
In this way, the CPU 41 writes the voltage value detected by the voltmeter 5 in “Vmem” when it detects that the defogger signal is turned off. Therefore, the power supply voltage value is stored in “Vmem” before the power supply voltage falls stepwise.

  When the process of FIG. 4 is activated, the CPU 41 captures a brake signal via the input / output port 45 (step S31), and determines whether the captured brake signal is on (step S32). When it determines with it not being ON (step S32: NO), CPU41 complete | finishes a process as it is.

When it is determined that the brake signal is on (step S32: YES), the CPU 41 writes “0” in the “change flag” (step S33) and calls and executes a subroutine related to the on-time calculation (step S34). . The “on time” calculated here is a value such that a product with a unit time described later becomes an actual time.
Then, the CPU 41 outputs a signal for turning on the brake lamp relay 6a to the drive circuit 6 via the input / output port 49 in order to start the on period for the control cycle being processed (step S35), and counts the control cycle. "0" is written in the "PWM counter" for this (step S36).

Next, the CPU 41 determines whether or not the “change flag” is “1” (step S37). When the CPU 41 determines that it is “1” (step S37: YES), the “change flag” is set to “0” again. "Is written (step S38), and a subroutine related to the on-time calculation is called and executed (step S39).
As described above, when “1” of the “change flag” is detected during the ON period of the control cycle once started, the ON time of the control cycle being processed is recalculated.

When the process of step S39 is completed, or when it is determined in step S37 that the “change flag” is not “1” (step S37: NO), the CPU 41 waits until the unit time elapses (step S40). The waiting here is, for example, a waiting process of 100 μs, and the process is resumed after 100 μs.
Thereafter, the CPU 41 adds “1” to the “PWM counter” (step S41), and determines whether the “PWM counter” is equal to the “ON time” (step S42).

When determining that it is not equal to the “on time” (step S42: NO), the CPU 41 returns the process to step S37.
In this manner, the CPU 41 executes a process of cycling through the loop from step S37 to step S42 until the ON period of the control cycle ends.
When it is determined that the “PWM counter” is equal to the “ON time” (step S42: YES), the CPU 41 sends a brake lamp relay to the drive circuit 6 via the input / output port 49 in order to end the ON period of the control cycle. A signal for turning off 6a is output (step S43), and the process ends.

  When the subroutine of FIG. 5 is called, the CPU 41 fetches the voltage value detected by the voltmeter 5 via the input / output port 47 (step S51), and stores the fetched voltage value as “Vt” in the register. Thereafter, the CPU 41 determines whether or not the “on flag” for storing the state of the defogger signal is “1” (step S52). If it is determined that it is “1” (step S52: YES), the CPU 41 subtracts the value of “Vc”, which is a fixed value, from “Vmem” and stores it as “Vt” in the register (step S53). Here, “Vc” is a value corresponding to the voltage drop described in FIG.

When the process of step S53 is completed, or when it is determined in step S52 that the “on flag” is not “1” (step S52: NO), the CPU 41 sets the square value of “Vtgt” / “Vt” to “D”. (Step S54). Here, “Vtgt” is a target voltage value for PWM control, and is set in another process (not shown). “D” is a duty ratio to be set in the control cycle being processed.
Next, the CPU 41 converts the product of the fixed value “PWM period” and “D” into an integer and writes it to the “ON time” (step S55), and returns to the called process. Here, the “PWM period” is a value such that the product of the unit time is the control period.

As described above, according to the first embodiment, on / off of a defogger to which power is to be supplied from an in-vehicle power source to which PWM-controlled power is to be supplied to the brake lamp is detected as on / off of the defogger signal. I have to do it. When the defogger signal is detected to be on, the power supply voltage value stored when the defogger is detected is “Vc” (ie, the internal resistance of the in-vehicle power source and the sum of the resistance of the power source wiring from the in-vehicle power source to the power control device and the PWM control is performed based on a voltage value that is lower by a value of a voltage drop determined by the product of the load current and the load current.
Therefore, even if a brake lamp whose supply power is PWM-controlled according to the voltage value of the in-vehicle power supply and a defogger that shares part or all of the power supply and power supply line are turned on, the illuminance of the brake lamp can be prevented from instantaneously decreasing. It becomes possible to do.

In addition, when the control cycle of PWM control is in the on period where the brake lamp should be turned on, when a change to the defogger signal is detected, the on period length is recalculated and extended for the control cycle at the time of detection. The power to be supplied to the brake lamp is increased by reflecting the ON period calculated in the direction to be applied to the control cycle being processed.
Therefore, it is possible to suppress a delay in PWM control when the power supply voltage value decreases due to turning on the defogger within the off period length of the control cycle.

In the first embodiment, on / off of the defogger signal is detected at a constant period (that is, in time series), but the present invention is not limited to this. For example, the defogger signal is on. When the CPU 41 is turned off, the CPU 41 may be interrupted so as to actively notify the CPU 41 of the on / off and cause the CPU 41 to execute the processing of FIG.
Also in this case, the processes in FIGS. 4 and 5 are common.

  Further, when detecting the on / off of the defogger signal, the CPU 41 turns on / off the defogger relay 7a. For example, another CPU outside the power supply control device 100 parallels on / off of the defogger signal. Alternatively, the defogger relay 7a may be turned on / off by detection. In this case, the processing of step S17 and step S21 in FIG. 3 is not necessary.

  Furthermore, when the defogger signal is detected to be off, the power supply voltage value is stored, but based on the power supply voltage value, the duty ratio is first determined and stored, and when the defogger signal is turned on, PWM control may be performed with the stored duty ratio.

(Embodiment 2)
In the first embodiment, when the defogger signal is turned on, PWM control is performed based on a value obtained by subtracting a constant value from the stored power supply voltage value when the defogger signal is turned off. Is a mode in which PWM control is performed based on the power supply voltage value when the defogger signal is turned on when the defogger signal is turned on. Although the processing procedure is different between the first and second embodiments, the processing in FIG. 4 is common, and the description thereof is omitted. Below, the combination of the process of FIG. 4 and the process of FIG.6 and FIG.7 is demonstrated.

  FIG. 6 is a flowchart showing the processing procedure of the CPU 41 that detects the on / off of the defogger signal and stores the voltage value detected by the voltmeter 5 when it is on when it is off. FIG. 7 is a flowchart showing the processing procedure of the CPU 41 according to the on-time calculation subroutine. The following processing is started at regular intervals counted by the timer 44 and executed according to a control program stored in the ROM 42 in advance. In the present embodiment, the process shown in FIG. 6 may be started with the same cycle as the process shown in FIG. 4, or may be started with a different cycle.

Except for step S114, step S118, step S119, and step S122 of the process of FIG. 6, the process from step S111 to step S121 is the same as the process from step S11 to step S21 of the process of FIG. The description is omitted.
When it is determined in step S114 that the “on flag” is “1” (step S114: YES), or when the process of step S117 is completed, the CPU 41 sets the voltage value “Vt” stored in the register to “Von”. Write (step S118) and the process is terminated.

When the process of step S121 is completed, the CPU 41 writes “Von” in “Vmem” (step S122) and ends the process. On the other hand, when it is determined in step S119 that the “on flag” is “0” (step S119: YES), the CPU 41 ends the process as it is, but in this case as well, the process is performed after executing the process of step S122. You may make it complete | finish.
In this way, the CPU 41 writes the voltage value detected by the voltmeter 5 when the defogger signal is turned on to “Vmem” when it detects the defogger signal being turned off. Therefore, the power supply voltage value is stored in “Vmem” before the power supply voltage that has fallen in a step-like manner recovers and rises.

Steps S151, S152, S154, and S155 of the subroutine related to the on-time calculation in FIG. 7 have the same contents as steps S51, S52, S54, and S55 of the subroutine related to the on-time calculation in FIG. Omitted.
If it is determined in step S152 that the “on flag” is “1” (step S152: YES), the CPU 41 writes “Vmem” in “Vt” (step S153). Thereby, in the subsequent step S154, the duty ratio “D” of the PWM control is calculated based on “Vmem” written in step S122 described above.

  In addition, the same code | symbol is attached | subjected to the location corresponding to Embodiment 1, and the detailed description is abbreviate | omitted.

As described above, according to the second embodiment, the power supply voltage value when turning on the defogger signal is stored is stored when off is detected, and then the stored power supply voltage value is detected when turning on is detected. PWM control is performed based on “Vmem”.
As a result, when the defogger signal is turned on, PWM control is performed based on the low power supply voltage value detected before the defogger signal switches from on to off. The electric power supplied to the brake lamp can be kept constant.

(Embodiment 3)
While the first and second embodiments are configured to supply electric power from the in-vehicle power source to the defogger 7b in a DC manner, the third embodiment is a mode in which the power supplied from the in-vehicle power source to the defogger 7b is PWM-controlled. . In the first and third embodiments, the processes in FIGS. 4 and 5 are common, and thus the description thereof is omitted. A combination of the processes in FIGS. 4 and 5 and the processes in FIGS. 9 and 10 will be described later.

  FIG. 8 is a timing chart for explaining the influence of the PWM control of the power supplied to the defogger 7b on the illuminance of the brake lamps 6b and 6b. FIG. 8A is a timing chart when the power supplied to the brake lamps 6b and 6b is PWM controlled regardless of the PWM control related to the defogger 7b. FIG. 8B shows the PWM control of the power supplied to the brake lamps 6b and 6b in synchronization with the on / off period when the on / off period of the control cycle of the PWM control related to the defogger 7b is detected. It is a timing chart in the case of doing.

  In the figure, the abscissa represents time, and the ordinate represents the defogger signal on / off, the magnitude of the load current of the defogger 7b, the magnitude of the power supply voltage, and the PWM related to the brake lamps 6b and 6b in order from the above chart. It represents the magnitude of the duty ratio of the control (hereinafter referred to as the first PWM control) and the magnitude of the illuminance of the brake lamps 6b and 6b.

In FIG. 8A, when the defogger signal is turned on at time T0, the CPU 41 detects the defogger signal being turned on and starts PWM control (hereinafter referred to as second PWM control) related to the defogger 7b. In this case, since the load current of the defogger 7b periodically changes in a rectangular shape, the power supply voltage also periodically changes in a rectangular shape due to the influence of the voltage drop described above. The period in this case corresponds to the control period of the second PWM control.
Here, when the duty ratio of the first PWM control is fixed to a predetermined value when the defogger signal is turned on as in the first and second embodiments, the illuminance of the brake lamps 6b and 6b changes periodically with the power supply voltage. Fluctuates under the influence of

On the other hand, as shown in FIG. 8B, when the defogger signal is turned on and the load current of the defogger 7b periodically increases, and the power supply voltage periodically decreases in a rectangular shape, the second PWM By calculating the duty ratio of the first PWM control detected and stored during the off period during the control on period, it is possible to avoid fluctuations in the illuminance of the brake lamps 6b and 6b. Duty ratio in this case, the voltage value voltmeter 5 was detected when the control period of the 2PWM control is OFF period may be calculated based on the value obtained by subtracting the amount of the above-mentioned voltage drop.

  FIG. 9 is a flowchart showing a processing procedure of the CPU 41 that detects the on / off period of the control cycle of the PWM control related to the defogger 7b and stores the voltage value detected by the voltmeter 5 in the off period. These are the flowcharts which show the process sequence of CPU41 which carries out PWM control of the electric power which should be supplied to the defogger 7b. The following processing is started at regular intervals counted by the timer 44 and executed according to a control program stored in the ROM 42 in advance.

In the third embodiment, the processes shown in FIGS. 4 and 10 are started for each control cycle of the first PWM control and the second PWM control. The process shown in FIG. 9 may be started at the same cycle as the process shown in FIG. 4 or may be started at a different cycle.
The “ON period flag”, “PWM counter 2”, and “ON time 2” are variables stored in the RAM 43, and these variables are set to “0” by the CPU 41 during initialization processing (not shown). It shall be cleared. In addition, “PWM cycle 2” is a known constant. Further, “D2” is a variable temporarily stored in the register of the CPU 41.

  When the process of FIG. 9 is started, the CPU 41 takes in the voltage value detected by the voltmeter 5 via the input / output port 47 (step S211), and stores the taken-in voltage value as “Vt” in the register. Thereafter, the CPU 41 determines whether or not the “on period flag” indicating the on period of the control period of the second PWM control is “1” (step S213). When it is determined that it is “1” (step S213: YES), the CPU 41 determines whether or not the “on flag” stored by delaying the “on period flag” is “1” (step S214).

  When it determines with it being "1" (step S214: YES), CPU41 complete | finishes a process. When it is determined that it is not “1” (step S214: NO), the CPU 41 writes “1” in the “on flag” (step S215), and “change” indicating that the “on period flag” has changed to “1”. “1” is written in the “flag” (step S216), and the process ends.

  When it is determined in step S213 that the “on period flag” is not “1” (step S213: NO), the CPU 41 determines whether or not the “on flag” is “0” (step S219). When it is determined that it is not “0” (step S219: NO), the CPU 41 writes “0” in the “on flag” (step S220). When the process of step S220 is completed, or when it is determined in step S219 that the “on flag” is “0” (step S219: YES), the CPU 41 writes “Vt” stored in the register to “Vmem”. (Step S223) The process ends.

  In this way, the CPU 41 writes the voltage value detected by the voltmeter 5 in “Vmem” when it detects that the “ON period flag” is “0”. Therefore, the power supply voltage value is stored in “Vmem” before the defogger relay 7a is turned on in the process of FIG. 10 described later and the power supply voltage falls stepwise.

  When the process of FIG. 10 is activated, the CPU 41 captures a defogger signal via the input / output port 46 (step S231), and determines whether the captured defogger signal is on (step S232). When it determines with it not being on (step S232: NO), CPU41 complete | finishes a process as it is.

If it is determined that the defogger signal is on (step S232: YES), the CPU 41 acquires “D2”, which is the duty ratio to be set, from the RAM 43 (step S233). Here, “D2” is set in another process (not shown).
After that, the CPU 41 converts the product of the fixed value “PWM cycle 2” and “D2” into an integer and writes it to “ON time 2” (step S234). Here, “PWM cycle 2” is a value such that the product of the unit time is the control cycle of the second PWM control.

  Next, the CPU 41 writes “1” in the “on period flag” indicating the on period of the control cycle (step S235). Then, the CPU 41 outputs a signal for turning on the defogger relay 7a to the drive circuit 7 via the input / output port 48 in order to start the on period (step S236), and the “PWM counter 2 for counting the control period” "0" is written into "" (step S237).

Further, the CPU 41 waits until the unit time has elapsed (step S238). Then, the CPU 41 adds “1” to “PWM counter 2” (step S239), and determines whether “PWM counter 2” is equal to “ON time 2” (step S240). When determining that it is not equal to “ON time 2” (step S240: NO), the CPU 41 returns the process to step S238.
In this way, the CPU 41 executes a process of cycling through the loop from step S238 to step S240 until the ON period of the control cycle ends.

  When it is determined that “PWM counter 2” is equal to “ON time 2” (step S240: YES), the CPU 41 applies a default to the drive circuit 7 via the input / output port 48 in order to end the ON period of the control cycle. A signal for turning off the galley 7a is output (step S241). Then, the CPU 41 writes “0” in the “ON period flag” (step S242), and ends the process.

  In addition, the same code | symbol is attached | subjected to the location corresponding to Embodiment 1, and the detailed description is abbreviate | omitted.

As described above, according to the third embodiment, the on / off period of the control cycle of the PWM control related to the defogger is detected. When the on period is detected, the off period is detected. A voltage lower than the stored power supply voltage value by “Vc” (that is, a voltage drop value determined by the product of the internal resistance of the in-vehicle power supply and the resistance of the power supply wiring from the in-vehicle power supply to the power supply controller and the load current of the defogger) Based on the value, PWM control related to the brake lamp is performed.
Therefore, even if a brake lamp whose supply power is PWM-controlled according to the voltage value of the in-vehicle power supply and a defogger that shares part or all of the power supply and power supply line are turned on, the illuminance of the brake lamp can be prevented from instantaneously decreasing. It becomes possible to do.

Further, when it is detected that the control period of the second PWM control is changed to the on period when the control period of the first PWM control is in the on period, the on period length is calculated again for the control period at the time of detection, The power to be supplied to the brake lamp is increased by reflecting the ON period calculated in the extending direction in the control cycle being processed.
Therefore, it is possible to suppress the delay of the first PWM control when the power supply voltage value is lowered by turning on the defogger within the off period length of the control cycle.

  In the third embodiment, the CPU 41 of the control unit 4 performs the first PWM control and the second PWM control. However, the present invention is not limited to this. You may make it perform 2nd PWM control by a process. In this case, the CPU 41 may detect the “on period flag” delivered from the other control unit at a constant cycle (that is, in time series) by the same process as in FIG. 9. Further, for example, by interrupting the CPU 41 at the rising edge of the on / off period of the control period of the second PWM control, the CPU 41 is actively notified of the on / off period, and the process corresponding to FIG. You may make it make it.

(Embodiment 4)
In the third embodiment, when the ON period of the control period of the second PWM control is detected, the first PWM control is performed based on a value obtained by subtracting a constant value from the stored power supply voltage value when the OFF period is detected. On the other hand, in the fourth embodiment, when the ON period of the control period of the second PWM control is detected, the first PWM control is performed based on the power supply voltage value when the previous ON period is detected. is there.

  Although the processing procedure is different between the third and fourth embodiments, the processing in FIGS. 4 and 10 is common. Further, instead of the process of FIG. 5 described in the third embodiment, the process of FIG. 7 described in the first embodiment is executed. Description of the processing of FIGS. 4, 7, and 10 is omitted. Below, the combination of the process of FIG.4, FIG.7 and FIG.10 and the process of FIG. 11 is demonstrated.

  FIG. 11 is a flowchart showing a processing procedure of the CPU 41 that detects the on / off period of the control cycle of the PWM control related to the defogger 7b and stores the voltage value detected by the voltmeter 5 in the on period in the off period. It is. The following processing is started at regular intervals counted by the timer 44 and executed according to a control program stored in the ROM 42 in advance. In the present embodiment, the processing shown in FIG. 11 may be started at the same cycle as the processing shown in FIG. 4 or may be started at a different cycle.

Except for step S314, step S318, step S319, and step S322 of the process of FIG. 11, the process from step S311 to step S320 is the same as the process from step S211 to step S220 of the process of FIG. The description is omitted.
When it is determined in step S314 that the “on flag” is “1” (step S314: YES), or when the process of step S316 is completed, the CPU 41 sets the voltage value “Vt” stored in the register to “Von”. Write (step S318) and the process is terminated.

When the process of step S320 is completed, the CPU 41 writes “Von” in “Vmem” (step S322) and ends the process. On the other hand, when it is determined in step S319 that the “on flag” is “0” (step S319: YES), the CPU 41 ends the process as it is, but in this case as well, the process is performed after executing the process of step S322. You may make it complete | finish.
In this way, the CPU 41 detects the voltage value detected by the voltmeter 5 when it detects that the “on period flag” is “1”, and detects that the “on period flag” is “0”. Write to "Vmem". Therefore, the power supply voltage value is stored in “Vmem” before the power supply voltage that has fallen in a step-like manner recovers and rises.

  In addition, the same code | symbol is attached | subjected to the location corresponding to Embodiment 1, 3, and the detailed description is abbreviate | omitted.

As described above, according to the fourth embodiment, the on / off period of the control cycle of the PWM control related to the defogger is detected, and the power supply voltage value when the on period is detected is set to the off period. When it is detected, it is stored, and when the ON period is detected thereafter, PWM control related to the brake lamp is performed based on the stored power supply voltage value.
Therefore, even if a brake lamp whose supply power is PWM-controlled according to the voltage value of the in-vehicle power supply and a defogger that shares part or all of the power supply and power supply line are turned on, the illuminance of the brake lamp can be prevented from instantaneously decreasing. It becomes possible to do.

It is a block diagram which shows schematic structure of Embodiment 1 of the power supply control apparatus which concerns on this invention. It is a timing chart for demonstrating the influence which ON of a defogger has on the illumination intensity of a brake lamp. It is a flowchart which shows the process sequence of CPU which detects ON / OFF of a defogger signal, and memorize | stores the voltage value which the voltmeter detected in the case of OFF. It is a flowchart which shows the process sequence of CPU which carries out PWM control of the electric power which should be supplied to a brake lamp. It is a flowchart which shows the process sequence of CPU which concerns on the subroutine of ON time calculation. It is a flowchart which shows the processing procedure of CPU which detects ON / OFF of a defogger signal, and memorize | stores the voltage value which the voltmeter detected in the case of being turned off. It is a flowchart which shows the process sequence of CPU which concerns on the subroutine of ON time calculation. It is a timing chart for demonstrating the influence which PWM control of the electric power supplied to a defogger has on the illumination intensity of a brake lamp. It is a flowchart which shows the process sequence of CPU which detects the on / off period of the control period of the PWM control which concerns on a defogger, and memorize | stores the voltage value which the voltmeter detected in the off period. It is a flowchart which shows the process sequence of CPU which carries out PWM control of the electric power which should be supplied to a defogger. It is a flowchart which shows the process sequence of CPU which detects the ON / OFF period of the control cycle of the PWM control which concerns on a defogger, and memorize | stores the voltage value which the voltmeter detected in the ON period in the OFF period.

Explanation of symbols

1 Alternator (power supply)
3 Battery (Power)
4 control unit 41 CPU (PWM control unit, first PWM control unit, second PWM control unit, detection means)
42 ROM
43 RAM (storage means)
44 Timer 5 Voltmeter 6b Brake lamp (load)
7b Defogger (second load, load different from the load)
100 Power supply control device

Claims (4)

In a power supply control device comprising: a voltmeter that detects a voltage value of a power supply; and a PWM control unit that performs PWM control so as to keep constant the power to be supplied from the power supply to the load based on the voltage value detected by the voltmeter ,
Detecting means for detecting in time series a signal designating on / off of the second load to which power is to be supplied from the power source;
Storage means for storing the voltage value detected by the voltmeter when the detection means detects a signal designating OFF ;
The PWM control unit is configured to perform PWM control based on a voltage value lower than a voltage value stored by the storage unit when the detection unit detects a signal designating ON. . In a power supply control device comprising: a voltmeter that detects a voltage value of a power supply; and a PWM control unit that performs PWM control so as to keep constant the power to be supplied from the power supply to the load based on the voltage value detected by the voltmeter ,
Detecting means for detecting in time series a signal designating on / off of the second load to which power is to be supplied from the power source;
Storage means for storing the voltage value detected by the voltmeter when the detection means detects a signal designating on, and when the detection means detects off;
The PWM control unit is configured to perform PWM control based on a voltage value stored in the storage unit when the detection unit detects a signal designating ON. A voltmeter that detects a voltage value of the power supply, a first PWM control unit that PWM-controls power to be supplied from the power supply to the load based on the voltage value detected by the voltmeter in a first period, and a load from the power supply to the load in the power supply control device and a second 2PWM controller for PWM control with a long second period than the first circumferential-life so as to maintain a constant power to be supplied to different loads and,
Detecting means for detecting on / off periods of PWM control by the second PWM control unit in time series ;
Storage means for storing a voltage value detected by the voltmeter when the detection means detects an off period ;
The first PWM control unit is configured to perform PWM control based on a voltage value lower than the voltage value stored in the storage unit when the detection unit detects an ON period. A voltmeter that detects a voltage value of the power supply, and a first PWM control unit that performs PWM control in a first period so as to keep constant the power to be supplied from the power supply to the load based on the voltage value detected by the voltmeter; in the power supply control device and a second 2PWM controller for PWM control with a long second period than the first circumferential-life so as to maintain a constant power to be supplied to the different loads from the load from the power source,
Detecting means for detecting on / off periods of PWM control by the second PWM control unit in time series ;
Storage means for storing the voltage value detected by the voltmeter when the detection means detects an on period, and when the detection means detects an off period;
The first PWM control unit is configured to perform PWM control based on a voltage value stored in the storage unit when the detection unit detects an ON period.

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