JP5417641B2 - Power converter - Google Patents

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JP5417641B2
JP5417641B2 JP2009089231A JP2009089231A JP5417641B2 JP 5417641 B2 JP5417641 B2 JP 5417641B2 JP 2009089231 A JP2009089231 A JP 2009089231A JP 2009089231 A JP2009089231 A JP 2009089231A JP 5417641 B2 JP5417641 B2 JP 5417641B2
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capacitors
capacitor
connection point
voltage
switches
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JP2010246189A (en
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淳一 伊東
章弘 小高
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Fuji Electric Co Ltd
Nagaoka University of Technology
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Fuji Electric Co Ltd
Nagaoka University of Technology
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H02M7/487—Neutral point clamped inverters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H02M7/4837—Flying capacitor converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0095—Hybrid converter topologies, e.g. NPC mixed with flying capacitor, thyristor converter mixed with MMC or charge pump mixed with buck

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)

Description

本発明は、直流電圧から複数レベルの電圧を生成して出力可能な電力変換装置に関するものである。   The present invention relates to a power converter capable of generating and outputting a plurality of levels of voltage from a DC voltage.

図１２は、後述する非特許文献１に記載されているインバータの主回路構成図である。この回路は、容量が等しいコンデンサＣ１〜Ｃ４の直列回路の直流電圧を、Ｕ相ユニット１０Ｕ、Ｖ相ユニット１０Ｖ、Ｗ相ユニット１０Ｗにより３相交流電圧に変換するものであり、出力１相分について考えると、８個の自己消弧形半導体スイッチ（図１２はＩＧＢＴを用いた例であり、以下では、自己消弧形半導体スイッチをその代表例であるＩＧＢＴとして呼称する。）と、１４個のダイオード（６個のダイオードＤ１〜Ｄ６及び８個の環流ダイオード）とにより構成されている。なお、以下では、環流ダイオードが逆並列接続されたＩＧＢＴを半導体スイッチＳ１〜Ｓ８という（単にスイッチともいう）ものとする。
また、図１２において、Ｅｄは直流電圧、Ｍは直流回路の中点、ＩＵはＵ相電流、Ｕ，Ｖ，Ｗは出力端子、５０は負荷を示す。 FIG. 12 is a main circuit configuration diagram of an inverter described in Non-Patent Document 1 described later. This circuit converts a DC voltage of a series circuit of capacitors C 1 to C 4 having the same capacity into a three-phase AC voltage by a U-phase unit 10U, a V-phase unit 10V, and a W-phase unit 10W, and outputs one phase. Considering the minute, eight self-extinguishing semiconductor switches (FIG. 12 is an example using an IGBT, and hereinafter, the self-extinguishing semiconductor switch is referred to as a typical example of the IGBT), and 14 And six diodes (six diodes D 1 to D 6 and eight free-wheeling diodes). In the following description, the IGBTs in which the freewheeling diodes are connected in antiparallel are referred to as semiconductor switches S 1 to S 8 (also simply referred to as switches).
In FIG. 12, E d is a DC voltage, M is a midpoint of the DC circuit, I U is a U-phase current, U, V, and W are output terminals, and 50 is a load.

次に、この従来技術における１相分（Ｕ相）の動作を説明する。
図１３は、図１２のスイッチＳ１〜Ｓ８のオンオフ状態と、直流回路の中点Ｍを基準に観測した出力端子Ｕの電圧ＶＵＭとの関係を示したものであり、「１」はスイッチがオンの状態を、「０」はスイッチがオフの状態である。なお、図１２における各コンデンサＣ１〜Ｃ４の電圧値をＥｄ／４とする。 Next, the operation for one phase (U phase) in this prior art will be described.
FIG. 13 shows the relationship between the on / off state of the switches S 1 to S 8 in FIG. 12 and the voltage V UM of the output terminal U observed with reference to the midpoint M of the DC circuit. The switch is on, and “0” is the switch off. Incidentally, the voltage values of the capacitors C 1 -C 4 in FIG. 12 and E d / 4.

この図１３に基づいて適切なスイッチをオンオフすることにより、出力電圧ＶＵＭの電圧波形は、例えば図８のようになり、平均値が正弦波状の電圧を出力することが可能となる。
この従来技術は、非特許文献１に記載されている如く、一般にダイオードクランプ形５レベルインバータと呼ばれている。この５レベルインバータは、広く普及している２レベルインバータに比べ、出力電圧に含まれる高調波成分が少ない。このため、例えば負荷５０を電動機とした場合に、高調波による電動機の発生損失を低減できると共に、出力電圧の変化量が２レベルインバータに比べて少ないことから、電動機に発生するサージ電圧が低減され、サージ電圧に起因する電動機の絶縁劣化を抑制できる、等の多くの利点を有している。 By turning on and off an appropriate switch based on FIG. 13, the voltage waveform of the output voltage V UM becomes, for example, as shown in FIG. 8, and it is possible to output a voltage whose average value is a sine wave.
As described in Non-Patent Document 1, this conventional technique is generally called a diode clamp type five-level inverter. This five-level inverter has fewer harmonic components contained in the output voltage than the widely used two-level inverter. For this reason, for example, when the load 50 is an electric motor, the generation loss of the electric motor due to harmonics can be reduced and the amount of change in the output voltage is smaller than that of the two-level inverter, so that the surge voltage generated in the electric motor is reduced. In addition, it has many advantages such as suppressing insulation deterioration of the electric motor due to the surge voltage.

佐野憲一郎，藤田英明，「ダイオードクランプ形５レベル変換器用ＲＳＣＣ直流電圧均一化回路の電流定格低減の検討」，平成２０年電気学会産業応用部門大会，第１分冊，Ｉ−５４９〜５５２（Ｆｉｇ．１）Kenichiro Sano, Hideaki Fujita, “Examination of current rating reduction of RSCC DC voltage equalization circuit for diode clamp type 5-level converter”, 2008 IEEJ Industrial Application Division Conference, Volume 1, I-549-552 (FIG. 1)

さて、図１２において、例えば出力電圧ＶＵＭがＥｄ／２である場合に、Ｕ相電流ＩＵが正（図１２における矢印の向きを正とする）方向に流れているとすると、図１３からも明らかなように、電流は４個のスイッチＳ１〜Ｓ４に流れることになる。
一般的に半導体素子は、電流が流れると必ず導通損失が発生する。換言すれば、電流が流れる半導体素子の数が多ければ発生損失が多くなるということであり、図１２の従来技術では、４個のスイッチＳ１〜Ｓ４に通流することから発生損失が大きくなるという問題があった。また、半導体素子の数として、１相分で考えると、図１２ではＩＧＢＴが８個、ダイオードが１４個で、合計２２個となり、３相分ではその３倍にも達するため、低価格化の妨げとなっていた。 In FIG. 12, for example, when the output voltage V UM is E d / 2, the U-phase current I U is flowing in the positive direction (the direction of the arrow in FIG. 12 is positive). As is clear from FIG. 4, current flows through the four switches S 1 to S 4 .
In general, a semiconductor element always generates a conduction loss when a current flows. In other words, the larger the number of semiconductor elements through which current flows, the greater the generated loss. In the prior art of FIG. 12, the generated loss is large because it flows through the four switches S 1 to S 4. There was a problem of becoming. Also, considering the number of semiconductor elements for one phase, in FIG. 12, the number of IGBTs is 8 and the number of diodes is 14, which is a total of 22 pieces. It was a hindrance.

そこで、本発明の解決課題は、従来技術のように出力電圧に含まれる高調波成分が少ないという利点を損なうことなく、半導体素子で発生する損失を低減すると共に、半導体素子の数を減少させて装置全体の低価格化、回路構成の簡略化を可能にした電力変換装置を提供することにある   Therefore, the problem to be solved by the present invention is to reduce the loss generated in the semiconductor element and reduce the number of semiconductor elements without losing the advantage that the harmonic component contained in the output voltage is small as in the prior art. The object is to provide a power conversion device capable of reducing the overall cost of the device and simplifying the circuit configuration.

上記課題を解決するため、請求項１に係る発明は、第１〜第４の半導体スイッチを直列に接続した半導体スイッチ直列回路と、第１，第２のコンデンサの直列回路とを、直流電源にそれぞれ並列に接続し、
双方向の電流を遮断可能で双方向の耐圧を有する第１，第２の双方向スイッチを直列に接続した双方向スイッチ直列回路と、第３のコンデンサとを、前記半導体スイッチ直列回路内の第２，第３の半導体スイッチの直列回路にそれぞれ並列に接続し、
第１，第２のコンデンサの直列接続点と第１，第２の双方向スイッチの直列接続点とを接続し、
第２，第３の半導体スイッチの直列接続点を、出力端子として負荷に接続して構成され、
第１，第２のコンデンサの直列接続点と出力端子との間に、第１のコンデンサ，第２のコンデンサ，第１，第３のコンデンサの直列回路，第２，第３のコンデンサの直列回路，または、第３のコンデンサを接続し、もしくは、第１，第２のコンデンサの直列接続点と出力端子とを接続するように、前記各スイッチのうち所定の２個のスイッチのみをオンさせるものである。 In order to solve the above-mentioned problem, the invention according to claim 1 is directed to a DC power supply comprising a semiconductor switch series circuit in which first to fourth semiconductor switches are connected in series and a series circuit of first and second capacitors. Each connected in parallel,
A bidirectional switch series circuit in which a first and a second bidirectional switch capable of interrupting bidirectional current and having a bidirectional breakdown voltage are connected in series, and a third capacitor are connected to each other in the semiconductor switch series circuit. 2, connected in parallel to the series circuit of the third semiconductor switch,
Connecting the series connection point of the first and second capacitors and the series connection point of the first and second bidirectional switches;
The series connection point of the second and third semiconductor switches is connected to a load as an output terminal ,
Between the series connection point of the first and second capacitors and the output terminal, the first capacitor, the second capacitor, the series circuit of the first and third capacitors, and the series circuit of the second and third capacitors , Or a third capacitor is connected, or only two of the switches are turned on so that the series connection point of the first and second capacitors and the output terminal are connected It is.

請求項２に係る発明は、請求項１に記載した電力変換装置において、前記各スイッチをオンまたはオフさせることにより、第３のコンデンサの電圧値を、第１，第２のコンデンサの電圧値の和の１／４となるように調整するものである。 According to a second aspect of the present invention, in the power conversion device according to the first aspect, the voltage value of the third capacitor is set to the voltage value of the first and second capacitors by turning each switch on or off. It is adjusted so that it becomes 1/4 of the sum .

請求項３に係る発明は、第１，第２の半導体スイッチの直列回路と、第１，第２のコンデンサの直列回路とを、直流電源にそれぞれ並列に接続し、双方向の電流を遮断可能で双方向の耐圧を有する第１，第２の双方向スイッチの直列回路と、第３，第４の半導体スイッチの直列回路と、第５，第６の半導体スイッチの直列回路と、第３のコンデンサとを、それぞれ並列に接続し、第１，第２の半導体スイッチの直列接続点と第３，第４の半導体スイッチの直列接続点とを接続すると共に、第１，第２のコンデンサの直列接続点と第１，第２の双方向スイッチの直列接続点とを接続し、第５，第６の半導体スイッチの直列接続点を、出力端子として負荷に接続したものである。 The invention according to claim 3 is capable of interrupting bidirectional current by connecting the series circuit of the first and second semiconductor switches and the series circuit of the first and second capacitors in parallel to the DC power source, respectively. A series circuit of first and second bidirectional switches having bidirectional breakdown voltage, a series circuit of third and fourth semiconductor switches, a series circuit of fifth and sixth semiconductor switches, and a third circuit The capacitors are respectively connected in parallel, and the series connection point of the first and second semiconductor switches and the series connection point of the third and fourth semiconductor switches are connected, and the series of the first and second capacitors are connected. The connection point is connected to the series connection point of the first and second bidirectional switches, and the series connection point of the fifth and sixth semiconductor switches is connected to the load as an output terminal .

請求項４に係る発明は、請求項３に記載した電力変換装置において、第１，第２のコンデンサの直列接続点と出力端子との間に、第１のコンデンサ，第２のコンデンサ，第１，第３のコンデンサの直列回路，第２，第３のコンデンサの直列回路，または、第３のコンデンサを接続し、もしくは、第１，第２のコンデンサの直列接続点と出力端子とを接続するように、前記各スイッチをオンまたはオフさせるものである。
また、請求項５に係る発明は、請求項３または４に記載した電力変換装置において、前記各スイッチをオンまたはオフさせることにより、第３のコンデンサの電圧値を、第１，第２のコンデンサの電圧値の和の１／４となるように調整するものである。 According to a fourth aspect of the present invention, there is provided the power converter according to the third aspect , wherein the first capacitor, the second capacitor, the first capacitor are connected between the series connection point of the first and second capacitors and the output terminal. , A series circuit of third capacitors, a series circuit of second and third capacitors, or a third capacitor, or a series connection point of the first and second capacitors and an output terminal. as such, the a shall turns on or off the switches.
According to a fifth aspect of the present invention, in the power conversion device according to the third or fourth aspect, the voltage value of the third capacitor is changed to the first and second capacitors by turning each switch on or off. It adjusts so that it may become 1/4 of the sum of the voltage value of.

本発明によれば、従来技術よりも少数の半導体素子により、出力電圧に含まれる高調波成分の少ない電力変換装置を構成することができる。このため、損失の低減や装置全体の低価格化、回路構成の簡略化が可能になる。   ADVANTAGE OF THE INVENTION According to this invention, the power converter device with few harmonic components contained in an output voltage can be comprised by fewer semiconductor elements than a prior art. For this reason, it is possible to reduce loss, to lower the overall cost of the apparatus, and to simplify the circuit configuration.

本発明の第１実施形態を示す１相分の回路図である。It is a circuit diagram for one phase which shows 1st Embodiment of this invention. 図１における各スイッチのオンオフ状態、出力電圧、負荷電流極性、コンデンサＣ３の充放電の関係を示す図である。OFF states of the switches in FIG. 1, the output voltage, the load current polarity is a diagram showing the charging and discharging of the relationship between the capacitor C 3. 図１における出力電圧ＶＵＭの波形図である。FIG. 2 is a waveform diagram of an output voltage V UM in FIG. 1. 本発明の第２実施形態を示す１相分の回路図である。It is a circuit diagram for 1 phase which shows 2nd Embodiment of this invention. 図４における各スイッチのオンオフ状態、出力電圧、負荷電流極性、コンデンサＣ３の充放電の関係を示す図である。FIG. 5 is a diagram showing a relationship among on / off states of each switch in FIG. 4, output voltage, load current polarity, and charging / discharging of a capacitor C 3 . 図４における出力電圧ＶＵＭの波形図である。FIG. 5 is a waveform diagram of an output voltage V UM in FIG. 4. 第１実施形態の電力変換装置を制御するための制御ブロック図である。It is a control block diagram for controlling the power converter of a 1st embodiment. 図１における出力電圧ＶＵＭの波形図である。FIG. 2 is a waveform diagram of an output voltage V UM in FIG. 1. 図７における比較器の動作説明図である。It is operation | movement explanatory drawing of the comparator in FIG. 第１実施形態を用いた単相インバータの構成図である。It is a block diagram of the single phase inverter using 1st Embodiment. 第１実施形態を用いた３相インバータの構成図である。It is a block diagram of the three-phase inverter using 1st Embodiment. 非特許文献１に記載されているインバータの主回路構成図である。2 is a main circuit configuration diagram of an inverter described in Non-Patent Document 1. FIG. 図１２における各スイッチのオンオフ状態と出力電圧との関係を示す図である。It is a figure which shows the relationship between the on-off state of each switch in FIG. 12, and an output voltage.

以下、図に沿って本発明の実施形態を説明する。
まず、図１は本発明の第１実施形態を示す回路図であり、３相インバータの出力１相分（図示例ではＵ相）のみを示している。
図１において、直流電源Ｅには、環流ダイオードが逆並列接続されたＩＧＢＴからなる半導体スイッチＳ１〜Ｓ４の直列回路と、コンデンサＣ１，Ｃ２の直列回路とが並列に接続されている。また、ＩＧＢＴを逆並列接続することによって双方向の電流遮断が可能で双方向の耐圧を備えた双方向スイッチＳ５Ｄ，Ｓ６Ｄの直列回路が、スイッチＳ２，Ｓ３の直列回路と並列に接続され、更にコンデンサＣ３も並列に接続されている。
また、双方向スイッチＳ５Ｄ，Ｓ６Ｄの直列接続点が直流回路の中点（コンデンサＣ１，Ｃ２の直列接続点）Ｍに接続され、スイッチＳ２，Ｓ３の直列接続点が、負荷（図示せず）に接続される出力端子Ｕとなっている。 Hereinafter, embodiments of the present invention will be described with reference to the drawings.
First, FIG. 1 is a circuit diagram showing a first embodiment of the present invention, and shows only one phase output (U phase in the illustrated example) of a three-phase inverter.
In FIG. 1, a DC power source E is connected in parallel with a series circuit of semiconductor switches S 1 to S 4 made of an IGBT having anti-reflective diodes connected in antiparallel, and a series circuit of capacitors C 1 and C 2 . . In addition, a series circuit of bidirectional switches S 5D and S 6D capable of bidirectional current interruption and having bidirectional withstand voltage by connecting the IGBTs in anti-parallel is parallel to the series circuit of switches S 2 and S 3. It is connected, and further connected in parallel also the capacitor C 3.
The series connection point of the bidirectional switches S 5D and S 6D is connected to the midpoint of the DC circuit (the series connection point of the capacitors C 1 and C 2 ) M, and the series connection point of the switches S 2 and S 3 is connected to the load The output terminal U is connected to (not shown).

上記構成において、半導体スイッチＳ１〜Ｓ４は請求項１における第１〜第４の半導体スイッチに、コンデンサＣ１〜Ｃ３は第１〜第３のコンデンサに、双方向スイッチＳ５Ｄ，Ｓ６Ｄは第１，第２の双方向スイッチに、それぞれ相当する。 In the above configuration, the semiconductor switches S 1 to S 4 are the first to fourth semiconductor switches in claim 1, the capacitors C 1 to C 3 are the first to third capacitors, and the bidirectional switches S 5D and S 6D. Corresponds to the first and second bidirectional switches, respectively.

ここで、直流電源Ｅの電圧をＥｄ、コンデンサＣ１の電圧をＶＣ１、コンデンサＣ２の電圧をＶＣ２、コンデンサＣ３の電圧をＶＣ３とすると、中点Ｍから観測した出力電圧ＶＵＭと各スイッチＳ１〜Ｓ４，Ｓ５Ｄ，Ｓ６Ｄのオンオフ状態との関係は、図２のようになる（図２における電流極性等に関する項目は後述する）。
なお、図２では、各スイッチＳ１〜Ｓ４，Ｓ５Ｄ，Ｓ６Ｄのオンオフ状態に応じた動作モードを、それぞれモード１〜８としてある。 Here, when the voltage of the DC power source E is E d , the voltage of the capacitor C 1 is V C1 , the voltage of the capacitor C 2 is V C2 , and the voltage of the capacitor C 3 is V C3 , the output voltage V observed from the middle point M The relationship between the UM and the on / off states of the switches S 1 to S 4 , S 5D and S 6D is as shown in FIG. 2 (items relating to current polarity and the like in FIG. 2 will be described later).
In FIG. 2, the operation modes corresponding to the on / off states of the switches S 1 to S 4 , S 5D and S 6D are referred to as modes 1 to 8, respectively.

この図２に基づいて、図１における適切なスイッチを選択してオンオフすると、出力電圧ＶＵＭは、図３に示すように７つの電圧レベル（ＶＣ１，ＶＣ１−ＶＣ３，ＶＣ３，０，−ＶＣ３，−ＶＣ２＋ＶＣ３，−ＶＣ２）を持ち、かつ、平均電圧が正弦波状の波形となる。
図２から判るように、本実施形態では、負荷電流が通過するスイッチの数は常に２個となり、図１２の従来技術における通流スイッチの数（４個）と比べて半減するので、損失が低減される。また、図１の回路では、ＩＧＢＴ及びダイオードの個数の合計が１２個であり、図１２の２２個に比べて素子数が大幅に減少するため、低価格化、回路構成の簡略化が可能である。
なお、この実施形態では直流電圧ＥｄをコンデンサＣ１，Ｃ２により分割した構成となっているが、各コンデンサＣ１，Ｃ２に電圧値がＥｄ／２の直流電圧源をそれぞれ接続してもよい。 When an appropriate switch in FIG. 1 is selected and turned on / off based on FIG. 2, the output voltage V UM is changed to seven voltage levels (V C1 , V C1 −V C3 , V C3 , 0 as shown in FIG. 3). , −V C3 , −V C2 + V C3 , −V C2 ), and the average voltage is a sinusoidal waveform.
As can be seen from FIG. 2, in this embodiment, the number of switches through which the load current passes is always two, which is halved compared to the number of current-carrying switches (four) in the prior art in FIG. Reduced. Further, in the circuit of FIG. 1, the total number of IGBTs and diodes is 12, and the number of elements is significantly reduced compared to 22 in FIG. 12, so that the price can be reduced and the circuit configuration can be simplified. is there.
Note that although a configuration in which divided by the capacitor C 1, C 2 the DC voltage E d in this embodiment, the voltage value connected E d / 2 of the DC voltage source to each of the capacitors C 1, C 2 May be.

次に、図４は本発明の第２実施形態を示す回路図であり、第１実施形態と同様に３相インバータの出力１相分（図示例ではＵ相）のみを示している。
図４において、直流電源Ｅには、環流ダイオードが逆並列接続されたＩＧＢＴからなる半導体スイッチＳ１，Ｓ２の直列回路と、コンデンサＣ１，Ｃ２の直列回路とが並列に接続されている。また、環流ダイオードが逆並列接続されたＩＧＢＴからなる半導体スイッチＳ５，Ｓ６の直列回路と、同じく半導体スイッチＳ７，Ｓ８の直列回路と、ＩＧＢＴを逆並列接続することで双方向の電流遮断が可能で双方向の耐圧を備えた双方向スイッチＳ３Ｄ，Ｓ４Ｄの直列回路とが、全て並列に接続され、更にコンデンサＣ３も並列に接続されている。 Next, FIG. 4 is a circuit diagram showing the second embodiment of the present invention, and shows only one phase output (U phase in the illustrated example) of the three-phase inverter as in the first embodiment.
In FIG. 4, a DC power source E is connected in parallel with a series circuit of semiconductor switches S 1 and S 2 made of an IGBT to which a freewheeling diode is connected in antiparallel, and a series circuit of capacitors C 1 and C 2 . . In addition, a bidirectional current can be obtained by connecting an IGBT in reverse parallel to a series circuit of semiconductor switches S 5 and S 6 made of an IGBT to which a free-wheeling diode is connected in anti-parallel, and a series circuit of semiconductor switches S 7 and S 8. A series circuit of bidirectional switches S 3D and S 4D that can be shut off and has a bidirectional breakdown voltage is all connected in parallel, and a capacitor C 3 is also connected in parallel.

更に、スイッチＳ１，Ｓ２の直列接続点とスイッチＳ５，Ｓ６の直列接続点とが接続され、コンデンサＣ１，Ｃ２の直列接続点と双方向スイッチＳ３Ｄ，Ｓ４Ｄの直列接続点とが接続されている。そして、スイッチＳ７，Ｓ８の直列接続点が、負荷に接続される出力端子Ｕとなっている。 Further, the series connection point of the switches S 1 and S 2 and the series connection point of the switches S 5 and S 6 are connected, and the series connection point of the capacitors C 1 and C 2 and the series connection of the bidirectional switches S 3D and S 4D . The dots are connected. The series connection point of the switches S 7 and S 8 is an output terminal U connected to the load.

上記構成において、半導体スイッチＳ１，Ｓ２は請求項２における第１，第２の半導体スイッチに、半導体スイッチＳ５，Ｓ６，Ｓ７，Ｓ８は第３〜第６の半導体スイッチに、双方向スイッチＳ３Ｄ，Ｓ４Ｄは第１，第２の双方向スイッチに、コンデンサＣ１〜Ｃ３は第１〜第３のコンデンサに相当する。 In the above configuration, the semiconductor switches S 1 and S 2 are the first and second semiconductor switches in claim 2, the semiconductor switches S 5 , S 6 , S 7 and S 8 are the third to sixth semiconductor switches, The bidirectional switches S 3D and S 4D correspond to the first and second bidirectional switches, and the capacitors C 1 to C 3 correspond to the first to third capacitors.

さて、前記同様に直流電源Ｅの電圧をＥｄ、コンデンサＣ１の電圧をＶＣ１、コンデンサＣ２の電圧をＶＣ２、コンデンサＣ３の電圧をＶＣ３とすると、中点Ｍから観測した出力電圧ＶＵＭと各スイッチＳ１，Ｓ２，Ｓ３Ｄ，Ｓ４Ｄ，Ｓ５〜Ｓ８のオンオフ状態との関係は、図５のようになる（図５における電流極性等に関する項目は後述する）。
なお、図５では、各スイッチＳ１，Ｓ２，Ｓ３Ｄ，Ｓ４Ｄ，Ｓ５〜Ｓ８のオンオフ状態に応じた動作モードを、それぞれモード１〜１２としてある。 As described above, when the voltage of the DC power source E is E d , the voltage of the capacitor C 1 is V C1 , the voltage of the capacitor C 2 is V C2 , and the voltage of the capacitor C 3 is V C3 , the output observed from the middle point M The relationship between the voltage V UM and the on / off states of the switches S 1 , S 2 , S 3D , S 4D , and S 5 to S 8 is as shown in FIG. 5 (items relating to current polarity and the like in FIG. 5 will be described later). .
In FIG. 5, the operation modes corresponding to the on / off states of the switches S 1 , S 2 , S 3D , S 4D , and S 5 to S 8 are referred to as modes 1 to 12, respectively.

この図５に基づいて、図４における適切なスイッチを選択してオンオフすると、出力電圧ＶＵＭは、図６に示すように９つの電圧レベル（ＶＣ１＋ＶＣ３，ＶＣ１，ＶＣ１−ＶＣ３，ＶＣ３，０，−ＶＣ３，−ＶＣ２＋ＶＣ３，−ＶＣ２，−ＶＣ２−ＶＣ３）を持ち、かつ、平均電圧が正弦波状の波形となる。
図５から判るように、本実施形態では、負荷電流が通過するスイッチの数は常に２個または３個となり、図１２の従来技術における通流スイッチの数（４個）と比べて減少するので、損失が低減される。また、図４の回路によれば、ＩＧＢＴ及びダイオードの個数の合計が１６個であり、図１の回路に比べると多くなるが、図１２の２２個よりも減少するため、従来よりも低価格化、回路構成を簡略化することができる。
この実施形態においても、各コンデンサＣ１，Ｃ２に電圧値がＥｄ／２の直流電圧源をそれぞれ接続してもよい。 When an appropriate switch in FIG. 4 is selected and turned on / off based on FIG. 5, the output voltage V UM is changed to nine voltage levels (V C1 + V C3 , V C1 , V C1 −V C3 as shown in FIG. 6). , V C3 , 0, −V C3 , −V C2 + V C3 , −V C2 , −V C2 −V C3 ), and the average voltage is a sinusoidal waveform.
As can be seen from FIG. 5, in this embodiment, the number of switches through which the load current passes is always two or three, which is smaller than the number of current-carrying switches (four) in the prior art of FIG. 12. , Loss is reduced. Further, according to the circuit of FIG. 4, the total number of IGBTs and diodes is 16, which is larger than that of the circuit of FIG. 1, but is lower than 22 of FIG. And circuit configuration can be simplified.
Also in this embodiment, a DC voltage source having a voltage value of E d / 2 may be connected to each of the capacitors C 1 and C 2 .

次いで、図７は図１に示した第１実施形態の電力変換装置を制御するための制御ブロック図である。この図７の説明に先立ち、コンデンサＣ３の電圧を制御しつつ複数の電圧レベルを出力させる原理について以下に説明する。 Next, FIG. 7 is a control block diagram for controlling the power converter of the first embodiment shown in FIG. Prior to the description of FIG. 7 will be described below principle of outputting a plurality of voltage levels while controlling the voltage of the capacitor C 3.

まず、図１におけるコンデンサＣ１，Ｃ２の電圧がＥｄ／２である状態で、適切なスイッチをオンオフすることによりコンデンサＣ３を充放電させ、コンデンサＣ３の電圧ＶＣ３をＥｄ／４に制御した場合、各スイッチのオンオフ状態に応じた出力電圧ＶＵＭは、前述した図２における出力電圧ＶＵＭの欄の右側に示す値、すなわち、Ｅｄ／２，Ｅｄ／４，０，−Ｅｄ／４，−Ｅｄ／２となる。
従って、図２に基づいて所定のスイッチをオンオフすることにより、出力電圧ＶＵＭは、図８に示すように、５つの電圧レベル（Ｅｄ／２，Ｅｄ／４，０，−Ｅｄ／４，−Ｅｄ／２）を持ち、かつ、平均電圧が正弦波状の波形となる。 First, in a state where the voltages of the capacitors C 1 and C 2 in FIG. 1 are E d / 2, the capacitor C 3 is charged and discharged by turning on and off an appropriate switch, and the voltage V C3 of the capacitor C 3 is changed to E d / 2. 4, the output voltage V UM according to the on / off state of each switch is the value shown on the right side of the column of the output voltage V UM in FIG. 2, that is, E d / 2, E d / 4, 0 , −E d / 4, −E d / 2.
Therefore, by turning on and off a predetermined switch based on FIG. 2, the output voltage V UM is changed to five voltage levels (E d / 2, E d / 4, 0, −E d / 4, -E d / 2), and the average voltage is a sinusoidal waveform.

なお、図２における「電流極性」は、負荷電流ｉＵの極性であり、図１における矢印の方向を＋としてある。また、各モードの右端に記した「ｃ」，「ｄ」は、そのモードにおける各スイッチのオンオフにより、電流極性に応じてコンデンサＣ３が充電（「ｃ」）または放電（「ｄ」）することを示している。 Incidentally, "the current polarity" in FIG. 2 is a polarity of the load current i U, is the direction of the arrow in FIG. 1 as +. In addition, “c” and “d” written at the right end of each mode are charged (“c”) or discharged (“d”) by the capacitor C 3 according to the current polarity by turning on / off each switch in that mode. It is shown that.

図２によれば、例えば出力電圧ＶＵＭとしてＥｄ／４を得るためには、モード２またはモード３の何れかを選択すれば良いことが判る。すなわち、電流極性及びコンデンサＣ３の電圧ＶＣ３に応じて、モード２またはモード３の何れかを選択すれば、コンデンサＣ３を充電または放電することが可能になり、コンデンサＣ３の電圧ＶＣ３をＥｄ／４に調整しつつ、出力電圧ＶＵＭとしてＥｄ／４を負荷に供給することが可能になる。 As can be seen from FIG. 2, for example, in order to obtain E d / 4 as the output voltage V UM , either mode 2 or mode 3 may be selected. That is, according to the voltage V C3 of the current polarity and the capacitor C 3, by selecting one of the mode 2 or mode 3, it is possible to charge or discharge the capacitor C 3, the voltage V C3 of the capacitor C 3 the while adjusting the E d / 4, consisting of E d / 4 as the output voltage V UM can be supplied to the load.

前述した図４の第２実施形態についても、同様なことが言える。
つまり、各スイッチのオンオフ状態、出力電圧、コンデンサＣ３の充放電及び電流極性の関係は図５のように整理することができる。例えば、出力電圧ＶＵＭとしてＥｄ／４を得るためには、電流極性とコンデンサＣ３の電圧ＶＣ３に応じて、モード４またはモード５の何れか選択すれば、コンデンサＣ３の電圧ＶＣ３をＥｄ／４に調整しつつ、出力電圧ＶＵＭとしてＥｄ／４を負荷に供給することができる。 The same applies to the second embodiment of FIG. 4 described above.
That is, on-off states of the switches, the output voltage, charge and discharge, and current polarity relationships of the capacitor C 3 can be arranged as shown in FIG. 5. For example, in order to obtain the E d / 4 as the output voltage V UM in accordance with the voltage V C3 of the current polarity and the capacitor C 3, by selecting one of the modes 4 or mode 5, the voltage V C3 of the capacitor C 3 the while adjusting the E d / 4, the E d / 4 as the output voltage V UM can be supplied to the load.

なお、図１の第１実施形態では、出力可能な電圧の絶対値の最大値がＥｄ／２であるのに対し、図４の第２実施形態では３Ｅｄ／４となる。また、前述した如く、コンデンサＣ３の電圧をＥｄ／４とした場合、図１では５つの電圧レベルを出力可能であるのに対し、図４では７つの電圧レベルを出力可能である。 In the first embodiment of FIG. 1, the maximum absolute value of the voltage that can be output is E d / 2, whereas in the second embodiment of FIG. 4, it is 3 E d / 4. Further, as described above, when the voltage of the capacitor C 3 is E d / 4, five voltage levels can be output in FIG. 1, whereas seven voltage levels can be output in FIG.

次に、図７の制御ブロック図に基づき、図１に示した第１実施形態の電力変換装置を制御する方法を説明する。
図７において、三角波Ｔｒｉ１〜Ｔｒｉ４は、振幅（ピーク−ピーク値）が１／２であり、また、各三角波の直流成分（オフセット）は、それぞれ３／４，１／４，−１／４，−３／４である。
また、比較器６１は、電圧指令値ＶＵ ＊と三角波Ｔｒｉ１〜Ｔｒｉ４とをそれぞれ比較し、図９に示す論理に基づき、電力変換装置の５レベルの出力電圧Ｅｄ／２，Ｅｄ／４，０，−Ｅｄ／４，−Ｅｄ／２を決定する。 Next, a method for controlling the power conversion apparatus according to the first embodiment shown in FIG. 1 will be described based on the control block diagram of FIG.
In FIG. 7, the triangular waves Tri 1 to Tri 4 have an amplitude (peak-peak value) of 1/2, and the DC components (offsets) of the triangular waves are 3/4, 1/4, −1 / 4, -3/4.
Further, the comparator 61 compares the voltage command value V U * with the triangular waves Tri 1 to Tri 4 , respectively, and based on the logic shown in FIG. 9, the five-level output voltages E d / 2, E d of the power converter. / 4,0, -E d / 4, to determine the -E d / 2.

図７の比較器６２は、コンデンサＣ３の電圧ＶＣ３がその指令値Ｅｄ／４に等しくなったことを検出するためのものであり、この比較器６２にはヒステリシス特性を持たせても良い。
また、比較器６３は、負荷電流ｉＵの極性を検出するためのものである。 The comparator 62 in FIG. 7 is for detecting that the voltage V C3 of the capacitor C 3 is equal to the command value E d / 4, and this comparator 62 may have a hysteresis characteristic. good.
Further, the comparator 63 is for detecting the polarity of the load current i U.

図７のオンオフスイッチ選択部７０は、比較器６１，６２，６３の出力に基づき、図２に従ってスイッチＳ１〜Ｓ６Ｄのうちの適切なスイッチをオンオフするように駆動信号を出力する。
例えば、出力電圧ＶＵＭをＥｄ／４とする場合、コンデンサＣ３の電圧が指令値Ｅｄ／４よりも低く、かつ、負荷電流ｉＵの極性が正である時には、図２に基づいてモード２を選択し、コンデンサＣ３を充電しつつＥｄ／４を出力する。
また、図２によれば、出力電圧ＶＵＭを０とする場合には、モード４及びモード５の何れかを選択可能であるが、一方のモードのみを選択すると特定のスイッチに損失が偏るため、図７のオンオフスイッチ選択部７０では、モード４及びモード５を交互に選択する等の方法により、特定のスイッチに損失が偏るのを防止することもできる。 The on / off switch selection unit 70 in FIG. 7 outputs a drive signal based on the outputs of the comparators 61, 62, and 63 so as to turn on / off appropriate switches among the switches S 1 to S 6D according to FIG.
For example, when the output voltage V UM is E d / 4, when the voltage of the capacitor C 3 is lower than the command value E d / 4 and the polarity of the load current i U is positive, based on FIG. Mode 2 is selected, and E d / 4 is output while charging the capacitor C 3 .
According to FIG. 2, when the output voltage V UM is set to 0, either mode 4 or mode 5 can be selected. However, if only one mode is selected, loss is biased to a specific switch. The on / off switch selection unit 70 of FIG. 7 can also prevent loss from being biased to a specific switch by a method such as alternately selecting mode 4 and mode 5.

以上に説明した制御方法は図１の第１実施形態に係る電力変換装置を対象としたものであるが、図４の第２実施形態に係る電力変換装置についても同様である。
すなわち、図７のオンオフスイッチ選択部７０が、第１実施形態では図２に基づいてオンオフするスイッチを選択するのに対し、第２実施形態では、図５に基づいてオンオフするスイッチを選択すれば良い。 The control method described above is intended for the power conversion device according to the first embodiment of FIG. 1, but the same applies to the power conversion device according to the second embodiment of FIG. 4.
That is, the on / off switch selection unit 70 in FIG. 7 selects the switch to be turned on / off based on FIG. 2 in the first embodiment, whereas in the second embodiment, the switch to be turned on / off based on FIG. 5 is selected. good.

次いで、図１０は、前述した第１実施形態を用いた単相インバータの構成図である。この場合、コンデンサＣ１，Ｃ２の直列接続点である中点Ｍと、スイッチＳ２，Ｓ３の直列接続点である出力端子Ｕとの間に単相の負荷５１が接続される。
また、図１１は、第１実施形態を用いた３相インバータの構成図である。同図において、８０ＵはＵ相ユニット、８０ＶはＶ相ユニット、８０ＷはＷ相ユニットであり、各ユニットの構成は実質的に図１，図１０と同一である。ここで、Ｓ１Ｕ〜Ｓ４Ｕ，Ｓ１Ｖ〜Ｓ４Ｖ，Ｓ１Ｗ〜Ｓ４Ｗは半導体スイッチ、Ｓ５ＵＤ，Ｓ６ＵＤ，Ｓ５ＶＤ，Ｓ６ＶＤ，Ｓ５ＷＤ，Ｓ６ＷＤは双方向スイッチ、Ｃ３Ｕ，Ｃ３Ｖ，Ｃ３Ｗはコンデンサを示す。
この回路では、スイッチＳ２Ｕ，Ｓ３Ｕの直列接続点、同Ｓ２Ｖ，Ｓ３Ｖの直列接続点、同Ｓ２Ｗ，Ｓ３Ｗの直列接続点を３相の出力端子Ｕ，Ｖ，Ｗとして３相の負荷５０が接続される。
なお、図４の第２実施形態についても、同様にして単相インバータ、３相インバータを構成することができる。 Next, FIG. 10 is a configuration diagram of a single-phase inverter using the first embodiment described above. In this case, a single-phase load 51 is connected between a middle point M that is a series connection point of the capacitors C 1 and C 2 and an output terminal U that is a series connection point of the switches S 2 and S 3 .
FIG. 11 is a configuration diagram of a three-phase inverter using the first embodiment. In this figure, 80U is a U-phase unit, 80V is a V-phase unit, and 80W is a W-phase unit, and the configuration of each unit is substantially the same as in FIGS. Here, S 1U ~S 4U, S 1V ~S 4V, S 1W ~S 4W semiconductor switches, S 5UD, S 6UD, S 5VD, S 6VD, S 5WD, S 6WD bidirectional switch, C 3U, C 3V and C3W indicate capacitors.
In this circuit, three-phase output terminals U, V, and W are used as a series connection point of switches S 2U and S 3U, a series connection point of S 2V and S 3V, and a series connection point of S 2W and S 3W. The load 50 is connected.
In addition, also about 2nd Embodiment of FIG. 4, a single phase inverter and a 3 phase inverter can be comprised similarly.

Ｓ１〜Ｓ８，Ｓ１Ｕ〜Ｓ４Ｕ，Ｓ１Ｖ〜Ｓ４Ｖ，Ｓ１Ｗ〜Ｓ４Ｗ：半導体スイッチ
Ｓ３Ｄ，Ｓ４Ｄ，Ｓ５Ｄ，Ｓ６Ｄ，Ｓ５ＵＤ，Ｓ６ＵＤ，Ｓ５ＶＤ，Ｓ６ＶＤ，Ｓ５ＷＤ，Ｓ６ＷＤ：双方向スイッチ
Ｄ１〜Ｄ６：ダイオード
Ｃ１〜Ｃ４，Ｃ３Ｕ，Ｃ３Ｖ，Ｃ３Ｗ：コンデンサ
Ｅ：直流電源
Ｍ：中点
Ｕ，Ｖ，Ｗ：出力端子
１０Ｕ，８０Ｕ：Ｕ相ユニット
１０Ｖ，８０Ｖ：Ｖ相ユニット
１０Ｗ，８０Ｗ：Ｗ相ユニット
５０，５１：負荷
６１〜６３：比較器
７０：オンオフスイッチ選択部 S 1 ~S 8, S 1U ~S 4U, S 1V ~S 4V, S 1W ~S 4W: the semiconductor switch S 3D, S 4D, S 5D , S 6D, S 5UD, S 6UD, S 5VD, S 6VD, S 5WD, S 6WD: bidirectional switch D 1 to D 6: diode C 1 ~C 4, C 3U, C 3V, C 3W: capacitor E: DC power supply M: middle U, V, W: output terminal 10 U, 80U: U-phase unit 10V, 80V: V-phase unit 10W, 80W: W-phase unit 50, 51: Load 61-63: Comparator 70: On / off switch selector

Claims (5)

第１〜第４の半導体スイッチを直列に接続した半導体スイッチ直列回路と、第１，第２のコンデンサの直列回路とを、直流電源にそれぞれ並列に接続し、
双方向の電流を遮断可能で双方向の耐圧を有する第１，第２の双方向スイッチを直列に接続した双方向スイッチ直列回路と、第３のコンデンサとを、前記半導体スイッチ直列回路内の第２，第３の半導体スイッチの直列回路にそれぞれ並列に接続し、
第１，第２のコンデンサの直列接続点と第１，第２の双方向スイッチの直列接続点とを接続し、
第２，第３の半導体スイッチの直列接続点を、出力端子として負荷に接続して構成され、
第１，第２のコンデンサの直列接続点と出力端子との間に、第１のコンデンサ，第２のコンデンサ，第１，第３のコンデンサの直列回路，第２，第３のコンデンサの直列回路，または、第３のコンデンサを接続し、もしくは、第１，第２のコンデンサの直列接続点と出力端子とを接続するように、前記各スイッチのうち所定の２個のスイッチのみをオンさせることを特徴とする電力変換装置。 A semiconductor switch series circuit in which the first to fourth semiconductor switches are connected in series and a series circuit of the first and second capacitors are connected in parallel to the DC power supply,
A bidirectional switch series circuit in which a first and a second bidirectional switch capable of interrupting bidirectional current and having a bidirectional breakdown voltage are connected in series, and a third capacitor are connected to each other in the semiconductor switch series circuit. 2, connected in parallel to the series circuit of the third semiconductor switch,
Connecting the series connection point of the first and second capacitors and the series connection point of the first and second bidirectional switches;
The series connection point of the second and third semiconductor switches is connected to a load as an output terminal ,
Between the series connection point of the first and second capacitors and the output terminal, the first capacitor, the second capacitor, the series circuit of the first and third capacitors, and the series circuit of the second and third capacitors , Or connect a third capacitor, or turn on only two of the switches so that the series connection point of the first and second capacitors and the output terminal are connected. The power converter characterized by this. 請求項１に記載した電力変換装置において、
前記各スイッチをオンまたはオフさせることにより、第３のコンデンサの電圧値を、第１，第２のコンデンサの電圧値の和の１／４となるように調整することを特徴とする電力変換装置。 In the power converter device according to claim 1,
A power converter that adjusts the voltage value of the third capacitor to be ¼ of the sum of the voltage values of the first and second capacitors by turning each switch on or off. . 第１，第２の半導体スイッチの直列回路と、第１，第２のコンデンサの直列回路とを、直流電源にそれぞれ並列に接続し、
双方向の電流を遮断可能で双方向の耐圧を有する第１，第２の双方向スイッチの直列回路と、第３，第４の半導体スイッチの直列回路と、第５，第６の半導体スイッチの直列回路と、第３のコンデンサとを、それぞれ並列に接続し、
第１，第２の半導体スイッチの直列接続点と第３，第４の半導体スイッチの直列接続点とを接続すると共に、第１，第２のコンデンサの直列接続点と第１，第２の双方向スイッチの直列接続点とを接続し、
第５，第６の半導体スイッチの直列接続点を、出力端子として負荷に接続したことを特徴とする電力変換装置。 A series circuit of the first and second semiconductor switches and a series circuit of the first and second capacitors are respectively connected in parallel to the DC power source,
A series circuit of first and second bidirectional switches capable of interrupting bidirectional current and having bidirectional breakdown voltage; a series circuit of third and fourth semiconductor switches; and a fifth circuit and a sixth semiconductor switch. A series circuit and a third capacitor are respectively connected in parallel,
The series connection point of the first and second semiconductor switches and the series connection point of the third and fourth semiconductor switches are connected, and both the series connection point of the first and second capacitors and the first and second points are connected. Connected to the series connection point of
A power conversion device , wherein the series connection point of the fifth and sixth semiconductor switches is connected to a load as an output terminal . 請求項３に記載した電力変換装置において、
第１，第２のコンデンサの直列接続点と出力端子との間に、第１のコンデンサ，第２のコンデンサ，第１，第３のコンデンサの直列回路，第２，第３のコンデンサの直列回路，または、第３のコンデンサを接続し、もしくは、第１，第２のコンデンサの直列接続点と出力端子とを接続するように、
前記各スイッチをオンまたはオフさせることを特徴とする電力変換装置。 In the power converter device according to claim 3 ,
Between the series connection point of the first and second capacitors and the output terminal, the first capacitor, the second capacitor, the series circuit of the first and third capacitors, and the series circuit of the second and third capacitors Or a third capacitor is connected, or a series connection point of the first and second capacitors and an output terminal are connected,
The power converter according to claim Rukoto each switch is turned on or off. 請求項３または４に記載した電力変換装置において、In the power converter device according to claim 3 or 4,
前記各スイッチをオンまたはオフさせることにより、第３のコンデンサの電圧値を、第１，第２のコンデンサの電圧値の和の１／４となるように調整することを特徴とする電力変換装置。A power converter that adjusts the voltage value of the third capacitor to be ¼ of the sum of the voltage values of the first and second capacitors by turning each switch on or off. .
JP2009089231A 2009-04-01 2009-04-01 Power converter Expired - Fee Related JP5417641B2 (en)

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