JP5407211B2 - Processing apparatus, clock frequency determination method, and computer program - Google Patents

Description

  The present invention determines the clock frequency according to an external situation of a processing apparatus that operates in synchronization with a clock signal or an application program, executes a process with a processing capability according to the situation, and effectively reduces power consumption. The present invention relates to a processing apparatus, a clock frequency determination method, and a computer program.

  In recent years, power saving of devices has been promoted. For this reason, it is set so that the clock frequency can be changed, and a computer device capable of performing control such as performing processing by lowering the clock frequency during sleep has become widespread.

For example, Patent Document 1 discloses an apparatus having a frequency synthesizer that supplies a clock signal having a variable clock frequency to a CPU (Central Processing Unit) and other system buses based on the contents of an interrupt or application program to be executed. ing. In the technique disclosed in Patent Document 1, the clock frequency can be changed based on a predetermined application program to be executed or the usage of the CPU. Further, in the technique disclosed in Patent Document 1, an optimal clock frequency is previously determined and stored for each application program to be executed, and the clock frequency stored in correspondence with the application program to be executed is stored. It is possible to change.
JP 2002-533801 A

  As described above, the clock frequency can be changed, and the clock frequency can be optimally determined according to the application program to be executed. However, the clock frequency is a unique value for each processing device determined according to the performance of the CPU or MPU (Micro Processing Unit). In the configuration in which the frequency is stored in advance for each application program, it is necessary to previously calculate the optimum clock frequency for each processing apparatus, and it is not general-purpose. In addition, when a plurality of application programs are executed simultaneously, an optimal clock frequency cannot be determined.

Also, when processing is performed in cooperation with a plurality of processing devices and peripheral devices, the level of processing capacity required for each processing device may change depending on the external situation and the function of each processing device. In this case, the control of changing the clock frequency according to the status of the device itself such as the number and type of application programs being executed by the processing device itself is insufficient. Even when the same application program is executed, the required processing capacity may differ depending on the external situation. Each processing device calculates the required processing capacity in a complex manner according to the external situation and the type of application program, etc., and by appropriately changing the clock frequency, excessive power is consumed by processing devices that do not want high processing capacity. It is desirable to avoid being consumed.

  The present invention has been made in view of such circumstances, and a processing device that performs processing in synchronization with a clock signal executes processing with processing power required according to an external situation, and changes power consumption according to the situation. It is an object of the present invention to provide a processing device, a clock frequency determination method, and a computer program that can be effectively reduced.

The processing device according to the first aspect of the present invention is a processing device that executes processing in synchronization with a clock signal whose frequency can be changed , and the processing load of the processing device is different from that of execution means that executes one or more application programs. Processing capacity storage means for storing, for each application program, the correspondence between a plurality of external situations to be taken and the necessary processing capacity required for execution of the application program under each external situation; and detection means for detecting the external situation; , said detecting means corresponding to the external situation is detected, and an extraction means for extracting the necessary processing power which is stored by pre-Symbol capacity storage means in response to an application program to be executed, it must be extracted by the extraction means based on the processing capacity, and calculating means for calculating a capacity required for the application program to be executed, the calculated detemir There characterized in that it comprises a determining means for determining a clock frequency in accordance with the calculated capacity.

In the processing device according to the second invention, when the execution means executes a plurality of application programs simultaneously, the calculation means uses the required processing capacity extracted by the extraction means corresponding to each of the plurality of application programs. On the basis of this, the total required processing capacity is calculated so as to be the capacity required for a plurality of application programs to be executed.

A processing device according to a third aspect of the present invention comprises clock frequency storage means for storing the correspondence between the total required processing capacity and the clock frequency, and the determining means corresponds to the total required processing capacity calculated by the calculation means. The clock frequency is determined by acquiring the clock frequency stored in the clock frequency storage means.

A clock frequency determination method according to a fourth aspect of the present invention is a method for determining a clock frequency of a processing device that executes processing in synchronization with a clock signal whose frequency can be changed, wherein the processing load of the processing device is different. The correspondence between a plurality of external situations and the necessary processing capability required to execute one or a plurality of application programs by the processing device under each external situation is stored in advance, the external situation is detected, and the detected external situation And the necessary processing capability stored in advance corresponding to the application program to be executed is extracted, and based on the extracted required processing capability, the capability necessary for the application program to be executed by the processing device is calculated and calculated. The clock frequency is determined according to the capability.

According to a fifth aspect of the present invention, there is provided a computer program for causing a computer that performs processing in synchronization with a clock signal capable of changing the frequency to control the change of the clock frequency, and causing the computer to detect an external situation. , Externally detected from the correspondence between a plurality of external situations stored in advance and the processing load of the processing device differing and a necessary processing capability required to execute one or a plurality of application programs under each external situation The necessary processing capacity corresponding to the situation and corresponding to the application program to be executed is extracted. Based on the extracted required processing capacity, the necessary capacity for the application program to be executed is calculated, and the clock frequency is determined according to the calculated capacity. Is determined.

In the first invention, the fourth invention, and the fifth invention, a plurality of processing loads of the processing device such as the status of the external device connected to the processing device (computer), the status of the surrounding environment, and the elapsed time are different. An external situation is defined in advance, and a necessary processing capacity required for executing a process under each situation is stored in advance. The processing device (computer) is one of the external situations where the current situation is defined based on the data obtained from the built-in measuring instrument or external sensor, or the data received from the external device via the communication medium. Detect whether it is true. Then, the processing device (computer) extracts the necessary processing capacity corresponding to the detected external situation, calculates the necessary processing capacity comprehensively based on the extracted necessary processing capacity, and sets the clock frequency according to the calculated capacity. decide. This makes it possible to change the clock frequency in accordance with not only the internal state of the processing apparatus (computer) itself but also the external state.

In the first invention, the fourth invention, and the fifth invention , the processing apparatus can execute one or a plurality of application programs, and a process required for execution of each application program that differs depending on an external situation stored in advance. Based on the capability, the required processing capability is extracted based on the detected external situation and the application program to be executed, and the capability required for the processing is calculated comprehensively. As a result, it is possible to obtain the required processing capacity with higher accuracy, change the clock frequency according to the application program to be executed even under the same external situation, and when the same application program is being executed. Even in such a case, it is possible to flexibly change the clock frequency according to different external conditions.

In the second invention, when a plurality of application programs are executed simultaneously, the clock is based on the total required processing capacity obtained by summing up the processing capacities required in the external situation detected when each application program is executed. The frequency is determined. As a result, the clock frequency can be changed so as to obtain an appropriate processing capability in accordance with the difference in external situation and the combination of a plurality of application programs being executed.

In the third aspect of the invention, the correspondence between the total required processing capacity and the clock frequency is stored in advance for each processing device, whereby the processing for determining the clock frequency can be reduced.

  According to the present invention, the processing apparatus can be changed to a clock frequency suitable for different required processing capabilities depending on not only the internal situation of itself but also the external situation. Even when the same process is executed to perform one function, the processing capacity required at the start of the process is higher at the start of the process and at the end of the process, such as a higher processing capacity. Accordingly, the clock frequency can be adjusted so as to obtain an appropriate processing capability. Therefore, although it is not necessary, an excessive increase in the clock frequency can be avoided with higher accuracy, and power consumption can be effectively reduced.

  For example, when processing is performed which requires a high processing capacity at the start of processing but has a low processing capacity other than that, the clock frequency can be lowered at times other than the start of processing. Thus, by adjusting the clock frequency according to the processing capability required in more detail, it is possible to efficiently use hardware resources and reduce power consumption.

  Hereinafter, the present invention will be specifically described with reference to the drawings showing embodiments thereof.

  In the embodiment described below, a case where the processing apparatus according to the present invention is applied to a microcomputer (hereinafter referred to as a microcomputer) designed to execute a specific process will be described as an example. More specifically, in the following embodiment, an example applied to processing in a microcomputer of an ECU (Electronic Control Unit) that is mounted on a vehicle and performs various controls will be described.

(Embodiment 1)
FIG. 1 is a block diagram showing the configuration of the microcomputer according to the first embodiment. The microcomputer 1 includes a CPU 10, a clock unit 11, a RAM (Random Access Memory) 12, a ROM (Read Only Memory) 13, and an I / O (Input / Output) unit 14.

  The CPU 10 reads and executes each program stored in the ROM 13 to cause the microcomputer 1 to operate as hardware that performs specific processing. Specifically, the CPU 10 reads and executes the control program 1P and the application program 131 stored in the ROM 13, thereby controlling external devices connected via the I / O unit 14 in cooperation with the RAM 12. To do. Note that the arithmetic processing by the CPU 10 is performed in synchronization with the frequency of the clock signal output from the clock unit 11 described later.

  The clock unit 11 includes an oscillation circuit that outputs an oscillation signal having a predetermined frequency, such as a fixed oscillator oscillation circuit using a crystal oscillator or a ceramic oscillator, or a ring oscillator. Further, the clock unit 11 includes a frequency dividing circuit that divides the oscillation signal output from the oscillation circuit and a multiplication circuit that multiplies the oscillation signal. The clock signal is output not only to the CPU 10 but also to each component such as the RAM 12 and the ROM 13. The clock unit 11 determines the frequency of the clock signal to be output according to the control signal from the CPU 10 and supplies it to the CPU 10. The clock frequency can be set by setting whether the frequency of the oscillation signal fixedly output from the oscillation circuit is n times or 1 / n times (n is a natural number).

  The RAM 12 uses a memory that can rewrite data and can be accessed at high speed, such as SRAM (Static Random Access Memory) or DRAM (Dynamic Random Access Memory). In the RAM 12, various programs executed by the CPU 10 are read and stored, and data generated in the course of arithmetic processing by the CPU 10 is temporarily stored.

  The ROM 13 uses a memory such as a flash memory, a mask ROM, an EPROM (Erasable Programmable ROM), or an EEPROM (Electrically Erasable Programmable ROM) that does not lose data during reading. The ROM 13 stores a control program 1P that the CPU 10 reads and executes. The ROM 13 stores an application program 131 that realizes the control function of the ECU. The ROM 13 stores a correspondence table 132 and a clock frequency table 133 that are referred to by the CPU 10. Details of the correspondence table 132 will be described later.

  The I / O unit 14 is an interface that includes a plurality of terminals that receive a signal input from the outside and realize a signal output to the outside. It is good also as a structure which has A / D conversion and a D / A conversion function. For example, the I / O unit 14 is connected to a measuring instrument, a sensor, or the like that acquires data used for controlling the microcomputer 1. The CPU 10 can be controlled using data acquired by the I / O unit 14. Further, a network controller is connected to the I / O unit 14, and the CPU 10 can acquire data transmitted / received via the network. Various loads or actuators to be controlled by the microcomputer 1 are connected to the I / O unit 14, and the microcomputer 1 outputs a control signal to the control target by the I / O unit 14.

  FIG. 2 is an explanatory diagram showing an example of the contents of the correspondence table 132 and the clock frequency table 133 stored in the ROM 13 in the first embodiment. 2A shows an example of the contents of the correspondence table 132, and FIG. 2B shows an example of the contents of the clock frequency table 133.

  As shown in FIG. 2 (a), the correspondence table 132 stores the processing capability required for the CPU 10 under each circumstance as a relative numerical value. 2A is an example where the ECU in which the microcomputer 1 operates is an ECU having a function of controlling multiplex communication in a network connecting a plurality of ECUs. The content example shown in FIG. 2A is when the ECU in which the microcomputer 1 operates starts the network in order to start communication via the network, that is, when the network controller of the ECU is started and various settings are initialized. The CPU 10 is required to have a processing capacity represented by “20”. Further, when the engine of the vehicle on which the ECU on which the microcomputer 1 operates is mounted is started, the CPU 10 needs a processing capability represented by “10”. Further, during the battery deterioration warning, the CPU 10 needs a processing capability represented by “10”. Further, since no particular processing is required while the multiplex communication in the network is stopped, the processing capability represented by “1” is required.

  As shown in FIG. 2B, the clock frequency table 133 stores the relative level of the clock frequency corresponding to the required processing capacity. The level of the clock frequency may be stored as a specific numerical value corresponding to the CPU 10. In the content example shown in FIG. 2B, the clock frequency may be low when the processing capability required for the CPU 10 is “1-10”, and the clock frequency is medium when it is “11-20”. It shows what to do. It is indicated that the clock frequency should be a high frequency when the processing capability required for the CPU 10 is “21” or more.

  When referring to the examples of the correspondence table 132 and the clock frequency table 133 described above, the CPU 10 operates based on the high frequency clock signal immediately after the network is started, operates based on the medium frequency clock signal during the engine start, and performs multiple communication. It is set to operate based on a low-frequency clock signal during stoppage.

  A process in which the CPU 10 of the microcomputer 1 configured as described above determines the clock frequency according to the external situation and changes it when necessary will be described with reference to a flowchart.

  FIG. 3 is a flowchart illustrating an example of a processing procedure in which the CPU 10 of the microcomputer 1 according to the first embodiment determines and changes the clock frequency. The CPU 10 executes the processing shown below by reading the control program 1P stored in the ROM 13 into the RAM 12 and executing it.

  CPU10 judges whether the change of the external condition was detected (step S11). The CPU 10 is an elapsed time since activation by a timer (not shown) incorporated therein, data obtained from a sensor connected to the I / O unit 14, a measuring instrument, or a network connected to the I / O unit 14. An external situation is detected based on data obtained from an external device via a controller. The CPU 10 temporarily stores data indicating the detected external situation in the RAM 12 and compares it with the content of the data indicating the next detected external condition to determine whether or not the external situation has changed. Also good.

  If the CPU 10 determines that a change in the external situation has not been detected (S11: NO), the process returns to step S11 and waits until it is determined that a change in the external situation has been detected. When the CPU 10 determines that a change in the external situation has been detected (S11: YES), the CPU 10 refers to the correspondence table 132 from the ROM 13 (step S12), and acquires the necessary processing capacity corresponding to the detected external situation from the correspondence table 132. (Step S13).

  Next, the CPU 10 refers to the clock frequency table 133 from the ROM 13 (step S14), and reads and determines the clock frequency corresponding to the necessary processing capability acquired in step S13 from the clock frequency table 133 (step S15). Then, the CPU 10 changes the clock frequency by inputting a control signal indicating the clock frequency determined in step S15 to the clock unit 11 (step S16), and ends the process.

  If a change in the external situation is detected, but the clock frequency determined in step S15 is not different from the clock frequency output by the clock circuit 11 so far, the process in step S16 may be omitted.

  Next, the result of determining and changing the clock frequency by processing executed by the CPU 10 referring to the table in the ROM 13 as shown in the flowchart of FIG. 3 will be described with a specific example. FIG. 4 is an explanatory diagram showing a clock frequency determined by the CPU 10 of the microcomputer 1 in the first embodiment. The horizontal axis indicates the passage of time, and the vertical axis indicates the frequency. Note that the upper part of the explanatory diagram shows the external situation changing with the passage of time.

  In the example shown in FIG. 4, the microcomputer 1 is in the sleep state at time t0. Thereafter, at time t1, the microcomputer 1 starts from the sleep state by an interrupt and starts to start the network. When the CPU 10 detects the activation of the network by detecting the interruption and the activation of the network controller, the CPU 10 changes the clock frequency to a high frequency with reference to the correspondence table 132 and the clock frequency table 133 of the ROM 13.

  Then, the microcomputer 1 ends the network activation process at time t2. The CPU 10 detects this by a signal from the network controller, measurement of elapsed time by a built-in timer, or the like. The CPU 10 refers to the correspondence table 132 and the clock frequency table 133 and changes the clock frequency to the medium frequency.

  Next, when the multiplex communication is stopped at time t3, the CPU 10 detects the stop of the network controller, or outputs a signal indicating that the CPU 10 stops by the processing of the CPU 10 itself, etc., so that the multiplex communication is stopped. Is detected. In this case, the CPU 10 refers to the correspondence table 132 and the clock frequency table 133 and changes the clock frequency to a low frequency.

  Thereafter, when the multiplex communication is started again at time t4, the CPU 10 detects the resumption of the multiplex communication by detecting a signal from the network controller or the like. In this case, the CPU 10 refers to the correspondence table 132 and the clock frequency table 133 and changes the clock frequency to the medium frequency.

  As shown in FIG. 4, the clock frequency can be appropriately determined and changed according to external conditions such as the status of other external devices, the status of the network, and the elapsed time, regardless of the contents of the processing executed by the CPU 10. . Thereby, the capability of the microcomputer 1 can be set to an appropriate processing capability according to different situations. Therefore, it is possible to accurately avoid unnecessary power consumption by operating with an excessively high frequency clock signal even though high processing capability is not required, and effectively reducing power consumption. Can do.

(Embodiment 2)
The second embodiment shows an example in which the clock frequency is determined according to the number and type of application programs executed by the microcomputer 1 in addition to the determination of the frequency according to the external situation described in the first embodiment. In the second embodiment, the microcomputer 1 is configured to be able to execute a plurality of application programs. The microcomputer 1 according to the second embodiment determines the frequency according to the external situation and the application program being executed.

  FIG. 5 is a block diagram showing a configuration of the microcomputer according to the second embodiment. The microcomputer 2 includes a CPU 20, a clock unit 21, a RAM 22, a ROM 23, and an I / O unit 24. The details of each component are the same as those in the first embodiment except for the specific processing contents realized by the CPU 20, the table stored in the ROM 23, and the functions realized by the program stored in the ROM 23. It is the same.

  The CPU 20 reads and executes each program stored in the ROM 23 in the same manner as the CPU 10 of the microcomputer 1 in the first embodiment. The CPU 20 controls the external device connected via the I / O unit 24 in cooperation with the RAM 22. The arithmetic processing by the CPU 20 is performed in synchronization with the frequency of the clock signal output from the clock unit 21.

  Similarly to the clock unit 11 of the microcomputer 1 in the first embodiment, the clock unit 21 includes an oscillation circuit, a frequency divider circuit, and a multiplier circuit. The clock unit 21 determines the frequency of the clock signal to be output in accordance with the control signal from the CPU 20 and supplies it to the CPU 20.

  The RAM 22 reads and stores various programs executed by the CPU 20 as well as the RAM 12 of the microcomputer 1 in the first embodiment, and temporarily stores data generated during the arithmetic processing by the CPU 20. The

  The ROM 23 is the same as the ROM 13 of the microcomputer 1 in the first embodiment. However, the CPU 20 of the microcomputer 2 in the second embodiment executes a plurality of application programs. Therefore, the ROM 23 stores a control program 2P and a plurality of application programs 231, 231,... That realize various control functions. The ROM 23 stores a correspondence table 232 and a clock frequency table 233 that are referred to by the CPU 20.

  The I / O unit 24 is the same as the I / O unit 14 of the microcomputer 1 in the first embodiment. The CPU 20 can acquire data by being connected to an external device such as a measuring instrument or a sensor via the I / O unit 24 or a network, and can control various loads or actuators via the I / O unit 24. It is possible to output a control signal to the target.

  FIG. 6 is an explanatory diagram for explaining a hierarchical structure of a program executed by CPU 20 in the second embodiment. The CPU 20 reads the control program 2P and the application program 231 stored in the ROM 23 into the RAM 22 and executes them. Each program executed by the CPU 20 is classified into three layers: an abstraction layer and a platform layer realized by the control program 2P executed by the CPU 20, an application layer realized by the application programs 231, 231,. Is possible.

  Here, the abstraction layer is a program for abstracting (virtualizing) the configuration of hardware resources such as the CPU 20 itself, the ROM 23, and the RAM 22, and providing a common operating environment. The abstraction layer is realized by a part of the control program 2P. The program corresponding to the abstraction layer particularly depends on the hardware configuration such as the performance of the CPU 20. Therefore, different abstraction layer programs are used for other CPUs.

The platform layer is a program that realizes processing common to a plurality of application programs 231, 231,... Executed in the upper application layer. The platform layer is realized by a part of the control program 2P. The processes common to the plurality of application programs 231, 231,... Refer to functions such as data reading / writing with the RAM 22 or the ROM 23 and control of a network controller connected to the outside. The program corresponding to the platform layer does not depend on the hardware configuration. Therefore, programs corresponding to the same platform layer can be used for different CPUs. The platform layer program may be stored in the ROM 23 as a platform program independently, and read and executed by the CPU 20.
Further, the determination of the clock frequency described later is realized by the CPU 20 reading and executing a part of the control program 2P corresponding to the platform layer.

  The application layer is a program that realizes a specific function of each ECU. For example, the CPU 20 reads and executes one of the application programs 231 to realize the illumination control application 1 that controls lighting / extinguishing of a vehicle room lamp or the like. Further, the CPU 20 simultaneously reads and executes another application program 231 to realize the application 2 that controls the power management of each ECU. And the other application program 231 implement | achieves the application 3 which controls the multiplex communication via the network between each ECU. In addition, there may be an application program that realizes control such as locking / unlocking of a door of a vehicle, or operation control of a car navigation device or an audio device.

  It is possible to realize a plurality of application programs 231, 231,... By separating the abstraction layer and platform layer from the application layer. A plurality of application programs 231, 231,... That do not depend on the hardware configuration are stored, and by determining which application program 231 is read and executed, any ECU with a different hardware configuration can be used as another ECU. Can be implemented by substituting the function that has been realized. The functions of the ECUs can be changed without changing all the programs by realizing the determination of the clock frequency described below and reading of data from the RAM 22 by the common platform layer. Therefore, it is possible to rearrange the functions of each ECU without changing the physical arrangement of each ECU.

  Hereinafter, a process in which the CPU 20 determines a clock frequency by executing a program corresponding to the platform layer and changes the clock frequency when necessary will be described.

  First, a table referred to when the CPU 20 determines the clock frequency will be described. FIG. 7 is an explanatory diagram showing an example of the contents of the correspondence table 232 and the clock frequency table 233 stored in the ROM 23 according to the second embodiment. FIG. 7A shows an example of the contents of the correspondence table 232, and FIG. 7B shows an example of the contents of the clock frequency table 233.

  As shown in FIG. 7A, the correspondence table 232 stores the processing capability required under each situation during the execution of the application program, as a relative value. More specifically, the CPU 20 performs an illumination control application 231 for controlling on / off of a vehicle room lamp, a power management control application program 231 for controlling power management, and a multiplex for controlling multiplex communication via a network. While the communication control application program 231 is being executed, the processing capability required under each situation is shown.

  In the correspondence table 232, for example, when network communication is activated, the CPU 20 subsequently executes the illumination control application program 231, and the CPU 20 executes the power management control application program 231. It is shown that the processing capacity represented by “10” is required. In this case, in order for the CPU 20 to execute the application program 231 for multiplex communication control, the CPU 20 needs a processing capability represented by “20”.

  Further, in order for the CPU 20 to execute the illumination control application program 231 while the engine of the vehicle on which the ECU on which the microcomputer 2 operates is mounted is started, the CPU 20 needs a processing capability represented by “10”. . On the other hand, in order for the CPU 20 to execute the application program 231 for power management control, the CPU 20 needs a processing capability represented by “20”. Note that the processing capacity represented by “10” is required for the CPU 20 to execute the application program 231 for multiplex communication control.

  Since the lighting of the room lamp or the like should be avoided particularly while the battery deterioration of the vehicle is warned, no processing is required even when the CPU 20 executes the application program 231 for the illumination control. Therefore, in this case, the CPU 20 needs a processing capability represented by “1”. Further, in order for the CPU 20 to execute the power management control application program 231 and the multiplex communication control application program 231 during the battery deterioration warning, the CPU 20 requires a processing capability represented by “10”.

  While the multiplex communication is stopped, in order for the CPU 20 to execute the illumination control application program 231 and the power management control application program 231, the CPU 20 needs a processing capability represented by “10”. It is said. On the other hand, while the multiplex communication is stopped, the CPU 20 does not require the processing performed by the execution of the multiplex communication control application program 231. Therefore, the CPU 20 needs the processing represented by “1”. Not too much.

  Thus, even if the same application program 231 is executed, the processing capability required of the CPU 20 differs depending on the situation. As shown in FIG. 7A, the necessary processing capacity corresponding to the situation is acquired appropriately by storing in advance the application programs 231 231,... To be executed and the necessary processing capacity corresponding to each external situation. Can do.

  The ROM 23 stores a clock frequency table 233 as shown in FIG. The clock frequency table 233 is the same as the clock frequency table 133 in the first embodiment. However, a clock frequency corresponding to the total required processing capacity obtained by summing up the required processing capacity under each situation of the plurality of application programs 231, 231... Being executed is associated and stored. In other words, when the CPU 20 is executing the illumination control application program 231 and the power management control application program 231, the total processing capacity and the clock frequency required in each situation corresponding to each application program 231. High and low are associated with each other. Therefore, when the total required processing capacity is, for example, “30 (= 10 + 20)”, the clock frequency should be a high frequency.

  The CPU 20 of the microcomputer 2 configured as described above will be described with reference to a flowchart for determining the clock frequency according to the application programs 231, 231,... .

  FIG. 8 is a flowchart illustrating an example of a processing procedure in which the CPU 20 of the microcomputer 2 according to the second embodiment determines and changes the clock frequency. The CPU 20 executes the following processing by reading the control program 2P stored in the ROM 23 to the RAM 22 and realizing the platform layer function.

  The CPU 20 determines whether a change in the external situation has been detected or whether the application program 231 being executed has changed (step S21). The CPU 20 is an elapsed time since activation by a timer (not shown) incorporated therein, data obtained from sensors, measuring instruments, etc. connected to the I / O unit 24, or a network connected to the I / O unit 24 An external situation is detected based on data obtained from an external device via a controller. The CPU 20 can recognize the application programs 231, 231,... Being executed by the platform layer program by reading and executing the control program 2P.

  If the CPU 20 does not detect a change in the external situation and determines that the application programs 231, 231,... Being executed have not changed (S 21: NO), the process returns to step S 21. When the CPU 20 detects a change in the external situation or determines that the running application programs 231, 231,... Have changed (S 21: YES), the CPU 20 refers to the correspondence table 232 from the ROM 23 (step S 22). .. Are extracted from the correspondence table 232 corresponding to the current external situation and corresponding to the application programs 231, 231,... Being executed (step S 23).

  The CPU 20 adds up the necessary processing capacities extracted in step S23 (step S24), and refers to the clock frequency table 233 from the ROM 23 (step S25). The CPU 20 reads and determines the clock frequency corresponding to the total required processing capacity added up from the clock frequency table 233 (step S26). Then, the CPU 20 changes the clock frequency by inputting the control signal indicating the clock frequency determined in step S26 to the clock unit 21 (step S27), and ends the process.

  Although it is determined that a change in the external situation has been detected or the application programs 231, 231,... Being executed have changed, the clock frequency determined in step S 26 is output by the clock circuit 21 so far. If the clock frequency does not change, the process of step S27 may be omitted.

  Next, the result of determining and changing the clock frequency by the process executed by the CPU 20 referring to the table of the ROM 23 as shown in the flowchart of FIG. 8 will be described with a specific example. FIG. 9 is an explanatory diagram showing a clock frequency determined by the CPU 20 of the microcomputer 2 according to the second embodiment. The horizontal axis indicates the passage of time, and the vertical axis indicates the frequency. In the upper part of the explanatory diagram, the external situation changing with the passage of time and the total required processing capacity at each time point are shown.

  In the example shown in FIG. 9, the microcomputer 2 is in the sleep state at time t0. At this time, the frequency of the clock signal output from the clock circuit 21 is a low frequency. Alternatively, the clock circuit 21 may be stopped in the sleep state.

  Thereafter, at time t1, an ignition switch (IG switch) of a vehicle on which the ECU including the microcomputer 2 is mounted is started, and the microcomputer 2 is activated from the sleep state. As a result, the engine is started for a predetermined time after time t1. At this time, the CPU 20 starts executing the application programs 231, 231,... For illumination control, power management control, and multiplex communication control. The CPU 20 detects that the engine is being started by receiving information indicating that the IG switch has started via the network controller connected to the I / O unit 24. In this case, the CPU 20 refers to the correspondence table 232 in the ROM 23, and each processing capacity necessary for executing the application programs 231, 231,... For illumination control, power management control, and multiplex communication control during engine startup, “10”, “20” and “10” are extracted. Then, the CPU 20 refers to the clock frequency table 233 of the ROM 23 to determine the clock frequency corresponding to the total required processing capacity “40” obtained by adding the extracted required processing capacities “10”, “20”, and “10”. In this case, the CPU 20 changes the clock frequency to a high frequency.

  At time t2, the network is started. The CPU 20 detects the start of the network by detecting the start of the network controller. In this case, the CPU 20 refers to the correspondence table 232 in the ROM 23, and has the processing capability required for executing the application programs 231, 231,... For the illumination control, power management control, and multiplex communication control during engine startup and network startup. , “10”, “20”, and “20” are extracted. Then, the CPU 20 determines a clock frequency corresponding to the total required processing capacity “50” obtained by adding the extracted required processing capacity with reference to the clock frequency table 233 of the ROM 23. In this case, the CPU 20 maintains the clock frequency as a high frequency.

  Thereafter, when the network activation is completed at time t3, the state returns to the state during engine start. The CPU 20 detects this and refers to the correspondence table 232 and the clock frequency table 233 to determine the clock frequency corresponding to the total required processing capacity “40” (= “10” + “20” + “10”). In this case, the CPU 20 maintains the clock frequency as a high frequency.

  Next, when the process during the engine start is completed at time t4 and the status becomes “other”, the CPU 20 detects this. The CPU 20 refers to the correspondence table 232 and the clock frequency table 233, and sets the total required processing capacity “30” (= “10” + “10” + “10”) of each application program 231, 231,. Determine the corresponding clock frequency. The CPU 20 maintains the clock frequency at a high frequency.

  Thereafter, when a battery deterioration warning is given at time t5, the CPU 20 detects this by receiving a warning signal from the battery via the I / O unit 24 or the like. In this case, the CPU 20 refers to the correspondence table 232 in the ROM 23, and each has a processing capacity necessary for executing the application programs 231, 231,... For illumination control, power management control, and multiplex communication control during the battery deterioration warning, “1”. ”,“ 10 ”, and“ 10 ”. The CPU 20 refers to the clock frequency table 233 of the ROM 23 to determine the clock frequency corresponding to the total required processing capacity “21” obtained by adding the extracted required processing capacities. In this case, the CPU 20 maintains the clock frequency as a high frequency.

  If the multiplex communication is further stopped at time t6, the CPU 20 stops the multiplex communication by detecting the stop of the network controller or by outputting a signal indicating the stop by the power management control of the CPU 20 itself. Is detected. In this case, the CPU 20 refers to the correspondence table 232 in the ROM 23 and executes the illumination control, power management control, and multiplex communication control application programs 231, 231,. Extract necessary processing capabilities, “1”, “10”, and “1”. The CPU 20 refers to the clock frequency table 233 of the ROM 23 to determine the clock frequency corresponding to the total required processing capacity “12” obtained by adding the extracted required processing capacities. In this case, the CPU 20 changes the clock frequency to the medium frequency.

  When the battery deterioration warning is completed at time t7, the CPU 20 detects this because, for example, the warning signal from the battery is not received via the I / O unit 24, and the current situation is only when the multiplex communication is stopped. Detect something. The CPU 20 refers to the correspondence table 232 of the ROM 23, and each of the processing capacities necessary for executing the illumination control, power management control, and multiplex communication control application programs 231, 231,. 10 ”and“ 1 ”are extracted. The CPU 20 refers to the clock frequency table 233 of the ROM 23 to determine the clock frequency corresponding to the total required processing capacity “21” obtained by adding the extracted required processing capacities. In this case, the CPU 20 changes the clock frequency to a high frequency.

  Thereafter, at time t8, the CPU 20 stops the execution of the application program 231 for multiplex communication control. In this case, the CPU 20 recognizes that the application programs 231 and 231 being executed by the program of its own platform layer are illumination control and power management control. The situation is detected as “other”. The CPU 20 refers to the correspondence table 232 in the ROM 23 and extracts the processing capacities “10” and “10” necessary for executing the application programs 231 and 231 for “illumination control” and “power management control” in the “other” situation, respectively. To do. The CPU 20 refers to the clock frequency table 233 of the ROM 23 to determine the clock frequency corresponding to the total required processing capacity “20” obtained by adding the extracted required processing capacities. In this case, the CPU 20 changes the clock frequency to the medium frequency.

  As shown in FIG. 9, for each of a plurality of application programs 231, 231,... Executed by the CPU 20, the clock frequency is appropriately determined and changed according to the processing capability required to execute each of them in each external situation. can do. As a result, even if the application programs 231, 231,... To be executed are the same, the ability of the microcomputer 2 can be set to an appropriate processing ability according to different situations. Therefore, even if the same application program 231 is executed, it is not necessary to consume a large amount of power by operating with an excessively high frequency clock signal in spite of the fact that high processing capability is not required depending on the situation. It can be avoided with high accuracy according to the detailed situation, and the power consumption can be effectively reduced.

  It should be understood that the embodiment disclosed above is illustrative in all respects and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the meanings described above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

2 is a block diagram illustrating a configuration of a microcomputer according to Embodiment 1. FIG. 6 is an explanatory diagram illustrating an example of contents of a correspondence table and a clock frequency table stored in the ROM in Embodiment 1. FIG. 4 is a flowchart illustrating an example of a processing procedure in which the CPU of the microcomputer according to the first embodiment determines and changes a clock frequency. 3 is an explanatory diagram showing a clock frequency determined by the CPU of the microcomputer according to Embodiment 1. FIG. 6 is a block diagram illustrating a configuration of a microcomputer according to Embodiment 2. FIG. FIG. 10 is an explanatory diagram for explaining a hierarchical structure of a program executed by a CPU in the second embodiment. FIG. 10 is an explanatory diagram illustrating an example of contents of a correspondence table and a clock frequency table stored in a ROM according to the second embodiment. 10 is a flowchart illustrating an example of a processing procedure in which the CPU of the microcomputer according to the second embodiment determines and changes a clock frequency. 6 is an explanatory diagram showing a clock frequency determined by a CPU of a microcomputer according to Embodiment 2. FIG.

Explanation of symbols

1, 2, microcomputer 10, 20 CPU
11, 21 Clock circuit 13, 23 ROM (storage means)

Claims (5)

In a processing apparatus that executes processing in synchronization with a clock signal capable of changing the frequency,
Execution means for executing one or more application programs;
A processing capacity storage means for storing, for each application program , correspondence between a plurality of external situations in which the processing load thereof is different and the necessary processing capacity required for executing the application program under each external situation;
A detection means for detecting an external situation;
Extraction means for said detecting means corresponds to the external situation has been detected, to extract the necessary processing power which is stored by pre-Symbol capacity storage means in response to an application program and executing,
A calculation means for calculating the capacity required for the application program to be executed based on the required processing capacity extracted by the extraction means;
And a determining unit that determines a clock frequency according to the capability calculated by the calculating unit. When the execution means executes a plurality of application programs simultaneously,
The calculating means calculates an overall required processing capacity based on the required processing capacity extracted by the extracting means corresponding to each of the plurality of application programs, and sets the required capacity for the plurality of application programs to be executed. The processing apparatus according to claim 1 , wherein: A clock frequency storage means for storing the correspondence between the total required processing capacity and the clock frequency;
The determining means determines the clock frequency by acquiring the clock frequency stored in the clock frequency storage means corresponding to the total required processing capacity calculated by the calculating means. The processing apparatus according to claim 2 . In a method for determining a clock frequency of a processing device that executes processing in synchronization with a clock signal capable of changing the frequency,
Preliminarily storing a correspondence between a plurality of external situations in which the processing load of the processing device is different and a necessary processing capability required to execute one or a plurality of application programs by the processing device under each external situation,
Detect external conditions,
Extract the necessary processing capacity stored in advance corresponding to the detected external situation and corresponding to the application program to be executed ,
Based on the extracted required processing capacity, calculate the capacity required for the application program executed on the processing device,
A clock frequency determination method, wherein the clock frequency is determined according to the calculated capability. In a computer program for causing a computer that performs processing in synchronization with a clock signal capable of changing the frequency to control the change of the clock frequency,
On the computer,
Detect external conditions,
The external situation detected from the correspondence between a plurality of external situations stored in advance and the processing load of the processing device differing and the necessary processing capacity required to execute one or more application programs under each external situation And the necessary processing capacity corresponding to the application program to be executed is extracted,
Based on the extracted required processing capacity, calculate the necessary capacity for the application program to be executed,
A computer program for determining a clock frequency according to a calculated ability.

Images