JP5392855B2 - Semiconductor substrate and manufacturing method thereof - Google Patents

Description

  The present invention relates to a semiconductor substrate, a manufacturing method thereof, an electronic device using the same, and a semiconductor light emitting element.

  As a semiconductor light emitting device such as a light emitting diode (LED) or a semiconductor laser (LD), multiple quantum devices in which a quantum well layer composed of an n-type GaN layer, an InGaN layer, and a barrier layer composed of a GaN layer are alternately stacked on a sapphire substrate. Those having a structure in which a well layer (Multi Quantum Wells: MQWs) and a p-type GaN layer are sequentially laminated are mass-produced. In such a mass-produced semiconductor light emitting device, GaN crystal grows in the c-axis direction in any GaN layer, and the surface is a c-plane <(0001) plane>.

  By the way, in the GaN layer whose surface is c-plane, as shown in FIG. 18, the Ga atom plane containing only Ga atoms and the N atom plane containing only N atoms alternate in the c-axis direction, that is, the layer thickness direction. In addition, since the Ga atom and the N atom have different electronegativity, the Ga atom surface is slightly positively charged, while the N atom surface is slightly negatively charged. As a result, spontaneous polarization occurs in the c-axis direction (layer thickness direction). Further, when heterogeneous semiconductor layers are heteroepitaxially grown on the GaN layer, compressive strain or tensile strain is generated in the GaN crystal based on the difference in lattice constant, and piezoelectric polarization (piezo polarization) occurs in the c-axis direction in the GaN crystal. (See Patent Documents 1 and 2).

  Therefore, in the semiconductor light emitting device having the above configuration, in the multiple quantum well layer, in addition to the spontaneous polarization due to the fixed charge, the piezoelectric polarization generated by the compressive strain applied to the InGaN quantum well layer is superimposed on the InGaN quantum well layer. A large internal polarization electric field is generated in the c-axis direction. Here, the spontaneous polarization works in the −c plane direction and the piezo polarization works in the + c plane direction, but the piezo polarization is overwhelmingly large in the InGaN well layer. Due to the influence, problems such as a decrease in light emission efficiency and a shift in peak wavelength of light emission accompanying an increase in necessary injection current occur. The cause of this problem is the quantum confined Stark effect, in which the wave function of electrons and holes in the quantum well layer is spatially separated due to the polarization electric field and the emission probability is drastically reduced. : QCSE).

  In view of this problem, since both the a-plane <{11-20} plane> and the m-plane <{1-100} plane> are nonpolar planes, the GaN surface is the a-plane or m-plane. It has been studied to form an InGaN layer on the layer and thereby avoid the influence of an internal electric field in which spontaneous polarization and piezoelectric polarization are superimposed (see Patent Documents 1 to 3).

  In addition, it has been studied to form an InGaN quantum well layer on a surface called a semipolar surface whose c-plane is inclined about 60 degrees in the a-axis or m-axis direction, thereby avoiding the influence of the internal electrode. . For example, Non-Patent Document 1 discloses a substrate obtained by cutting a semipolar (11-22) plane from c-plane grown bulk GaN. Non-Patent Document 2 discloses growing a multiple quantum well structure on (11-22) plane oblique facets appearing in GaN selectively grown in stripes.

JP 2008-53593 A JP 2008-53594 A JP 2007-243006 A

Japanese Journal of Applied Physics Vol.45,2006, L659. Applied Physics Letters Vol.90,2007,261912.

The semiconductor substrate of the present invention is
A sapphire substrate having a substrate surface, a substrate main surface portion, and a crystal growth surface portion capable of crystal growth of GaN with a different plane orientation from the substrate main surface portion;
A GaN layer formed by growing in the normal direction of the main surface portion of the substrate by crystal growth of GaN starting from the crystal growth surface portion of the substrate surface of the sapphire substrate;
Is provided.

The method for producing a semiconductor substrate of the present invention comprises:
A substrate surface uses a sapphire substrate having a substrate main surface portion, and a crystal growth surface portion capable of crystal growth of GaN with a different plane orientation from the substrate main surface portion,
The GaN layer is formed to grow in the normal direction of the main surface portion of the substrate by growing GaN crystals starting from the crystal growth surface portion of the substrate surface of the sapphire substrate.

  The electronic device and the semiconductor light emitting device of the present invention include the semiconductor substrate of the present invention.

2 is a cross-sectional view of a sapphire substrate according to Embodiment 1. FIG. (A) And (b) is an expanded sectional view of the ditch | groove of Embodiment 1. FIG. (A) is a sapphire substrate of composition 1, (b) is a sapphire substrate of composition 2, and (c) is an explanatory view showing a sapphire substrate of composition 3. (A) is a sapphire substrate of configuration 4, (b) is a sapphire substrate of configuration 5, (c) is a sapphire substrate of configuration 6, and (d) is an explanatory view showing a sapphire substrate of configuration 7. 6 is a cross-sectional view showing a sapphire substrate according to a modification of Embodiment 1. FIG. FIG. 3 is an explanatory diagram showing crystal growth of GaN on the sapphire substrate of Embodiment 1. (A)-(e) is explanatory drawing which shows the manufacturing method of the semiconductor light-emitting device of Embodiment 1. FIG. (A)-(e) is explanatory drawing which shows the relationship between the groove side surface of the ditch | groove of Embodiment 1, and a u-GaN layer. (A) And (b) is an expanded sectional view of the ditch | groove of Embodiment 2. FIG. 6 is a cross-sectional view of a sapphire substrate of Embodiment 2. FIG. FIG. 6 is a cross-sectional view of a semiconductor substrate according to a second embodiment. It is sectional drawing of the sapphire substrate of Embodiment 3. 10 is a cross-sectional view showing a sapphire substrate according to a modification of Embodiment 3. FIG. 10 is a cross-sectional view showing a sapphire substrate according to another modification of Embodiment 3. FIG. 6 is a cross-sectional view of a semiconductor substrate according to Embodiment 3. FIG. (A)-(e) is explanatory drawing which shows the manufacturing method of the semiconductor light-emitting device of Embodiment 3. FIG. It is a graph which shows the relationship between OFF angle (theta) 2 and a full width at half maximum. It is a schematic diagram which shows a GaN crystal.

  Hereinafter, embodiments will be described in detail based on the drawings.

[Embodiment 1]
A method for manufacturing the semiconductor light emitting element 10 according to Embodiment 1 will be described with reference to FIGS.

(Preparation of sapphire substrate)
In the method for manufacturing the semiconductor light emitting device 10 according to the first embodiment, the substrate main surface portion 12a is covered with the crystal growth blocking layer 13 on the substrate surface 12, and the surface exposure is different from that of the substrate main surface portion 12a. The sapphire substrate 11 on which the crystal growth surface portion 12b is formed is used. The sapphire substrate 11 has an overwhelmingly low cost compared to the GaN substrate, and has a device performance that considers light transmittance over the Si substrate.

Here, the sapphire substrate 11 is formed in a single crystal disk shape of a corundum structure of Al ₂ O ₃ and has a thickness of 0.3 to 3.0 mm and a diameter of 50 to 300 mm, although it varies depending on the diameter. is there. In the case of the sapphire substrate 11 having a diameter of 50 mm, 5000 to 12000 semiconductor light emitting elements 10 can be formed on one sapphire substrate 11.

  Substrate main surface portion 12a on substrate surface 12 is a-plane <{11-20} plane>, c-plane <(0001) plane>, m-plane <{1-100} plane>, or r-plane <{1-102. } Plane> or a crystal plane of another plane orientation. For example, the substrate main surface portion 12a is a miscut surface in which the a axis is inclined at a predetermined angle (for example, 45 °, 60 °, or a minute angle within several degrees) with respect to the normal direction of the substrate main surface portion 12a. In other words, the sapphire substrate 11 may be a miscut substrate. The plane directions of the a-plane, c-plane, and m-plane are orthogonal to each other.

Examples of the crystal growth prevention layer 13 that covers the substrate main surface portion 12a include, for example, oxide films and nitride films such as Si, Ti, Ta, and Zr, specifically, SiO ₂ films, SiN _x films, and SiO ₂ films. _{An xN y} film, a TiO ₂ film, a ZrO ₂ film, and the like can be given. The crystal growth blocking layer 13 has a thickness of 0.01 to 3 μm. The crystal growth blocking layer 13 can be formed on the cleaned sapphire substrate 11 by a method such as vacuum deposition, sputtering, or CVD (Chemical Vapor Deposition). The crystal growth blocking layer 13 may be composed of a single layer or a plurality of layers.

  If the crystal growth surface portion 12b on the substrate surface 12 has a plane orientation different from that of the substrate main surface portion 12a, the a-plane <{11-20} plane>, c-plane <{0001} plane>, m-plane <{1-100 } Plane> or r plane <{1-102} plane>, or a crystal plane of another plane orientation capable of crystal growth of GaN. In the present application, “GaN” includes InGaN and AlGaN mainly composed of GaN.

  As the crystal growth surface portion 12 b, for example, as shown in FIG. 1, it can be constituted by a side surface of a concave groove 14 formed so as to extend on the sapphire substrate 11.

  The concave groove 14 may be a U-shaped groove, a V-shaped groove, or a trapezoidal groove as long as it has a side surface (etched side surface). The groove 14 has a groove opening width that is not particularly limited, but is preferably 0.5 to 10 μm and has a groove depth of 0.75 to 100 μm. The concave groove 14 has an angle Θ of 70 to 120 °, for example, with respect to the substrate main surface portion 12a on the groove side surface. Therefore, the inclination of the groove side surface is inclined from the groove bottom to the groove as shown in FIG. The taper shape may be inclined outward so as to widen the groove width toward the opening. Also, as shown in FIG. 2B, the inner width is narrowed from the groove bottom toward the groove opening. A reverse tapered shape inclined in the direction may be used. However, the angle is not limited as long as GaN crystal growth from the side surface is possible. For example, when the c-plane GaN is grown from c-plane sapphire from the side, from the viewpoint of reducing defects appearing on the surface by not reaching the surface of defects such as stacking faults and dislocations, The angle Θ formed with respect to the substrate main surface portion 12a on the side surface of the groove is preferably larger than the angle Φ formed with respect to the substrate main surface portion 12a on the c-plane. When the concave groove 14 has a bottom surface, the groove depth is preferably 1.5 times or more the groove opening width from the viewpoint of suppressing GaN crystal growth from the bottom surface. Only one groove 14 may be formed, or a plurality of grooves 14 may be formed in parallel. When a plurality of the concave grooves 14 are formed in parallel, the distance between the grooves, that is, the distance between the substrate main surface portions 12a between the adjacent concave grooves 14 is 1 to 100 μm. The concave groove 14 is formed by forming a crystal growth blocking layer 13 on the substrate surface 12 of the sapphire substrate 11 and then patterning the photoresist so that only the portion where the concave groove is to be formed becomes an opening, and crystal growth using the photoresist as an etching resist. The blocking layer 13 and the sapphire substrate 11 can be formed by dry etching such as reactive ion etching (RIE) or wet etching.

  Here, various side surface configurations can be obtained by selecting the sapphire substrate 11 and setting the direction in which the groove 14 extends.

  Specifically, for example, as shown in FIG. 3A, as the sapphire substrate 11 having the configuration 1, the substrate main surface portion 12a is c-plane, and the extending direction of the U-shaped groove 14 is m-plane. A plane orientation, that is, an m-axis direction can be mentioned. In the sapphire substrate 11 having this configuration 1, the a-plane is exposed as the side surface of the groove 14 serving as the crystal growth surface portion 12b.

  As shown in FIG. 3B, the sapphire substrate 11 having the configuration 2 has an a-plane main surface portion 12a, and the extending direction of the U-shaped concave groove 14 is the m-plane orientation, that is, the m-axis. What is the direction. In the sapphire substrate 11 having this configuration 2, the c-plane is exposed as the side surface of the groove 14 serving as the crystal growth surface portion 12b.

  As shown in FIG. 3C, the sapphire substrate 11 having the configuration 3 has an a-plane main surface portion 12a, and the extending direction of the groove 14 having a trapezoidal cross section is the m-plane orientation, that is, the m-axis direction. Some are listed. In the sapphire substrate 11 having the configuration 3, a miscut surface in which the c-plane is inclined around the m-axis is exposed as the side surface of the groove 14 serving as the crystal growth surface portion 12b. That is, in this case, the orientation relationship between the substrate surface and the c-axis remains parallel, and the c-plane miscut in the a-axis direction is exposed on the side surface of the groove 14.

  As shown in FIG. 4A, the sapphire substrate 11 having the configuration 4 has a surface in which the substrate main surface portion 12a is inclined with respect to the a-plane around the c-axis, and the extending direction of the U-shaped groove 14 is m. Examples include the plane orientation of the plane, that is, the m-axis direction. In the sapphire substrate 11 having the configuration 4, the c-plane in which the a-axis is inclined from the normal direction of the substrate main surface portion 12a is exposed as the side surface of the groove 14 serving as the crystal growth surface portion 12b.

  As shown in FIG. 4B, the sapphire substrate 11 having the configuration 5 has a c-plane as the substrate main surface portion 12a and the extending direction of the U-shaped groove 14 having a U-shaped cross section. What is the direction. In the sapphire substrate 11 having this configuration 5, the m-plane is exposed as the side surface of the groove 14 serving as the crystal growth surface portion 12b.

  As the sapphire substrate 11 of configuration 6, as shown in FIG. 4C, the substrate main surface portion 12a is a surface in which the a-plane and c-plane are inclined by 45 ° around the m-axis, that is, miscut with an off-angle of 45 °. An example is a miscut substrate in which the direction in which the groove and the U-shaped concave groove 14 extend is the m-plane orientation, that is, the m-axis direction. In the sapphire substrate 11 having this configuration 6, a surface obtained by inclining the c-plane around the m-axis by 45 ° in the a-axis direction is exposed as the side surface of the groove 14 serving as the crystal growth surface portion 12b.

  As a sapphire substrate 11 of configuration 7, as shown in FIG. 4D, the substrate main surface portion 12a is a surface in which the a-plane and c-plane are inclined by 45 ° around the m-axis, that is, miscut with an off-angle of 45 °. An example is a miscut substrate in which the direction in which the groove 14 of the groove 14 having a trapezoidal cross section extends is the m-plane orientation, that is, the m-axis direction. In the sapphire substrate 11 having this configuration 7, the c-plane is exposed as the side surface of the groove 14 serving as the crystal growth surface portion 12b. The trapezoidal concave groove 14 can be produced by, for example, etching a photoresist pattern after making it slightly bent by heating or ashing.

  The concave groove 14 may have a configuration in which one of both side surfaces is exposed and the other is coated so as to prevent GaN crystal growth, in addition to a configuration in which both side surfaces are exposed on the surface. Since sapphire has a crystal structure that does not have + c and −c planes, GaN having the same polarity may grow when crystals are grown from both side surfaces of the groove, in which case those GaN Thus, an inversion domain (a kind of crystal defect) whose crystal orientation is reversed at the meeting point is formed. However, in the case of a configuration in which one of both side surfaces is exposed and the other is covered, this inversion domain can be completely eliminated.

The concave groove 14 may have a structure in which both side surfaces are exposed and the cross-sectional shape is asymmetrical in the left-right direction. According to such a configuration, when GaN crystal grows from the groove 14 having an asymmetric cross-sectional shape, crystal growth occurs preferentially from either side, which is advantageous from the viewpoint of eliminating the inversion domain. . Therefore, in this case, it is more preferable that the concave groove 14 has a configuration in which GaN is selectively grown from only one of both side surfaces. The cross-sectional shape of the left-right asymmetric groove 14 can be obtained, for example, by disposing the sapphire substrate 11 so as to be orthogonal to the flow of the etching gas during the etching process. At this time, when the groove 14 has a bottom surface, the bottom surface may be covered with SiO ₂ or the like in order to suppress crystal growth of GaN from the bottom surface.

  As the crystal growth surface portion 12b, in addition to the side surface of the concave groove 14, as shown in FIG. 5, the side surface of the ridge 14 ′ formed so as to extend to the substrate surface 12 of the sapphire substrate 11 can also be mentioned. . In this case, it is necessary that the top surface of the ridge as well as the substrate main surface portion 12 a on the base end side of the ridge 14 ′ are covered with the crystal growth blocking layer 13. In addition to the configuration in which both side surfaces are exposed on the surface, the protrusion 14 ′ may have a configuration in which one of both side surfaces is exposed and the other surface is coated so as to prevent crystal growth of GaN.

(Formation of semiconductor layer)
In the method for manufacturing the semiconductor light emitting device 10 according to the first embodiment, GaN is grown from the crystal growth surface portion 12b on the substrate surface 12 of the sapphire substrate 11 prepared as described above, whereby the normal direction of the substrate main surface portion 12a is obtained. After the u-GaN layer 15 is formed so as to grow to obtain a semiconductor substrate S, an n-type GaN layer 16, a multiple quantum well layer 17 as a light emitting layer, and a p-type GaN layer 18 are sequentially formed thereon. To do.

  Here, as a method for forming these semiconductor layers, metal organic vapor phase epitaxy (MOVPE), molecular beam epitaxy (MBE), hydride vapor phase growth (Hydride Vapor Phase). Epitaxy: HVPE), among which metal organic vapor phase epitaxy is the most common. Hereinafter, a method for forming a semiconductor layer using metal organic chemical vapor deposition will be described.

  The MOVPE apparatus used for forming the semiconductor layer is mainly composed of a substrate transport system, a substrate heating system, a gas supply system, and a gas exhaust system, all of which are electronically controlled. The substrate heating system is composed of a thermocouple and a resistance heater, and a carbon or SiC susceptor provided thereon, and a quartz tray on which a sapphire substrate 11 is set is conveyed on the susceptor, and a semiconductor The layer is epitaxially grown. This substrate heating system is installed in a quartz double tube or a stainless steel reaction vessel equipped with a water cooling mechanism, and a carrier gas and various source gases are supplied into the double tube or reaction vessel. In particular, when a stainless steel reaction vessel is used, a quartz flow channel is used to realize a laminar gas flow on the substrate.

Examples of the carrier gas include H ₂ and N ₂ . An example of the group V element supply source is NH ₃ . Examples of the group III element supply source include trimethylgallium (TMG), trimethylindium (TMI), trimethylaluminum (TMA), and the like. Examples of the n-type doping element supply source include SiH ₄ (silane), Si ₂ H ₆ (disilane), and GeH ₄ (germane). Examples of the p-type doping element supply source include Cp ₂ Mg (biscyclopentadienyl magnesium).

<Formation of u-GaN layer>
First, after setting the sapphire substrate 11 on the quartz tray so that the substrate surface 12 faces upward, the sapphire substrate 11 is heated to 1050 to 1150 ° C. and the pressure in the reaction vessel is set to 10 to 100 kPa. The sapphire substrate 11 is thermally cleaned by circulating H ₂ as a carrier gas in a flow channel installed inside and maintaining that state for several minutes.

Next, the temperature of the sapphire substrate 11 is set to 1050 to 1150 ° C., the pressure in the reaction vessel is set to 10 to 100 kPa, and the carrier gas H ₂ is circulated in the reaction vessel at a flow rate of 10 L / min. A group element supply source (NH ₃ ) and a group III element supply source (TMG) are flowed so that the respective supply amounts are 0.1 to 5 L / min and 50 to 150 μmol / min.

  At this time, as shown in FIG. 6, since the substrate main surface portion 12a of the substrate surface 12 of the sapphire substrate 11 is covered with the crystal growth blocking layer 13, no GaN crystal growth occurs. The ungrown GaN is heteroepitaxially grown on the crystal growth surface portion 12b exposed to the surface starting from the crystal growth surface portion 12b. As a result of the crystal growth, growth of the GaN layer proceeds in the normal direction of the substrate main surface portion 12a, and as shown in FIG. 7A, a u-GaN layer (undoped GaN layer) 15 is formed on the sapphire substrate 11. As a result, a semiconductor substrate S is obtained. The thickness of the u-GaN layer 15 grown on the crystal growth blocking layer 13 is about 2 to 20 μm. Before forming the u-GaN layer 15, it is preferable to form a low-temperature buffer layer having a thickness of about 20 to 30 nm on the crystal growth surface portion 12b.

  In the u-GaN layer 15, when the crystal growth surface portion 12 b is formed by the side surface of the groove 14 and a plurality of grooves 14 are formed so as to extend in parallel at intervals, the u-GaN layer 15 has grown from each groove 14. It is constituted by an aggregate of a plurality of band-shaped GaN crystals or by an integrated body in which band-shaped GaN crystals grown from the respective concave grooves 14 are linked together. In order to obtain an integrated u-GaN layer 15 in which band-like GaN crystals are joined together, the pressure in the reaction vessel (from a reduced pressure state (-10 kPa) to a normal pressure state (100 kPa)), a crystal growth temperature, and a material flow rate. It is preferable to optimize the crystal growth conditions such as and / or take a sufficiently long crystal growth time. When the crystal growth surface portion 12b is constituted by the side surfaces of the concave grooves 14, the concave grooves 14 may be filled by crystal growth of GaN, or voids may remain.

  The u-GaN layer 15 has various plane orientations depending on the configuration of the sapphire substrate 11.

  For example, in the case of the sapphire substrate 11 having the configuration 1, the sapphire a-axis and the GaN c-axis are parallel to each other and the sapphire c-axis and the GaN m-axis are parallel on the crystal growth surface portion 12b which is the a-plane. Crystal orientation-related GaN grows. Therefore, on the substrate surface 12 of the sapphire substrate 11, m-plane GaN grows in a crystal orientation relationship in which the c-axis of sapphire and the m-axis of GaN are parallel, and thus the main surface of the u-GaN layer 15. The plane parallel to the substrate main surface portion 12a (hereinafter the same) is the m plane.

  In the case of the sapphire substrate 11 having the configuration 2, the sapphire c-axis and the GaN c-axis are parallel on the c-plane crystal growth surface portion 12b, and the sapphire a-axis and the GaN m-axis are parallel. GaN crystal grows. Therefore, on the substrate surface 12 of the sapphire substrate 11, m-plane GaN grows, so that the main surface of the u-GaN layer 15 is the m-plane.

  In the case of the sapphire substrate 11 having the configuration 3, the side surface of the concave groove 14 is a c-plane miscut in the a-axis direction, but the c-axis of the sapphire substrate 11 and the c-axis of GaN are similar to those of the sapphire substrate 11 of the configuration 2. GaN grows in a crystal orientation relationship in which the a-axis of sapphire and the m-axis of GaN are parallel to each other, and m-plane GaN grows on the substrate surface 12 of the sapphire substrate 11. The main surface of the -GaN layer 15 is an m-plane.

  That is, the GaN crystal has a crystal structure in which a Ga atom plane containing only Ga atoms and an N atom plane containing only N atoms are alternately stacked in the c-axis direction as shown in FIG. In the case where the sapphire substrate 11 having configurations 1 to 3 is used, the c-axis direction having the spontaneous polarization of the u-GaN layer 15 is not the layer thickness direction but the in-plane direction of the layer. The main surface 15 is a nonpolar surface (m-plane) having no polarity in the layer thickness direction. When the c-plane (a-plane) sapphire substrate 11 is used in this way, nonpolar m-plane GaN is obtained. By using a similar method, a nonpolar a-plane GaN can be obtained when the m-plane sapphire substrate 11 is used.

  On the other hand, when the sapphire substrate 11 having configurations 4 to 7 is used, the u-GaN layer 15 is polarized in various layer thickness directions depending on the GaN crystal growth mode on the substrate surface 12 of the sapphire substrate 11. For example, when the sapphire substrate 11 having configuration 6 is used, GaN grows in a crystal orientation relationship in which the c-axis of sapphire and the c-axis of GaN are parallel, and the a-axis of sapphire and the m-axis of GaN are parallel. . As a result, the main surface of the u-GaN layer 15 is a semipolar surface intermediate between the c-plane and the m-plane. Similarly, when sapphire substrate 11 having configuration 7 is used, GaN grows in the c-axis direction, but the main surface of u-GaN layer 15 is a semipolar surface with better crystallinity.

  From the above, the GaN crystal growth surface can be manipulated by setting the crystal main surface portion 12a of the substrate surface 12 of the sapphire substrate 11 and the crystal growth surface portion 12b exposed to the substrate surface 12. It is possible to control the polarization state of GaN formed on 12. In the case of the sapphire substrate 11, the degree of freedom of the crystal main surface portion 12 a of the substrate surface 12 and the crystal growth surface portion 12 b exposed to the substrate surface 12 is higher than that of the Si substrate, and thus can be adopted in the u-GaN layer 15. The polarization state also has a high degree of freedom.

  For example, as shown in FIG. 8A, when the substrate main surface portion 12a of the sapphire substrate 11 is the (10-12) plane and the crystal growth surface portion 12b is the c plane, the (11-22) plane is faceted. The u-GaN layer 15 which is a surface is obtained. The angle formed by the (11-22) plane with respect to the substrate main surface portion 12a is -0.8 ° (the direction approaching the c-plane of GaN is positive, the same applies hereinafter). Therefore, by using a miscut substrate of the sapphire substrate 11 in which the substrate main surface portion 12a has a (10-12) plane with an off-angle so as to cancel the angle, it is a faceted surface (11− 22) The u-GaN layer 15 whose surface is the main surface can be obtained. In this application, the description of Miller index using parentheses also means general notation.

  As shown in FIG. 8B, when the substrate main surface portion 12a of the sapphire substrate 11 is the (11-23) plane and the crystal growth surface portion 12b is the c plane, the (10-11) plane grows as a facet plane. Under the growth conditions, the u-GaN layer 15 whose (10-11) plane is facet is obtained. The angle formed by the (10-11) plane with respect to the substrate main surface portion 12a is −0.74 °, and the u-GaN layer 15 whose (10-11) plane is the main surface can be obtained. Further, by using a miscut substrate of the sapphire substrate 11 that cancels an angle formed with respect to the substrate main surface portion 12a of the (10-11) plane, a high (10-11) surface which is a facet surface is a main surface. A quality u-GaN layer 15 can be obtained. Alternatively, under the growth conditions in which the (10-12) plane grows as a facet plane, the u-GaN layer 15 whose (10-12) plane is a facet plane is obtained. The angle formed by the (10-12) plane with respect to the substrate main surface 12a is + 18.03 °. Therefore, by using a miscut substrate of the sapphire substrate 11 that cancels the angle formed with respect to the substrate main surface portion 12a of the (10-12) plane, u-GaN whose facet surface (10-12) surface is the main surface. Layer 15 is obtained. Further, by using the miscut substrate or the sapphire substrate 11 which is not the miscut substrate, the u-GaN layer 15 obtained by the growth is surface-polished so as to be parallel to the substrate main surface portion 12a, thereby having an off angle. A (10-11) plane GaN template can be obtained.

  As shown in FIG. 8C, when the substrate main surface portion 12a of the sapphire substrate 11 is the (11-22) plane and the crystal growth surface portion 12b is the c plane, the (10-11) plane grows as a facet plane. Under the growth conditions, the u-GaN layer 15 whose (10-11) plane is a facet plane is obtained. The angle formed by the (10-11) plane with respect to the substrate main surface portion 12a is + 7.93 °. Therefore, by using a miscut substrate of the sapphire substrate 11 that cancels out the angle formed with respect to the substrate main surface portion 12a of the (10-11) plane, the (10-11) plane that is the facet plane is the main surface. A GaN layer 15 can be obtained. Alternatively, under the growth conditions in which the (10-12) plane grows as a facet plane, u-GaN so 15 having the (10-12) plane as a facet plane is obtained. The angle formed by the (10-12) plane with respect to the substrate main surface 12a is + 26.7 °. Therefore, similarly to the growth of the (10-11) plane, by using a miscut substrate of the sapphire substrate 11 that cancels the angle formed with respect to the substrate main surface portion 12a of the (10-12) plane, the facet plane (10 -12) The u-GaN layer 15 whose surface is the main surface is obtained. Further, by using the miscut substrate or the sapphire substrate 11 which is not a miscut substrate, the grown u-GaN layer 15 is subjected to surface polishing so as to be parallel to the substrate main surface portion 12a (10-11). ) A GaN template having a plane GaN off of 7.93 ° can be obtained.

  As shown in FIG. 8D, when the substrate main surface portion 12a of the sapphire substrate 11 is the (11-21) plane and the crystal growth surface portion 12b is the c plane, the (10-11) plane is the facet plane. A GaN layer 15 is obtained. The angle formed by the (10-11) plane with respect to the substrate main surface portion 12a is + 17.66 °. Therefore, by using a miscut substrate of the sapphire substrate 11 that cancels the angle, it is possible to obtain the u-GaN layer 15 whose main surface is the (10-11) plane that is the facet plane.

As shown in FIG. 8E, when the substrate main surface portion 12a of the sapphire substrate 11 is the (10-11) plane and the crystal growth surface portion 12b is the c plane, the (11-21) plane is a facet plane; The u-GaN layer 15 whose (11-21) plane is a plane inclined by −0.5 ° with respect to the substrate main surface portion 12a is obtained. By using a miscut substrate of the sapphire substrate 11 that cancels the angle of −0.5 °, it is possible to obtain a u-GaN layer 15 having a higher quality (10-21) plane as a main surface.
Further, when the substrate main surface portion 12a of the sapphire substrate 11 is the (11-21) plane and the crystal growth surface portion 12b is the c plane, the growth conditions of the u-GaN layer 15 in which the (20-21) plane is the facet plane are as follows. When selected, u-GaN which is a (20-21) facet surface having an angle formed with respect to the substrate main surface portion 12a of + 4.53 ° is obtained. Therefore, by using a miscut substrate of the sapphire substrate 11 that cancels the angle, the u-GaN layer 15 whose (20-21) plane is the main surface can be obtained.

  Tables 1 to 4 show the angle between the plane orientation of the sapphire substrate 11 and the c plane, the angle between the plane orientation of GaN and the c plane, and the azimuth of the sapphire substrate with various plane orientations of GaN to be obtained. Shown together.

  After obtaining the semiconductor substrate S, each semiconductor layer is formed thereon as follows.

<Formation of n-type GaN layer>
The pressure in the reaction vessel is 10 to 100 kPa, and the carrier gas H ₂ is in the reaction vessel at a flow rate of ₅ to 15 L / min (hereinafter, the gas flow rate is a value in a standard state (0 ° C., 1 atm)). , A group V element supply source (NH ₃ ), a group III element supply source 1 (TMG), and an n-type doping element supply source (SiH ₄ ) are supplied in amounts of 0.1 to 5 L, respectively. / Min, 50 to 150 μmol / min, and 1 to 5 × 10 ⁻³ μmol / min.

  At this time, as shown in FIG. 7B, n-type GaN is epitaxially grown in the same plane direction as the u-GaN layer 15 continuously with the u-GaN layer 15 to form an n-type GaN layer 16. The layer thickness of the n-type GaN layer 16 grown on the u-GaN layer 15 is about 2 to 10 μm.

<Formation of multiple quantum well layers>
The temperature of the sapphire substrate 11 is set to about 800 ° C., the pressure in the reaction vessel is set to 10 to 100 kPa, and the carrier gas N ₂ is circulated in the reaction vessel at a flow rate of ₅ to 15 L / min. The element supply source (NH ₃ ), the group III element supply source 1 (TMG), and the group III element supply source 2 (TMI) are supplied in amounts of 0.1 to 5 L / min, 5 to 15 μmol / min, and Flow 2-30 μmol / min. At this time, an InGaN layer 17a (well layer) is formed by epitaxial growth in the same plane orientation as the n-type GaN layer 16 and thus the same plane orientation as the u-GaN layer 15 in succession to the n-type GaN layer 16. The thickness of the InGaN layer 17a grown on the n-type GaN layer 16 is 1 to 20 nm.

Next, a group V element supply source (NH ₃ ) and a group III element supply source (TMG) are flowed so that the respective supply amounts are 0.1 to 5 L / min and 5 to 15 μmol / min. At this time, the GaN layer 17b (barrier layer) is formed by epitaxial growth in the same plane orientation as that of the InGaN layer 17a and thus the same plane orientation as that of the n-type GaN layer 16 and the u-GaN layer 15 in succession to the InGaN layer 17a. . The layer thickness of the GaN layer 17b grown on the InGaN layer 17a is 5 to 20 nm.

  Then, the same operation as described above is repeated alternately to form the multiple quantum well layer 17 by alternately forming InGaN layers 17a and GaN layers 17b as shown in FIG. 7C. The emission wavelength of the multiple quantum well layer 17 depends on the InN mixed crystal ratio and the layer thickness of the InGaN layer 17a. If the layer thickness is the same, the higher the InN mixed crystal ratio, the longer the emission wavelength.

  Any of the above InGaN layers 17 a and GaN layers 17 b have principal surfaces in the same plane orientation as the n-type GaN layer 16 and the u-GaN layer 15. Therefore, when the sapphire substrate 11 having configurations 1 and 2 is used, the main surface of the GaN layer 17b is a nonpolar surface having no polarity in the layer thickness direction, and the InGaN layer 17a is formed on the nonpolar surface. Therefore, the influence of piezo polarization can be avoided, and by avoiding the influence of piezo polarization, problems such as a decrease in light emission efficiency and a shift in peak wavelength of light emission accompanying an increase in injection current can be improved. In particular, when the multi-quantum well layer 17 is a green light emitting layer (light emitting layer having an emission wavelength of about 520 nm) with a high InN mixed crystal ratio of the InGaN layer 17a, it is strongly affected by piezoelectric polarization, so that a remarkable improvement effect can be obtained. Can do.

  In order to prevent current leakage from the active layer to the p-type GaN layer 18 described later, a current blocking layer made of p-type AlGaInN may be inserted after the active layer is formed.

<Formation of p-type GaN layer>
While the temperature of the sapphire substrate 11 is 1000-1100 ° C., the pressure in the reaction vessel is 10-100 kPa, and the carrier gas H ₂ is circulated at a flow rate of 5-15 L / min in the reaction vessel. Group V element supply source (NH ₃ ), Group III element supply source (TMG), and p-type doping element supply source (Cp ₂ Mg) are supplied at 0.1 to 5 L / min and 50 to 150 μmol / min, respectively. And 0.03 to 30 μmol / min.

  At this time, as shown in FIG. 7D, GaN is epitaxially grown continuously on the multiple quantum well layer 17 to form a p-type GaN layer 18. The p-type GaN layer 18 grown on the multiple quantum well layer 17 has a thickness of about 100 nm.

  The p-type GaN layer 18 may be composed of a plurality of layers having different doping element concentrations.

(Formation of semiconductor light emitting device)
As shown in FIG. 7E, after the n-type GaN layer 16 is exposed by partially reactive ion etching a sapphire substrate 11 on which a semiconductor layer is formed, vacuum deposition, sputtering, CVD (Chemical Vapor) is performed. The n-type electrode 19n is formed on the n-type GaN layer 16 and the p-type electrode 19p is formed on the p-type GaN layer 18 by a method such as Deposition.

  Here, examples of the electrode material of the n-type electrode 19n include a laminated structure such as Ti / Al, Ti / Al / Mo / Au, and Hf / Au, or an alloy. Examples of the p-type electrode 19p include a laminated structure such as Pd / Pt / Au, Ni / Au, Pd / Mo / Au, an alloy, or an oxide-based transparent conductive material such as ITO (indium tin oxide). It is done.

  Then, the sapphire substrate 11 is cleaved to be divided into rectangular plate-shaped semiconductor light emitting elements 10. Each semiconductor light emitting element 10 is about 300 × 300 μm.

  The semiconductor light emitting device 10 manufactured as described above has a substrate main surface portion 12a whose surface is covered with a crystal growth blocking layer 13 that blocks crystal growth of GaN, and the substrate main surface portion 12a. A sapphire substrate 11 having a crystal growth surface portion 12b capable of crystal growth of GaN having different orientations and surface-exposed, and GaN is grown from the crystal growth surface portion 12b on the substrate surface 12 of the sapphire substrate 11 as a starting point. The structure includes a u-GaN layer 15 formed by growing in the normal direction of the substrate main surface portion 12a, and is used as, for example, a GaN-based light emitting diode or a GaN-based semiconductor laser.

[Embodiment 2]
A method for manufacturing the semiconductor light emitting device 10 according to the second embodiment will be described with reference to FIGS. In addition, the part of the same name as Embodiment 1 is shown with the same code | symbol as Embodiment 1. FIG.

  In the method for manufacturing the semiconductor light emitting device 10 according to the second embodiment, the substrate surface 12 uses the sapphire substrate 11 having the substrate main surface portion 12a and the crystal growth surface portion 12b having a different plane orientation from the substrate main surface portion 12a. .

  Substrate main surface portion 12a on substrate surface 12 is a-plane <{11-20} plane>, c-plane <(0001) plane>, m-plane <{1-100} plane>, or r-plane <{1-102. } Plane> or a crystal plane of another plane orientation. For example, the substrate main surface portion 12a is a miscut surface in which the a axis is inclined at a predetermined angle (for example, 45 °, 60 °, or a minute angle within several degrees) with respect to the normal direction of the substrate main surface portion 12a. In other words, the sapphire substrate 11 may be a miscut substrate. The plane directions of the a-plane, c-plane, and m-plane are orthogonal to each other.

  If the crystal growth surface portion 12b on the substrate surface 12 is different from the substrate main surface portion 12a in the plane orientation, the a-plane <{11-20} plane>, c-plane <(0001) plane>, m-plane <{1-100 } Plane> or r plane <{1-102} plane>, or a crystal plane of another plane orientation capable of crystal growth of GaN.

  As the crystal growth surface portion 12b, for example, it can be configured by a side surface of the groove 14 formed so as to extend on the sapphire substrate 11 as in the first embodiment.

  The concave groove 14 may be a U-shaped groove, a V-shaped groove, or a trapezoidal groove as long as it has a side surface (etched side surface). The groove 14 has a groove opening width that is not particularly limited, but is preferably 0.5 to 10 μm and has a groove depth of 0.75 to 100 μm. The concave groove 14 has an angle Θ of 70 to 120 °, for example, with respect to the substrate main surface portion 12a on the groove side surface. Therefore, the inclination of the groove side surface is inclined from the groove bottom to the groove as shown in FIG. It may be tapered outwardly so as to widen the groove width toward the opening. Also, as shown in FIG. 9B, the inner width is narrowed from the groove bottom toward the groove opening. A reverse tapered shape inclined in the direction may be used. However, the angle is not limited as long as GaN crystal can be grown from the side surface. For example, when the c-plane GaN is grown from c-plane sapphire from the side, from the viewpoint of reducing defects appearing on the surface by not reaching the surface of defects such as stacking faults and dislocations, The angle Θ formed with respect to the substrate main surface portion 12a on the side surface of the groove is preferably larger than the angle Φ formed with respect to the substrate main surface portion 12a on the c-plane. When the concave groove 14 has a bottom surface, the groove depth is preferably 1.5 times or more the groove opening width from the viewpoint of suppressing GaN crystal growth from the bottom surface. Only one groove 14 may be formed, or a plurality of grooves 14 may be formed in parallel. When a plurality of the concave grooves 14 are formed in parallel, the distance between the grooves, that is, the distance between the substrate main surface portions 12a between the adjacent concave grooves 14 is 1 to 100 μm. The groove 14 is formed by patterning a photoresist in which only a portion of the sapphire substrate 11 to be formed is an opening, and the sapphire substrate 11 is subjected to dry etching such as reactive ion etching (RIE) or the like using the photoresist as an etching resist. It can be formed by wet etching.

  Here, various side surface configurations can be obtained as in the first embodiment by selecting the sapphire substrate 11 and setting the direction in which the groove 14 extends.

  Specifically, for example, as shown in FIG. 10, as the sapphire substrate 11, the substrate main surface portion 12a is an r-plane, or the r-plane is an a-axis ([11-20] axis) as a rotation axis. It is a plane rotated by an off angle θ1 (for example, θ1 = −5 to 5 °) and / or rotated by an off angle θ2 (for example, θ2 = −5 to 5 °) with the [−1101] axis as a rotation axis. The miscut which is the crystal growth surface portion 12b in which the extending direction of the concave groove 14 is the surface orientation of the a-plane, that is, the a-axis direction, and one of the side surfaces has an inclination angle of 57 ± 20 ° with respect to the r-axis. A substrate is mentioned. 57 ° is an angle formed between the r-plane and the c-plane, and an angle formed between the side surface and the c-plane is allowed up to ± 20 °, but the range of this angle is not limited as long as crystal growth occurs. . Further, examples of the sapphire substrate 11 include a substrate in which the substrate main surface portion 12a is a (11-22) plane, or a miscut substrate that is a miscut surface thereof. The off angle is an angle formed by the substrate main surface portion 12a and the crystal plane of the substrate main surface. That is, when the substrate main surface portion 12a is the (1-102) plane or its miscut surface, the angle is formed by the substrate main surface and the (1-102) plane, and the substrate main surface portion 12a is (11-22). In the case of a surface or its miscut surface, it is an angle formed by the substrate main surface and the (11-22) surface. Further, examples of the sapphire substrate 11 include a substrate whose substrate main surface portion 12a is a-plane, or a miscut substrate that is a miscut surface thereof. In any case, the one side surface which is the crystal growth surface portion 12b is preferably a surface capable of growing c-plane of GaN, and more preferably c-plane.

  In the method for manufacturing the semiconductor light emitting device 10 according to the second embodiment, as in the first embodiment, GaN is crystal-grown starting from the crystal growth surface portion 12b on the substrate surface 12 of the sapphire substrate 11 prepared as described above. The u-GaN layer 15 is formed so as to grow in the normal direction of the substrate main surface portion 12a to obtain the semiconductor substrate S.

  For example, sapphire in which the substrate main surface portion 12a is the (1-102) plane or a miscut surface thereof, and one side surface of the groove 14 which is the crystal growth surface portion 12b is a surface capable of growing c-plane of GaN. When the substrate 11 is used, GaN grows in crystals starting from the substrate main surface portion 12a and the crystal growth surface portion 12b. However, by selecting a condition in which the crystal growth rate from the crystal growth surface portion 12b is higher than the crystal growth rate from the substrate main surface portion 12a, the growth of the layer in the normal direction of the substrate main surface portion 12a is achieved. GaN crystal growth from the crystal growth surface portion 12b has priority, and as a result, as shown in FIG. 11, the main surface of the u-GaN layer 15 is a {11-22} plane which is a semipolar plane. At this time, GaN starting from the crystal growth surface portion 12 b grows c-plane so that the m-axis is along the a-axis of the sapphire substrate 11 and the a-axis is along the m-axis of the sapphire substrate 11. Similarly, the substrate main surface portion 12a is the (11-22) plane or a miscut surface thereof, and one side surface of the concave groove 14 which is the crystal growth surface portion 12b is a surface capable of growing GaN c-plane. When the sapphire substrate 11 is used, the main surface of the u-GaN layer 15 is a semipolar plane (10-12) plane or (10-11) plane by appropriately selecting the growth conditions.

  After obtaining the semiconductor substrate S, an n-type GaN layer 16, a multiple quantum well layer 17 as a light emitting layer, a p-type GaN layer 18, a p-type electrode 19p, and an n-type electrode 19n are formed thereon. Each forming method is the same as that of the first embodiment.

[Embodiment 3]
A method for manufacturing the semiconductor light emitting device 10 according to Embodiment 3 will be described with reference to FIGS. In addition, the part of the same name as Embodiment 1 is shown with the same code | symbol as Embodiment 1. FIG.

(Preparation of sapphire substrate)
In the method for manufacturing the semiconductor light emitting device 10 according to the third embodiment, the substrate surface 12 uses the sapphire substrate 11 having the substrate main surface portion 12a and the surface-exposed crystal growth surface portion 12b having a different plane orientation. The sapphire substrate 11 has an overwhelmingly low cost compared to the GaN substrate, and has a device performance that considers light transmittance over the Si substrate.

Here, the sapphire substrate 11 is formed in a single crystal disk shape of a corundum structure of Al ₂ O ₃ and has a thickness of 0.3 to 3.0 mm and a diameter of 50 to 300 mm, although it varies depending on the diameter. is there. In the case of the sapphire substrate 11 having a diameter of 50 mm, 5000 to 12000 semiconductor light emitting elements 10 can be formed on one sapphire substrate 11.

  The substrate main surface portion 12a on the substrate surface 12 is an r-plane or a (11-22) plane. Here, in the r-plane of the substrate main surface portion 12a in the present application, in addition to the {1-102} plane, the {1-102} plane has an a-axis ([11-20] axis) as an axis of rotation and an off angle θ1. A miscut surface rotated by (for example, θ1 = −5 to 5 °) and / or rotated by an off angle θ2 (for example, θ2 = −5 to 5 °) about the [−1101] axis as a rotation axis is also included. Similarly, the (11-22) plane of the substrate main surface portion 12a in the present application includes the miscut plane. That is, the sapphire substrate 11 may be a miscut substrate. The off angle is an angle formed by the substrate main surface portion 12a and the crystal plane near the substrate main surface. That is, in the case of the r-plane, the angle is formed by the substrate main surface portion 12a and the (1-102) plane, and in the case of the (11-22) plane, the substrate main surface portion 12a and the (11-22) plane are formed. Is an angle.

  The crystal growth surface portion 12b on the substrate surface 12 is a surface having a different plane orientation from the substrate main surface portion 12a and capable of GaN c-plane growth.

  As the crystal growth surface portion 12b, for example, when the substrate main surface portion 12a is an r-plane, the crystal growth surface portion 12b is formed on the sapphire substrate 11 so as to extend in the plane direction of the a-plane, that is, in the a-axis direction, as shown in FIG. It can be mentioned that it is constituted by one side surface (left side surface in FIG. 12) of the concave groove 14 having a trapezoidal cross section. Similarly, when the substrate main surface portion 12a is the (11-22) plane, the crystal growth surface portion 12b can be constituted by one side surface of the groove 14 formed so as to extend in the m-axis direction.

  The groove 14 has a groove opening width that is not particularly limited, but is preferably 0.5 to 10 μm and has a groove depth of 0.75 to 10 μm. Only one groove 14 may be formed, or a plurality of grooves 14 may be formed in parallel. When a plurality of the concave grooves 14 are formed in parallel, the distance between the grooves, that is, the distance between the substrate main surface portions 12a between the adjacent concave grooves 14 is 1 to 100 μm. The concave groove 14 is formed by patterning a photoresist on the substrate surface 12 of the sapphire substrate 11 so that only a portion where the concave groove is to be formed becomes an opening, and the sapphire substrate 11 is subjected to reactive ion etching (RIE) using the photoresist as an etching resist. ) Etc. can be formed by dry etching or wet etching.

  One side surface of the groove 14 which is the crystal growth surface portion 12b is preferably a c-plane <(0001) plane>. When the substrate main surface portion 12a is an r-plane, it is formed with respect to the substrate main surface portion 12a. The angle is preferably 57 ± 20 °, for example. 57 ° is an angle formed between the r-plane and the c-plane, and an angle formed between the side surface and the c-plane is allowed up to ± 20 °, but the range of this angle is not limited as long as crystal growth occurs. .

  The substrate main surface portion 12a, the other side surface 12c and the bottom surface of the concave groove 14 are preferably covered with a crystal growth blocking layer 13 as shown in FIG. In the sapphire substrate 11 having the principal surface with the c-axis inclined like the r-plane or the (11-22) surface, the crystal growth surface portion 12b is formed on the substrate principal surface portion 12a and the other side surface 12c and the bottom surface of the groove 14. A surface different from one side surface of a certain groove 14 is exposed. Therefore, when GaN crystal grows simultaneously from these surfaces, the u-GaN layer 15 in which various surfaces are mixed grows in the normal direction of the main surface of the sapphire substrate 11. However, if the substrate main surface portion 12a other than the one side surface 12b of the groove 14 and the other side surface 12c and the bottom surface of the groove 14 are covered with the crystal growth blocking layer 13 as described above, the crystal growth surface portion. Crystal growth from only one side surface, which is 12b, occurs, and a single semipolar plane u-GaN is grown without crystal growth of GaN mixed with various surfaces in the normal direction of the main surface of the sapphire substrate 11. Layer 15 can be grown.

Examples of the crystal growth prevention layer 13 include oxide films and nitride films such as Si, Ti, Ta, and Zr, specifically, SiO ₂ films, SiN _x films, SiO _x N _y films, TiO ₂ films, Examples thereof include a ZrO ₂ film. The crystal growth blocking layer 13 has a thickness of 0.01 to 3 μm. The crystal growth blocking layer 13 can be formed on the sapphire substrate 11 by a method such as vacuum deposition, sputtering, or CVD (Chemical Vapor Deposition). The crystal growth blocking layer 13 may be composed of a single layer or a plurality of layers.

  As shown in FIG. 13, the sapphire substrate 11 may have a configuration in which only the substrate main surface portion 12a is surface-coated with the crystal growth inhibition layer 13 and both side surfaces and the bottom surface of the groove 14 are exposed. As shown in FIG. 14, the crystal growth blocking layer 13 may not be provided, and the entire surface 12 of the substrate may be exposed. In these cases, the single semipolar plane u-GaN layer 15 can be selectively grown by optimizing the crystal growth conditions.

  When both side surfaces of the concave groove 14 are exposed, the other side surface 12c different from the one side surface which is the crystal growth surface portion 12b is exposed, so that when GaN grows simultaneously from both side surfaces, the sapphire substrate 11 Since GaN mixed with various surfaces grows in the normal direction of the main surface, crystal growth conditions are selected so that crystal growth from one side which is the crystal growth surface portion 12b occurs preferentially. It is preferable to do. When the other side surface 12c different from the one side surface that is the crystal growth surface portion 12b is exposed, the crystal growth conditions under which c-GaN preferentially grows from one side surface that is the crystal growth surface portion 12b. On the contrary, it is desirable to select crystal growth conditions that do not cause crystal growth from the other side surface 12c.

(Formation of semiconductor layer)
In the method of manufacturing the semiconductor light emitting device 10 according to the third embodiment, the GaN is grown from the crystal growth surface portion 12b on the substrate surface 12 of the sapphire substrate 11 prepared as described above, thereby normal direction of the substrate main surface portion 12a. A layer of semipolar plane GaN (for example, (11-22) semipolar plane or (10-12) semipolar plane) is grown on the sapphire substrate 11 so that the main surface is a semipolar plane on the sapphire substrate 11. After the layer 15 is formed and the semiconductor substrate S is obtained, the n-type GaN layer 16, the multiple quantum well layer 17 that is a light emitting layer, and the p-type GaN layer 18 are sequentially formed thereon.

  Here, as a method for forming these semiconductor layers, metal organic vapor phase epitaxy (MOVPE), molecular beam epitaxy (MBE), hydride vapor phase growth (Hydride Vapor Phase). Epitaxy: HVPE), among which metal organic vapor phase epitaxy is the most common. Hereinafter, a method for forming a semiconductor layer using metal organic chemical vapor deposition will be described.

  The MOVPE apparatus used for forming the semiconductor layer is mainly composed of a substrate transport system, a substrate heating system, a gas supply system, and a gas exhaust system, all of which are electronically controlled. The substrate heating system is composed of a thermocouple and a resistance heater, and a carbon or SiC susceptor provided thereon, and a quartz tray on which a sapphire substrate 11 is set is conveyed on the susceptor, and a semiconductor The layer is epitaxially grown. This substrate heating system is installed in a quartz double tube or a stainless steel reaction vessel equipped with a water cooling mechanism, and a carrier gas and various source gases are supplied into the double tube or reaction vessel. In particular, when a stainless steel reaction vessel is used, a quartz flow channel is used to realize a laminar gas flow on the substrate.

Examples of the carrier gas include H ₂ and N ₂ . An example of the group V element supply source is NH ₃ . Examples of the group III element supply source include trimethylgallium (TMG), trimethylindium (TMI), trimethylaluminum (TMA), and the like. Examples of the n-type doping element supply source include SiH ₄ (silane), Si ₂ H ₆ (disilane), and GeH ₄ (germane). Examples of the p-type doping element supply source include Cp ₂ Mg (biscyclopentadienyl magnesium).

<Formation of u-GaN layer>
First, after setting the sapphire substrate 11 on the quartz tray so that the substrate surface 12 faces upward, the sapphire substrate 11 is heated to 1050 to 1150 ° C. and the pressure in the reaction vessel is set to 10 to 100 kPa. The sapphire substrate 11 is thermally cleaned by circulating H ₂ as a carrier gas in a flow channel installed inside and maintaining that state for several minutes.

Next, the temperature of the sapphire substrate 11 is set to 1050 to 1150 ° C., the pressure in the reaction vessel is set to 10 to 100 kPa, and the carrier gas H ₂ is circulated in the reaction vessel at a flow rate of 10 L / min. A group element supply source (NH ₃ ) and a group III element supply source (TMG) are flowed so that the respective supply amounts are 0.1 to 5 L / min and 50 to 150 μmol / min.

  At this time, as shown in FIG. 15, GaN crystal growth does not occur in the portion of the substrate surface 12 of the sapphire substrate 11 which is surface-coated with the crystal growth blocking layer 13 including the substrate main surface portion 12a. When the surface portion 12a is the r-plane, the crystal growth surface portion 12b exposed on the substrate surface 12 is the starting point, and undoped GaN is formed thereon, the m-axis being the a-axis of the sapphire substrate 11, and the a-axis being the sapphire substrate 11 C-plane growth along the m-axis. Then, the growth of the GaN layer progresses in the normal direction of the substrate main surface portion 12a by the crystal growth, and the main surface is semipolar {11-22} on the sapphire substrate 11 as shown in FIG. A u-GaN layer (undoped GaN layer) 15 which is a surface is formed. When the substrate main surface portion 12a is the (11-22) plane, an appropriate miscut surface is used and the growth conditions are selected, whereby the main surface is a semipolar (10-12) plane. The semiconductor substrate S is obtained by forming the layer 15 or the u-GaN layer 15 which is the (10-11) plane. The thickness of the u-GaN layer 15 grown on the crystal growth blocking layer 13 is about 2 to 20 μm. Before forming the u-GaN layer 15, it is preferable to form a low-temperature buffer layer having a thickness of about 20 to 30 nm on the crystal growth surface portion 12b.

  In the u-GaN layer 15, when the crystal growth surface portion 12 b is formed by the side surface of the groove 14 and a plurality of grooves 14 are formed so as to extend in parallel at intervals, the u-GaN layer 15 has grown from each groove 14. It is constituted by an aggregate of a plurality of band-shaped GaN crystals or by an integrated body in which band-shaped GaN crystals grown from the respective concave grooves 14 are linked together. When the crystal growth surface portion 12b is constituted by the side surfaces of the concave grooves 14, the concave grooves 14 may be filled by crystal growth of GaN, or voids may remain.

  Such a method of forming the u-GaN layer 15 whose main surface is a semipolar surface uses a sapphire substrate 11 as a starting material, and a crystal growth surface portion having a surface orientation different from that of the substrate main surface portion 12a of the substrate surface 12 Since GaN is grown on the c-plane starting from 12b, and a layer of semipolar plane GaN is grown in the normal direction of the substrate main surface portion 12a, the u-GaN layer 15 whose main surface is a semipolar plane can be easily formed. In addition, the u-GaN layer 15 with few defects can be obtained by a single crystal growth by a selective lateral growth technique. Further, neither the sapphire substrate 11 whose principal surface is the r-plane, the sapphire substrate 11 whose principal surface is the (11-22) surface, or these miscut substrates is not particularly difficult to obtain, and therefore the principal surface is The u-GaN layer 15 that is a semipolar surface can be formed relatively inexpensively and in a large area.

  In addition, the main surface of the u-GaN layer 15 is a semipolar surface, which reduces the polarization effect due to the spontaneous polarization or piezoelectric polarization of the u-GaN layer 15, thereby increasing the efficiency of the semiconductor light emitting device 10. In addition, since the u-GaN layer 15 has polarization characteristics with respect to light traveling in the normal direction of the main surface thereof, the semiconductor light emitting element 10 is used as a backlight of a liquid crystal display device, for example. In this case, reduction of power consumption can be expected.

  Further, when the substrate main surface portion 12a or the like is covered with a thick crystal growth blocking layer 13 having a thickness of 0.2 μm or more, dislocations extending in the m-axis or a-axis direction generated in the initial stage of GaN growth are crystallized. It can be expected that the growth inhibition layer 13 stops.

  Further, when the sapphire substrate 11 is used in which the crystal growth blocking layer 13 is not provided and the entire surface 12 of the substrate is exposed as shown in FIG. 14, the GaN has a substrate main surface portion 12a and a crystal growth surface. Crystal growth starts from each of the portions 12b. However, by selecting a condition in which the crystal growth rate from the crystal growth surface portion 12b is higher than the crystal growth rate from the substrate main surface portion 12a, the GaN crystal growth in the normal direction of the substrate main surface portion 12a is achieved. As a result, the main surface of the u-GaN layer 15 is semipolar {(11-22)} plane, semipolar (10-12) plane, or semipolar ( 10-11) plane.

  After obtaining the semiconductor substrate S, each semiconductor layer is formed thereon as follows.

<Formation of n-type GaN layer>
The pressure in the reaction vessel is 10 to 100 kPa, and the carrier gas H ₂ is in the reaction vessel at a flow rate of ₅ to 15 L / min (hereinafter, the gas flow rate is a value in a standard state (0 ° C., 1 atm)). , A group V element supply source (NH ₃ ), a group III element supply source 1 (TMG), and an n-type doping element supply source (SiH ₄ ) are supplied in amounts of 0.1 to 5 L, respectively. / Min, 50 to 150 μmol / min, and 1 to 5 × 10 ⁻³ μmol / min.

  At this time, as shown in FIG. 16B, n-type GaN is epitaxially grown in the same plane direction as the u-GaN layer 15 continuously with the u-GaN layer 15 to form the n-type GaN layer 16. The layer thickness of the n-type GaN layer 16 grown on the u-GaN layer 15 is about 2 to 10 μm.

<Formation of multiple quantum well layers>
The temperature of the sapphire substrate 11 is set to about 800 ° C., the pressure in the reaction vessel is set to 10 to 100 kPa, and the carrier gas N ₂ is circulated in the reaction vessel at a flow rate of ₅ to 15 L / min. The element supply source (NH ₃ ), the group III element supply source 1 (TMG), and the group III element supply source 2 (TMI) are supplied in amounts of 0.1 to 5 L / min, 5 to 15 μmol / min, and Flow 2-30 μmol / min. At this time, an InGaN layer 17a (well layer) is formed by epitaxial growth in the same plane orientation as the n-type GaN layer 16 and thus the same plane orientation as the u-GaN layer 15 in succession to the n-type GaN layer 16. The thickness of the InGaN layer 17a grown on the n-type GaN layer 16 is 1 to 20 nm.

Next, a group V element supply source (NH ₃ ) and a group III element supply source (TMG) are flowed so that the respective supply amounts are 0.1 to 5 L / min and 5 to 15 μmol / min. At this time, the GaN layer 17b (barrier layer) is formed by epitaxial growth in the same plane orientation as that of the InGaN layer 17a and thus the same plane orientation as that of the n-type GaN layer 16 and the u-GaN layer 15 in succession to the InGaN layer 17a. . The layer thickness of the GaN layer 17b grown on the InGaN layer 17a is 5 to 20 nm.

  Then, the same operation as described above is repeated alternately, and as shown in FIG. 16C, the InGaN layer 17a and the GaN layer 17b are alternately formed to form the multiple quantum well layer 17. The emission wavelength of the multiple quantum well layer 17 depends on the InN mixed crystal ratio and the layer thickness of the InGaN layer 17a. If the layer thickness is the same, the higher the InN mixed crystal ratio, the longer the emission wavelength.

  Any of the above InGaN layers 17 a and GaN layers 17 b have principal surfaces in the same plane orientation as the n-type GaN layer 16 and the u-GaN layer 15. Accordingly, the main surface of the GaN layer 17b is a semipolar surface, and since the InGaN layer 17a is formed on the semipolar surface, the influence of piezoelectric polarization can be reduced, and the influence of this piezoelectric polarization is reduced. Thus, problems such as a peak wavelength shift of light emission accompanying a decrease in light emission efficiency and an increase in injection current can be improved. In particular, when the multi-quantum well layer 17 is a green light emitting layer (light emitting layer having an emission wavelength of about 520 nm) with a high InN mixed crystal ratio of the InGaN layer 17a, it is strongly affected by piezoelectric polarization, so that a remarkable improvement effect can be obtained. Can do.

  In order to prevent current leakage from the active layer to the p-type GaN layer 18 described later, a current blocking layer made of p-type AlGaInN may be inserted after the active layer is formed.

<Formation of p-type GaN layer>
While the temperature of the sapphire substrate 11 is 1000-1100 ° C., the pressure in the reaction vessel is 10-100 kPa, and the carrier gas H ₂ is circulated at a flow rate of 5-15 L / min in the reaction vessel. Group V element supply source (NH ₃ ), Group III element supply source (TMG), and p-type doping element supply source (Cp ₂ Mg) are supplied at 0.1 to 5 L / min and 50 to 150 μmol / min, respectively. And 0.03 to 30 μmol / min.

  At this time, as shown in FIG. 16D, GaN is epitaxially grown continuously in the multiple quantum well layer 17 to form a p-type GaN layer 18. The p-type GaN layer 18 grown on the multiple quantum well layer 17 has a thickness of about 100 nm.

  The p-type GaN layer 18 may be composed of a plurality of layers having different doping element concentrations.

(Formation of semiconductor light emitting device)
As shown in FIG. 16E, after the n-type GaN layer 16 is exposed by partially reactive ion etching a sapphire substrate 11 on which a semiconductor layer is formed, a method such as vacuum deposition, sputtering, CVD, etc. Thus, the n-type electrode 19n and the p-type electrode 19p are formed on the n-type GaN layer 16 and the p-type GaN layer 18, respectively.

  Here, examples of the electrode material of the n-type electrode 19n include a laminated structure such as Ti / Al, Ti / Al / Mo / Au, and Hf / Au, or an alloy. Examples of the p-type electrode 19p include a laminated structure such as Pd / Pt / Au, Ni / Au, Pd / Mo / Au, an alloy, or an oxide-based transparent conductive material such as ITO.

  Then, the sapphire substrate 11 is cleaved to be divided into rectangular plate-shaped semiconductor light emitting elements 10. Each semiconductor light emitting element 10 is about 300 μm × 300 μm.

  In the semiconductor light emitting device 10 manufactured as described above, the substrate surface 12 has an r-plane substrate main surface portion 12a and a crystal growth surface portion 12b having a different plane orientation and capable of GaN c-plane growth. The sapphire substrate 11 and the semipolar plane GaN layer 15 formed so that GaN grows in the normal direction of the substrate main surface portion 12a starting from the crystal growth surface portion 12b on the substrate surface 12a of the sapphire substrate 11. For example, it is used as a GaN-based light-emitting diode or a GaN-based semiconductor laser.

[Other Embodiments]
In the first to third embodiments, the semiconductor light emitting element 10 is used. However, the present invention is not particularly limited thereto, and other electronic devices such as transistors and solar cells may be used.

In the first to third embodiments, the semiconductor light emitting device 10 having the sapphire substrate 11 is used. However, the present invention is not particularly limited to this. The grown GaN layer may be separated from the sapphire substrate 11 to form a GaN substrate semiconductor substrate, and a semiconductor layer may be formed thereon. In the semiconductor substrate of the GaN substrate in which the GaN layer formed by crystal growth on the sapphire substrate 11 as described above is separated from the sapphire substrate 11, the following characteristics are obtained with respect to the conventional nonpolar or semipolar GaN substrate. Have First, in the conventional method in which a GaN substrate is cut out in the vertical direction from c-plane GaN grown on a thick film, only a substrate having a small area can be obtained, whereas the GaN substrate has the same size as a sapphire substrate. Large areas can also be obtained. The second conventional method, which is produced by heteroepitaxial growth on an r-plane sapphire substrate or m-plane sapphire substrate, has a problem of high dislocation density and stacking fault density, whereas the GaN substrate has Since the dislocation propagation in the normal direction of the main surface of the substrate is suppressed, the dislocation density is 1 × 10 ⁸ cm ⁻² or less and the stacking fault density is 1 × 10 ² cm ⁻¹ or less. Become.

[Experimental Example 1]
(Sample substrate)
<Sample substrate 1>
A resist is patterned in a stripe pattern on a sapphire substrate having an a-plane as a main surface so as to extend in the m-axis direction, and then a SiO ₂ layer having a thickness of about 200 nm is formed by sputtering. After a Ni layer having a thickness of about 500 nm is formed on the substrate by electron beam evaporation (EB method), the resist is dissolved (lift-off method), and an etching resist having a stacked structure of Ni (upper side) / SiO ₂ (lower side) A pattern was formed. Using this Ni / SiO ₂ as an etching resist, dry etching by reactive ion etching (RIE) was performed to form a plurality of U-shaped concave grooves extending in parallel in the m-axis direction on the sapphire substrate. The concave grooves were formed so that the groove opening width was 2 μm, the groove depth was about 5 μm, and the distance between the substrate main surface portions to the adjacent concave grooves was 4 μm. After dry etching, the Ni layer was removed with an acid-based etchant, and a sapphire substrate in which this concave groove was formed was used as a sample substrate 1. This sample substrate 1 has a surface-exposed crystal growth surface in which the substrate surface is constituted by a substrate main surface portion whose surface is covered with a crystal growth inhibition layer constituted by a SiO ₂ layer and a side surface of a concave groove which is a c-plane. And a portion.

<Sample substrate 2>
The groove is the same as the sample substrate 1 except that the groove opening width is 3 μm, the groove depth is about 5 μm, and the groove is formed so that the distance between the substrate main surface portions to the adjacent groove is 3 μm. A sapphire substrate formed and processed was used as a sample substrate 2.

(Formation of u-GaN layer)
<Example 1>
After setting the sample substrate 1 on the quartz tray so that the substrate surface faces upward in the MOVPE apparatus, the substrate is heated to 1150 ° C. and the pressure in the reaction vessel is set to 100 kPa. As a result, H ₂ was circulated at a flow rate of 10 L / min, and this state was maintained for 10 minutes to thermally clean the substrate.

Next, the temperature of the substrate is set to 460 ° C., the pressure in the reaction vessel is set to 100 kPa, and a carrier gas flowing through the reaction vessel is allowed to flow at a flow rate of 10 L / min of H ₂ while supplying a group V element supply source ( NH ₃ ) and a group III element supply source (TMG) were supplied at 5 L / min and 8 μmol / min, respectively, to form a low-temperature buffer layer of about 30 nm on the crystal growth surface portion of the side surface of the groove.

Subsequently, the temperature of the substrate is set to 1150 ° C., the pressure in the reaction vessel is set to 100 kPa, and the carrier gas to be circulated in the reaction vessel is set to H ₂ while being circulated at a flow rate of 10 L / min. The group V element supply source (NH ₃ ) and the group III element supply source (TMG) are supplied so that the respective supply amounts are 5 L / min and 100 μmol / min (supply molar ratio of group V element / group III element = 2190) A u-GaN layer was formed on the substrate so as to grow in the normal direction of the main surface portion of the substrate by allowing GaN (undoped GaN) to grow on the low-temperature buffer layer by flowing for 10 minutes.

<Example 2>
The sample substrate 2 was subjected to the same operation as in Example 1 to form a u-GaN layer on the substrate.

<Example 3>
For the sample substrate 1, the pressure in the reaction vessel during GaN crystal growth was 13 kPa, and the supply amounts of the group V element supply source (NH ₃ ) and the group III element supply source (TMG) were 0.7 L / min and 100 μmol, respectively. An u-GaN layer was formed on the substrate by performing the same operation as in Example 1 except that / min (supply molar ratio of Group V element / Group III element = 310).

<Example 4>
The sample substrate 2 was subjected to the same operation as in Example 3 to form a u-GaN layer on the substrate.

(Test results)
The u-GaN layer obtained in each of Examples 1 to 4 was analyzed by ω / 2θ scan measurement using an X-ray diffractometer. In either case, the m-plane was formed on the main surface of the u-GaN layer. A peak was observed, and it was confirmed that the m-plane crystal was grown in the normal direction of the main surface portion of the substrate surface of the sapphire substrate.

  In addition, in the u-GaN layer obtained in Examples 3 and 4, there was a tendency to form a monolithic u-GaN layer in which band-like GaN crystals were associated and linked. This is probably because the pressure during growth was set to 13 kPa and the crystal growth time was lengthened. In particular, it is considered that the influence of crystal growth under reduced pressure is large.

[Experiment 2]
(U-GaN layer forming substrate)
<Example 5>
The resist is patterned in a stripe pattern on the sapphire substrate with the r-plane as the main surface, and then dry-etched by reactive ion etching (RIE) to be parallel to the a-axis direction on the sapphire substrate. A plurality of trapezoidal grooves having a cross section extending in the vertical direction. The concave grooves were formed so that the groove opening width was about 3 μm, the groove depth was about 1 μm, the groove bottom width was about 2 μm, and the distance between the substrate main surface portions to adjacent concave grooves was about 3 μm. The resist was removed after dry etching.

About this sapphire substrate, in the MOVPE apparatus, after setting on the quartz tray so that the substrate surface faces upward, the sapphire substrate is heated to 1150 ° C. and the pressure in the reaction vessel is set to 100 kPa. The substrate was thermally cleaned by circulating H ₂ as a gas at a flow rate of 10 L / min and maintaining this state for 10 minutes.

Next, the temperature of the sapphire substrate is set to 460 ° C., the pressure in the reaction vessel is set to 100 kPa, and the carrier gas flowing through the reaction vessel is supplied at a flow rate of H ₂ 10 L / min, while supplying the group V element supply source there (NH ₃ ) and a group III element supply source (TMG) were supplied at 5 L / min and 8 μmol / min, respectively, and a low-temperature buffer layer of about 30 nm was formed on the crystal growth surface portion on the side surface of the groove.

Subsequently, the temperature of the substrate is set to 1000 ° C., the pressure in the reaction vessel is set to 100 kPa, and the carrier gas to be circulated in the reaction vessel is set to H ₂ while being circulated at a flow rate of 10 L / min. The group V element supply source (NH ₃ ) and the group III element supply source (TMG) are supplied so that the respective supply amounts are 5 L / min and 100 μmol / min (supply molar ratio of group V element / group III element = 2190) A u-GaN layer was formed on the substrate so as to grow in the normal direction of the main surface portion of the substrate by allowing GaN (undoped GaN) to grow on the low-temperature buffer layer by flowing for 10 minutes.

<Example 6>
The u-GaN layer is formed on the sapphire substrate in the same manner as in Example 1 except that a miscut substrate of a sapphire substrate in which the off angle θ2 in the c-axis direction is −1 ° with the direction approaching the c-plane as a plus is used. Formed.

<Example 7>
A u-GaN layer was formed on the sapphire substrate in the same manner as in Example 1 except that a miscut substrate of a sapphire substrate having an off angle θ2 of −0.5 ° was used.

<Example 8>
A u-GaN layer was formed on the sapphire substrate in the same manner as in Example 1 except that a sapphire substrate having an off angle θ2 of + 0.5 ° was used.

<Example 9>
A u-GaN layer was formed on the sapphire substrate in the same manner as in Example 1 except that a sapphire substrate having an off angle θ2 of + 1 ° was used.

(Test results)
About the u-GaN layer obtained in each of Examples 5 to 9, when the surface was observed with a normalsky microscope and a scanning electron microscope, it was found that the surface irregularities increased as the off-angle θ2 increased. .

  About the u-GaN layer obtained in each of Examples 5 to 9, using an X-ray diffractometer, c-axis incidence on the (11-22) plane, m-axis incidence on the (11-22) plane, and c-plane When the full width at half maximum (FWHM) when X-rays were irradiated from each direction of reflection was determined, the results shown in FIG. 17 were obtained. According to FIG. 17, in the case of c-axis incidence on the (11-22) plane, it can be seen that the crystallinity tends to increase as the off-angle θ2 decreases. In the case of m-axis incidence and c-plane reflection on the (11-22) plane, it can be seen that the crystallinity is highest when the off-angle θ2 is −0.5 °.

  INDUSTRIAL APPLICATION This invention is useful about a semiconductor substrate, its manufacturing method, an electronic device using the same, and a semiconductor light-emitting device.

S Semiconductor substrate 10 Semiconductor light emitting element 11 Sapphire substrate 12 Substrate surface 12a Substrate main surface portion 12b Crystal growth surface portion 13 Crystal growth blocking layer 14 Groove 15 u-GaN layer (semipolar plane GaN layer)
17 Multiple quantum well layer 17a InGaN layer (quantum well layer)
17b GaN layer (barrier layer)

Claims (14)

A sapphire substrate having a substrate surface, a substrate main surface portion, and a crystal growth surface portion capable of crystal growth of GaN with a different plane orientation from the substrate main surface portion;
A GaN layer formed by growing in the normal direction of the main surface portion of the substrate by crystal growth of GaN starting from the crystal growth surface portion of the substrate surface of the sapphire substrate;
Equipped with a,
In the sapphire substrate, the main surface portion of the substrate is an r-plane, and the crystal growth surface portion is a surface capable of c-plane growth of GaN,
The GaN layer is a semiconductor substrate in which a surface parallel to the main surface portion of the substrate surface of the sapphire substrate is a semipolar surface . A sapphire substrate having a substrate surface, a substrate main surface portion, and a crystal growth surface portion capable of crystal growth of GaN with a different plane orientation from the substrate main surface portion;
A GaN layer formed by growing in the normal direction of the main surface portion of the substrate by crystal growth of GaN starting from the crystal growth surface portion of the substrate surface of the sapphire substrate;
With
The sapphire substrate is a surface in which the main surface portion of the substrate is an (10-12) plane with an off angle, and the crystal growth surface portion is a surface on which GaN c-plane growth is possible,
The GaN layer is a semiconductor substrate in which a plane parallel to the main surface portion of the sapphire substrate is a semipolar (11-22) plane. A sapphire substrate having a substrate surface, a substrate main surface portion, and a crystal growth surface portion capable of crystal growth of GaN with a different plane orientation from the substrate main surface portion;
A GaN layer formed by growing in the normal direction of the main surface portion of the substrate by crystal growth of GaN starting from the crystal growth surface portion of the substrate surface of the sapphire substrate;
With
In the sapphire substrate, the substrate main surface portion is a miscut surface having a (11-23) surface, a (11-22) surface, or a (11-21) surface, and the crystal growth surface portion is a c-plane of GaN. It ’s a surface that can grow,
The GaN layer is a semiconductor substrate in which a surface parallel to the main surface portion of the substrate surface of the sapphire substrate is a semipolar surface. The semiconductor substrate according to any one of claims 1 to 3 ,
The sapphire substrate is a semiconductor substrate in which a portion other than the substrate main surface portion or the crystal growth surface portion is covered with a crystal growth blocking layer that blocks crystal growth of GaN. In the semiconductor substrate according to any one of claims 1 to 4,
The said crystal growth surface part is a semiconductor substrate comprised by the side surface of the several ditch | groove formed so that it might extend in parallel on the said sapphire substrate at intervals. The semiconductor substrate according to any one of claims 1 to 5 ,
The semiconductor substrate, wherein the GaN layer is surface-polished so as to be parallel to the main surface portion of the substrate surface of the sapphire substrate. In the semiconductor substrate according to any one of claims 1 to 6,
A semiconductor substrate in which the crystal growth surface portion is constituted by an a-plane or a c-plane of the sapphire substrate. Electronic device having a semiconductor substrate according to any one of claims 1 to 7. The semiconductor light emitting device having a semiconductor substrate according to any one of claims 1 to 7. A semiconductor substrate according to claim 7 ,
A semiconductor light-emitting device comprising a multiple quantum well layer provided on the GaN layer, each of which is formed by alternately stacking quantum well layers and barrier layers formed by epitaxial growth on the GaN layer. A substrate surface uses a sapphire substrate having a substrate main surface portion, and a crystal growth surface portion capable of crystal growth of GaN with a different plane orientation from the substrate main surface portion,
Forming a GaN layer to grow in the normal direction of the main surface portion of the substrate by growing GaN crystal starting from the crystal growth surface portion of the substrate surface of the sapphire substrate ;
In the sapphire substrate, the main surface portion of the substrate is an r-plane, and the crystal growth surface portion is a surface capable of c-plane growth of GaN,
The GaN layer is a method of manufacturing a semiconductor substrate, wherein a surface parallel to the main surface portion of the substrate surface of the sapphire substrate is a semipolar surface . A substrate surface uses a sapphire substrate having a substrate main surface portion, and a crystal growth surface portion capable of crystal growth of GaN with a different plane orientation from the substrate main surface portion,
Forming a GaN layer to grow in the normal direction of the main surface portion of the substrate by growing GaN crystal starting from the crystal growth surface portion of the substrate surface of the sapphire substrate;
The sapphire substrate is a surface in which the main surface portion of the substrate is an (10-12) plane with an off angle, and the crystal growth surface portion is a surface on which GaN c-plane growth is possible,
The method for producing a semiconductor substrate, wherein the GaN layer has a semipolar (11-22) plane parallel to the main surface portion of the sapphire substrate. A substrate surface uses a sapphire substrate having a substrate main surface portion, and a crystal growth surface portion capable of crystal growth of GaN with a different plane orientation from the substrate main surface portion,
Forming a GaN layer to grow in the normal direction of the main surface portion of the substrate by growing GaN crystal starting from the crystal growth surface portion of the substrate surface of the sapphire substrate;
In the sapphire substrate, the substrate main surface portion is a miscut surface having a (11-23) surface, a (11-22) surface, or a (11-21) surface, and the crystal growth surface portion is a c-plane of GaN. It ’s a surface that can grow,
The GaN layer is a method of manufacturing a semiconductor substrate, wherein a surface parallel to the main surface portion of the substrate surface of the sapphire substrate is a semipolar surface. In the manufacturing method of the semiconductor substrate in any one of Claims 11 thru / or 13 ,
A method of manufacturing a semiconductor substrate, wherein the GaN layer is separated from the sapphire substrate to form a GaN substrate.

Images