JP5363887B2 - Multilayer wiring board - Google Patents

Description

  The present invention relates to a multilayer wiring board having a low resistance wiring layer mainly composed of copper, which is applied to a package for housing a semiconductor element, a high frequency module board, and the like.

  A multilayer wiring board used in the field of mobile communication includes an insulating substrate in which a plurality of insulating layers are laminated, a through conductor that penetrates the insulating layer, a surface wiring layer formed on the surface of the insulating substrate, and an insulating substrate. And an internal wiring layer formed inside.

  As such a multilayer wiring board, for example, when it is mounted on a printed wiring board (motherboard) having a high thermal expansion coefficient containing an organic resin, the joint is cracked or peeled off due to the stress due to the difference in thermal expansion with the printed wiring board. In order not to occur, it is known that the insulating base is made of glass ceramics mainly composed of quartz (see Patent Document 1).

  In the case where the insulating base material is made of glass ceramics and can be fired at a low firing temperature, the low-melting-point, low-resistance copper-based conductor is used as the material for forming the through conductor, the surface wiring layer, and the internal wiring layer. A paste can be employed. In general, borosilicate glass is added to the wiring layer conductor paste for the purpose of matching with the shrinkage rate during firing of the insulating base (see Patent Document 2).

  When manufacturing such a multilayer wiring board, a glass ceramic green sheet laminate in which a plurality of glass ceramic green sheets each having a through hole filled with a conductive paste for a through conductor and a main layer coated with a conductive paste for a wiring layer are laminated After firing, plating treatment is performed on the fired wiring layer conductor formed on the main surface to finally form a surface wiring layer. Specifically, this plating process includes a step of performing surface treatment by etching, adsorbing Pd, and performing Ni plating and Au plating.

JP 2004-231454 A JP-A-10-190178

  However, the above surface treatment by etching removes the glass protruding from the surface of the wiring conductor by etching (glass etching), and then etches the oxide film (copper oxide) on the surface of the wiring conductor by etching (copper etching). In this way, unless sufficient etching is performed in multiple stages, the removal of the glass and the oxide film (copper oxide) cannot be sufficiently removed, resulting in a state where the plating is partially lost (plating failure). There is a problem that it occurs or the plating is not formed (no plating).

  The present invention has been made in view of the above circumstances, and provides a multilayer wiring board having a surface wiring layer in which plating chipping and non-plating are suppressed without undergoing glass etching while maintaining shrinkage rate matching with an insulating substrate. The purpose is to provide.

The present invention is a multilayer wiring board comprising an insulating substrate in which a plurality of insulating layers made of glass ceramics are laminated, and a surface wiring layer provided on a main surface of the insulating substrate, wherein the surface wiring layer includes It consists of a first layer provided on the insulating substrate side and a plurality of plating layers provided on the first layer, and the first layer comprises 95.69 to 96.62% by mass of copper. And 3.38 to 4.31% by mass of the glass phase, and when the total of components contained in the glass phase is 100% by mass, Si is 48.0 to 51.0% in terms of SiO ₂ %, Al is 9.8 to 10.2% by mass in terms of Al ₂ O ₃ , Mg is 0.1 to 0.3% by mass in terms of MgO, Ca is 14.0 to 16.0% by mass in terms of CaO, Ba is 21.0 to 24.0% by mass in terms of BaO, and Sr is 2.4 to 3.0% by mass in terms of SrO. It is characterized by being.

Here, an internal wiring layer is provided inside the insulating base, and the internal wiring layer includes 93.90 to 94.79% by mass of copper and 5.21 to 6.10% by mass of a glass phase, When the total of the components contained in the glass phase of the internal wiring layer is 100% by mass, Si is 54.0-58.0% by mass in terms of SiO ₂ and Al is 16.0 in terms of Al ₂ O _3. 18.0 mass%, Mg is 7.0 to 7.5 mass% in terms of MgO, Ca is 8.5 to 9.5 mass% in terms of CaO, and Ba is 9.0 to 10.0 mass% in terms of BaO , Sr is preferably 0.1 to 0.3% by mass in terms of SrO.

  According to the multilayer wiring board of the present invention, the glass is appropriately present on the surface of the first layer constituting the surface wiring layer so as not to be removed by glass etching. The generation of the oxide film (copper oxide) is suppressed. Therefore, it is possible to suppress a state where plating due to a large amount of glass on the surface of the first layer is partially lost (plating failure) without glass etching. Moreover, since the generation of an oxide film (copper oxide) on the surface of the first layer is suppressed due to the presence of appropriate glass, the oxide film (copper oxide) can be easily removed by copper etching, A state where plating is not formed (no plating) due to the presence of an oxide film (copper oxide) can be suppressed.

It is a schematic sectional drawing of one Embodiment of the multilayer wiring board of this invention. It is an enlarged view of the area | region A enclosed with the broken line shown in FIG.

  Hereinafter, an embodiment of a multilayer wiring board of the present invention will be described with reference to the drawings.

  The multilayer wiring board shown in FIG. 1 includes an insulating substrate 1 in which a plurality of insulating layers 11, 12, 13, and 14 made of glass ceramics are stacked, and a surface wiring layer 2 provided on the main surface of the insulating substrate 1. ing. The main surface of the insulating substrate 1 is the surface of the widest area of the insulating substrate 1 and refers to the upper and lower surfaces shown in FIG.

The insulating base 1 is formed by laminating a plurality of insulating layers 11, 12, 13, and 14. The insulating layers 11, 12, 13, and 14 are made of glass ceramics. For example, the insulating layers 11, 12, 13, and 14 have a high thermal expansion coefficient (13 × 10 ⁻⁶ / ° C. to excellent in secondary mounting reliability with a printed wiring board (motherboard). Glass ceramics containing quartz of 15 × 10 ⁻⁶ / ° C.) as the main crystal is employed. In addition, since quartz has a low dielectric constant, attenuation of a transmission signal in a high frequency region can be suppressed, and transmission loss due to signal delay can be reduced. In addition to quartz, crystals such as serdian and enstatite may exist in the insulating substrate 1, and the presence of these crystals also contributes to an improvement in the thermal expansion coefficient of the insulating substrate 1.

  A surface wiring layer 2 is provided on the main surface of the insulating substrate 1, and the surface wiring layer 2 includes a first layer 21 provided on the insulating substrate 1 side and a first layer as shown in FIG. It comprises a plurality of plating layers 22 provided on the layer 21 (on the side opposite to the insulating base 1 side).

  The first layer 21 constituting the surface wiring layer 2 contains 95.69 to 96.62 mass% copper and 3.38 to 4.31 mass% glass phase. Since the insulating substrate 1 is sintered at a temperature of 1000 ° C. or lower, the main component of the first layer 21 is copper having a low melting point and low resistance. Here, if the ratio of the copper and glass phases in the first layer 21 is out of the above range, the shrinkage ratio with the insulating substrate cannot be matched, and the surface of the multilayer wiring board may be uneven, or plating defects may occur. There is a risk of it. In addition, other metals, oxides, ceramics, and the like may be included as long as the electrical resistance and thermal conductivity are not deteriorated.

Then, when the total of the components contained in the glass phase of the first layer 21 is 100 mass%, Si is from 48.0 to 51.0 wt% in terms of SiO _2, Al is in terms _{of Al} 2 _{O 3} 9 .8 to 10.2 mass%, Mg is 0.1 to 0.3 mass% in terms of MgO, Ca is 14.0 to 16.0 mass% in terms of CaO, and Ba is 21.0 to 24. mass in terms of BaO. 0% by mass and Sr are 2.4 to 3.0% by mass in terms of SrO. The glass phase of the first layer 21 is the one in which the amorphous glass as the raw material remains, and the content of each component is the same ratio as the glass composition of the raw material.

  Here, the ratio of copper and glass phase can be calculated by, for example, cutting the measurement sample, polishing the cross section, analyzing the image with a scanning electron microscope (SEM), and determining the area ratio. Further, the content of each component contained in the glass phase can be calculated by performing energy dispersive X-ray spectroscopic analysis (EDS) on a part of the glass phase in a spot manner.

  When the ratio of each component contained in the glass phase of the first layer 21 is in the above range, the unevenness of the main surface of the multilayer wiring board (insulating base 1) due to the variation in shrinkage behavior is suppressed. Further, since the glass is in a state where it does not need to be removed by glass etching on the surface of the first layer 21, the lack of plating is suppressed without performing glass etching treatment. Furthermore, since glass is appropriately present on the surface of the first layer 21, generation of an oxide film (copper oxide) on the surface of the first layer is suppressed. Therefore, as described later, the formation (Pd adsorption) of the Pd plating layer 221 by the plating process after the copper etching becomes favorable, and the formation of the Ni plating layer 222 and the Au plating layer 223 after that becomes favorable. .

  For example, a Pd plating layer 221, an Ni plating layer 222, and an Au plating layer 223 are sequentially formed on the side opposite to the insulating base 1 side of the first layer 21. The plurality of plating layers 22 are formed for the purpose of preventing the surface wiring layer 2 from oxidation and improving the bonding strength with the mounted component, and the layer configuration and the forming material are not particularly limited.

  On the other hand, an internal wiring layer 3 is provided inside the insulating substrate 1, and the internal wiring layer 3 is composed of 93.90 to 94.79% by mass of copper and 5.21 to 6.10% by mass of glass. Includes phases. Since the insulating substrate 1 is sintered at a temperature of 1000 ° C. or lower, the main component of the internal wiring layer 3 is copper having a low melting point and low resistance, like the first layer 21 in the surface wiring layer 2. is there. Here, if the ratio of copper and glass phase in the internal wiring layer 3 is out of the above range, the contraction rate with the insulating base cannot be matched, and the internal wiring layer 3 and the insulating layers 11, 12, 13, 14 and There is a risk of peeling between the layers and unevenness on the surface of the multilayer wiring board. Here, the surface wiring layer 2 and the internal wiring layer 3 have different ratios of copper and glass phase depending on whether there are upper and lower insulating layers. In addition, other metals, oxides, ceramics, and the like may be included as long as the electrical resistance and thermal conductivity are not deteriorated.

Then, the sum of the components contained in the glass phase of the internal wiring layer 3 is 100 mass%, Si is from 54.0 to 58.0 wt% in terms of SiO _2, Al is in terms _{of Al} 2 _{O 3} 16. 0 to 18.0 mass%, Mg is 7.0 to 7.5 mass% in terms of MgO, Ca is 8.5 to 9.5 mass% in terms of CaO, and Ba is 9.0 to 10.0 in terms of BaO. % By mass and Sr are 0.1 to 0.3% by mass in terms of SrO. The glass phase of the internal wiring layer 3 is the one in which the amorphous glass as the raw material remains, and the content of each component is the same ratio as the glass composition of the raw material.

  When the ratio of each component contained in the glass phase of the internal wiring layer 3 is in the above range, the shrinkage start temperature range and the shrinkage behavior of the conductive paste for wiring layer for forming the internal wiring layer 3 are determined by the glass ceramic green. It is possible to approach the shrinkage start temperature range and shrinkage behavior of the sheet and suppress the peeling between the internal wiring layer 3 and the insulating layers 11, 12, 13, and 14 and the increase in the unevenness of the main surface of the insulating substrate 1. be able to.

  The through conductor 4 is also formed of a conductor mainly composed of copper in accordance with the first layer 21 and the internal wiring layer 3 constituting the surface wiring layer 2. The through conductor 4 may also contain inorganic components such as other metals, oxides, and ceramics as long as the electrical resistance and thermal conductivity are not deteriorated.

  Hereinafter, a method for manufacturing a multilayer wiring board will be described.

  First, glass powder and a ceramic filler for preparing a glass ceramic green sheet are prepared.

The glass powder, a SiO ₂ 35 to 45 _wt%, the B 2 _{O 3} 5 to 10 wt%, the _Al 2 _{O 3} 6 to 10 wt%, the MgO 15-25 wt%, 1-3 mass CaO %, BaO 17 to 23% by mass, SrO 0.5 to 2% by mass and ZrO ₂ 0.5 to 1.5% by mass powder having an average particle size of 2.0 to 5.0 μm is used. This glass is a crystalline glass in which celsian and enstatite are precipitated by firing.

As the ceramic filler, SiO ₂ (quartz), which is a crystal extremely effective for increasing the thermal expansion, is used. The average particle size of the ceramic filler is preferably 3.5 to 5.0 μm, and the specific surface area is preferably 1.5 to ^2.5 cm ² / g.

  Next, 60 to 70% by mass of glass powder and 30 to 40% by mass of ceramic filler are mixed to produce a glass ceramic green sheet. Specifically, an appropriate organic binder and organic solvent are mixed with a mixture of glass powder and ceramic filler (total 100 mass%) to obtain a slurry. From the obtained slurry, a glass ceramic green sheet is produced by a desired forming means such as a doctor blade method, a calender roll method, a rolling method or the like.

Here, when the ratio of the glass powder is less than 60% by mass (the ratio of the ceramic filler exceeds 40% by mass), the amount of glass (liquid phase) is insufficient with respect to the specific surface area of the ceramic filler, so that sintering is performed. There is a risk that the density of the insulating substrate 1 (relative density 95% or more) may not be promoted due to a decrease in the properties. On the other hand, if the ratio of the glass powder exceeds 70% by mass (the ratio of the ceramic filler is less than 30% by mass), the glass amount (liquid phase) increases with respect to the specific surface area of the ceramic filler, so that the sinterability However, a large amount of Mg ₂ Al ₄ Si ₅ O ₁₈ (cordierite) is precipitated from the glass component (glass powder). Thereby, since the amount of deposited quartz is relatively reduced, the thermal expansion coefficient of the insulating substrate 1 (glass ceramic) may be lowered.

  Next, a through hole is formed in the obtained glass ceramic green sheet by punching or laser processing. Then, the through-hole is filled with a conductor paste for a through conductor containing copper powder as a main component.

  Further, a conductive pattern for a surface wiring layer or an internal wiring layer is formed on a desired glass ceramic green sheet by a screen printing method or a gravure printing method using a wiring layer conductor paste containing copper powder as a main component. .

Here, the conductive paste for the surface wiring layer for forming the surface wiring layer has an average particle diameter of 1.6 to 2.0 μm with respect to 100 parts by mass of the copper powder having an average particle diameter of 4.5 to 5.5 μm. While glass powder is added in an amount of 3.5 to 4.5 parts by mass, an organic binder, an organic solvent, or the like is added and kneaded. Then, as the composition of the glass powder, when the sum of the 100 mass%, Si is from 48.0 to 51.0 wt% in terms of SiO _2, Al is in terms _{of Al} 2 _{O 3} 9.8 to 10.2 Mass%, Mg is 0.1 to 0.3 mass% in terms of MgO, Ca is 14.0 to 16.0 mass% in terms of CaO, Ba is 21.0 to 24.0 mass% in terms of BaO, and Sr is It is important that it is prepared at a ratio of 2.4 to 3.0% by mass in terms of SrO.

When the content of Al ₂ O ₃ is less than 9.8% by mass, the glass tends to be devitrified in the step of producing the glass. Devitrified glass may have different glass transition temperature, yield temperature, crystallization start temperature, etc. compared to non-devitrified glass, and shrinkage behavior may fluctuate even when fired under the same conditions. is there. On the other hand, if the content of Al ₂ O ₃ exceeds 10.2% by mass, the viscosity of the glass is increased and it becomes difficult to spread and the copper neck growth is suppressed too much. There is a risk. Further, since the network structure in the glass is too stable, the amount of glass on the surface is small, and the surface wiring layer may be in an unplated state due to the influence of the oxide film.

  When the content of MgO is less than 0.1% by mass, it is difficult to suppress devitrification. On the other hand, if the content of MgO exceeds 0.3% by mass, a slight amount of MgO-based composite oxide may be deposited, which may change the shrinkage amount of the surface wiring layer.

  When the content of CaO is less than 14.0% by mass, the viscosity increases and the copper neck growth is excessively suppressed. On the other hand, when the content of CaO exceeds 16.0% by mass, the viscosity in the high temperature range is lowered, and the shrinkage start temperature of the surface wiring layer is lowered. There is.

If the BaO content is less than 21.0% by mass, the glass structure becomes unstable, and after the viscosity is lowered, the copper neck growth may be promoted too much. On the other hand, when the content of BaO exceeds 24.0% by mass, elements such as Al ₂ O ₃ and SiO ₂ and crystals are precipitated, and the shrinkage amount may be changed.

  If the SrO content is less than 2.4% by mass, a large amount of glass is present on the surface, which may cause plating defects. On the other hand, if the SrO content exceeds 3.0% by mass, there is a possibility that a SrO-based composite oxide is generated, so that the shrinkage behavior may be changed.

On the other hand, in the conductor paste for an internal wiring layer for forming the internal wiring layer, the average particle diameter is 1.2 to 1.6 μm with respect to 100 parts by mass of the copper powder having an average particle diameter of 1.5 to 2.5 μm. While 5.5 to 6.5 parts by mass of glass powder is added, an organic binder, an organic solvent, and the like are added and kneaded. Then, as the composition of the glass powder, when the sum of the 100 mass%, Si is from 54.0 to 58.0 wt% in terms of SiO _2, Al is in terms _{of Al} 2 _{O 3} 16.0 to 18.0 Mass%, Mg is 7.0 to 7.5 mass% in terms of MgO, Ca is 8.5 to 9.5 mass% in terms of CaO, Ba is 9.0 to 10.0 mass% in terms of BaO, and Sr is It is preferable to be prepared at a ratio of 0.1 to 0.3% by mass in terms of SrO.

If the content of Al ₂ O ₃ is less than 16.0% by mass, stress may be generated due to a mismatch with the shrinkage behavior of the glass ceramic green sheet, and peeling may occur between the internal wiring layer and the insulating layer. There is. On the other hand, when the content of Al ₂ O ₃ exceeds 18.0% by mass, the viscosity of the glass is increased, and it may be difficult to spread and wet the copper powder.

  When the content of MgO is less than 7.0% by mass, it becomes difficult to suppress devitrification. On the other hand, if the content of MgO exceeds 7.5% by mass, a small amount of MgO-based composite oxide may be deposited, which may change the shrinkage amount of the internal wiring layer.

  When the content of CaO is less than 8.5% by mass, the viscosity is increased and the copper neck growth is excessively suppressed. On the other hand, when the content of CaO exceeds 9.5% by mass, the unevenness of the main surface of the insulating substrate may be increased.

If the content of BaO is less than 9.0% by mass, the glass structure becomes unstable, and after the viscosity is lowered, there is a risk of promoting copper neck growth. On the other hand, when the content of BaO exceeds 10.0% by mass, elements such as Al ₂ O ₃ and SiO ₂ and crystals are precipitated, and the shrinkage amount of the internal wiring layer may be changed.

  If the SrO content is less than 0.1% by mass, the glass structure is changed and devitrification is likely to occur). On the other hand, if the SrO content exceeds 0.3% by mass, there is a possibility that a SrO-based composite oxide is generated, so that the shrinkage behavior of the internal wiring layer may be changed.

  The glass powder contained in the surface wiring layer conductor paste and the glass powder contained in the internal wiring layer conductor paste are both amorphous glass that does not precipitate crystals after firing, and are contained in the surface wiring layer conductor paste. The glass transition point and softening point of the glass powder are about 50 ° C. higher than the glass transition point and softening point of the glass powder contained in the conductor paste for internal wiring layers.

  In this way, a glass ceramic green sheet laminate is produced by laminating a plurality of glass ceramic green sheets filled with the conductor paste for through conductors in the through holes and coated with the conductor paste for wiring layers on the main surface. Specifically, a glass ceramic green sheet laminate is obtained by a method of laminating by pressurization using a thermocompression bonding method or a laminating aid.

  Next, the obtained glass ceramic green sheet laminate is fired. In firing, organic components such as an organic binder blended for molding are first removed. The removal of the organic component is performed by holding at a temperature of 700 to 750 ° C. for 1 to 5 hours in a nitrogen atmosphere. Next, as the main baking, baking is performed in a nitrogen atmosphere at a temperature of 850 ° C. to 900 ° C. for 1 to 2 hours.

  Next, the first layer constituting the surface wiring layer is formed on the main surface of the sintered laminate (the state after firing of the glass ceramic green sheet laminate), and on the surface of the first layer For example, a copper etching process is performed using ammonium sulfate, and the oxide film (copper oxide) on the surface is removed.

  Finally, a plating process is performed on the first layer. Specifically, a Pd plating layer is formed by dipping in a Pd plating bath, a Ni plating layer is formed by dipping in a Ni plating bath, and an Au plating layer is formed by dipping in an Au plating bath. In addition, there may be steps such as alkali degreasing and acid treatment between each dipping step.

  With such a manufacturing method, it is possible to obtain a multilayer wiring board having a surface wiring layer in which plating chipping and non-plating are suppressed without passing through glass etching while maintaining the shrinkage rate matching with the insulating base.

As the glass powder, a glass powder having a composition shown in Table 3 and a ceramic filler made of SiO ₂ were prepared and weighed and mixed so as to have the ratio shown in Table 4. The average particle size of the glass powder was 3.9 μm, and the average particle size of the filler body was 3.5 μm.

  To this mixture, an organic binder containing isobutyl methacrylate as the main chain and toluene as a solvent was added, dibutyl phthalate was added as an organic solvent, and mixed well to prepare a slurry, and then a glass ceramic having a thickness of 125 μm by a doctor blade method. A green sheet was produced.

  A through hole was formed in the obtained glass ceramic green sheet by punching, and the through hole was filled with a conductive paste for a through conductor obtained by adding an acrylic binder and terpineol to copper powder as a main component. Further, a conductive paste for a surface wiring layer or an internal wiring layer obtained by adding glass powder having the composition shown in Table 1 or 2 to the copper powder as a main component in a ratio shown in Table 4 and adding an acrylic binder and terpineol. The conductor paste for coating was applied to a glass ceramic green sheet using a screen printing method. The average particle size of the copper powder contained in the conductive paste for the surface wiring layer is 5 μm, the average particle size of the glass powder is 1.8 μm, and the average particle size of the copper powder contained in the conductive paste for the internal wiring layer is 2 The average particle size of the glass powder is 1.4 μm.

  A plurality of glass ceramic green sheets thus prepared were aligned and 20 layers were laminated by thermocompression bonding to obtain a glass ceramic green sheet laminate.

  Then, after the binder removal treatment was performed at a temperature of 725 ° C. for 3 hours in a nitrogen atmosphere containing water vapor, the main baking was performed at a temperature of 860 ° C. for 1 hour in a nitrogen atmosphere. A sintered laminate having a size of 45 mm and a thickness of 2 mm (a state after firing the glass ceramic green sheet laminate) was obtained.

  Finally, in the obtained sintered laminate (the state after firing of the glass ceramic green sheet laminate), the oxide film (copper oxide) on the surface of the first layer sintered with the conductive paste for the surface wiring layer was converted to ammonium sulfate. It was removed by etching. Then, after being immersed in a Pd plating bath for 90 seconds on the first layer, then immersed in an Ni plating bath for 18 minutes, and then immersed in an Au plating bath for 5 minutes, a plurality of plating layers (Pd plating layer, Ni plating layer) , Au plating layer) was formed to obtain a multilayer wiring board.

  The following measurements were performed on the multilayer wiring board obtained by the above method.

  First, composition analysis of the surface wiring layer formed on the insulating substrate was performed. Specifically, the measurement sample was cut into a length of 10 mm × width of 10 mm × thickness of 2 mm, the cut surfaces of the first wiring layer and the internal wiring layer in the surface wiring layer were polished, and 50 μm from a scanning electron microscope (SEM) image. The area ratio of copper and glass phase in a region of × 10 μm was determined, and these ratios were determined. The results are shown in Table 4.

  Moreover, when each oxide phase content of each element contained in the glass phase was determined by spot-dispersing energy dispersive X-ray spectroscopic analysis (EDS) on a part of each glass phase, each component was obtained. Was confirmed to be the same as the raw glass composition of the surface wiring layer shown in Table 1 and the raw glass composition of the internal wiring layer shown in Table 2.

  Then, the presence or absence of plating defects on the surface wiring layer and the presence or absence of non-plating were visually observed. The results are shown in Table 5.

  Further, the flatness of the main surface of the insulating substrate was evaluated. Specifically, the height of the main surface was measured every 5 mm in length and width using a laser displacement meter in a 40 mm square area on one main surface, and the difference between the maximum value and the minimum value was obtained. The results are shown in Table 5.

  Moreover, the presence or absence of peeling between the internal wiring layer and the insulating layer was observed with an image of a binocular microscope, specifically a scanning electron microscope (SEM). The results are shown in Table 5.

  In addition, when the crystal phase in the insulating substrate was identified by X-ray diffraction (XRD), it was found that all samples had the highest quartz content, followed by celsian and enstatite. confirmed.

  As shown in Tables 4 and 5, according to the samples within the scope of the present invention (Sample No. 1 to No. 15, No. 19 to No. 41, No. 44, No. 45) The surface wiring layer in a plated state has not been confirmed, and it can be seen that a multilayer wiring board having a surface wiring layer with suppressed plating chipping and no plating can be obtained without going through the glass etching step. In addition, since the unevenness of the main surface of the insulating base caused by the surface wiring layer (first layer) is suppressed, the shrinkage rate of the surface wiring layer (first layer) and the insulating base is matched. I understand that.

On the other hand, sample No. which is outside the scope of the present invention. In No. 16, since the amount of Al ₂ O ₃ in the raw glass powder for the surface wiring layer is large, the viscosity of the glass is increased and it is difficult for the glass to be spread on the surface of the first layer. It became the state of no plating.

  In addition, sample No. which is outside the scope of the present invention. 17 has a large amount of CaO in the raw glass powder for the surface wiring layer, so that the glass viscosity in the high temperature range is reduced, and the sintering of the copper powder is promoted from the early stage of sintering. As a result of the shrinkage start temperature being lowered, the unevenness of the main surface of the insulating base became large.

  In addition, sample No. which is outside the scope of the present invention. No. 18, since the amount of BaO in the raw glass powder for the surface wiring layer is large, the shrinkage start temperature range of the first layer fluctuates, and the unevenness of the main surface of the insulating substrate is large due to the mismatch of the shrinking behavior with the insulating substrate. became.

  In addition, sample No. which is outside the scope of the present invention. No. 42 was produced to the extent that the oxide film on the surface of the first layer could not be removed because the ratio of the raw glass powder for the surface wiring layer was small, resulting in no plating. Further, the copper powder neck growth was promoted, and the unevenness of the main surface of the insulating base became large due to a mismatch in shrinkage behavior with the insulating base.

  In addition, sample No. which is outside the scope of the present invention. Since No. 43 has a large proportion of the raw material glass powder for the surface wiring layer, a large amount of glass is present on the surface of the first layer, resulting in lack of plating.

  Sample No. For No. 33, peeling of the internal wiring layer was observed. Sample No. For 34, 44, and 45, the irregularities on the main surface of the insulating base increased due to the glass phase of the internal wiring layer.

DESCRIPTION OF SYMBOLS 1 ... Insulating base | substrate 11, 12, 13, 14 ... Insulating layer 2 ... Surface wiring layer 21 ... 1st layer 22 ... Plating layer 221 ... Pd plating layer 222 ... Ni plating layer 223 ... Au plating layer 3 ... internal wiring layer 4 ... penetrating conductor

Claims (2)

A multilayer wiring board comprising: an insulating substrate in which a plurality of insulating layers made of glass ceramics are laminated; and a surface wiring layer provided on a main surface of the insulating substrate,
The surface wiring layer includes a first layer provided on the insulating base side and a plurality of plating layers provided on the first layer, and the first layer includes 95.69 to When 96.62% by mass of copper and 3.38 to 4.31% by mass of glass phase are included, and the total of components contained in the glass phase is 100% by mass, Si is 48 in terms of SiO _2. .0～51.0 mass%, Al is from 9.8 to 10.2 wt% in terms _{of Al} 2 _{O 3,} Mg is 0.1 to 0.3 mass% in terms of MgO, Ca is calculated as CaO 14.0 A multilayer wiring board comprising: ˜16.0% by mass, Ba is 21.0 to 24.0% by mass in terms of BaO, and Sr is 2.4 to 3.0% by mass in terms of SrO. An internal wiring layer is provided inside the insulating substrate, and the internal wiring layer includes 93.90 to 94.79% by mass of copper and 5.21 to 6.10% by mass of a glass phase, the sum of the components contained in the glass phase of the layer is 100 mass%, Si is from 54.0 to 58.0 wt% in terms of SiO _2, Al is in terms _{of Al} 2 _{O 3} 16.0 to 18.0 Mass%, Mg is 7.0 to 7.5 mass% in terms of MgO, Ca is 8.5 to 9.5 mass% in terms of CaO, Ba is 9.0 to 10.0 mass% in terms of BaO, and Sr is The multilayer wiring board according to claim 1, wherein the content is 0.1 to 0.3% by mass in terms of SrO.

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