JP5362393B2 - DC / DC converter device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a DC/DC converter apparatus which improves its controllability in synchronized switching control. <P>SOLUTION: The converter control unit 48 of the DC/DC converter apparatus 50 allots all dead time dts to the output period of a drive signal UL to a step-up switching element 82 when it is determined that the DC/DC converter apparatus 50 shows only a step-down state, in entire switching cycle, and allots all dead time dts to the output period of drive signal UH to a step-down switching element 81 when determined that it shows only a step-up state, and allots dead time dts to each output period of drive signals UH and UL when it is determined that the converter apparatus shows both the step-down and the step-up states. <P>COPYRIGHT: (C)2010,JPO&amp;INPIT

Description

  The present invention relates to a DC / DC converter device including a step-down switching element and a step-up switching element. More specifically, the present invention relates to a DC / DC converter device that alternately outputs a drive signal to a step-down switching element and a step-up switching element with a dead time between switching periods.

  So-called synchronous switching control is known in which drive signals are alternately output to a step-down switching element and a step-up switching element for each switching period (for example, Patent Document 1). In the synchronous switching control of Patent Document 1, a dead time is sandwiched between drive signals in order to prevent the step-down switching element and the step-up switching element from flowing simultaneously and short-circuiting (for example, FIG. 9 of Patent Document 1). (See (a)).

International Publication No. 02/093730 Pamphlet

  In Patent Document 1, there is a description of a dead time generation method (for example, FIGS. 9 (a) and 9 (b) and page 11, line 5 to the last line of Patent Document 1). No consideration has been given to the controllability of the DC / DC converter device considered.

  The present invention has been made in consideration of such problems, and an object thereof is to provide a DC / DC converter device capable of improving the controllability of the DC / DC converter device in synchronous switching control.

  The DC / DC converter device according to the present invention alternately includes a step-down switching element, a step-up switching element, a reactor, and the step-down switching element and the step-up switching element with a dead time between switching periods. A chopper type DC / DC converter device including a control unit that outputs a drive signal to the control unit, wherein the control unit boosts the voltage when the DC / DC converter device is in a step-down state only in each switching period. When it is only the state, or when both the step-down state and the step-up state appear, it is determined based on the current on the primary side where the reactor is arranged, and only the step-down state The dead time during the output period of the drive signal to the switching element for boosting When it is determined that all are allocated and only the step-up state is present, all the dead times are allocated in the output period of the drive signal to the step-down switching element, and it is determined that both the step-down state and the step-up state appear. The dead time is assigned to both the output period of the drive signal to the step-up switching element and the output period of the drive signal to the step-down switching element.

  According to the present invention, in so-called synchronous switching control in which a drive signal is alternately output to a step-down switching element and a step-up switching element with a dead time between switching periods, switching between a step-down state and a step-up state is performed. Voltage fluctuation can be suppressed. As a result, the controllability of the DC / DC converter device can be improved.

  The control unit detects a peak value and a bottom value of the primary-side current in each switching cycle, and is only in the step-down state, only in the step-up state, or in the step-down state and the step-up state. It may be determined based on the peak value and the bottom value whether both appear.

  The control unit presets an upper limit threshold and a lower limit threshold of the primary side current for determining the step-down state and the step-up state, and when the peak value is equal to or lower than the lower limit threshold, only the step-down state The dead time is allotted to the output period of the drive signal to the boosting switching element, and when the bottom value is equal to or greater than the upper limit threshold, it is determined that the boosting state is only, When the dead time is allotted during the output period of the drive signal to the switching element for the switching element, and the bottom value is not more than the lower limit threshold and the peak value is not less than the upper limit threshold, both the step-down state and the step-up state appear The drive signal output period for the step-down switching element and the drive signal for the step-up switching element. The dead time is equally allocated to both the output period and the one or both of the peak value and the bottom value is between the lower limit threshold and the upper limit threshold, and the drive for the step-down switching element is performed. The dead time may be assigned to both the signal output period and the drive signal output period for the boosting switching element at an allocation ratio according to the peak value and the bottom value.

  Further, the control unit may perform a filtering process that restricts a change in the allocation ratio.

  Furthermore, the control unit may perform a filtering process for limiting a change in at least one of the peak value and the bottom value.

  A power storage device may be connected to the primary side, and a power generation device and a motor may be connected to the secondary side.

  The power generation device may be a fuel cell.

  According to the present invention, in so-called synchronous switching control in which a drive signal is alternately output to a step-down switching element and a step-up switching element with a dead time between switching periods, switching between a step-down state and a step-up state is performed. Voltage fluctuation can be suppressed. As a result, the controllability of the DC / DC converter device can be improved.

1 is a schematic overall configuration diagram of a fuel cell vehicle equipped with a DC / DC converter device according to an embodiment of the present invention. It is a circuit diagram which shows the detailed structure of the DC / DC converter which concerns on the said embodiment. It is a circuit diagram which shows the detailed structure of the converter control part which concerns on the said embodiment. It is a time chart used for description of the synchronous switching control in the said embodiment. It is explanatory drawing which shows the relationship between the primary current in the said embodiment, and allocation of dead time. 5 is a flowchart for assigning dead time in the embodiment. It is a time chart used for description of the synchronous switching control in a 1st modification. It is explanatory drawing which shows the relationship between the primary current in the said 1st modification, and the allocation ratio of dead time. FIG. 9A is an explanatory diagram showing the relationship between the peak value of the primary current and the dead time allocation ratio in the first modification. FIG. 9B is an explanatory diagram illustrating a relationship between the average value of the primary current and the dead time allocation ratio in the first modification. FIG. 9C is an explanatory diagram showing the relationship between the bottom value of the primary current and the dead time allocation ratio in the first modification. FIG. 10A is an explanatory diagram for setting an allocation ratio using the relationship of FIG. 9A. FIG. 10B is an explanatory diagram for setting an allocation ratio using the relationship of FIG. 9B. FIG. 10C is an explanatory diagram in the case of setting the allocation ratio using the relationship of FIG. 9C. It is explanatory drawing of allocation of the dead time in the said 1st modification. It is explanatory drawing which shows the modification of explanatory drawing of FIG. It is a flowchart which determines the allocation ratio of a dead time in the said 1st modification. FIG. 14A is an explanatory diagram illustrating the relationship between the peak value of the primary current and the dead time allocation ratio in the second modification. FIG. 14B is an explanatory diagram illustrating a relationship between an average value of primary currents and an allocation ratio of dead time in the second modified example. FIG. 14C is an explanatory diagram showing the relationship between the bottom value of the primary current and the dead time allocation ratio in the second modification. FIG. 15A is an explanatory diagram showing the relationship between the peak value of the primary current and the dead time allocation ratio in the third modification. FIG. 15B is an explanatory diagram illustrating a relationship between an average value of primary currents and an allocation ratio of dead time in the third modification. FIG. 15C is an explanatory diagram illustrating a relationship between a bottom value of the primary current and a dead time allocation ratio in the third modification.

1. Explanation of overall configuration [Overall configuration]
FIG. 1 shows a schematic overall configuration diagram of a fuel cell vehicle 10 equipped with a DC / DC converter device 50 according to an embodiment of the present invention.

  The fuel cell vehicle 10 basically includes a battery 12 as a first DC power supply device that generates a primary voltage V1 on the primary side 1S and a second DC power supply that generates a secondary voltage V2 on the secondary side 2S. A hybrid DC power supply device including a fuel cell 14 as a device, and a traveling motor 16 that is a load supplied with power from the hybrid DC power supply device.

[Fuel cell and its system]
The fuel cell 14 has, for example, a stack structure in which cells formed by sandwiching a solid polymer electrolyte membrane between an anode electrode and a cathode electrode from both sides are stacked. A reaction gas supply unit 18 is connected to the fuel cell 14 through a pipe. The reactive gas supply unit 18 includes a hydrogen tank that stores hydrogen (fuel gas) that is one reactive gas, and a compressor that compresses air (oxidant gas) that is the other reactive gas. The generated current generated by the electrochemical reaction in the fuel cell 14 of hydrogen and air supplied from the reaction gas supply unit 18 to the fuel cell 14 is supplied to the motor 16 and the battery 12 via the diode 13.

  The fuel cell system 11 includes a fuel cell 14 and a reaction gas supply unit 18 and a fuel cell control unit (FC control unit) 44 that controls them.

[DC / DC converter]
The DC / DC converter 20 is a chopper type voltage converter in which one side is connected to the battery 12 and the other side is connected to the secondary side 2S that is a connection point between the fuel cell 14 and the motor 16.

  The DC / DC converter 20 converts the primary voltage V1 into a secondary voltage V2 (V1 ≦ V2) (boost conversion), and also converts the secondary voltage V2 into a primary voltage V1 (step-down conversion). This is a voltage conversion device.

[Inverter, motor and drive system]
The inverter 22 has a three-phase full-bridge configuration, performs DC / AC conversion, converts DC to three-phase AC, and supplies it to the motor 16, while DC after AC / DC conversion accompanying the regenerative operation. Is supplied from the secondary side 2S to the primary side 1S through the DC / DC converter 20, and the battery 12 is charged.

  The motor 16 rotates the wheels 26 through the transmission 24. In practice, the inverter 22 and the motor 16 are collectively referred to as a load 23.

[High voltage battery]
A high voltage battery 12 connected to the primary side 1S is a power storage device (energy storage), and for example, a lithium ion secondary battery or a capacitor can be used. In this embodiment, a lithium ion secondary battery is used.

[Various sensors, main switches and communication lines]
A main switch (power switch) 34 and various sensors 36 are connected to the overall control unit 40. The main switch 34 has a function as an ignition switch that turns on (starts or starts) and turns off (stops) the fuel cell vehicle 10 and the fuel cell system 11. Various sensors 36 detect state information, such as a vehicle state and an environmental state. As the communication line 38, a CAN (Controller Area Network) that is an in-vehicle LAN is used.

[Control unit]
The overall control unit 40, the FC control unit 44, the motor control unit 46, the converter control unit 48, and the battery control unit 52 are connected to the communication line 38. A DC / DC converter device 50 is formed by the DC / DC converter 20 and the converter control unit 48 that controls the DC / DC converter 20.

  Each control unit 40, 44, 46, 48, 52 includes a microcomputer, detects state information of various switches such as the main switch 34 and various sensors 36, and also controls each of the control units 40, 44, 46, 48, 52. Each CPU implements various functions by inputting status information from these switches and sensors and information (commands, etc.) from other controllers, and executing programs stored in memory (ROM). It operates as a function realization unit (function realization means). The control units 40, 44, 46, 48, and 52 have an input / output interface such as a timer, an A / D converter, and a D / A converter, as necessary, in addition to a CPU and a memory.

2. Detailed configuration description [DC / DC converter device]
FIG. 2 shows a detailed configuration of the DC / DC converter 20. The DC / DC converter 20 includes a phase arm UA disposed between the primary side 1S and the secondary side 2S, and a reactor 90.

  The phase arm UA includes an upper arm element (upper arm switching element 81 and diode 83) and a lower arm element (lower arm switching element 82 and diode 84).

  As the upper arm switching element 81 and the lower arm switching element 82, for example, a MOSFET or an IGBT is employed.

  Reactor 90 is inserted between the midpoint (common connection point) of phase arm UA and the positive electrode of battery 12, and converts voltage between primary voltage V1 and secondary voltage V2 by DC / DC converter 20. In particular, it has the function of releasing and storing energy.

  The upper arm switching element 81 is turned on by the high level of the gate drive signal (drive voltage) UH output from the converter control unit 48, and the lower arm switching element 82 is turned on by the high level of the gate drive signal (drive voltage) UL. Turned on by. The converter control unit 48 detects the primary voltage V1 by the voltage sensor 91 provided in parallel with the smoothing capacitor 94 on the primary side, detects the primary current I1 by the current sensor 101, and smoothes the secondary side. The secondary voltage V2 is detected by the voltage sensor 92 provided in parallel with the capacitor 96, and the secondary current I2 is detected by the current sensor 102.

  FIG. 3 is a functional block diagram illustrating a flow in which the converter control unit 48 generates the drive signals UH and UL in the present embodiment.

  Converter control unit 48 includes a calculation unit 120 and an output unit 122. The calculation unit 120 and the output unit 122 may be configured as either hardware or software.

  The converter control unit 48 uses so-called synchronous switching control. The synchronous switching control is a control for alternately outputting drive signals UH and UL to the upper arm switching element 81 and the lower arm switching element 82 in each switching cycle Tsw [s] (see FIG. 4). A dead time dt [s] is set between the outputs of the drive signals UH and UL to prevent a short circuit. The processing for setting the dead time dt in this way is hereinafter referred to as “dead time setting processing”.

  The calculation unit 120 calculates a target duty DUTtar [%] that defines the output period [s] of the drive signals UH and UL in one switching cycle Tsw.

  The calculation unit 120 includes a subtractor 130, a feedback term calculation unit 132 (hereinafter also referred to as “FB term calculation unit 132”), and a feedforward term calculation unit 134 (hereinafter also referred to as “FF term calculation unit 134”). And a first adder 138.

  The subtractor 130 is a difference ΔV2 (= V2com−V2) between the command value (secondary voltage command value V2com) [V] of the secondary voltage V2 from the overall control unit 40 and the secondary voltage V2 from the voltage sensor 92. [V] is calculated and output to the FB term calculation unit 132.

  The FB term computing unit 132 computes a feedback term (hereinafter also referred to as “FB term”) by PID control (proportional / integral / derivative control) using the difference ΔV <b> 2 from the subtractor 130.

  The FF term calculation unit 134 is a feedforward term (hereinafter also referred to as “FF term”) that is a quotient V1 / V2com of the primary voltage V1 from the voltage sensor 91 and the secondary voltage command value V2com from the overall control unit 40. ) Is calculated.

  The first adder 138 adds the FB term from the FB term computing unit 132 and the FF term from the FF term computing unit 134 and outputs the sum to the output unit 122 as the target duty DUTtar.

  The target duty DUTtar in the present embodiment is the drive duty of the upper arm switching element 81, that is, the ratio of the period during which the drive signal UH is output to the upper arm switching element 81 in one switching cycle Tsw [s] (drive signal UH The ratio of the period during which is at a high level) [%]. The ratio of the period during which the drive signal UL is output to the lower arm switching element 82 in one switching cycle Tsw (the ratio of the period during which the drive signal UL is at a high level) ranges from 100% to the ratio of the upper arm switching element 81. It is assumed that it was subtracted.

  The output unit 122 outputs the drive signals UH and UL based on the target duty DUTtar from the calculation unit 120 and the primary current I1 from the current sensor 101.

[Operation of DC / DC converter device]
Next, the operation of the DC / DC converter device 50 will be described.

(Synchronous switching control)
As described above, in the DC / DC converter device 50, the synchronization in which the drive signals UH and UL are alternately output to the upper arm switching element 81 (for step-down) and the lower arm switching element 82 (for step-up) every switching cycle Tsw. Switching control is used. In the synchronous switching control, the drive signals UH and UL are alternately output to the upper arm switching element 81 and the lower arm switching element 82. If the DC / DC converter device 50 is stepping down or stepping up, the upper arm A current flows (flows) through only one of the switching element 81 or the lower arm switching element 82.

  That is, in the step-down chopper control related to the step-down operation (regeneration operation), the secondary current I2 flowing out from the load 23 and the fuel cell 14 passes through the DC / DC converter 20 and charges the battery 12 as the primary current I1. In the step-up chopper control related to the step-up operation (assist operation), the primary current I1 flowing out from the battery 12 passes through the DC / DC converter 20 and the load 23 including the motor 16 is driven as the secondary current I2.

  In the step-down chopper control, first, during the period in which only the upper arm switching element 81 is passed by the drive signal UH, the secondary current I2 flows as the primary current I1 to the reactor 90 through the upper arm switching element 81 and flows to the reactor 90. Energy is stored and the battery 12 is charged.

  Next, during the period when only the drive signal UL is at a high level, the lower arm switching element 82 does not flow, the diode 84 is turned on, and the energy stored in the reactor 90 is released, and the battery 12 is discharged. Charged.

  In the step-up chopper control, first, energy is accumulated in the reactor 90 by the primary current I1 from the battery 12 during a period when only the drive signal UL is at a high level. At this time, a current is supplied from the smoothing capacitor 96 on the secondary side to the load 23.

  Next, during the period when only the drive signal UH is at the high level, the upper arm switching element 81 does not flow, the diode 83 is turned on, and the energy accumulated in the reactor 90 is released, and the reactor 90 releases the energy. The primary current I1 passes through the DC / DC converter 20, charges the secondary-side smoothing capacitor 96 as the secondary current I2, and is supplied to the load 23.

  In the zero ampere crossing state in which the primary current I1 crosses zero ampere in one switching cycle Tsw, both the step-down state and the step-up state described above appear.

  As described above, in the synchronous switching control, in order to prevent the upper arm switching element 81 and the lower arm switching element 82 from flowing simultaneously and short-circuiting, the period for outputting the drive signal UH (upper arm drive period Tud) and the drive signal UL The dead time dt is assigned to the period during which the signal is output (lower arm drive period Tld). A method for assigning the dead time dt will be described later.

(Processing in the output unit 122)
The target duty DUTtar used in the synchronous switching control is calculated based on the secondary voltage V2, the secondary voltage command value V2com, and the primary voltage V1 in the calculation unit 120 and transmitted to the output unit 122.

  As shown in FIG. 4, the output unit 122 first has an upper arm target drive period Tud_tar [s] as a period corresponding to the target duty DUTtar, and a period obtained by subtracting the upper arm target drive period Tud_tar from the switching period Tsw. Arm target drive period Tld_tar) [s] is calculated. Then, two dead times dt are assigned to at least one of the upper arm target drive period Tud_tar and the lower arm target drive period Tld_tar according to the primary current I1. Thus, the upper arm drive period Tud [s], which is a period for actually outputting the drive signal UH to the upper arm switching element 81, and the lower arm drive, which is a period for actually outputting the drive signal UL to the lower arm switching element 82. A period Tld is determined. The output unit 122 outputs the drive signal UH according to the upper arm drive period Tud, and outputs the drive signal UL according to the lower arm drive period Tld.

(Dead time dt allocation method)
As described above, the output unit 122 is connected between the upper arm driving period Tud and the lower arm driving period Tld (when the upper arm driving period Tud shifts to the lower arm driving period Tld, and from the lower arm driving period Tld to the upper arm). A dead time dt is assigned during the transition to the driving period Tud. Here, when the dead time dt is assigned to each of the upper arm target driving period Tud_tar and the lower arm target driving period Tld_tar, the upper arm driving period Tud and the lower arm driving period Tld are respectively set to the upper arm target driving by the dead time dt. It becomes shorter than the period Tud_tar and the lower arm target drive period Tld_tar. As a result, an error may occur between the secondary voltage command value V2com and the secondary voltage V2.

  Therefore, in the present embodiment, as described below, the DC / DC converter device 50 assigns the dead time dt according to whether the DC / DC converter device 50 is stepping up, crossing zero amperes, or stepping down as described above. The possibility that an error will occur is reduced.

  FIG. 4 shows a time chart for explaining the target duty DUTtar and a method of assigning the dead time dt during boosting, crossing zero amperes and during stepping down.

  When the polarity of the primary current I1 is always negative during the switching period Tsw and the DC / DC converter device 50 is being stepped down (regeneratively) like the primary current I1a in FIG. All the two dead times dt are allocated to the lower arm target drive period Tld_tar. Accordingly, the lower arm driving period Tld has a length obtained by subtracting two dead times dt from the lower arm target driving period Tld_tar (Tld = Tld_tar−dt × 2). On the other hand, the upper arm target drive period Tud_tar and the upper arm drive period Tud have the same length (Tud = Tud_tar).

  When the primary current I1 is in the zero ampere spanning the zero ampere during the switching period Tsw as in the primary current I1b in FIG. 5, the output unit 122 outputs the upper arm target drive period Tud_tar and the lower arm target drive. A dead time dt is assigned to each period Tld_tar. Accordingly, the upper arm driving period Tud has a length obtained by subtracting one dead time dt from the upper arm target driving period Tud_tar (Tud = Tud_tar−dt), and the lower arm driving period Tld is equal to the lower arm target driving period Tld_tar. Is obtained by subtracting one dead time dt (Tld = Tld_tar−dt).

  When the polarity of the primary current I1 is always positive during the switching cycle Tsw and the DC / DC converter device 50 is being boosted (assist), like the primary current I1c in FIG. All the two dead times dt are allocated to the upper arm target drive period Tud_tar. As a result, the upper arm drive period Tud has a length obtained by subtracting two dead times dt from the upper arm target drive period Tud_tar (Tud = Tud_tar−dt × 2). On the other hand, the lower arm target drive period Tld_tar and the lower arm drive period Tld have the same length (Tld_tar = Tld).

  FIG. 6 shows a flowchart for assigning the dead time dt in the present embodiment. In step S1, the output unit 122 determines whether the peak value I1pk [A] of the primary current I1 is less than zero amperes. When the peak value I1pk is less than zero ampere (S1: YES), it can be determined that the voltage is being lowered. Therefore, in step S2, the output unit 122 assigns all the dead time dt to the output of the drive signal UL (lower arm target drive period Tld_tar). When the peak value I1pk is equal to or higher than zero ampere (S1: NO), the process proceeds to step S3.

  In step S3, the output unit 122 determines whether or not the bottom value I1btm [A] of the primary current I1 exceeds zero amperes. When the bottom value I1btm exceeds zero ampere (S3: YES), it can be determined that the pressure is being increased. Therefore, in step S4, the output unit 122 assigns all dead times dt to the output of the drive signal UH (upper arm target drive period Tud_tar). When the bottom value I1btm is equal to or lower than zero ampere (S3: NO), it can be determined that the current is crossing zero ampere. Therefore, in step S5, the output unit 122 assigns the dead time dt evenly to both the output of the drive signals UH and UL (upper arm drive period Tud and lower arm drive period Tld).

[Effect of this embodiment]
As described above, according to the present embodiment, when it is determined that only the step-down state is present, the dead time dt is allotted to the output period of the drive signal UL (lower arm target drive period Tld_tar), and only in the step-up state. When it is determined that there is a case, the dead time dt is allotted to the output period of the drive signal UH (upper arm target drive period Tud_tar), and when it is determined that it is in the zero ampere crossing state, The dead time dt is assigned to both the drive period Tud_tar) and the output period of the drive signal UL (lower arm target drive period Tld_tar). Thereby, the influence by assigning the dead time dt to at least one of the upper arm target drive period Tud_tar and the lower arm target drive period Tld_tar can be reduced. Therefore, voltage fluctuation due to switching between the step-up state and the step-down state can be suppressed in the synchronous switching control. As a result, the controllability of the DC / DC converter device 50 can be improved.

  In the above embodiment, the battery 12 is connected to the primary side 1S of the DC / DC converter device 50, and the fuel cell 14 and the motor 16 are connected to the secondary side 2S. According to this configuration, it is possible to suppress the deterioration of the stack of the fuel cells 14 and to improve the efficiency of the fuel cell vehicle 10 that uses the fuel cells 14 as a power generation device.

  That is, in the current-voltage characteristics of a general fuel cell, the voltage increases as the current decreases (in contrast, the current increases as the voltage decreases). Further, when a fuel cell is used as a power generation device, it is necessary to supply an amount of reaction gas corresponding to the required output of the power generation device to the fuel cell. However, when the amount of the reaction gas supplied to the fuel cell is less than the amount corresponding to the required output (for example, when the voltage of the fuel cell is lower than the target value), in addition to the current generated by the reaction of the reaction gas, Current is drawn from the fuel cell stack itself, which degrades the stack. If the DC / DC converter device 50 according to the present embodiment is used, it is possible to suppress voltage fluctuations associated with switching between the step-up state and the step-down state. For this reason, even when switching between the step-up state and the step-down state occurs, it is possible to prevent the voltage of the fuel cell 14 from becoming lower than the target value and to suppress the deterioration of the stack.

  In addition, in order to suppress the deterioration of the stack as described above, in the case of supplying an amount of reaction gas in which an amount of reaction gas actually required is added with a margin, in the DC / DC converter device 50, the step-up state and the step-down state Since voltage fluctuations associated with switching are suppressed, the margin can be set low. As a result, the efficiency of the fuel cell vehicle 10 that uses the fuel cell 14 as a power generation device can be improved.

3. Modifications It should be noted that the present invention is not limited to the above-described embodiment, and it is needless to say that various configurations can be adopted based on the contents described in this specification. For example, the following configuration can be adopted.

[Target]
In the above embodiment, the DC / DC converter device 50 is mounted on the fuel cell vehicle 10, but is not limited thereto, and may be mounted on another target. For example, the DC / DC converter device 50 can be used for a moving body such as a ship or an aircraft. Alternatively, the DC / DC converter device 50 may be applied to a household power system.

[DC / DC converter]
In the above embodiment, the number of the upper arm switching elements 81 and the number of the lower arm switching elements 82 is one. However, the number is not limited to this, and may be two or more.

[Target duty]
In the above embodiment, the target duty DUTtar directly corresponds to the upper arm target drive period Tud_tar, and is calculated as a period during which the calculation unit 120 outputs the drive signal UH to the upper arm switching element 81. However, the present invention is not limited to this, and may correspond to the lower arm target drive period Tld_tar.

[Output section]
(1) Dead Time dt Assignment Method In the above embodiment, the dead time dt is assigned by dividing the operation state of the DC / DC converter device 50 into three states: a step-down state, a zero ampere crossing state, and a step-up state. However, it is not limited to this.

  FIG. 7 is a time chart of the first modification. The first modified example is basically the same as the above embodiment, but the operation state of the DC / DC converter device 50 is changed to the boost state, the boost-zero ampere (0A) transition state, and the large amplitude zero ampere (0A) straddle. The dead time dt is assigned to six states: a state, a small amplitude zero ampere (0A) straddling state, a step-down to zero ampere (0A) transition state, and a step-down state. In the first modification, the above six states are determined using the peak value I1pk, the bottom value I1btm, the positive current threshold THmax [A], and the negative current threshold THmin [A] of the primary current I1. Then, the dead time dt is assigned based on the determined state. The positive current threshold value THmax and the negative current threshold value THmin are set to values that can determine the operating state of the DC / DC converter 20 (step-down (regeneration), step-up (assist), or crossing zero amps).

  FIG. 8 shows the relationship between the primary current I1 and the dead time dt allocation ratio Pdt. 9A, FIG. 9B, and FIG. 9C show the relationship between the primary current I1 and the allocation ratio Pdt in the boost-zero ampere (0A) transition state, the small amplitude zero ampere (0A) crossing state, and the step-down-zero ampere (0A) transition state. Show the relationship. FIGS. 10A, 10B, and 10C are explanatory diagrams when setting the allocation ratio Pdt in the step-up to zero ampere (0A) transition state, the small amplitude zero ampere (0A) crossing state, and the step-down to zero ampere (0A) transition state. It is. FIG. 11 is an explanatory diagram for assigning the dead time dt.

  As in the case of the primary current I1d in FIG. 8, when both the peak value I1pk and the bottom value I1btm are less than the negative current threshold THmin (I1btm, I1pk <THmin), that is, the primary current I1 over the entire switching period Tsw. Is negative, the dead time dt is all assigned to the output of the drive signal UL (lower arm target drive period Tld_tar). That is, the dead time dt allocation ratio Pdt [%] is set to zero.

  The allocation ratio Pdt is allocated to the upper arm target drive period Tud_tar when all dead times dt in one switching cycle Tsw (total of two dead times dt) are set to 1 (100 [%]). Using this allocation ratio Pdt, a dead time dt is allocated as shown in FIG.

  For example, when the allocation ratio Pdt is 50 [%], the dead time dt is allocated equally (in increments of 0.5) to the upper arm target drive period Tud_tar and the lower arm target drive period Tld_tar. When the allocation ratio Pdt is 60 [%], 60 [%] of the dead time dt is allocated to the upper arm target drive period Tud, and the remaining 40 [%] is allocated to the lower arm drive period Tld. In this case, the length of one dead time dt itself is fixed to 0.5 (50 [%]) of the whole. For this reason, the dead time dt allocated to the upper arm target drive period Tud_tar when the lower arm drive period Tld is shifted to the upper arm drive period Tud is 0.5, and the upper arm drive period Tud is changed to the lower arm drive period Tld. 0.2 (total 0.1) of the dead time dt (total 0.5) at the time of transition is allocated to the upper arm target drive period Tud_tar.

  When the peak value I1pk is between the positive current threshold THmax and the negative current threshold THmin and the bottom value I1btm is less than the negative current threshold THmin as in the primary current I1e of FIG. 8 (I1btm <THmin ≦ I1pk). ≦ THmax) (hereinafter, this state is referred to as “step-down to zero ampere (0A) transition state”), the allocation ratio Pdt [%] is determined based on the peak value I1pk and the allocation characteristic Cpk of the table TBLpk shown in FIG. 9A. . In the allocation characteristic Cpk of the table TBLpk, the allocation ratio Pdt increases from zero [%] to 50 [%] as the peak value I1pk increases.

  When the peak value I1pk exceeds the positive current threshold THmax (I1pk> THmax) and the bottom value I1btm is less than the negative current threshold THmin (I1btm <THmin) (hereinafter, referred to as the primary current I1f in FIG. 8). This state is referred to as a “large amplitude zero ampere (0A) straddling state”), and the allocation ratio Pdt is set to 50 [%].

  When the peak value I1pk and the bottom value I1btm are between the positive current threshold value THmax and the negative current threshold value THmin (THmin ≦ I1btm, I1pk ≦ THmax) as in the primary current I1g in FIG. (Referred to as “small amplitude zero ampere (0A) straddling state”)) The average value of the primary current I1 (here, the average value I1ave [A] of the peak value I1pk and the bottom I1btm) and the allocation characteristics of the table TBAVE shown in FIG. 9B The allocation ratio Pdt is set using Cave. In the allocation characteristic Cave of the table TBAVE, the allocation ratio Pdt increases from zero [%] to 100 [%] as the average value I1ave increases.

  When the bottom value I1btm is between the positive current threshold THmax and the negative current threshold THmin and the peak value I1pk exceeds the positive current threshold THmax (THmin ≦ I1btm ≦ THmax <) as in the primary current I1h in FIG. I1pk) (hereinafter, this state is referred to as “boost-zero ampere (0A) transition state”), the bottom value I1btm and the allocation characteristic Cbtm of the table TBLbtm of FIG. 9C are used to set the allocation ratio Pbtm. In the allocation characteristic Cbtm of the table TBLbtm, the allocation ratio Pdt increases from 50 [%] to 100 [%] as the bottom value I1btm increases.

  When both the peak value I1pk and the bottom value I1btm exceed the positive current threshold THmax (I1btm, I1pk> THmax) as in the primary current I1i in FIG. 8, all of the dead time dt is output from the drive signal UH (upper Assigned to the arm target drive period Tud_tar). That is, the allocation ratio Pdt is set to 100 [%].

  In FIG. 11, it is normal to arrange the dead time dt before the upper arm driving period Tud and the lower arm driving period Tld, and when the allocation ratio Pdt is changed, the upper arm driving period Tud and the lower arm driving period Tld. The dead time dt is also arranged on the back side of the. However, the present invention is not limited to this, and as shown in FIG. 12, when the dead time dt is normally arranged behind the upper arm driving period Tud and the lower arm driving period Tld, and the allocation ratio Pdt is changed, The dead time dt can also be arranged in front of the upper arm driving period Tud and the lower arm driving period Tld.

  FIG. 13 is a flowchart for determining the allocation ratio Pdt of the dead time dt in the first modification shown in FIGS. In step S11, the output unit 122 determines whether or not the peak value I1pk of the primary current I1 is less than the negative current threshold THmin (I1pk <THmin). When the peak value I1pk is less than the negative current threshold THmin (S1: YES), the DC / DC converter 20 is in a step-down (regenerative) state. Therefore, in step S12, the output unit 122 sets the allocation ratio Pdt to zero [%], and allocates all dead times dt to the lower arm target drive period Tld_tar. When the peak value I1pk is equal to or greater than the negative current threshold THmin (S11: NO), the process proceeds to step S13.

  In step S13, output unit 122 determines whether bottom value I1btm exceeds positive current threshold value THmax (I1btm> THmax). When bottom value I1btm exceeds positive current threshold value THmax (S13: YES), DC / DC converter 20 is in the boost (assist) state. Therefore, in step S14, the output unit 122 sets the allocation ratio Pdt to 100 [%] and allocates all the dead times dt to the upper arm target drive period Tud_tar. When the bottom value I1btm is equal to or less than the positive current threshold THmax (S13: NO), the process proceeds to step S15.

  In step S15, the output unit 122 determines whether the bottom value I1btm is less than the negative current threshold THmin (I1btm <THmin) and the peak value I1pk exceeds the positive current threshold THmax (I1pk> THmax). When the bottom value I1btm is less than the negative current threshold THmin and the peak value I1pk exceeds the positive current threshold THmax (S15: YES), a large amplitude zero ampere (0A) straddling state is established. Therefore, in step S16, the output unit 122 sets the allocation ratio Pdt to 50 [%]. When the bottom value I1btm is greater than or equal to the negative current threshold THmin, or when the peak value I1pk is less than or equal to the positive current threshold THmax (S15: NO), the process proceeds to step S17.

  In step S17, the output unit 122 determines whether the bottom value I1btm is less than the negative current threshold THmin (I1btm <THmin) and the peak value I1pk is equal to or greater than the negative current threshold THmin and equal to or less than the positive current threshold THmax (THmin ≦ I1pk ≦ THmax). When the bottom value I1btm is less than the negative current threshold THmin and the peak value I1pk is greater than or equal to the negative current threshold THmin and less than or equal to the positive current threshold THmax (S17: YES), it is a step-down-zero ampere (0A) transition state. Accordingly, in step S18, the output unit 122 sets the allocation ratio Pdt using the peak value I1pk and the allocation characteristic Cpk (FIG. 9A) of the table TBLpk. When the bottom value I1btm is greater than or equal to the negative current threshold THmin, or when the peak value I1pk is less than the negative current threshold THmin or exceeds the positive current threshold THmax (S17: NO), the process proceeds to step S19.

  In step S19, the output unit 122 determines whether the bottom value I1btm is greater than or equal to the negative current threshold THmin and less than or equal to the positive current threshold THmax (THmin ≦ I1btm ≦ THmax), and whether the peak value I1pk exceeds the positive current threshold THmax. Whether or not (I1pk> THmax) is determined. When the bottom value I1btm is greater than or equal to the negative current threshold THmin and less than or equal to the positive current threshold THmax, and the peak value I1pk exceeds the positive current threshold THmax (S19: YES), it is in a boost-zero ampere (0A) transition state. . Therefore, in step S20, the output unit 122 sets the allocation ratio Pdt using the bottom value I1btm and the allocation characteristic Cbtm (FIG. 9C). When the peak value I1pk is equal to or less than the positive current threshold THmax (S19: NO), the peak value I1pk and the bottom value I1btm are equal to or greater than the negative current threshold THmin and equal to or less than the positive current threshold THmax. 0A) Crossing state. Therefore, in step S21, the output unit 122 sets the allocation ratio Pdt using the average value I1ave of the peak value I1pk and the bottom value I1btm, and the allocation characteristic Cave (FIG. 9B) of the table TBLove.

  As described above, in the first modification, when the value of the primary current I1 is in the vicinity of zero ampere, the allocation ratio Pdt of the dead time dt is gradually switched, and the outputs of the drive signals UH and UL change rapidly. By suppressing this, the controllability of the DC / DC converter device 50 can be improved.

(2) Filter Processing FIGS. 14A, 14B, and 14C are explanatory diagrams of the relationship between the primary current I1 and the allocation ratio Pdt in the second modification. The second modified example is basically the same as the first modified example, except that the peak value I1pk, the bottom value I1btm, and the average value I1ave are subjected to filter processing that restricts changes in the values. The difference is that the allocation ratio Pdt is determined. Examples of filter processing include first-order lag processing and averaging processing. According to the second modification, it is possible to limit the change in the allocation ratio Pdt and suppress the primary current I1 from fluctuating excessively.

  FIG. 15A, FIG. 15B, and FIG. 15C are explanatory diagrams of the relationship between the primary current I1 and the allocation ratio Pdt in the third modification. The third modified example is basically the same as the first modified example, but a filter that restricts the change in the allocation ratio Pdt determined from the peak value I1pk, the bottom value I1btm, or the average value I1ave. The processing is different and the post-filter processing allocation ratio Pdt2 is determined. Examples of filter processing include first-order lag processing and averaging processing. According to the third modification, it is possible to limit the change in the allocation ratio Pdt and suppress the primary current I1 from fluctuating excessively.

  In the embodiment, the first modified example, the second modified example, and the third modified example, the allocation ratio Pdt is determined using the peak value I1pk, the bottom value I1btm, and the average value I1ave, but is not limited thereto. For example, as the peak value I1pk and the bottom value I1btm, respective moving average values may be used. Further, instead of the average value I1ave of the peak value I1pk and the bottom value I1btm, an average value (average value of all values) of the primary current I1 in each switching cycle Tsw may be used.

DESCRIPTION OF SYMBOLS 12 ... Battery (electric storage apparatus) 14 ... Fuel cell 16 ... Motor 48 ... Converter control part (control part)
DESCRIPTION OF SYMBOLS 50 ... DC / DC converter apparatus 81 ... Upper arm switching element 82 ... Lower arm switching element 90 ... Reactor 101,102 ... Current sensor 120 ... Calculation part 122 ... Output part dt ... Dead time DUTtar ... Target duty I1, I1a-I1i ... Primary current I1ave ... Average value of primary current I1btm ... Bottom value of primary current I1pk ... Peak value of primary current Pdt ... Dead time allocation ratio THmax ... Positive current threshold THmin ... Negative current threshold Tld ... Lower arm Drive period Tld_tar ... Lower arm target drive period Tsw ... Switching cycle Tud ... Upper arm drive period Tud_tar ... Upper arm target drive period UH, UL ... Drive signal 1S ... Primary side 2S ... Secondary side

Claims (5)

A step-down switching element;
A step-up switching element;
Reactor,
A chopper type DC / DC converter device comprising: a step-down switching element and a control unit that alternately outputs a drive signal to the step-up switching element across a dead time for each switching period,
The controller is
Whether the DC / DC converter device is in the step-down state only, in the step-up state only, or in the case where both the step-down state and the step-up state appear in each switching cycle. Is determined based on the current on the primary side where
When determining that it is only the step-down state, the dead time is allotted to the output period of the drive signal to the step-up switching element,
When determining that only the step-up state, the dead time is allotted to the output period of the drive signal to the step-down switching element,
When it is determined that both the step-down state and the step-up state appear, the dead time both in the output period of the drive signal to the step-up switching element and in the output period of the drive signal to the step-down switching element Assigned ,
Furthermore, the control unit
Detecting a peak value and a bottom value of the current on the primary side in each switching period;
Whether it is only the step-down state, only the step-up state, or when both the step-down state and the step-up state appear is determined based on the peak value and the bottom value,
Furthermore, the control unit
An upper limit threshold and a lower limit threshold of the primary side current for determining the step-down state and the step-up state are preset,
When the peak value is less than or equal to the lower limit threshold, it is determined that the step-down state is only, and the dead time is allotted to the output period of the drive signal to the step-up switching element,
When the bottom value is greater than or equal to the upper limit threshold, it is determined that only the step-up state, and the dead time is allotted to the output period of the drive signal to the step-down switching element,
When the bottom value is less than or equal to the lower limit threshold and the peak value is greater than or equal to the upper limit threshold, it is determined that both the step-down state and the step-up state appear, and the output period of the drive signal to the step-down switching element The dead time is equally allocated to both the output period of the drive signal to the boosting switching element,
When one or both of the peak value and the bottom value are between the lower limit threshold and the upper limit threshold, the output period of the drive signal to the step-down switching element and the drive signal to the step-up switching element The DC / DC converter device , wherein the dead time is allocated to both the output period and the allocation ratio according to the peak value and the bottom value . The DC / DC converter device according to claim 1 , wherein
The DC / DC converter device, wherein the control unit performs a filtering process for limiting a change in the allocation ratio. The DC / DC converter device according to claim 1 or 2 ,
The DC / DC converter device, wherein the control unit performs a filter process for limiting a change in at least one of the peak value and the bottom value. In the DC / DC converter device according to any one of claims 1 to 3 ,
A DC / DC converter device, wherein a power storage device is connected to the primary side, and a power generation device and a motor are connected to the secondary side. The DC / DC converter device according to claim 4 ,
The power generation device is a fuel cell.

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