JP5333799B2 - Liquid crystal panel and liquid crystal display device - Google Patents

Description

  The present invention relates to a liquid crystal panel and a liquid crystal display device.

  As display devices for AV equipment and OA equipment, liquid crystal display devices are widely used because of advantages such as thinness, light weight, and low power consumption. As shown in FIG. 15, this liquid crystal display device includes a liquid crystal panel 32 and a backlight unit 33 as main components, and the liquid crystal panel 32 has switching elements such as TFTs (Thin Film Transistors) formed in a matrix. TFT substrate 34, a counter substrate 36 on which a color filter (CF), a black matrix (BM), etc. are formed, a liquid crystal 35 sandwiched between both substrates, and a polarizing plate 37 disposed outside both substrates. Etc.

  Further, as shown in FIG. 16, the TFT substrate 34 has a pattern (hereinafter referred to as drain wiring 43) for supplying a voltage for controlling transmittance (hereinafter referred to as drain signal) and a voltage for controlling ON / OFF of each pixel. A pattern for supplying (hereinafter referred to as a gate signal) (hereinafter referred to as a gate wiring 41) and a pattern for supplying a constant voltage (hereinafter referred to as a common voltage) (hereinafter referred to as a common wiring 42) are formed. A TFT is disposed at the intersection of the wiring 41. Further, outside the display area 44 in which each pixel is arranged in a matrix, a terminal area 45 a where an input terminal connected to the gate wiring 41 is arranged and an input terminal connected to the drain wiring 43 are arranged. A terminal region 45b is provided.

  In each pixel, a pixel electrode 39 connected to the drain wiring 43 through the TFT and a common electrode 40 connected to the common wiring 42 are formed. The TFT is turned on / off by the voltage supplied from the gate wiring 41 and transmits the voltage supplied from the drain wiring 43 to the pixel electrode 39 when the TFT is turned on, and an electric field generated between the pixel electrode 39 and the common electrode 40. Rotate the liquid crystal 35 to control the transmittance of the backlight light from the backlight unit 33.

  Here, a pixel (for example, a pixel at point A in FIG. 16) in the vicinity of the input terminal of the gate wiring 41 (that is, in the vicinity of the terminal region 45a) and a pixel in the vicinity of the terminal end (for example, a pixel at point B in FIG. In comparison, as shown in FIG. 17, a delay occurs in the waveform of the gate signal due to the resistance of the pattern itself. As a result, as shown in FIG. 18, the amount that the TFT sends a voltage for controlling the transmittance to the pixel electrode 39 (hereinafter, the amount of writing) varies depending on the difference in the waveform of the gate signal, resulting in a difference in transmittance.

  Similarly, in the drain wiring 43, a pixel in the vicinity of the input terminal (that is, in the vicinity of the terminal region 45b) (for example, a pixel at point A in FIG. 16) and a pixel in the vicinity of the termination (for example, a pixel at point B in FIG. 16) As shown in FIG. 17, the delay of the waveform of the drain signal is caused by the resistance of the pattern itself. As a result, the potential difference between the drain signal and the common voltage (that is, the voltage applied to the liquid crystal) varies depending on the difference in the waveform of the drain signal, resulting in a difference in transmittance.

  Accordingly, a difference in transmittance occurs between the left, right, top, and bottom of the screen due to the resistance of the gate line 41 and the drain line 43. For example, the order of the top left, the bottom left, the top right, and the bottom right in order of increasing transmittance. It becomes a tendency. At this time, if the backlight emits light uniformly, this difference in transmittance appears as it is as a difference in luminance on the display surface, causing a problem that the display quality of the liquid crystal display device is lowered.

  In order to solve the above problem, for example, a method of operating the luminance distribution of the backlight as the light source and compensating the transmittance distribution of the liquid crystal panel 32 with the light source can be considered. For example, in Patent Document 1 below, a method of supplementing the image quality of a liquid crystal panel by adjusting the luminance distribution on the light source side by changing the pattern density of the light diffuse reflection layer on the back surface of the light guide plate with respect to an edge light type backlight. Has been proposed. Patent Document 2 below proposes a method for compensating the image quality of a liquid crystal panel by adding a circuit for controlling lamp luminance and a circuit for calculating a lamp luminance correction coefficient from display data.

  Further, in the TFT substrate 34 of FIG. 16, the input terminal of the gate wiring 41 is arranged on one of the short sides of the liquid crystal panel 32, and the input terminal of the drain wiring 43 is arranged on one of the long sides of the liquid crystal panel 32. In this method, the liquid crystal panel 32 is divided vertically or horizontally, and signal input terminals are arranged on both sides of the short side or both sides of the long side. There has also been proposed a method for reducing the resistance of the wiring.

  In addition to the problem caused by the luminance of the surface light source, not the problem caused by the resistance of the gate wiring 41 and the drain wiring 43, the following Patent Document 3 discloses a liquid crystal display device so as to cancel the luminance distribution of the surface light source. A method for controlling the transmittance distribution of the liquid crystal is disclosed.

JP-A-6-313883 JP 2006-330187 A JP 2001-33782 A

  Here, with respect to the luminance uniformity, which is one of the image quality performances of the liquid crystal display device, the luminance uniformity at the time of full gradation (all white) display is often standardized by specifications.

  On the other hand, in recent years, large-sized and high-definition liquid crystal display devices have come to be used particularly for medical applications. With respect to the display for medical applications, the DIN (German Industrial Standards) as shown in Table 1 regarding the image quality. ) And AAPM (American Institute of Medical Physics), etc., and evaluation criteria (required values) different from those of general liquid crystal televisions are set. In particular, halftones are used to detect affected areas in X-ray images. Strict performance is required for brightness uniformity during display.

  Therefore, in order to provide a liquid crystal display device that can be used for medical purposes, it is required to satisfy luminance uniformity not only when displaying full gradation (all white) but also when displaying halftone. The effect of the waveform difference on the change in transmittance (brightness) is greater in halftone display than in full white display, so the brightness uniformity during full gradation (all white) display is within the standard. However, there is a problem that the luminance uniformity at the time of halftone display is out of the standard.

  That is, as shown in FIG. 19, the voltage-transmittance characteristic of the liquid crystal panel is normally flat in the all-white display area, but changes sharply in the halftone display area. When a delay occurs in the waveform of the gate signal or the drain signal, the transmittance greatly changes in the halftone display area. Specifically, when the liquid crystal panel is divided as shown in FIG. 20A, the change in transmittance is not so large in the all-white display shown in FIG. 20B, but shown in FIG. In the halftone display, the transmittance is greatly reduced in the regions (regions c and f) far from the terminal region 45a as compared to the regions (regions a and d) close to the terminal region 45a.

  To solve this problem, it is possible to adjust the luminance on the light source side so that the luminance at the time of halftone display becomes uniform using the method of Patent Document 1, but in this case, as a trade-off, The brightness unevenness at the time of white display deteriorates. This is because when the luminance distribution of the light source becomes non-uniform, when the liquid crystal panel is displayed in all white, light with non-uniform luminance is transmitted as it is.

  Further, according to the method of Patent Document 2, the transmittance of the liquid crystal panel is controlled by arbitrarily controlling the luminance distribution on the light source side even when the transmittance distribution of the liquid crystal panel is different between the white display and the halftone display. Although it is possible to compensate, a complicated control circuit is required for that purpose, and the cost becomes high.

  In addition, in the so-called double-sided extraction method, in which the liquid crystal panel is divided vertically or horizontally and signal input terminals are arranged on both sides of the short side or both sides of the long side, when the screen is enlarged, Similar to the so-called single-side extraction method, a problem of wiring resistance occurs, and simply applying the double-side extraction method does not solve the above problem.

  Further, Patent Document 3 discloses a method for controlling the transmittance distribution of a liquid crystal display device, such as a method for defining the thickness of a liquid crystal layer, the ratio of a region that transmits light, and the electrode spacing of comb-shaped electrodes. Since these elements have their ranges defined based on variations in the luminance of the surface light source, even if the method of Patent Document 3 is used, the problem caused by the resistance of the gate wiring 41 and the drain wiring 43 is solved. I can't do it.

  The present invention has been made in view of the above-described problems, and its main object is to provide a liquid crystal panel and a liquid crystal display device with good in-screen transmittance uniformity both in full gradation display and halftone display. Is to provide.

In order to achieve the above object, according to the present invention, a liquid crystal is sandwiched between a pair of opposing substrates, and a plurality of scanning lines and signal lines that are substantially orthogonal to each other are formed on one substrate. A scanning line terminal area in which input terminals of the scanning lines are arranged is formed on at least one side outside the display area in which pixels surrounded by lines are arranged in a matrix, and on at least one other side outside the display area In the horizontal electric field type liquid crystal panel in which a signal line terminal region in which the input terminal of the signal line is arranged is formed and the liquid crystal is driven by an electric field substantially parallel to the substrate surface , a columnar spacer is formed on the other substrate, wherein by changing the height of the columnar spacer, than the first pixel relatively close from the scanning line terminal area found the following relatively far the second pixel from the scanning line terminal area, said pair of substrates Interval in which it is wide rather than set.

In the present invention, a liquid crystal is sandwiched between a pair of opposing substrates, and a plurality of scanning lines and signal lines that are substantially orthogonal to each other are formed on one substrate and surrounded by the scanning lines and the signal lines. A scanning line terminal area in which input terminals of the scanning lines are arranged is formed on at least one side outside the display area in which pixels are arranged in a matrix, and the signal line is formed on at least one other side outside the display area. In a horizontal electric field type liquid crystal panel in which a signal line terminal region in which input terminals are arranged is formed and the liquid crystal is driven by an electric field substantially parallel to the substrate surface , a columnar spacer is formed on the other substrate, and the height of the columnar spacer is increased. by varying the of the signal line than the first pixel relatively close from the terminal area, towards the relatively far the second pixel from the signal line terminal region, distance between the pair of substrates widely Set It is those that.

In the present invention, when the transmittance of the liquid crystal panel in the vicinity of the first pixel is T ₁ and the transmittance of the liquid crystal panel in the vicinity of the second pixel is T ₂ , the retardation in the first pixel is set. Δnd ₁ , retardation Δnd ₂ in the second pixel can be defined by T ₂ / T ₁ = sin ² (βΔnd ₂ ) / sin ² (βΔnd ₁ ), β = π / λ. .

  The liquid crystal display device of the present invention comprises at least one of the above liquid crystal panels and a backlight.

  As described above, in the present invention, by changing the interval between the TFT substrate and the counter substrate in the liquid crystal panel, the non-uniformity of the transmittance in the screen due to the delay of the signal waveform due to the wiring resistance of the gate wiring or drain wiring. Thus, it is possible to provide a liquid crystal panel and a liquid crystal display device with good in-screen transmittance uniformity in both full gradation display and halftone display.

  According to the present invention, it is possible to provide a liquid crystal panel and a liquid crystal display device having good in-screen transmittance uniformity in both full gradation display and halftone display.

  The reason is that the pixel is relatively close to the input terminal of the gate wiring or drain wiring, the distance between the TFT substrate and the counter substrate is relatively narrow, and the pixel is relatively far from the input terminal of the gate wiring or drain wiring. By forming columnar spacers so that the distance between the TFT substrate and the counter substrate is relatively wide, the alignment regulating force acting on the liquid crystal is changed, thereby delaying the signal waveform due to the wiring resistance of the gate wiring and drain wiring. This is because the in-plane non-uniformity of the transmittance due to the above can be compensated.

It is sectional drawing which shows the structure of the liquid crystal display device based on 1st Example of this invention. It is a top view which shows the structure of the TFT substrate based on 1st Example of this invention. It is a top view which shows the structure of one pixel of the TFT substrate which concerns on 1st Example of this invention. It is sectional drawing which shows the structure of one pixel of the TFT substrate which concerns on 1st Example of this invention. Sectional drawing which shows typically a part of pixel in the area | region (point A) relatively distant from the input terminal of the gate wiring or drain wiring which concerns on 1st Example of this invention (A point), and a relatively distant area | region (B point). FIG. It is process sectional drawing which shows a part of manufacturing method of the TFT substrate which concerns on 1st Example of this invention. It is process sectional drawing which shows a part of manufacturing method of the TFT substrate which concerns on 1st Example of this invention. It is a figure which shows the effect of the liquid crystal display device which concerns on the 1st Example of this invention, and is a figure which shows the correlation of electrode spacing ratio and transmittance | permeability ratio. It is process sectional drawing which shows a part of manufacturing method of the TFT substrate based on the 2nd Example of this invention. It is a figure which shows typically the etching process which concerns on the 2nd Example of this invention. It is a figure which shows the effect of the liquid crystal display device which concerns on the 2nd Example of this invention, and is a figure which shows the change of the transmittance | permeability distribution by the difference in an etching process. Sectional drawing which shows typically a part of pixel in the area | region (point B) relatively far from the area | region (point A) relatively far from the input terminal of the gate wiring or drain wiring which concerns on 3rd Example of this invention. FIG. It is process sectional drawing which shows a part of manufacturing method of the opposing substrate which concerns on the 3rd Example of this invention. It is a figure which shows the effect of the liquid crystal display device which concerns on the 3rd Example of this invention, and is a figure which shows the correlation of retardation ratio (substrate space | interval ratio) and transmittance | permeability ratio. It is sectional drawing which shows operation | movement of a liquid crystal display device. It is a figure which shows the structure and signal delay of a TFT substrate. It is a figure which shows the change of the waveform of a gate signal and a drain signal. It is a figure which shows the change of the amount of writing by the voltage drop of a gate signal. It is a figure which shows the voltage-transmittance characteristic of a liquid crystal. It is a figure which shows the transmittance | permeability distribution of the all-white display and halftone display in the conventional liquid crystal display device.

In a liquid crystal display device, an in-plane switching (IPS) method having a wide viewing angle by applying an electric field to liquid crystal in a direction parallel to the TFT substrate surface is well known. The optical threshold voltage V _C is expressed by the following equation.

V _c = (π · L / d) · (K ₂₂ / ε ₀ · Δε) ^1/2 (1)
L: electrode interval d: substrate interval K ₂₂ : twist elastic constant of liquid crystal ε ₀ : dielectric constant of vacuum Δε: dielectric anisotropy of liquid crystal

  According to this equation, the optical threshold voltage Vc of the liquid crystal is reduced by decreasing the distance L between the pixel electrode and the common electrode or increasing the distance d between the TFT substrate and the counter substrate. Considering the applied voltage-transmittance characteristics, if the optical threshold voltage Vc of the liquid crystal decreases, the transmittance increases relatively when the same voltage is applied.

  Therefore, in the present invention, the in-plane non-uniformity of the transmittance due to the delay of the signal waveform due to the wiring resistance of the gate wiring and drain wiring is not compensated by the luminance of the light source, the control circuit, and the arrangement of the terminal region Compensation is achieved by changing the structure of the liquid crystal panel. That is, the pixel is set so that the distance between the pixel electrode and the common electrode in the pixel in the region where the transmittance is reduced by the signal delay (that is, the region relatively distant from the input terminal of the gate wiring or the drain wiring) is relatively narrow. The transmittance is increased by changing the width of the electrode and / or the common electrode, or changing the height of the column spacer and the thickness of the insulating film so that the distance between the TFT substrate and the counter substrate is relatively wide. Thus, in-plane non-uniformity of the transmittance due to the delay of the signal waveform is compensated. Hereinafter, specific description will be given with reference to the drawings.

  First, a liquid crystal panel and a liquid crystal display device according to a first embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a cross-sectional view showing the configuration of the liquid crystal display device of this embodiment, and FIG. 2 is a top view showing the configuration of the TFT substrate. FIG. 3 is a top view showing a configuration of one pixel of the TFT substrate, and FIG. 4 is a cross-sectional view taken along lines A-A ′ and B-B ′. FIG. 5 is a cross-sectional view and a top view schematically showing a part of a pixel in a region (point A) relatively far from the input terminal of the gate wiring or drain wiring (point A) and a region relatively far (point B). FIG. 6 and FIG. 7 are process cross-sectional views showing a part of the manufacturing method of the TFT substrate at points A and B. FIG. 8 is a diagram showing the correlation between the electrode width ratio (electrode spacing ratio) and the transmittance ratio.

  As shown in FIG. 1, the liquid crystal display device 1 of this embodiment includes a TFT substrate 3 in which switching elements such as TFTs are formed in a matrix, a counter substrate 5 facing the TFT substrate 3, and a gap between the two substrates. It is composed of a liquid crystal panel 2 including a sandwiched liquid crystal 4 and a polarizing plate 6 disposed outside both substrates, a backlight unit 7 disposed on the back surface of the TFT substrate 3, and illuminating the liquid crystal panel 2. The

  As shown in FIG. 2, the TFT substrate 3 intersects a scanning line (hereinafter referred to as a gate wiring 11) and a common wiring 12 extending in a predetermined direction (here, horizontal direction) in a predetermined direction. The pixel formed in the region sandwiched between the gate wiring 11 and the drain wiring 17 is provided in a matrix shape with a signal line (hereinafter referred to as the drain wiring 17) extending in the direction (vertical direction here). The display area 8 is formed in an array, and a terminal area 9 a where the input terminal of the gate line 11 is arranged and a terminal area 9 b where the input terminal of the drain line 17 is arranged are formed outside the display area 8. .

  As shown in FIGS. 3 and 4, in each pixel of the display region 8, the TFT 16 is disposed in the vicinity of the intersection of the gate line 11 and the drain line 17. A comb-like pixel electrode 18 and a common electrode 13 facing the pixel electrode 18 are formed in the pixel. The pixel electrode 18 is connected to the source electrode of the TFT 16, and the common electrode 13 is connected to the common wiring 12. Has been.

  On the other hand, on the counter substrate 5 (not shown), RGB color layers for color display, a black matrix for shielding light incident between the color layers, and a protective film for protecting them are formed. Has been.

  In addition, an alignment film is applied on the surfaces of the TFT substrate 3 and the counter substrate 5 and rubbed in a predetermined direction, and columnar spacers for defining a gap between the substrates are disposed on at least one of the substrates. The liquid crystal 4 is held between the two. A constant common voltage is supplied to all the common electrodes 13 through the common wiring 12, a potential is written to the pixel electrode 18 through the TFT 16, and a lateral electric field is applied between the pixel electrode 18 and the common electrode 13, The display is controlled by twisting the liquid crystal 4 in a plane parallel to the substrate.

  Here, as is apparent from FIG. 2, there are pixels in the display area 8 that are close to the terminal areas 9 a and 9 b (for example, pixels at point A), but are far from the terminal areas 9 a and 9 b. Since there is a pixel (for example, a pixel at point B), the length of the gate wiring 11 or the drain wiring 17 from the terminal regions 9a and 9b to the respective pixels changes, and the signal waveform depends on the wiring resistance of the gate wiring 11 or the drain wiring 17. As a result, there is a problem that the transmittance changes. On the other hand, from the formula (1), when the distance L between the pixel electrode 18 and the common electrode 13 is reduced, the optical threshold voltage Vc of the liquid crystal is reduced, and when the same voltage is applied, the transmittance is relatively increased. can do.

  Therefore, in this embodiment, the interval L between the pixel electrode 18 and the common electrode 13 of the pixel is changed in association with the distance from the terminal regions 9a and 9b to each pixel. Specifically, as shown in FIG. 5 schematically showing the CC ′ cross-section of FIG. 3, for a pixel having a short distance from the terminal regions 9 a and 9 b (for example, a pixel at point A), the pixel For a pixel (for example, point B pixel) that is far from the terminal regions 9a and 9b by relatively increasing the distance L between the electrode 18 and the common electrode 13 to reduce the electric field between the electrodes. The gap L between the electrode 18 and the common electrode 13 is relatively reduced to increase the electric field between the electrodes, and the rotation angle of the liquid crystal 4 is changed to compensate for the decrease in transmittance. At that time, since the pixel pitch is determined, the interval L between the pixel electrode 18 and the common electrode 13 is changed by changing the electrode width of the pixel electrode 18 and / or the common electrode 13.

  In FIG. 2, the TFT substrate 3 is horizontally long, but the aspect ratio is arbitrary. In FIG. 2, a terminal region 9 b is provided on one long side of the TFT substrate 3 and a terminal region 9 a is provided on one short side of the TFT substrate 3. It is good also as a structure (what is called a both-sides extraction method) provided with terminal area | region 9a, 9b in a short side, In that case, the distance from terminal area | region 9a, 9b is good also as a distance from the nearer terminal area, The average distance from the terminal region may be used. Further, the points A and B in FIG. 2 are merely examples, and the point B only needs to have a greater distance from the terminal regions 9a and 9b than the point A.

  3 shows a configuration in which two common lines 12 are arranged in a pixel, the number and arrangement of the common lines 12 are not particularly limited. 3 and 4 show a structure in which two pixel electrodes 18 and three common electrodes 13 are arranged in a pixel, the numbers and shapes of the pixel electrodes 18 and the common electrodes 13 are not particularly limited. 3 and 4, the common wiring 12 and the common electrode 13 are formed in the same layer. However, the common electrode 13 is formed in the upper layer of the interlayer insulating film 19 and connected to the common wiring 12 through a contact. In this case, if the common electrode 13 is formed of ITO (Indium Tin Oxide) or the like, it is possible to suppress a reduction in the area of the light transmission region due to the wide width of the common electrode 13. In FIG. 4, the TFT 16 is an inverted stagger type (bottom gate type) in which the gate wiring 11 is formed on the lower side and the source / drain electrodes are formed on the upper side, but the gate wiring 11 is on the upper side and the source / drain electrodes are on the lower side. It may be a positive stagger type (top gate type) formed on the side, and the formation positions of the pixel electrode 18 and the common electrode 13 can be changed as appropriate in accordance with the structure of the TFT 16.

  In FIG. 5, the widths of both the pixel electrode 18 and the common electrode 13 are changed. However, the width between the pixel electrode 18 and the common electrode 13 is changed by changing one width of the pixel electrode 18 or the common electrode 13. L may be changed.

  Hereinafter, the manufacturing method of the TFT substrate of this embodiment will be described with reference to the process cross-sectional views of FIGS. The left side of the figure shows a part of the pixel at point A in FIG. 2, and the right side of the figure shows a part of the pixel at point B in FIG.

  First, a metal 13a such as Cr serving as a gate wiring 11, a common wiring 12, and a common electrode 13 is formed on an insulating substrate 10 such as glass or plastic by sputtering or the like, and a photosensitive film is formed thereon. The resist 21 is applied and dried to form a film (see FIG. 6A).

  Next, the metal 13a is patterned using a photomask. At this time, the width of the common electrode 13 is increased in the region with lower transmittance (that is, the pixel farther from the terminal regions 9a and 9b, for example, point B). Thus, exposure is performed using the photomask 22 having the openings 22a formed therein (see FIG. 6B), and the resist 21 not exposed to the developer is removed (see FIG. 6C).

  Next, after etching the metal 13a using the resist 21 as a mask (see FIG. 6D), the resist 21 is removed using ashing or an organic solvent (see FIG. 6E). As a result, the common electrode 13 having a wider width in the region with lower transmittance is formed.

  Next, a gate insulating film 14 made of a silicon oxide film or a silicon nitride film is formed by using a plasma CVD method or the like, and amorphous silicon or polysilicon is deposited thereon, and dry etching is performed using a resist as a mask. Then, the island-shaped semiconductor layer 15 is formed.

  Next, using a sputtering method or the like, the drain wiring 17, the pixel electrode 18, and a metal 18a such as Cr serving as the source / drain electrode are formed, and a photosensitive resist 23 is applied thereon and dried to form a film. (See FIG. 7A).

  Next, the metal 18a is patterned using a photomask. At this time, the width of the pixel electrode 18 becomes thicker in a region with low transmittance (that is, a pixel farther from the terminal regions 9a and 9b, for example, point B). Thus, exposure is performed using the photomask 24 having the openings 24a formed therein (see FIG. 7B), and the resist 23 not exposed to the developer is removed (see FIG. 7C).

  Next, after etching the metal 18a using the resist 23 as a mask (see FIG. 7D), the resist 23 is removed using ashing or an organic solvent (see FIG. 7E). Thereby, the pixel electrode 18 having a larger width is formed in the region with lower transmittance, and the distance (L2) between the common electrode 13 and the pixel electrode 18 in the region with lower transmittance is the same as that of the common electrode 13 in the region with higher transmittance. It becomes smaller than the distance (L1) from the pixel electrode 18.

  Next, after performing channel dry etching using the source / drain electrodes as a mask, an interlayer insulating film 19 made of a silicon oxide film, a silicon nitride film, or the like is formed using a plasma CVD method or the like.

  On the other hand, the counter substrate is formed by forming RGB color layers in each pixel region on the insulating substrate, forming a black matrix in the region between the color layers, forming a protective film thereon, and then providing columnar spacers. Form.

  Next, a polyimide solution, which is a material for the alignment film, is applied to the TFT substrate 3 and the counter substrate 5 using a printing device and baked. Then, the alignment film surface is fixed in a certain direction with a buff cloth wound around a rotating metal roller. Rubbing process is performed. Then, after forming a photo-curing or thermosetting sealing material on one substrate and dropping the liquid crystal, the two substrates are overlapped, and UV curing and thermosetting of the sealing material are performed, whereby the liquid crystal panel 2 is formed. Is done.

  When the backlight unit 7 is combined with the liquid crystal panel 2 formed by the above method, the transmittance of each region of the display region 8 is measured, and the electrode width and transmittance of the pixel at the approximate center of the display region 8 are used as a reference. The correlation between the electrode width ratio and the transmittance ratio was investigated. The result is shown in FIG.

  As shown in FIG. 8, the transmittance ratio increases as the electrode width ratio increases (that is, as the electrode interval decreases because the pitch is the same), and the transmission due to the wiring resistance of the gate wiring 11 or the drain wiring 17 increases. It can be seen that the reduction in rate can be compensated by the electrode spacing.

  The width of the common electrode 13 and the pixel electrode 18 (or the distance between the common electrode 13 and the pixel electrode 18) is determined by the size of the openings 22a and 24a of the photomasks 22 and 24, the application of the resists 21 and 23, exposure, and development conditions. The target electrode width ratio (or electrode spacing ratio) is set in consideration of the actual transmittance change of the liquid crystal panel 2, but can be calculated by the following equation.

For example, when the transmittance of pixels relatively close to the terminal regions 9a and 9b is T ₁ and the transmittance of pixels relatively far from the terminal regions 9a and 9b is T ₂ , T ₁ and T ₂ are as follows: It is expressed as follows.

T ₁ = αsin ² (2ψ ₁ )
T ₂ = αsin ² (2ψ ₂ )
α = 1/2 · sin ² (πΔn · d / λ)
ψ: Liquid crystal rotation angle

Therefore,
T ₂ / T ₁ = sin ² (2ψ ₂ ) / sin ² (2ψ ₁ ) (2)
It becomes.

On the other hand, the terminal region 9a, _{L 1} the electrode spacing relatively close pixels 9b, the terminal region 9a, the electrode spacing of the relatively far pixels from 9b when the _{L 2,} from the basic equation of the IPS, the following A relationship is established.

K ₂₂ d ² φ / dz ² = ε ₀ · Δε · (V / L ₁ ) ² · sinψ ₁ · cosψ ₁
K ₂₂ d ² φ / dz ² = ε ₀ · Δε · (V / L ₂ ) ² · sinψ ₂ · cosψ ₂

Therefore,
L ₂ / L ₁ = ((sin ψ ₂ · cos ψ ₂ ) / (sin ψ ₁ · cos ψ ₁ )) ^1/2 (3)
It becomes.

From the above, if ψ ₁ and ψ ₂ that match T ₂ / T ₁ are set from Equation (2), L ₂ / L ₁ at ψ ₁ and ψ ₂ can be calculated from Equation (3). it can.

  Specifically, in the case of the liquid crystal panel having the characteristics shown in FIG. 8, since the slope of the graph is approximately −7, the characteristics of the TFT 16 of each pixel are constant, and the low transmittance region and the high region region. If the transmittance ratio is approximately 15%, the electrode spacing in the low transmittance region is adjusted to be approximately 2.2% smaller than the electrode spacing in the high transmittance region.

  Next, a liquid crystal panel and a liquid crystal display device according to a second embodiment of the present invention will be described with reference to FIGS. FIG. 9 is a process cross-sectional view illustrating a part of a method of manufacturing a TFT substrate in a pixel (point A) that is relatively close to the input terminal of the gate wiring or drain wiring (point A) and a pixel that is relatively far (point B). 10 is a diagram schematically showing an etching process. FIG. 11 is a diagram showing a transmittance distribution of the liquid crystal panel.

  In the first embodiment, the distance between the pixel electrode 18 and the common electrode 13 is adjusted by changing the size of the opening of the photomask. However, in this embodiment, the size of the opening of the photomask is changed. And adjusting by etching.

  Hereinafter, the manufacturing method of the TFT substrate 3 of the present embodiment will be described with reference to the process cross-sectional view of FIG.

  As in the first embodiment, a metal 13a such as Cr serving as a gate wiring 11, a common wiring 12, and a common electrode 13 is formed on an insulating substrate 10 such as glass or plastic by using a sputtering method or the like. A photosensitive resist 21 is applied thereon and dried to form a film (see FIG. 9A).

  Next, in this embodiment, exposure is performed using a photomask 22 in which openings 22a of the same size are formed (see FIG. 9B), and the resist 21 not exposed to the developer is removed (FIG. 9). 9 (c)).

  Next, the metal 13a is etched using the resist 21 as a mask. At this time, a region with a high transmittance (for example, the terminal region 9a side where the input terminal of the gate wiring 11 is formed, the left side in FIG. 2) is etched first. The entire substrate is taken out at the same time (see FIG. 9 (d)). That is, a time difference is generated in the etching. Thereafter, the resist 21 is removed using ashing or an organic solvent (see FIG. 9E). As a result, etching proceeds toward the pixels closer to the terminal regions 9a and 9b, for example, point A, the metal 13a under the resist 21 is over-etched, and the width of the common electrode 13 is reduced.

  Next, a gate insulating film 14 made of a silicon oxide film or a silicon nitride film is formed by using a plasma CVD method or the like, and amorphous silicon or polysilicon is deposited thereon, and dry etching is performed using a resist as a mask. Then, the island-shaped semiconductor layer 15 is formed.

  Next, a metal such as Cr to be the drain wiring 17, the source / drain electrode and the pixel electrode 18 is formed by using a sputtering method or the like. The width of the pixel electrode 18 is made smaller as the pixel is closer to 9b, for example, the point A. Thereafter, the liquid crystal panel 2 is formed by the same method as in the first embodiment.

  As described above, the same effect as that of the first embodiment can also be obtained by providing a time difference in etching so that the width of the common electrode 13 and / or the pixel electrode 18 in the high transmittance region is reduced. Can do.

  In order to confirm the effect of the method of providing a time difference in the etching, as shown in FIG. 10A, the region with low transmittance (the side far from the terminal region 9a, the right side in FIG. 2) is first immersed in the etching solution. In the case of doing so, as shown in FIG. 10 (b), a TFT having a high transmittance region (side near the terminal region 9a, left side in FIG. 2) is first immersed in the etching solution. The substrate 3 was manufactured, and the transmittance distribution of the liquid crystal panel 2 was measured based on the transmittance of the pixel at the substantially center of the display area 8. The result is shown in FIG.

  As shown in FIG. 11, when a region with low transmittance is immersed in an etching solution first, in addition to a decrease in transmittance due to the wiring resistance of the gate wiring 11 or the drain wiring 17, a region with low transmittance is subjected to overetching. Since the interval between the common electrode 13 and the pixel electrode 18 is wide, the transmittance ratio is greatly changed. However, when a region having a high transmittance is immersed in an etchant first, the gate wiring 11 or the drain wiring 17 The decrease in transmittance due to the wiring resistance is compensated for by increasing the distance between the common electrode 13 and the pixel electrode 18 by over-etching in the region with higher transmittance, so that the transmittance of the entire screen becomes uniform. I understand that.

  Next, a liquid crystal panel and a liquid crystal display device according to a third embodiment of the present invention will be described with reference to FIGS. FIG. 12 is a cross-sectional view and a top view schematically showing a part of a pixel in a region (point A) relatively far from the input terminal of the gate wiring or drain wiring (point A) and a region relatively far (point B), FIG. 13 is a process sectional view showing a part of the manufacturing method. FIG. 14 is a diagram showing the correlation between the substrate spacing ratio (retardation ratio) and the transmittance ratio.

  In the first and second embodiments, the transmittance is changed by changing the distance between the pixel electrode 18 and the common electrode 13, but in this embodiment, the distance between the TFT substrate and the counter substrate is changed. It is characterized by changing the transmittance.

  The TFT substrate and the counter substrate are usually spaced from each other by columnar spacers, and a general columnar spacer is formed of a resist on a black matrix protective film on the counter substrate side. On the other hand, from equation (1), when the distance d between the TFT substrate 3 and the counter substrate 5 is increased, the optical threshold voltage Vc of the liquid crystal is decreased, and when the same voltage is applied, the transmittance is relatively increased. can do.

  Therefore, in this embodiment, the distance d between the TFT substrate 3 and the counter substrate 5 is changed in association with the distance from the terminal regions 9a and 9b. Specifically, as shown in FIG. 12, the distance d between the TFT substrate 3 and the counter substrate 5 is made smaller for pixels that are close to the terminal regions 9a and 9b (for example, the pixel at point A). The alignment regulating force is increased to increase the distance d between the TFT substrate 3 and the counter substrate 5 for pixels that are far from the terminal regions 9a and 9b (for example, pixels at point B). Is reduced and the rotation angle of the liquid crystal 4 is changed to compensate for a decrease in transmittance.

  In FIG. 12, the columnar spacers 29 are formed on the counter substrate 5 side. However, the columnar spacers 29 may be formed on the TFT substrate 3 side, or the columnar spacers 29 may be formed on both the counter substrate 5 and the TFT substrate 3. The spacer 29 may be formed. In the present embodiment, the interval d between the TFT substrate 3 and the counter substrate 5 is changed by the columnar spacer 29. The distance d between the TFT substrate 3 and the counter substrate 5 may be changed by changing the thickness of the black matrix, the protective film, the alignment film, or the like.

  Hereinafter, the manufacturing method of the counter substrate 5 of the present embodiment will be described with reference to the process cross-sectional view of FIG.

  First, after forming RGB color layers 26 in each pixel region on an insulating substrate 25 such as glass or plastic, a black matrix 27 is formed between the color layers 26, and a protective film 28 is formed thereon. Form. Next, a photosensitive resist 29a is applied on the protective film 28 and dried to form a film (see FIG. 13A).

  Next, the resist 29a is patterned by using a photomask. At that time, the opening area is increased so that the region with low transmittance (that is, a pixel far from the terminal regions 9a and 9b, for example, point B) has a larger opening area. Exposure is performed using the photomask 30 in which the portion 30a is formed (see FIG. 13B). As a result, exposure proceeds in regions with lower transmittance.

  Next, exposure is performed using a photomask 31 having the same size of the opening 31a in the entire liquid crystal panel (see FIG. 13C). Thereafter, the resist 29a not exposed to light with the developer is removed (see FIG. 13D). As a result, the columnar spacer 29 in the region where the photosensitivity has not progressed (that is, the small point A of the opening 30a of the photomask 30) is increased, so that the columnar spacer 29 is formed lower than the columnar spacer 29 in the region where the photosensitivity is advanced. The

  On the other hand, the TFT substrate 3 is manufactured by using a normal method or a method similar to the first and second embodiments. Thereafter, an alignment film is formed on the TFT substrate 3 and the counter substrate 5, and a rubbing process is performed. A photo-curing or thermosetting sealing material is formed on one substrate, a liquid crystal is dropped, and the two substrates are overlapped. The liquid crystal panel 2 is formed by performing UV curing and heat curing of the sealing material.

  The substrate when the backlight unit 7 is combined with the liquid crystal panel 2 formed by the above-described method, the transmittance of each part of the display region 8 is measured, and the substrate spacing and the transmittance of the pixel at the approximate center of the display region 8 are used as a reference. The correlation between spacing ratio and transmittance ratio was investigated. The result is shown in FIG.

  As shown in FIG. 14, the transmittance ratio increases as the substrate spacing ratio increases (that is, as the retardation obtained by multiplying the substrate spacing by the refractive index anisotropy) increases, and the wiring of the gate wiring 11 or the drain wiring 17 increases. It can be seen that the decrease in transmittance due to the resistance can be compensated by the substrate spacing.

  The height difference of the columnar spacers 29 can be adjusted by the size of the opening 30a of the photomask 30, the application of the resist 29, exposure, development conditions, and the like. Although it is set in consideration of the rate change, it can be calculated by the following equation.

For example, the transmittance of pixels relatively close to the terminal regions 9a and 9b is T ₁ , the substrate spacing is d ₁ , the transmittance of pixels relatively far from the terminal regions 9a and 9b is T ₂ , the substrate spacing is d ₂ , In this case, T ₁ and T ₂ are expressed as follows.

T ₁ = 1/2 · sin ² (βΔnd ₁ ) · sin ² (2ψ)
T ₂ = 1/2 · sin ² (βΔnd ₂ ) · sin ² (2ψ)
β = π / λ
ψ: liquid crystal rotation angle Δn: refractive index anisotropy

Therefore,
T ₂ / T ₁ = sin ² (βΔnd ₂ ) / sin ² (βΔnd ₁ ) (4)
It becomes.

From the above, Δnd ₁ and Δnd ₂ that match T ₂ / T ₁ can be calculated from Equation (4).

  Specifically, in the case of the liquid crystal panel having the characteristics shown in FIG. 14, since the slope of the graph is about 10, the characteristics of the TFT 16 of each pixel are constant, and the transmittance of the low transmittance area and the high transmittance area. If the rate ratio is about 15%, the retardation (substrate spacing) in the low transmittance region is adjusted to be about 1.5% larger than the retardation (substrate spacing) in the high transmittance region.

  In the first and second embodiments, the interval between the common electrode 13 and the pixel electrode 18 is changed. In the third embodiment, the interval between the TFT substrate 3 and the counter substrate 5 is changed. As a result, the transmittance can be further greatly changed.

  In the first to third embodiments, the case of a horizontal electric field type liquid crystal panel has been described. However, the present invention can be applied to other types of liquid crystal panels such as a VA (Vertical Alignment) type, and pixels of each type are used. By adjusting and arranging the size and shape of the elements that affect the transmittance so as to compensate for the non-uniformity of the in-screen transmittance due to the signal delay due to the wiring resistance, the horizontal electric field type liquid crystal panel The same effect can be obtained.

  The present invention is applicable to a liquid crystal panel and a liquid crystal display device, particularly a liquid crystal panel and a liquid crystal display device used for medical purposes.

DESCRIPTION OF SYMBOLS 1 Liquid crystal display device 2, 32 Liquid crystal panel 3, 34 TFT substrate 4, 35 Liquid crystal 5, 36 Opposite substrate 6, 37 Polarizing plate 7, 33 Backlight unit 8, 44 Display area 9a, 9b, 45a, 45b Terminal area 10 Substrate 11, 41 Gate wiring 12, 42 Common wiring 13, 40 Common electrode 14 Gate insulating film 15 Semiconductor layer 16 TFT
17, 43 Drain wiring 18, 39 Pixel electrode 19 Interlayer insulating film 21, 23 Resist 22, 24, 30, 31 Photomask 22a, 24a, 30a, 31a Opening 25 Substrate 26 Color layer 27 Black matrix 28 Protective film 29a Resist 29 Columnar spacer 38 Sealing material

Claims (4)

Liquid crystal is sandwiched between a pair of opposing substrates,
A plurality of scanning lines and signal lines substantially orthogonal to each other are formed on one substrate,
A scanning line terminal region in which input terminals of the scanning lines are arranged is formed on at least one side outside a display region in which pixels surrounded by the scanning lines and the signal lines are arranged in a matrix,
On at least one other side outside the display area, a signal line terminal area in which input terminals of the signal lines are arranged is formed ,
In a horizontal electric field type liquid crystal panel that drives the liquid crystal by an electric field substantially parallel to the substrate surface ,
Columnar spacers are formed on the other substrate,
By changing the height of the columnar spacers, the second pixel relatively far from the scanning line terminal region is more than the first pixel relatively near from the scanning line terminal region. a liquid crystal panel gap of wide rather is set, characterized in that. Liquid crystal is sandwiched between a pair of opposing substrates,
A plurality of scanning lines and signal lines substantially orthogonal to each other are formed on one substrate,
A scanning line terminal region in which input terminals of the scanning lines are arranged is formed on at least one side outside a display region in which pixels surrounded by the scanning lines and the signal lines are arranged in a matrix,
On at least one other side outside the display area, a signal line terminal area in which input terminals of the signal lines are arranged is formed ,
In a horizontal electric field type liquid crystal panel that drives the liquid crystal by an electric field substantially parallel to the substrate surface ,
Columnar spacers are formed on the other substrate,
By changing the height of the columnar spacers, the second pixel relatively far from the signal line terminal region is made to be closer to the pair of substrates than the first pixel relatively close to the signal line terminal region. a liquid crystal panel gap of wide rather is set, characterized in that. When the transmittance of the liquid crystal panel in the vicinity of the first pixel is T1, and the transmittance of the liquid crystal panel in the vicinity of the second pixel is T2,
The retardation Δnd1 in the first pixel and the retardation Δnd2 in the second pixel are
T2 / T1 = sin2 (βΔnd2) / sin2 (βΔnd1),
β = π / λ,
The liquid crystal panel according to claim 1, wherein the liquid crystal panel is defined by: A liquid crystal display device comprising at least the liquid crystal panel according to claim 1 and a backlight.

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