JP5332823B2 - Solid-state imaging device, imaging device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a solid-state imaging element capable of providing sufficient sensitivity and photoelectric conversion efficiency even if pixels are miniaturized. <P>SOLUTION: The solid-state image pickup element includes a basic cell comprising a plurality of pixels sharing a floating diffusion FD, transistors Tr1, Tr2, and Tr3 shared among the plurality of pixels constituting the basic cell and arranged outside the plurality of pixels, a light-receiving part 1 connected to the floating diffusion FD shared among the pixels of the basic cell through a transfer gate 2 on-chip lenses 4 arranged with almost constant intervals, and an optical waveguide 3 which is so formed so that its plane position is deviated from the center 1C of the light-receiving part 1 toward sides of the transistors Tr1, Tr2, and Tr3 and included in the light-receiving part 1 and the on-chip lens 4. <P>COPYRIGHT: (C)2011,JPO&amp;INPIT

Description

  The present invention relates to a solid-state image pickup device having a structure in which an optical waveguide is provided on a light-receiving portion, and an image pickup apparatus including the solid-state image pickup device.

  In a solid-state imaging device, the light incident on the pixel is inclined more as the distance from the center of the imaging device to the pixel is longer. Therefore, when the uppermost lens is directly above the photoelectric conversion unit (light receiving unit), the amount of light incident on the photoelectric conversion unit (light receiving unit) is reduced.

  Therefore, a configuration has been proposed in which the lens and the photoelectric conversion unit (light receiving unit) are shifted in the horizontal direction in accordance with the distance from the center of the image sensor to the pixel so that the lens is close to the center of the image sensor. (For example, refer to Patent Document 1 and Patent Document 2.) With this configuration, a large amount of oblique incident light that has passed through the lens enters the photoelectric conversion unit (light receiving unit), and sufficient sensitivity can be obtained. In this way, shifting the horizontal positions of the lens and other components and the light receiving unit is called pupil correction.

In Patent Document 2, an optical waveguide is further provided between the lens and the light receiving unit.
These horizontal positions are shifted so that the distance from the center of the image sensor increases in the order of lens, optical waveguide, and light receiving portion as the position from the center of the image sensor to the pixel increases.

By the way, in a CMOS type solid-state imaging device, conventionally, a transistor and a floating diffusion are provided for each pixel.
As described above, since a transistor and a floating diffusion are provided for each pixel, there is a limitation when miniaturizing the pixel. When the pixels are miniaturized, the area of the light receiving portion is reduced, and the amount of charge is reduced. Therefore, the pixels are likely to be very dark, and random noise is likely to be applied to the image signal.

  In view of this, it has been proposed to share a transistor or a floating diffusion among a plurality of pixels, thereby reducing the proportion of the area occupied by these pixels and increasing the proportion of the area of the light receiving unit (see, for example, Patent Document 3). ).

JP 2006-261249 A JP 2006-324439 A JP 2006-303468 A

The optical waveguide requires a process of embedding a material therein, but if the pixel is miniaturized, the aperture of the optical waveguide is reduced, and air bubbles are likely to be generated during manufacturing, so that the optical waveguide embeddability deteriorates. For this reason, there is a limit to miniaturization of a pixel having an optical waveguide.
Thus, since the embeddability of the optical waveguide is deteriorated, the embeddability varies greatly depending on the pixels, and the manufacturing yield is lowered.

  Therefore, it is conceivable that a plurality of pixels share a transistor or a floating diffusion as described in Patent Document 3 for a solid-state imaging device having an optical waveguide. By sharing the transistor and the floating diffusion among a plurality of pixels, it is possible to increase the area ratio of the light receiving portion and increase the area of the light receiving portion, compared to the case where the transistors and the floating diffusion are not shared. And the degree of reduction of the area of the light receiving portion when the pixels are miniaturized can be reduced.

  When the conventional transistor and floating diffusion are not shared, the interval between the light receiving parts is substantially constant regardless of whether the pupil correction is performed on the on-chip lens or not.

However, if a transistor or a floating diffusion is shared by a plurality of pixels, the interval between the light receiving portions is not constant. This is because the transistor is arranged on the side opposite to the floating diffusion (outside) while being arranged so as to be closer to the floating diffusion shared by the light receiving unit.
On the other hand, it is desirable to arrange the on-chip lenses at substantially equal intervals. If the on-chip lens of each pixel is formed with the same diameter and the same curvature, if the on-chip lens spacing is not equal, the region where the incident light does not converge between the on-chip lenses at a location where the on-chip lens spacing is wide In other words, the so-called invalid area becomes wide.
Therefore, the planar positions of the light receiving portions with non-constant intervals and the on-chip lenses arranged with substantially equal intervals are shifted to some extent. When pupil correction is performed on an on-chip lens, the plane position is shifted in a direction different from the direction of pupil correction.

As described above, when an optical waveguide is provided between the light receiving unit and the on-chip lens in a shifted state, if the optical waveguide is disposed under the center of the on-chip lens, a part of the optical waveguide is It may protrude from the light receiver. When a part of the optical waveguide protrudes from the light receiving part, the light passing through the protruding part is not photoelectrically converted and is lost. Therefore, the sensitivity is lowered and the efficiency of photoelectric conversion is also deteriorated.
In addition, a part of the optical waveguide may be applied to the light receiving portion of the adjacent pixel, and in this case, color mixing occurs.
On the other hand, when the optical waveguide is disposed on the center of the light receiving portion, the optical waveguide is displaced from the center of the on-chip lens, and thus it is difficult to guide the light collected by the on-chip lens to the optical waveguide. The light that has not been guided to the optical waveguide is lost, the sensitivity is lowered, and the efficiency of photoelectric conversion also deteriorates.

  In order to solve the above-described problems, the present invention provides a solid-state imaging device that can sufficiently obtain sensitivity and photoelectric conversion efficiency even when pixels are miniaturized. Moreover, the imaging device provided with this solid-state image sensor is provided.

  The solid-state imaging device according to the present invention includes a light receiving portion that is formed for each pixel and performs photoelectric conversion, and an optical waveguide that is embedded in an insulating layer above the light receiving portion and guides light to the light receiving portion. And a solid-state imaging device including an on-chip lens formed above the optical waveguide. Then, a basic cell constituted by a plurality of pixels sharing the floating diffusion and a transistor shared by the plurality of pixels constituting the basic cell and disposed outside the plurality of pixels are included. In addition, it includes a light receiving portion connected via a transfer gate to a floating diffusion shared by each pixel of the basic cell, and on-chip lenses arranged at substantially equal intervals. In addition, the optical waveguide includes an optical waveguide formed so that the planar position is shifted from the center of the light receiving portion toward the transistor and is included in the light receiving portion and the on-chip lens.

  An image pickup apparatus according to the present invention includes a condensing optical unit that condenses incident light, a solid-state image sensor that receives and photoelectrically converts incident light collected by the condensing optical unit, and a photoelectric converter that performs photoelectric conversion using the solid-state image sensor. And a signal processing unit for processing the signal obtained in this manner. In the imaging apparatus of the present invention, the solid-state imaging device has the configuration of the solid-state imaging device of the present invention.

According to the above-described configuration of the solid-state imaging device of the present invention, the floating diffusion and the transistor are shared by the plurality of pixels of the basic cell, and the light receiving unit is connected to the floating diffusion via the transfer gate. Thereby, compared with the case where it does not share, it becomes possible to increase the ratio of the area of a light-receiving part, and to expand the area of a light-receiving part. And the degree of reduction of the area of the light receiving portion when the pixels are miniaturized can be reduced. For this reason, it is possible to reduce the size of the optical waveguide so that the size of the optical waveguide does not become the limit of embeddability and to near the limit.
In addition, since the on-chip lenses are formed at equal intervals, so-called invalid areas can be reduced, and loss due to the invalid areas can be suppressed.
Further, the planar position of the optical waveguide is formed so as to be shifted from the center of the light receiving portion toward the transistor side, and is formed so as to be included in the inside of the light receiving portion and the inside of the on-chip lens. Thereby, the light collected by the on-chip lens can be sufficiently guided to the optical waveguide, and the light passing through the optical waveguide surely enters the light receiving unit. In addition, it is possible to prevent color mixing that occurs when light passing through the optical waveguide enters the light receiving portion of the adjacent pixel.

  According to the configuration of the imaging device of the present invention described above, since the solid-state imaging device is the configuration of the imaging device of the present invention, the pixels of the solid-state imaging device can be miniaturized and the occurrence of loss due to the invalid area is suppressed. can do. In addition, light that has passed through the on-chip lens and the optical waveguide can be reliably incident on the light receiving unit.

According to the above-described present invention, the degree of reduction in the area of the light receiving portion when the pixels are miniaturized can be alleviated, so that the pixels can be miniaturized to increase the integration degree of the solid-state imaging device, or the solid-state imaging The number of pixels and the size of the imaging device including the element can be reduced.
In addition, the loss caused by the ineffective region can be suppressed, the light collected by the on-chip lens can be sufficiently guided to the optical waveguide, and the light passing through the optical waveguide is surely incident on the light receiving portion. And the efficiency of photoelectric conversion can be improved.
Therefore, according to the present invention, it is possible to realize a solid-state imaging device that can sufficiently obtain sensitivity and photoelectric conversion efficiency even if the pixels are miniaturized, and an imaging device including the solid-state imaging device.

1 is a schematic configuration diagram (plan view) of a first embodiment of a solid-state imaging device of the present invention. It is a top view of four basic cells of the solid-state image sensor of FIG. It is a figure which shows an optical waveguide, a light-receiving part, a transistor, etc. among FIG. It is a figure which shows only an on-chip lens among FIG. It is a figure which shows an on-chip lens and an optical waveguide among FIG. It is sectional drawing of 1 pixel of the solid-state image sensor of FIG. It is a typical plane layout figure of a pixel. It is a figure which shows one form of the arrangement | positioning of the color of a color filter with respect to 36 pixels of FIG. It is a figure which shows the result of having measured the change of the output by the incident angle of light about the structure which shifted the space | interval of A, B optical waveguide, and the structure which fixed the space | interval of the optical waveguide. It is a figure which shows one form of the equivalent circuit schematic of four pixels of the basic cell of the solid-state image sensor of FIG. It is a figure which shows the positional relationship of the transistor which four pixels of a basic cell use. A is a diagram showing one form of wiring of a first example. FIG. B is a diagram showing one form of wiring of a second example. FIG. It is a schematic block diagram (plan view) of the second embodiment of the solid-state imaging device of the present invention. It is a top view of two basic cells of the solid-state image sensor of FIG. It is a figure which shows an on-chip lens and an optical waveguide among FIG. It is a figure which shows one form of the equivalent circuit schematic of two pixels of the basic cell of the solid-state image sensor of FIG. AD is a figure which shows each form of the cross-sectional shape of an optical waveguide. It is a figure which shows arrangement | positioning of the transistor of a 1st modification, a light-receiving part, and an optical waveguide. It is a figure which shows arrangement | positioning of the transistor of a 2nd modification, a light-receiving part, and an optical waveguide. It is a figure which shows arrangement | positioning of the transistor of a 3rd modification, a light-receiving part, and an optical waveguide. It is a figure corresponding to FIG. 1 of the modification from which the position of the center of an image pick-up element differs. It is a figure corresponding to FIG. 4 of the modification from which the position of the center of an image pick-up element differs. 1 is a schematic configuration diagram (block diagram) of an embodiment of an imaging apparatus of the present invention.

Hereinafter, the best mode for carrying out the invention (hereinafter referred to as an embodiment) will be described.
The description will be given in the following order.
1. 1. First embodiment of solid-state imaging device 2. Second embodiment of solid-state imaging device Modification 4 Embodiment of imaging apparatus

<1. First Embodiment of Solid-State Image Sensor>
FIG. 1 shows a schematic configuration diagram (plan view) of the first embodiment of the solid-state imaging device of the present invention.
As shown in FIG. 1, the solid-state imaging device has a large number of pixels arranged vertically and horizontally in a matrix. FIG. 1 shows 6 vertical pixels × 6 horizontal pixels = 36 pixels around the center C of the image sensor.
Each pixel includes a photodiode, and includes a light receiving unit 1 that performs photoelectric conversion of received light, an optical waveguide 3 that guides incident light to the light receiving unit, and an on-chip lens 4 that focuses the incident light.
In addition, the floating diffusion FD capable of accumulating charges obtained by conversion with light is shared by a total of four pixels of 2 vertical pixels × 2 horizontal pixels. In each of the four pixels, a transfer gate 2 is provided between the light receiving portion 1 and the floating diffusion FD shared by the four pixels.
Furthermore, transistors Tr1, Tr2, and Tr3 are arranged above and below the four pixels that share the floating diffusion FD. The configuration of each of the transistors Tr1, Tr2, and Tr3 is not particularly limited, and includes, for example, an amplification transistor, a reset transistor, a selection transistor, and the like.

Here, the four pixels at the lower right of FIG. 1 are extracted and shown in FIG.
In the solid-state imaging device of the present embodiment, four pixels sharing the floating diffusion FD are used as basic cells, and FIG. 2 shows the basic cell at the lower right of FIG. 1 and the center C of the imaging device. .

As shown in FIG. 2, the center 3C of the optical waveguide 3 is shifted from the center 1C of the light receiving unit 1 in each of the four pixels.
Specifically, in the upper two pixels in the figure, the center 3C of the optical waveguide 3 is shifted to the upper side from the center 1C of the light receiving unit 1. In the two lower pixels in the figure, the center 3C of the optical waveguide 3 is shifted downward from the center 1C of the light receiving unit 1.
Further, when a line is connected from the center C of the image sensor to the center 1C of the light receiving unit 1 of each pixel, the center 3C of the optical waveguide 3 is imaged more than the center 1C of the light receiving unit 1 in the upper two pixels. The distance from the center C of the element is close. In the two lower pixels, the center 3C of the optical waveguide 3 is farther from the center C of the image sensor than the center 1C of the light receiving unit 1. That is, the center 3C of the optical waveguide 3 is a mixture of pixels that are closer to the center C of the image sensor than the center 1C of the light receiving unit 1 and pixels that are farther away.
Returning to the overall plan view of FIG. 1 as a whole, the distance between the center 3C of the optical waveguide 3 and the pixel closer to the center C of the image sensor than the center 1C of the light receiving unit 1 is as a whole. It can be seen that distant pixels are mixed. Pixels in which the center 3C of the optical waveguide 3 is closer to the center C of the image sensor than the center 1C of the light receiving unit 1 are the pixels in the second row from the top and the pixels in the second row from the bottom. In the other four rows of pixels, the center 3C of the optical waveguide 3 is farther from the center C of the image sensor than the center 1C of the light receiving unit 1.
In the conventional example described in Patent Document 1 or the like, the center 3C of the optical waveguide 3 is only a pixel whose distance from the center C of the image sensor is the same as or shorter than that of the center 1C of the light receiving unit 1. There is no pixel farther from the center of. In this respect, the configuration of the present embodiment is completely different from the conventional example.

  FIGS. 3 to 5 are plan views obtained by extracting some components of the solid-state imaging device in FIG. FIG. 3 shows the optical waveguide 3, the light receiving unit 1, transistors Tr1, Tr2, Tr3, and the like. FIG. 4 shows only the on-chip lens 4. FIG. 5 shows the on-chip lens 4 and the optical waveguide 3. 3 to 5 show the center C of the image sensor together with the components.

As shown in FIG. 3, the light receiving portions 1 of the respective pixels are regularly arranged with four pixels as basic cells.
The four pixels of the basic cell are gathered around the shared floating diffusion FD.
On the other hand, the two upper and lower pixels sandwiching the transistors Tr1, Tr2, and Tr3 are spaced apart. The pixel interval changes every other line. That is, the pixel interval 1c between the pixels in the basic cell with the transistor interposed therebetween is larger than the pixel interval 1a between the pixels in the same basic cell.
Further, the pixels of the adjacent basic cell are spaced apart from the pixels of the same basic cell. The pixel spacing changes every other column. That is, the pixel interval 1d between the pixels in the adjacent basic cell is larger than the pixel interval 1b between the pixels in the same basic cell.
On the other hand, the optical waveguides 3 are arranged at substantially equal intervals in the vertical direction and the horizontal direction. That is, the waveguide interval 3a between the pixels in the same basic cell and the waveguide interval 3c between the pixels in the basic cell with the transistor interposed therebetween are substantially equal. Further, the waveguide interval 3b between the pixels in the same basic cell and the waveguide interval 3d between the pixels in the adjacent basic cell are substantially equal.
Furthermore, in any pixel, the planar arrangement of the optical waveguide 3 is included in the light receiving unit 1.

As shown in FIG. 4, the on-chip lenses 4 are arranged at substantially equal intervals in both the vertical direction and the horizontal direction. That is, the lens interval between the pixels in the same basic cell and the lens interval between the pixels in the basic cell with the transistor interposed therebetween are approximately equal intervals 4a. In addition, the lens interval between the pixels in the same basic cell and the lens interval between the pixels in the adjacent basic cell are substantially equal to each other.
If the distance between the on-chip lenses is not equal, when the on-chip lens of each pixel is formed with the same diameter and the same curvature, the incident light is focused between the on-chip lenses at a location where the distance between the on-chip lenses is wide. The area that is not, that is, the so-called invalid area becomes wide.

As shown in FIG. 5, the relative positions of the optical waveguide 3 and the on-chip lens 4 vary depending on the position of the pixel.
When viewed from the center C of the image sensor, the upper two rows of pixels have the optical waveguide 3 in the upper half of the on-chip lens 4. In two rows of pixels on both sides of the center C of the image sensor, the optical waveguide 3 is located near the center of the on-chip lens 4 in the vertical direction. When viewed from the center C of the image sensor, the optical waveguide 3 is located in the lower half of the on-chip lens 4 in the lower two rows of pixels.
As seen from the center C of the image sensor, the optical waveguide 3 is located in the right half of the on-chip lens 4 in the two columns of pixels on the right side. In two columns of pixels on both sides of the center C of the image sensor, the optical waveguide 3 is located near the center of the on-chip lens 4 in the left-right direction. When viewed from the center C of the imaging device, the left two columns of pixels have the optical waveguide 3 on the left half of the on-chip lens 4.
Furthermore, in any pixel, the planar arrangement of the optical waveguide 3 is included in the on-chip lens 4.

In the first embodiment, the relative position between the on-chip lens 4 and the light receiving unit 1 varies depending on the pixel position viewed from the center C of the image sensor. The on-chip lens 4 is shifted from the center 1C of the light receiving unit 1 toward the center C of the image sensor corresponding to the distance from the center C of the image sensor to the pixel.
That is, the on-chip lens 4 is subjected to pupil correction. In contrast, the optical waveguide 3 is not pupil-corrected.

Also, the intervals between the parts are as follows.
For the upper and lower two pixels in the same basic cell, the waveguide interval 3a is wider than the pixel interval 1a. For the two left and right pixels in the same basic cell, the waveguide interval 3b is slightly wider than the pixel interval 1b.
A pixel interval 1a between two upper and lower pixels in the same basic cell is different from a pixel interval 1c between two basic cell pixels sandwiching the transistor.
In this way, when the pixel interval 1a and the pixel interval 1c are different, if the optical waveguide 3 is arranged in the vicinity of the center 1C of the light receiving unit 1 in each pixel, the incident angle dependency is deviated, so that horizontal stripes, shading, etc. The optical properties are affected.
On the other hand, if the position of the optical waveguide 3 is shifted from the vicinity of the center of the light receiving unit 1 and the optical waveguides 3 are arranged at almost equal intervals, the incident angle dependency is uniformed, so that these characteristics can be improved.
The waveguide interval 3a and the waveguide interval 3c are substantially the same. The waveguide interval 3a and the waveguide interval 3c are preferably the same, but they need not be the same.
When the waveguide intervals in the vertical direction are made equal, the incident angle dependency in the horizontal direction is improved, and optical characteristics such as horizontal stripes and shading can be improved.
The waveguide interval 3b and the waveguide interval 3d are substantially the same. The waveguide interval 3b and the waveguide interval 3d are preferably the same, but they need not be the same.
Compared to the pixel interval 1b between the two left and right pixels in the same basic cell, the pixel interval 1d between the pixels in the two adjacent left and right basic cells is slightly wider. Note that the pixel interval 1b and the pixel interval 1d are preferably the same, but need not be the same.
Since the waveguide interval 3b and the waveguide interval 3d are substantially the same, and the pixel interval 1b and the pixel interval 1d are different, the center 3C of the optical waveguide 3 is slightly shifted from the center 1C of the light receiving unit 1 to the left and right. ing. The direction of deviation is the direction of the basic cell adjacent to the left or right, and is the direction away from the floating diffusion FD at the center of the basic cell.
The sum of the pixel interval 1a and the pixel interval 1c is the same as the sum of the waveguide interval 3a and the waveguide interval 3c. These sums correspond to the vertical pitches of the basic cells.
The sum of the pixel interval 1b and the pixel interval 1d is the same as the sum of the waveguide interval 3b and the waveguide interval 3d. These sums correspond to the pitches of the basic cells in the left-right direction.

  The cross-sectional structure of each pixel is not particularly limited as long as the light receiving unit 1, the optical waveguide 3, and the on-chip lens 4 are provided.

FIG. 6 shows a cross-sectional view of one embodiment of the cross-sectional structure of the pixel of the solid-state imaging device in FIG.
As shown in FIG. 6, an n-type charge accumulation layer 11 and a p ⁺ positive charge accumulation region 12 on the surface layer thereof are formed in, for example, a p-well region of a semiconductor substrate 10 to constitute a light receiving unit 1. . Further, a gate insulating film 13 and a gate electrode 14 are formed on the semiconductor substrate 10 adjacent to the right of the light receiving unit 1. The gate electrode 14 is the transfer gate 2 of FIG. A floating diffusion FD is formed in the semiconductor substrate 10 adjacent to the right of the gate electrode 14. In the semiconductor substrate 10, source / drain regions of the transistors Tr1, Tr2, Tr3 are formed in a cross section (not shown). By applying a voltage to the gate electrode 14, the signal charge is transferred from the light receiving unit 1 to the floating diffusion FD.

  A first insulating film 15, a second insulating film 16, a third insulating film 17, a fourth insulating film 21, and a fifth insulating film 22 are formed on the semiconductor substrate 10 so as to cover the light receiving unit 1 and are made of, for example, silicon oxide. The sixth insulating film 26, the seventh insulating film 27, and the eighth insulating film 31 are stacked. In addition, a first diffusion prevention film 20 and a second diffusion prevention film 25 made of, for example, silicon carbide, and a third diffusion prevention film 30 made of, for example, silicon nitride, are stacked between these insulating films. These insulating films and diffusion preventing films are laminated to form an insulating layer as a whole.

A wiring groove is formed in the third insulating film 17, and a first wiring layer including a barrier metal layer 18 and a conductive layer 19 is embedded in the wiring groove. Similarly, in the fifth insulating film 22, the second wiring layer composed of the barrier metal layer 23 and the conductive layer 24 is embedded in the wiring groove. Similarly, in the seventh insulating film 27, the second wiring layer composed of the barrier metal layer 28 and the conductive layer 29 is embedded in the wiring groove. For the barrier metal layers 18, 23, 28, for example, a tantalum / tantalum nitride laminated film can be used. For the conductive layers 19, 24, and 29, various wiring metal materials such as copper can be used. The first to third diffusion preventing films described above are films for preventing diffusion of a metal such as copper constituting the conductive layers 19, 24, and 29.
A ninth insulating film 33 made of silicon oxide is formed on the eighth insulating film 31.

Then, above the light receiving portion 1, these films are formed on the fourth insulating film 21 to the ninth insulating film 33, the second diffusion prevention film 25, and the third diffusion prevention film 30, which are stacked as described above. And a first diffusion preventing film 20 forms the bottom surface of the recess.
The inner wall surface of the concave portion is a surface perpendicular to the main surface of the substrate, and further has a forward tapered opening shape portion that spreads upward in the portion of the ninth insulating film 33 as the edge portion of the concave portion.
A passivation film 36 is formed so as to cover the inner wall of the recess. Further, for example, a buried layer 37 is formed which is buried in the recess in the upper layer of the passivation film 36 and has a refractive index higher than that of silicon oxide (refractive index 1.45) of the insulating film. The buried layer 37 completely fills the inside of the recess.

For the buried layer 37, a siloxane resin (refractive index 1.7), a high refractive index resin such as polyimide, or the like can be used. It is also possible to increase the refractive index by incorporating fine metal oxide particles such as titanium oxide, tantalum oxide, niobium oxide, tungsten oxide, zirconium oxide, zinc oxide, indium oxide and hafnium oxide in these resins. is there. In addition, an inorganic material having a high refractive index can be used as long as the inside of the recess can be embedded.
For the passivation film 36, a material having the same or similar refractive index as that of the silicon oxide of the insulating film or a material having a higher refractive index than that of the silicon oxide can be used. Examples of the latter include silicon nitride and silicon oxynitride (SiON).
When the passivation film 36 is formed of a material having a refractive index that is the same as or close to that of the silicon oxide of the insulating film, the buried layer 37 inside the recess becomes the optical waveguide 3.
When the passivation film 36 is formed of a material having a refractive index higher than that of silicon oxide as an insulating film, the optical waveguide 3 is configured by the passivation film 36 and the buried layer 37 inside the recess.

A planarizing resin layer 38 that also functions as an adhesive layer, for example, is formed on the embedded layer 37, and color filters 39 of, for example, blue B, green G, and red R are formed for each pixel on the upper layer. Yes. On-chip lens 4 is formed on the upper layer of color filter 39.
As can be seen from FIG. 6, the optical waveguide 3 is formed with a narrower width than the light receiving unit 1 and the on-chip lens 4, and the planar position is within the planar position of the light receiving unit 1 and the on-chip lens 4. It is formed to be included.
Based on the pixel structure shown in FIG. 6, pixels are formed by shifting the planar positions of the light receiving unit 1, the optical waveguide 3, and the on-chip lens 4 depending on the position of the pixel from the center C of the imaging device.

The solid-state imaging device having the cross-sectional structure of the pixel shown in FIG. 6 can be manufactured, for example, as follows.
For example, in the p-well region of the semiconductor substrate 10, an n-type charge storage layer 11 and a p ⁺ positive charge storage region 12 on the surface thereof are sequentially formed to form the light-receiving unit 1 and adjacent to the light-receiving unit 1. A gate insulating film 13 and a gate electrode 14 are formed. In addition, the floating diffusion FD and the source / drain regions of the transistors Tr1, Tr2, Tr3 are formed in the semiconductor substrate 10.

Next, the first insulating film 15 is formed by covering the light receiving portion 1 and depositing silicon oxide on the entire surface by, for example, a CVD (chemical vapor deposition) method.
Next, for example, silicon oxide is deposited on the first insulating film 15 to form the second insulating film 16, and silicon oxide is further deposited to form the third insulating film 17.
Next, for example, a trench for wiring is formed in the third insulating film 17 by etching, for example, and the inner wall of the trench for wiring is coated by sputtering, for example, a tantalum / tantalum oxide film is formed, and the barrier metal layer 18 is formed. Form.
Subsequently, a copper seed layer is formed, copper is formed on the entire surface by electrolytic plating, and the copper formed outside the wiring trench is removed by CMP (Chemical Mechanical Polishing) method or the like. Layer 19 is formed.
Further, a barrier metal layer 18 is formed on the surface of the conductive layer 19, and the barrier metal layer 18 formed outside the wiring trench is removed. In FIG. 6, the barrier metal layer 18 is also formed on the surface of the conductive layer 19, but this step is omitted when the barrier metal layer 18 is not formed on the surface of the conductive layer 19.
In this way, the first wiring layer composed of the barrier metal layer 18 and the conductive layer 19 embedded in the wiring groove is formed.

Next, silicon carbide is deposited on the first wiring layer by, for example, a CVD method to form the first diffusion preventing film 20.
Subsequently, a process similar to the process of forming the second insulating film 16, the third insulating film 17 and the wiring trench, the first wiring layer composed of the barrier metal layer 18 and the conductive layer 19, and the first diffusion prevention film 20 is performed. repeat. As a result, the fourth insulating film 21, the fifth insulating film 22 and their wiring trenches, the second wiring layer comprising the barrier metal layer 23 and the conductive layer 24, the second diffusion preventing film 25, the sixth insulating film 26, the seventh A third wiring layer composed of the insulating film 27 and its wiring groove, the barrier metal layer 28 and the conductive layer 29 is formed. Further, the third diffusion preventing film 30 is formed by depositing silicon nitride by, for example, the CVD method. Next, an eighth insulating film 31 is formed on the third diffusion barrier film 30.
Subsequently, for example, silicon oxide is deposited on the entire surface to form a ninth insulating film 33.

Next, for example, a resist film having a pattern for opening a recess is formed by a photolithography process, and etching such as isotropic etching or anisotropic etching is performed. An opening shape portion is formed.
Next, the resist film is removed and, for example, a second resist film having the same pattern as the resist film is formed. Then, anisotropic etching such as reactive ion etching is performed to form recesses in the fourth insulating film 21 to the ninth insulating film 33, the second diffusion prevention film 25, and the third diffusion prevention film 30. At this time, for example, the etching is advanced while changing the conditions according to the materials such as silicon oxide, silicon nitride, silicon carbide, etc., and the etching is stopped immediately when the bottom of the opening reaches the first diffusion prevention film 20. To. Thereby, since the first diffusion preventing film 20 becomes the bottom surface of the recess, the distance between the light receiving unit 1 and the optical waveguide 3 is constant with the depth of the recess being constant.
In this way, a concave portion having a forward tapered opening shape portion can be opened at the portion of the ninth insulating film 33 as an edge portion of the concave portion.

Next, a passivation film is formed by depositing silicon nitride or silicon oxynitride (SiON) having a refractive index higher than that of silicon oxide by covering the inner wall of the recess by, for example, a plasma CVD method with a film forming temperature of about 380 ° C. 36 is formed. Although the edge of the opening has a forward tapered shape, the profile is such that it is deposited thick at the edge of the opening due to anisotropy during deposition and thins near the bottom of the recess.
Next, for example, a siloxane-based resin containing metal oxide fine particles such as titanium oxide is formed by a spin coating method at a film formation temperature of about 400 ° C., embedded in the recesses in the upper layer of the passivation film 36, and then made of silicon oxide. The buried layer 37 having a high refractive index is formed. After the application, a post-bake treatment at about 300 ° C. is performed as necessary. In the case of polyimide resin, the film can be formed at a temperature of about 350 ° C., for example.

Next, a planarizing resin layer 38 that also functions as, for example, an adhesive layer is formed on the buried layer 37. On the upper layer, for example, a color filter 39 of each color of blue B, green G, and red R is formed for each pixel. Further, the on-chip lens 4 is formed on the upper layer.
In the manufacturing method described above, hydrogen treatment (sintering) for terminating dangling bonds in the semiconductor can be performed after the third wiring layer forming step and before the buried layer forming step.
In this way, a solid-state imaging device having the cross-sectional structure shown in FIG. 6 can be manufactured.

Subsequently, a schematic plan layout diagram of the pixel is shown in FIG.
The optical waveguide 3 is configured by the buried layer 37 (and the passivation film 36) having a circular cross section.
In addition, wiring layers such as the first to third wiring layers in FIG. 6 are formed in a mesh shape so as to surround the periphery of the optical waveguide 3 in the insulating film. The mesh shape indicates a state in which, for example, wiring layers and insulating films are alternately stacked one above the other. For example, the optical waveguide 3 is provided in a region surrounded by wiring layers W1 and W2 extending in the vertical direction and wiring layers W3 and W4 extending in the horizontal direction in the drawing. Each of the wiring layers W1, W2, W3, W4 has, for example, a mesh structure.
Although the light receiving portion 1 is not shown in FIG. 7, the light receiving portion 1 is formed outside the optical waveguide 3. For example, in the case of the cross-sectional structure of FIG. 6, the wiring layers W1, W2, W3, W4 There is an outer edge of the light receiving unit 1 near the position.

Next, FIG. 8 shows one form of color filter color arrangement for the 36 pixels shown in FIG.
In the arrangement shown in FIG. 8, one red R and one blue B and two green G (Gb, Gr) are assigned to four pixels of each basic cell. And green G, red R, and blue B are each allocated to the pixel which opposes on both sides of the floating diffusion FD.

Here, a solid-state imaging device having the planar layout shown in FIG. 1 and the arrangement of the color filters shown in FIG. 8 was actually manufactured.
For comparison, the solid-state imaging has a configuration in which the interval between the optical waveguides 3 is not constant but the interval between the optical waveguides 3 is shifted (a configuration in which the waveguide interval 3a and the waveguide interval 3c are different from those in FIG. 3). An element was produced.
For both solid-state imaging devices, the change in output due to the incident angle of light was examined for the Gb filter pixel and the Gr filter pixel, which are the same green color filters. The results are shown in FIGS. 9A and 9B. FIG. 9A shows the result of the configuration in which the intervals of the optical waveguides 3 are shifted, and FIG. 9B shows the result of the configuration in which the intervals of the optical waveguides 3 are made constant.

From FIG. 9A, in the configuration in which the interval between the optical waveguides 3 is shifted, an output difference is generated despite the same green pixel.
From FIG. 9B, the output is the same in the configuration in which the interval between the optical waveguides 3 is constant. Furthermore, when pixel characteristics were evaluated, characteristics such as horizontal stripes, uneven color, and shading were improved.
Therefore, it is desirable that the distance between the optical waveguides 3 be constant. However, even if the interval is not constant, a value close to a certain value causes no particular problem in use as an image sensor.

Furthermore, FIG. 10 shows one form of an equivalent circuit diagram of four pixels of the basic cell of the solid-state imaging device of the first embodiment.
As shown in FIG. 10, a light receiving unit 1 composed of photodiodes of four pixels is connected to a common floating diffusion FD via a transfer gate 2. The floating diffusion FD is connected to one source / drain region of the reset transistor RST and the gate of the amplification transistor Amp. One source / drain region of the selection transistor SEL is connected to one source / drain region of the amplification transistor Amp. A power supply potential Vdd is connected to the other source / drain region of the reset transistor RST and the other source / drain region of the amplification transistor Amp. A signal line 100 is connected to the other source / drain region of the selection transistor SEL. That is, the three transistors RST, Amp, and SEL from the floating diffusion FD have the same configuration as a pixel having four normal transistors (including a transfer transistor of a transfer gate).

Next, a case where the circuit configuration shown in FIG. 10 is actually formed will be described.
FIG. 11 is a diagram illustrating the positional relationship of the transistors used by the four pixels of the basic cell in two examples to be described. Band-shaped transistors Tr are arranged above and below the four pixels of the basic cell, respectively.
In the first example, as shown by a chain line in FIG. 11, the right half of the upper transistor and the right half of the lower transistor are used. The left half of each transistor is used by the four pixels of the upper and lower basic cells.
In the second example, the entire lower transistor is used as shown by the broken line in FIG. The upper transistor is used in the four pixels of the upper basic cell.

  One form of the wiring of the first example is shown in FIG. 12A. A reset transistor RST is formed in the right half of the upper transistor, and an amplification transistor Amp and a selection transistor SEL are formed in the right half of the lower transistor. A wiring 110 is formed above and below connecting the floating diffusion FD, one source / drain region of the reset transistor RST, and the gate of the amplification transistor Amp.

  One mode of the wiring of the second example is shown in FIG. 12B. A reset transistor RST is formed in the right half of the lower transistor, an amplification transistor Amp is formed in the center, and a selection transistor SEL is formed in the left half. A wiring 110 is formed on the upper and lower sides connecting the floating diffusion FD and the gate of the amplification transistor Amp, and the wiring 110 branches rightward from the middle and is connected to one source / drain region of the reset transistor RST. Has been.

According to the present embodiment described above, the floating diffusion FD and the transistors Tr1, Tr2, Tr3 are shared by the four pixels of the basic cell. Thereby, compared with the case where floating diffusion FD and transistor Tr1, Tr2, Tr3 are not shared, the ratio of the area of the light-receiving part 1 can be increased, and the area of the light-receiving part 1 can be expanded. Then, the degree of reduction in the area of the light receiving unit 1 when the pixels are miniaturized can be reduced. For this reason, it becomes possible to reduce the size of the optical waveguide 3 so as not to reach the limit of embeddability and to near the limit.
Therefore, the pixels can be miniaturized to increase the integration degree of the solid-state image sensor, and the number of pixels and the size of the image pickup apparatus including the solid-state image sensor can be increased.

In addition, according to the present embodiment, since the on-chip lenses 4 are formed at equal intervals, so-called invalid areas can be reduced, and occurrence of loss due to invalid areas can be suppressed.
Furthermore, according to the present embodiment, the optical waveguide 3 is formed so that its planar position is shifted from the center 1C of the light receiving unit 1 toward the transistors Tr1, Tr2, Tr3, and the light receiving unit 1 It is formed so as to be included inside and inside the on-chip lens 4. Thereby, the light collected by the on-chip lens 4 can be sufficiently guided to the optical waveguide 3, and the light passing through the optical waveguide 3 can be reliably incident on the light receiving unit 1. In addition, it is possible to prevent color mixing that occurs when light passing through the optical waveguide 3 enters the light receiving unit 1 of the adjacent pixel.
Therefore, since sensitivity and photoelectric conversion efficiency can be improved, a solid-state image sensor that can sufficiently obtain sensitivity and photoelectric conversion efficiency even when pixels are miniaturized, and an image pickup apparatus including the solid-state image sensor are realized. be able to.

  Further, according to the present embodiment, since the optical waveguides 3 are arranged at substantially equal intervals, as shown in FIG. 9B, the change in output due to the incident angle of light is made the same, and horizontal stripes, color unevenness, shading are performed. Etc. can be improved.

  In the first embodiment, the center of the optical waveguide 3 is separated from the center of the on-chip lens 4 as it goes outward from the center C of the image sensor. The configuration having such an arrangement is desirably used for a camera (for example, a camera for a mobile phone) whose optical lens has a short focal point.

In the description of the first embodiment, the case of having the 36 pixels shown in FIG. 1 has been described as an example. However, in reality, the same rule is applied, and a large number of pixels of tens of thousands or more are applied. To form a solid-state image sensor.
For example, by integrating 750,000 basic cells of 4 pixels, 3 million pixels can be integrated.

In the first embodiment described above, as shown in FIGS. 6 and 8, the present invention is applied to a color solid-state imaging device using a color filter.
The present invention is not only a color solid-state image sensor, but also a black-and-white solid-state image sensor that does not use a color filter, a solid-state image sensor for detecting infrared light, and an infrared light receiving device without providing a color filter in some pixels The present invention can also be applied to a solid-state imaging element that is a pixel.

<2. Second Embodiment of Solid-State Image Sensor>
FIG. 13 shows a schematic configuration diagram (plan view) of the second embodiment of the solid-state imaging device of the present invention.
As shown in FIG. 13, this solid-state imaging device has a large number of pixels arranged vertically and horizontally in a matrix. FIG. 13 shows 6 vertical pixels × 6 horizontal pixels = 36 pixels around the center C of the image sensor.
Each pixel includes a photodiode, and includes a light receiving unit 1 that performs photoelectric conversion of received light, an optical waveguide 3 that guides incident light to the light receiving unit, and an on-chip lens 4 that focuses the incident light.
In addition, the floating diffusion FD is shared by two pixels arranged diagonally, the upper left pixel and the lower right pixel. In each of the two pixels, a transfer gate 2 is provided between the light receiving unit 1 and the floating diffusion FD shared by the two pixels.
In addition, transistors Tr1, Tr2, and Tr3 are arranged above and below the four pixels of two vertically and two horizontally. The configuration of each of the transistors Tr1, Tr2, and Tr3 is not particularly limited, and includes, for example, an amplification transistor, a reset transistor, a selection transistor, and the like.

Here, out of the four pixels at the lower right in FIG. 13, two pixels sharing the floating diffusion FD are extracted and shown in FIG. 14.
In the solid-state imaging device according to the present embodiment, two pixels sharing the floating diffusion FD are used as basic cells, and FIG. 14 shows the basic cell at the lower right of FIG. 13 and the center C of the imaging device. .

As shown in FIG. 14, the center 3C of the optical waveguide 3 is shifted from the center 1C of the light receiving unit 1 in each of the two pixels.
Specifically, in the upper left pixel in the figure, the center 3C of the optical waveguide 3 is shifted to the upper side from the center 1C of the light receiving unit 1. In the lower right pixel in the figure, the center 3C of the optical waveguide 3 is shifted downward from the center 1C of the light receiving unit 1.
Further, when a line is connected from the center C of the image sensor to the center 1C of the light receiving unit 1 of each pixel, in the upper left pixel, the center 3C of the optical waveguide 3 is the center of the image sensor rather than the center 1C of the light receiving unit 1. The distance from C is getting closer. In the lower right pixel, the center 3C of the optical waveguide 3 is farther from the center C of the image sensor than the center 1C of the light receiving unit 1. That is, the center 3C of the optical waveguide 3 is a mixture of pixels that are closer to the center C of the image sensor than the center 1C of the light receiving unit 1 and pixels that are farther away.
Returning to the overall plan view of FIG. 13 as a whole, the distance between the center 3C of the optical waveguide 3 and the pixel closer to the center C of the image sensor than the center 1C of the light receiving unit 1 is as a whole. It can be seen that distant pixels are mixed. Pixels in which the center 3C of the optical waveguide 3 is closer to the center C of the image sensor than the center 1C of the light receiving unit 1 are the pixels in the second row from the top and the pixels in the second row from the bottom. In the other four rows of pixels, the center 3C of the optical waveguide 3 is farther from the center C of the image sensor than the center 1C of the light receiving unit 1. This is the same as in the first embodiment of FIG.

The on-chip lens 4 and the optical waveguide 3 of the solid-state imaging device of FIG. 13 are extracted and shown in FIG. In FIG. 15, the center C of the image sensor is shown together with the components.
As shown in FIG. 15, the relative positions of the optical waveguide 3 and the on-chip lens 4 are substantially the same regardless of the pixel position. This point is different from the first embodiment.
In each pixel, the optical waveguide 3 is located near the center of the on-chip lens 4.
As shown in FIG. 15, the optical waveguide 3 and the on-chip lens 4 are arranged at equal intervals in the vertical direction and the horizontal direction, respectively.

In the second embodiment, the relative position between the on-chip lens 4 and the light receiving unit 1 is substantially the same for each row of pixels, as is the relative position between the optical waveguide 3 and the light receiving unit 1. The on-chip lens 4 is hardly displaced in the left-right direction from the center 1 </ b> C of the light receiving unit 1.
That is, the on-chip lens 4 is not subjected to pupil correction. Similarly, the optical waveguide 3 is not pupil-corrected.

Also in the second embodiment, as long as the cross-sectional structure of each pixel includes the light receiving unit 1, the optical waveguide 3, and the on-chip lens 4, other configurations are not particularly limited.
For example, the cross-sectional structure shown in FIG. 6 or the planar layout shown in FIG. 7 can be used.

Furthermore, FIG. 16 shows one form of an equivalent circuit diagram of two pixels of the basic cell of the solid-state imaging device of the second embodiment.
As shown in FIG. 16, the light receiving unit 1 including photodiodes of two pixels is connected to a common floating diffusion FD via a transfer gate 2. The floating diffusion FD is connected to one source / drain region of the reset transistor RST and the gate of the amplification transistor Amp. One source / drain region of the selection transistor SEL is connected to one source / drain region of the amplification transistor Amp. A power supply potential Vdd is connected to the other source / drain region of the reset transistor RST and the other source / drain region of the amplification transistor Amp. A signal line 100 is connected to the other source / drain region of the selection transistor SEL. That is, the three transistors RST, Amp, and SEL from the floating diffusion FD have the same configuration as that of the normal four transistors (including the transfer transistor of the transfer gate).

  In the second embodiment, the same components as those of the first embodiment described above are denoted by the same reference numerals, and redundant description is omitted.

According to the above-described embodiment, the floating diffusion FD and the transistors Tr1, Tr2, and Tr3 are shared by the two pixels of the basic cell. Thereby, compared with the case where floating diffusion FD and transistor Tr1, Tr2, Tr3 are not shared, the ratio of the area of the light-receiving part 1 can be increased, and the area of the light-receiving part 1 can be expanded. Then, the degree of reduction in the area of the light receiving unit 1 when the pixels are miniaturized can be reduced. For this reason, it becomes possible to reduce the size of the optical waveguide 3 so as not to reach the limit of embeddability and to near the limit.
Therefore, the pixels can be miniaturized to increase the integration degree of the solid-state image sensor, and the number of pixels and the size of the image pickup apparatus including the solid-state image sensor can be increased.

In addition, according to the present embodiment, since the on-chip lenses 4 are formed at equal intervals, so-called invalid areas can be reduced, and occurrence of loss due to invalid areas can be suppressed.
Furthermore, according to the present embodiment, the optical waveguide 3 is formed so that its planar position is shifted from the center 1C of the light receiving unit 1 toward the transistors Tr1, Tr2, Tr3, and the light receiving unit 1 It is formed so as to be included inside and inside the on-chip lens 4. Thereby, the light collected by the on-chip lens 4 can be sufficiently guided to the optical waveguide 3, and the light passing through the optical waveguide 3 can be reliably incident on the light receiving unit 1. In addition, it is possible to prevent color mixing that occurs when light passing through the optical waveguide 3 enters the light receiving unit 1 of the adjacent pixel.
Therefore, since sensitivity and photoelectric conversion efficiency can be improved, a solid-state image sensor that can sufficiently obtain sensitivity and photoelectric conversion efficiency even when pixels are miniaturized, and an image pickup apparatus including the solid-state image sensor are realized. be able to.

  Further, according to the present embodiment, since the optical waveguides 3 are arranged at substantially equal intervals, it is possible to improve the characteristics such as horizontal stripes, color unevenness, shading, etc., by making the change in output depending on the incident angle of light the same. it can.

  In the second embodiment, since the center 3C of the optical waveguide 3 and the center of the on-chip lens 4 are substantially coincident with each other, light can be efficiently collected and electric charges can be obtained efficiently. be able to. The configuration having such an arrangement is desirably used for a camera having an optical lens having a plurality of focal points such as a zoom lens.

In the description of the second embodiment, the case of having the 36 pixels shown in FIG. 13 has been described as an example. However, in reality, the same rule is applied and a large number of pixels of tens of thousands or more are applied. To form a solid-state image sensor.
For example, 8 million pixels can be integrated by integrating 4 million basic cells of 2 pixels.

In the above-described embodiments, the floating diffusion FD and the transistor are shared by two pixels or basic cells of four pixels.
In the present invention, the number of pixels of the basic cell sharing the floating diffusion or the like is not particularly limited as long as it is plural.
Note that when the arrangement of wirings and pixels is in the vertical direction and the horizontal direction, it is easy to consider the pixel layout when the number of pixels in the basic cell is an even number.

In each of the above-described embodiments, the optical waveguide 3 is shifted from the center 1C of the light receiving unit 1 above or below the transistors Tr1, Tr2, Tr3, and the optical waveguide 3 is moved laterally from the center 1C of the light receiving unit 1. Is shifted slightly or not. That is, pupil correction is not performed for the optical waveguide 3.
In the present invention, the optical waveguide 3 may be further shifted to the left or right from the center 1C of the light receiving unit 1 with respect to the configuration of each of the above-described embodiments. For example, with respect to the optical waveguide 3 in consideration of pupil correction, the optical waveguide 3 is shifted to the left in the right half pixel, the optical waveguide 3 is shifted to the right in the left half pixel, and the shift amount is from the center C of the image sensor. You may make it change according to distance.
Thus, the present invention can be applied not only to the pupil correction for the on-chip lens but also to the configuration in which the pupil correction is performed for the optical waveguide.

<3. Modification>
Some modifications of the embodiment of the solid-state imaging device are shown below.

First, each form of the cross-sectional shape of the optical waveguide 3 is shown in FIG.
FIG. 17A is a circular optical waveguide as shown in FIG. FIG. 17B shows an elliptical optical waveguide. FIG. 17C is a rectangular (rectangular) optical waveguide. FIG. 17D shows an octagonal optical waveguide.
With these cross-sectional shapes, solid-state imaging devices each actually having an optical waveguide were fabricated. As a result, any cross-sectional shape could be operated without any problem as a solid-state imaging device.
The cross-sectional shape of the optical waveguide may be other than these.
Note that the cross-sectional shape of the optical waveguide is desirably convex outward. Thereby, the recessed part and embedding layer for optical waveguides can be formed stably.

  Next, each form of the arrangement of the transistors and the arrangement of the optical waveguide 3 with respect to the light receiving unit 1 is shown in FIGS. In FIG. 18 to FIG. 20, the floating diffusion is not shown and is simplified.

In the first modification shown in FIG. 18, the transistors Tr are arranged on the left and right of the four basic cells sharing the floating diffusion.
In the two pixels on the left side of the basic cell, the optical waveguide 3 is shifted to the left from the center of the light receiving unit 1.
In the two pixels on the right side of the basic cell, the optical waveguide 3 is shifted from the center of the light receiving unit 1 to the right.

In the second modification shown in FIG. 19, transistors Tr are arranged on the right and bottom of the four basic cells sharing the floating diffusion. In this case, in the basic cells in the second and subsequent stages from the top, the transistors Tr are arranged on the top, bottom, left and right of the basic cells.
In the upper left pixel of the basic cell, the optical waveguide 3 is shifted from the center of the light receiving unit 1 to the upper left.
In the upper right pixel of the basic cell, the optical waveguide 3 is shifted from the center of the light receiving unit 1 to the upper right.
In the lower left pixel of the basic cell, the optical waveguide 3 is shifted from the center of the light receiving unit 1 to the lower left.
In the lower right pixel of the basic cell, the optical waveguide 3 is shifted from the center of the light receiving unit 1 to the lower right.

In the third modification shown in FIG. 20, a basic cell is configured by sharing floating diffusion between two upper and lower pixels, and transistors Tr are arranged above and below the basic cell.
In the pixel above the basic cell, the optical waveguide 3 is shifted upward from the center of the light receiving unit 1.
In the pixel below the basic cell, the optical waveguide 3 is shifted downward from the center of the light receiving unit 1.

In the first and second embodiments described above, the case where the center C of the image sensor is at the position of the floating diffusion FD between the pixels of the basic cell has been described. In the present invention, the position of the center of the image sensor is not limited to the position of the floating diffusion FD, and may be another position. For example, it may be inside a pixel such as the inside of a light receiving unit or between basic cells such as near a transistor.
Here, FIG. 21 and FIG. 22 show plan views corresponding to FIG. 1 and FIG. 4, respectively, with respect to modifications in the case where the center C of the image sensor is inside the light receiving unit. As shown in FIGS. 21 and 22, the center C of the image sensor is in the vicinity of the center of the on-chip lens 4 inside the light receiving unit 1.

<4. Embodiment of Imaging Device>
Next, an embodiment of the imaging apparatus of the present invention will be described.
FIG. 23 shows a schematic configuration diagram (block diagram) of an embodiment of an imaging apparatus of the present invention.
Examples of the imaging device include a video camera, a digital still camera, and a mobile phone camera.

As illustrated in FIG. 23, the imaging apparatus 500 includes an imaging unit 501 including a solid-state imaging element (not shown). An imaging optical system 502 that focuses incident light and forms an image is provided in the front stage of the imaging unit 501. Further, a signal processing unit 503 having a drive circuit that drives the imaging unit 501, a signal processing circuit that processes a signal photoelectrically converted by the solid-state imaging device, and the like is connected to the subsequent stage of the imaging unit 501. The image signal processed by the signal processing unit 503 can be stored by an image storage unit (not shown).
In such an imaging apparatus 500, the solid-state imaging device of the present invention such as the solid-state imaging device of the above-described embodiment can be used as the solid-state imaging device.

  According to the imaging apparatus 500 of the present embodiment, the solid-state imaging device of the present invention, that is, as described above, is formed by shifting the planar position of the center 3C of the optical waveguide 3 from the center 1C of the light receiving unit 1 to form a pixel. A solid-state imaging device that can obtain sufficient sensitivity and conversion efficiency even when the size of the image sensor is miniaturized is used. Thereby, the pixels of the solid-state imaging element can be miniaturized to increase the number of pixels and the size of the imaging apparatus 500, and there is an advantage that imaging can be performed even in a relatively dark place.

Note that the imaging apparatus of the present invention is not limited to the configuration shown in FIG. 23 and can be applied to any imaging apparatus using a solid-state imaging device.
For example, the solid-state imaging device may be in a form formed as a single chip, or in a modular form having an imaging function in which an imaging unit and a signal processing unit or an optical system are packaged together. Also good.
The imaging apparatus of the present invention can be applied to various imaging apparatuses such as a camera and a portable device having an imaging function. The broad meaning of “imaging” includes a fingerprint detection device and the like.

  The present invention is not limited to the above-described embodiment, and various other configurations can be taken without departing from the gist of the present invention.

  DESCRIPTION OF SYMBOLS 1 Light-receiving part, 2 Transfer gate, 3 Optical waveguide, 4 On-chip lens, 10 Semiconductor substrate, 11 Charge storage layer, 12 Positive charge storage area, 13 Gate insulating film, 14 Gate electrode, 18, 23, 28 Barrier metal layer, 19, 24, 29 Conductive layer, 20 First diffusion prevention film, 36 Passivation film, 37 Embedding layer, 38 Flattening resin layer, 39 Color filter, 100 Signal line, 110 Wiring, 500 Imaging device, 501 Imaging unit, 502 Optical System, 503 signal processor, FD floating diffusion, RST reset transistor, Amp amplification transistor, SEL selection transistor

Claims (5)

A light receiving portion that performs photoelectric conversion, formed for each pixel, an optical waveguide that is embedded in an insulating layer above the light receiving portion, guides light to the light receiving portion, and above the optical waveguide A solid-state imaging device including a formed on-chip lens,
A basic cell composed of a plurality of the pixels sharing a floating diffusion;
A transistor shared by a plurality of the pixels constituting the basic cell and disposed outside the plurality of pixels;
The light-receiving unit connected via a transfer gate to the floating diffusion shared by the pixels of the basic cell;
The on-chip lenses arranged at approximately equal intervals;
The optical waveguide formed so that a planar position is shifted from the center of the light receiving portion toward the transistor and is included in the light receiving portion and in the on-chip lens; Including a solid-state imaging device.   The solid-state imaging device according to claim 1, wherein the optical waveguides of the pixels are arranged at substantially equal intervals.   The solid-state imaging device according to claim 1, wherein the optical waveguide includes a passivation film formed on a wall surface on the insulating layer side, and a buried layer inside the passivation film.   The solid-state imaging device according to claim 3, wherein the passivation film is made of silicon oxynitride. A light receiving portion that performs photoelectric conversion, formed for each pixel, an optical waveguide that is embedded in an insulating layer above the light receiving portion, guides light to the light receiving portion, and above the optical waveguide An imaging apparatus including a solid-state imaging device including an on-chip lens formed,
A condensing optical unit that condenses incident light;
A basic cell constituted by a plurality of the pixels sharing a floating diffusion, a transistor shared by the plurality of pixels constituting the basic cell and disposed outside the plurality of pixels, and the basic cell The on-chip lens, which is disposed at substantially the same interval as the light receiving unit connected to the floating diffusion shared by each of the pixels via a transfer gate, and a planar position from the center of the light receiving unit The solid-state imaging device including the optical waveguide, which is formed so as to be shifted toward the transistor, and is included in the light receiving unit and the on-chip lens;
A signal processing unit that processes a signal obtained by photoelectric conversion by the solid-state imaging device;

Images