JP2008153370A - Solid-state imaging device and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a solid-state imaging device which suppresses sensitivity shading, and its manufacturing method. <P>SOLUTION: This solid-state imaging device is a solid-state imaging device 100 having a pixel array area 151 arranged with a plurality of pixel cells 154 in a row direction and a column direction two-dimensionally, and each pixel cell 154 includes a plurality of photoelectrically converting areas 110, 120 for converting light into signal electric charges, and a plurality of condensing lenses 109 for condensing the light on each of the photoelectrically converting areas 110, 120. The plurality of photoelectrically converting areas 110, 120 are not arranged at an equal pitch in the pixel array area 151, and are line-symmetrically arranged with respect to a central line 160 of the pixel cell 154 in the pixel cells 154. Points L1, L2, L3 and L4 in which a height of an upper face of the plurality of condensing lenses 109 is the highest are not arranged at an equal pitch in the pixel array area 151, and are line-symmetrically arranged with respect to the central line 160 of the pixel cell 154. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a solid-state imaging device and a manufacturing method thereof, and more particularly to a solid-state imaging device having a pixel array region having a multi-pixel 1-cell structure and a manufacturing method thereof.

  As a solid-state imaging device, a CMOS image sensor and a CCD image sensor are generally known. Since the CMOS image sensor manufacturing process is similar to the CMOS LSI process, there is an advantage that a plurality of circuits can be mounted on the same chip as compared to the CCD image sensor. For example, a CMOS image sensor, an A / D conversion circuit composed of CMOS, a timing generator, and the like can be formed on the same chip. On the other hand, a CMOS image sensor needs to form a plurality of metal wiring layers (usually 2 to 4 layers) in order to mount a plurality of circuits. As a result, light is blocked by the metal wiring, and it is difficult for incident light to reach the photoelectric conversion region. That is, the amount of incident light on the photodiode is lower in the CMOS image sensor than in the CCD image sensor. As a result, it is difficult for the CMOS image sensor to ensure excellent sensitivity characteristics.

  On the other hand, a solid-state imaging device having a pixel array region having a multi-pixel 1-cell structure is known in order to ensure a wider area of the photodiode. The multi-pixel 1-cell structure is a structure in which a detection capacitor portion and a plurality of transistors are shared by a plurality of photodiodes. By using the multi-pixel 1-cell structure, the area occupied by the detection capacitor portion and the plurality of transistors per pixel can be reduced.

  Hereinafter, a conventional amplification type solid-state imaging device having a multi-pixel 1-cell structure will be described with reference to FIGS. 10, 11, and 12.

FIG. 10 is a diagram showing a circuit configuration of a conventional amplification type solid-state imaging device having a multi-pixel 1-cell structure.
A solid-state imaging device 500 shown in FIG. 10 is a CMOS image sensor (amplification type solid-state imaging device) having a multi-pixel 1-cell structure. The solid-state imaging device 500 includes a pixel array region 551, a vertical scanning unit 552, and a horizontal scanning unit 553.

  In the pixel array region 551, a plurality of pixels including photodiodes are arranged in a two-dimensional matrix. The pixel array region 551 includes a plurality of pixel cells 554. The pixel cell 554 includes two photodiodes 510 and 520, readout transistors 511 and 521, a detection capacitor 513, an amplification transistor 514, and a reset transistor 516. The pixel cell 554 has a two-pixel one-cell structure in which two photodiodes 510 and 520 share a detection capacitor portion 513, an amplification transistor 514, and a reset transistor 516. In FIG. 10, only some of the plurality of pixels constituting the pixel array region 551 are shown.

  FIG. 11 is a diagram schematically showing a planar structure of the pixel array region 551 of the conventional solid-state imaging device 500. As shown in FIG. Note that FIG. 11 shows a planar structure of pixel cells 554A and 554B, which are the two pixel cells 554 shown in FIG. FIG. 12 is a diagram schematically showing a cross-sectional structure of a conventional solid-state imaging device. Fig.12 (a) is a figure which shows typically the cross-section in Y4-Y5 of FIG. FIG. 12B is a diagram schematically showing a cross-sectional structure taken along X4-X5 in FIG. As shown in FIGS. 11 and 12, the conventional solid-state imaging device 500 includes a semiconductor substrate 501 and photodiodes 510A, 520A, 510B, and 520B (the photodiodes 510A and 510B correspond to the photodiode 510 in FIG. 10, respectively). Each of the photodiodes 520A and 520B corresponds to the photodiode 520 in Fig. 10. Further, when the photodiodes 510A and 510B are not particularly distinguished from each other, they are denoted as the photodiode 510. When the photodiodes 520A and 520B are not particularly distinguished from each other. Is referred to as a photodiode 520), readout gates 512 and 522, a detection capacitor portion 513, an insulating film 502, a metal wiring layer 503, an insulating film 505, a metal light shielding film 506, and an insulating film 507. , Color filter Includes a 08, a condenser lens 509A, 509B, 509C and 509d (condenser lens 509A, 509B, especially when not distinguished 509C and 509d, referred to as the condenser lens 509.) And a.

  The photodiodes 510 and 520, the read gates 512 and 522, and the detection capacitor portion 513 are formed on the surface of the semiconductor substrate 501. The photodiode 510 constitutes a photoelectric conversion region. The read gate 512 is a gate electrode of a read transistor 511 used for reading charges accumulated in the photodiode 510. The read gate 522 is a gate electrode of a read transistor 521 that is used to read charges accumulated in the photodiode 520. The detection capacitor unit 513 accumulates the charges read through the read gates 512 and 522. The condensing lens 509 is formed above the color filter 508 and condenses incident light on the photodiodes 510 and 520. In FIGS. 11 and 12, the centers of the photodiodes 510A, 520A, 510B, and 520B viewed from the top are denoted as P1, P2, P3, and P4, respectively. Further, the centers of the one-pixel layout cells included in the pixel cell 554 as viewed from above are indicated by C1, C2, C3, and C4. In addition, points where the height of the condenser lens 509 (the thickness in the vertical direction in FIG. 12) is the highest are denoted as L1, L2, L3, and L4, respectively. Hereinafter, one pixel (photodiode 510 (or 520) and readout transistor 511 (or 521)) included in the pixel cell 554 having the multi-pixel one-cell structure is referred to as a unit pixel. A layout cell of a unit pixel is referred to as a unit pixel cell.

Next, the operation of the conventional solid-state imaging device will be described.
When a voltage is applied to the reading gate 512, the reading transistor 511 is turned on, and the charge accumulated in the photodiode 510A is transferred to the detection capacitor portion 513. The charge transferred to the detection capacitor 513 is detected as an electrical signal by the amplification transistor 514 including the amplification gate 515 as a component. Thereafter, the reset transistor 516 including the reset gate 517 as a component is turned on, and the charge in the detection capacitor portion 513 is removed. Next, when a voltage is applied to the read gate 522, the read transistor 521 is turned on, and similarly, the charge accumulated in the photodiode 520A is read.

On the other hand, a solid-state imaging device that changes the shape of a condensing lens and improves sensitivity is known (for example, see Patent Document 1).
JP 2006-49721 A

  However, in the conventional solid-state imaging device having a two-pixel one-cell structure, as shown in FIGS. 11 and 12, the center P1 of the photodiode 510 of the two unit pixels constituting the pixel cell 554 and the center P2 of the 520 are The pixel array regions 551 are arranged in line symmetry with respect to the boundary line 560 of the two unit pixel cells in the pixel cell 554 rather than at equal pitches in the vertical direction (vertical direction in FIG. 11). Similarly, the readout gates 512 and 522 of the two unit pixels that constitute the pixel cell 554 are not equal in pitch within the pixel array region 551, but with respect to the boundary line 560 of the two unit pixel cells in the pixel cell 554. Arranged in line symmetry. In general, the read gates 512 and 522 are formed of polysilicon or metal (such as aluminum and tungsten), and thus incident light is reflected when light is incident thereon.

  FIG. 13 is a diagram showing a vertical cross-sectional structure of a conventional solid-state imaging device 500 and the amount of light incident on each position on a pixel. As shown in FIG. 13, in the conventional solid-state imaging device 500, the point L1 (L2) having the highest height of the condenser lens 509A (509B) does not coincide with the center P1 (P2) of the photodiode 510A (520A). The peak of the incident light quantity does not coincide with the center P1 (P2) of the photodiode 510A (520A). Specifically, the peak of the incident light amount is shifted from the center of the photodiode 510A (520A) toward the readout gate 512 (522). Therefore, incident light is scattered by the read gate 512 (522) in the region A0 (A1) shown in FIG. As a result, the amount of light incident on the photodiode 510A (520A) decreases, and the sensitivity decreases. In addition, since the amount of incident light scattered by the readout gate 512 and the readout gate 522 differs depending on the incident direction of light, the amount of light incident on the photodiode 510A and the photodiode 520A varies. That is, in the conventional solid-state imaging device 500, a difference in sensitivity occurs between the unit pixels arranged symmetrically with respect to the center of the pixel cell 554 (unit pixel cell boundary line 560) (sensitivity shading occurs). There is a problem.

  In view of the above problems, an object of the present invention is to provide a solid-state imaging device that suppresses sensitivity shading and a manufacturing method thereof.

  To achieve the above object, a solid-state imaging device according to the present invention is a solid-state imaging device having a pixel array region in which a plurality of pixel cells are arranged two-dimensionally in a row direction and a column direction, and each pixel The cell includes a plurality of photoelectric conversion regions for converting light into signal charges, a plurality of read gates for reading the signal charges converted by the photoelectric conversion regions, and a plurality of light focusing lights on the photoelectric conversion regions. The plurality of photoelectric conversion regions included in the plurality of pixel cells are not arranged at an equal pitch in the pixel array region, and are within the pixel cell with respect to a center point of the pixel cell. Are arranged point-symmetrically or line-symmetrically with respect to the center line of the pixel cell, and the highest height of the upper surfaces of the plurality of condenser lenses included in the plurality of pixel cells is within the pixel array region. It is not arranged at an equal pitch, One are disposed symmetric with respect to the center line of the point symmetry or pixel cell with respect to the center point of the pixel cells in the pixel cell.

  According to this configuration, in the solid-state imaging device having the pixel array region having the multi-pixel 1-cell structure in which the photoelectric conversion regions are not arranged at the same pitch in the pixel array region, the pixel has the highest height on the upper surface of the condenser lens. They are not arranged at equal pitches in the array area. That is, in the solid-state imaging device according to the present invention, the focal position of the condenser lens can be formed in accordance with the arrangement of the photoelectric conversion regions. Thereby, the difference in sensitivity between the photoelectric conversion regions included in the pixel cell can be reduced. Therefore, the solid-state imaging device according to the present invention can suppress sensitivity shading.

  Each pixel cell includes a plurality of photoelectric conversion regions included in the pixel cell, a read gate for reading signal charges in the photoelectric conversion region, and a condensing lens for condensing light in the photoelectric conversion region. The direction in which the highest point of the top surface of the condenser lens included in the unit pixel area is located with respect to the center of the unit pixel area is relative to the center of the unit pixel area. The direction in which the center of the photoelectric conversion region included in the unit pixel region is located may be the same.

  According to this configuration, the highest point of the upper surface of the condenser lens is arranged in the direction in which the photoelectric conversion region is located with respect to the center of the unit pixel region (unit pixel cell). That is, the condenser lens is formed so that the focal position of the condenser lens approaches the center of the photoelectric conversion region. Therefore, scattering of incident light by a readout gate or the like can be reduced, and variation in the amount of light received in the photoelectric conversion region included in the pixel cell can be suppressed. That is, the solid-state imaging device according to the present invention can suppress sensitivity shading.

  The center of the photoelectric conversion region may coincide with the point where the height of the upper surface of the condenser lens is the highest.

  According to this configuration, the focal position of the condenser lens can be set to the center of the photoelectric conversion region. Therefore, reflection by a readout gate or the like can be reduced, and variation in the amount of received light in the photoelectric conversion region included in the pixel cell can be suppressed. That is, the solid-state imaging device according to the present invention can suppress sensitivity shading.

  Further, the shape of the condenser lens is asymmetric with respect to the normal of the highest point of the upper surface of the condenser lens, and the distance from the normal to the end of the condenser lens is longer The curvature at the end may be greater than the curvature at the shorter end.

  According to this, the curvature of the end of the condensing lens that is far from the center of the photoelectric conversion region is larger than the curvature of the end of the condensing lens that is far from the center of the photoelectric conversion region. . Thereby, incident light can be condensed at the center of the photoelectric conversion region.

  The solid-state imaging device manufacturing method according to the present invention includes a plurality of photoelectric conversion regions for converting light into signal charges, a plurality of readout gates for reading the signal charges converted by the photoelectric conversion regions, A method for manufacturing a solid-state imaging device having a pixel array region in which a plurality of pixel cells each having a plurality of condensing lenses that condense light in a photoelectric conversion region are arranged two-dimensionally in a row direction and a column direction, The photoelectric conversion regions that are not arranged at an equal pitch in the pixel array region and that are arranged point-symmetrically with respect to the center point of the pixel cell or line-symmetrically with respect to the center line of the pixel cell in the pixel cell A first step of forming a plurality of readout gates, a point having the highest height of the upper surface of the condenser lens is not arranged at an equal pitch in the pixel array region, and pixels In the cell And a third step of forming a plurality of condensing lenses arranged symmetrically with respect to the center line of the point symmetry or pixel cell with respect to the center point of the pixel cell.

  According to this, in the solid-state imaging device having a pixel array region having a multi-pixel 1-cell structure in which the photoelectric conversion regions are not arranged at an equal pitch in the pixel array region, the highest point of the upper surface of the condenser lens is the pixel array. They are not arranged at equal pitches within the region. That is, by the manufacturing method according to the present invention, the focal position of the condenser lens can be formed in accordance with the arrangement of the photoelectric conversion regions. Thereby, the difference in sensitivity between the photoelectric conversion regions included in the pixel cell can be reduced. Therefore, the method for manufacturing a solid-state imaging device according to the present invention can manufacture a solid-state imaging device that suppresses sensitivity shading.

  In the third step, the condensing lens having an asymmetric shape with respect to the normal of the highest point of the top surface of the condensing lens is a gray mask having a distribution in which the light transmittance is not constant. May be formed.

  According to this, it is possible to form a condensing lens having an asymmetric shape with respect to the normal line of the highest point of the upper surface.

  The present invention can provide a solid-state imaging device that suppresses sensitivity shading and a manufacturing method thereof.

  Embodiments of a solid-state imaging device according to the present invention will be described below in detail with reference to the drawings.

(Embodiment 1)
The solid-state imaging device according to Embodiment 1 of the present invention is a solid-state imaging device having a pixel array region having a multi-pixel 1-cell structure in which photodiodes are not arranged at equal pitches within the pixel array region. Do not arrange them at the same pitch according to the arrangement of the photodiodes. Thereby, scattering of incident light by a readout gate or the like can be reduced, and sensitivity shading can be suppressed.

First, the configuration of the solid-state imaging device according to Embodiment 1 of the present invention will be described.
1 is a diagram illustrating a circuit configuration of a solid-state imaging device according to Embodiment 1 of the present invention. The circuit configuration of the solid-state imaging device 100 illustrated in FIG. 1 is the same as that in FIG. 10, and includes a pixel array region 151, a vertical scanning unit 152, and a horizontal scanning unit 153.

  The pixel array region 151 includes a plurality of pixel cells 154 arranged in a two-dimensional matrix in the row direction and the column direction.

  The pixel cell 154 includes two photodiodes 110 and 120, readout transistors 111 and 121, a detection capacitor unit 113, an amplification transistor 114, and a reset transistor 116. The pixel cell 154 has a two-pixel one-cell structure in which two photodiodes 110 and 120 share the detection capacitor portion 113, the amplification transistor 114, and the reset transistor 116. In FIG. 1, only a part (eight pixel cells 154) of the plurality of pixels constituting the pixel array region 151 is shown.

  The photodiodes 110 and 120 photoelectrically convert incident light into signal charges and store them. The read transistor 111 reads the signal charge accumulated in the photodiode 110 to the detection capacitor unit 113. The read transistor 121 reads the signal charge accumulated in the photodiode 120 to the detection capacitor 113. The amplification transistor 114 amplifies the signal charge of the detection capacitor unit 113 and outputs the amplified signal. The reset transistor 116 removes signal charges from the detection capacitor unit 113. The read transistors 111 and 121, the amplification transistor 114, and the reset transistor 116 are MOS transistors.

  The vertical scanning unit 152 selects a plurality of pixel rows arranged in a matrix. Specifically, the vertical scanning unit 152 selects a row by controlling the read transistors 111 and 121. In addition, the vertical scanning unit 152 controls the reset transistor 116 to reset the signal charges of the detection capacitor units 113 of the plurality of pixels.

The horizontal scanning unit 153 selects a plurality of pixel columns arranged in a matrix.
FIG. 2 is a diagram schematically showing a planar structure of the pixel array region 151 of the solid-state imaging device 100 according to Embodiment 1 of the present invention. 2 shows a planar structure of the pixel cells 154A and 154B which are the two pixel cells 154 shown in FIG. FIG. 3 is a diagram schematically showing a cross-sectional structure of the solid-state imaging device 100 according to Embodiment 1 of the present invention. FIG. 3A is a diagram schematically showing a cross-sectional structure at Y0-Y1 in FIG. FIG. 3B is a diagram schematically showing a cross-sectional structure at X0-X1 in FIG.

  2 and 3, the solid-state imaging device 100 includes a semiconductor substrate 101 and photodiodes 110A, 110B, 120A, and 120B (the photodiodes 110A and 110B respectively correspond to the photodiode 110 in FIG. 1). The photodiodes 120A and 120B respectively correspond to the photodiode 120 of Fig. 1. Further, when the photodiodes 110A and 110B are not particularly distinguished, they are referred to as the photodiode 110. When the photodiodes 120A and 120B are not particularly distinguished, (Referred to as a photodiode 120), readout gates 112 and 122, a detection capacitor 113, an insulating film 102, a metal wiring layer 103, an insulating film 105, a metal light shielding film 106, an insulating film 107, and a color. Filter 108 and light collection Lens 109A, 109B, 109C and 109D (condenser lens 109A, 109B, unless otherwise identified 109C and 109D are referred to as the condenser lens 109.) Comprises a, an amplifying gate 115, and a reset gate 117. The amplification gate 115 is a gate electrode of the amplification transistor 114. The reset gate 117 is a gate electrode of the reset transistor 116.

  The photodiodes 110 and 120 are formed on the surface of the semiconductor substrate 101. The photodiodes 110 and 120 constitute a photoelectric conversion region.

  The read gates 112 and 122 are formed on the surface of the semiconductor substrate 101. The read gate 112 is used for reading charges accumulated in the photodiode 110. The read gate 122 is used for reading charges accumulated in the photodiode 120. The read gate 112 is a gate electrode of the read transistor 111, and the read gate 122 is a gate electrode of the read transistor 121.

  The detection capacitor portion 113 is formed on the surface of the semiconductor substrate 101. The detection capacitor unit 113 accumulates the charges read through the read gates 112 and 122.

  The insulating film 102 is formed on the photodiodes 110 and 120, the read gates 112 and 122, and the detection capacitor 113. The metal wiring layer 103 is formed on the insulating film 102. The insulating film 105 is formed on the insulating film 102 and the metal wiring layer 103. The metal light shielding film 106 is formed on the insulating film 105, and an opening is formed above the photoelectric conversion region. The insulating film 107 is formed on the insulating film 105 and the metal light shielding film 106. The color filter 108 is formed above the insulating film 107.

  The condenser lens 109 is formed above the color filter 108 and condenses incident light on the photodiodes 110 and 120. The condensing lens 109A is formed above the photodiode 110A and condenses incident light on the photodiode 110A. The condensing lens 109B is formed above the photodiode 120A and condenses incident light on the photodiode 120A. The condensing lens 109C is formed above the photodiode 110B and condenses incident light on the photodiode 110B. The condensing lens 109D is formed above the photodiode 120B and condenses incident light on the photodiode 120B. The metal wiring layer 103 and the metal light shielding film 106 are not shown in FIG. 2 and 3, the center of the photodiode 110A viewed from above is indicated as P1, the center of the photodiode 120A is indicated as P2, the center of the photodiode 110B is indicated as P3, and the center of the photodiode 120B is indicated as P4. It shows. Further, the center of the unit pixel cell including the photodiode 110A viewed from above is denoted as C1, the center of the unit pixel cell including the photodiode 120A is denoted as C2, and the center of the unit pixel cell including the photodiode 110B is denoted as C3. The center of the unit pixel cell including the photodiode 120B is denoted as C4. In addition, the point where the height of the upper surface of the condenser lens 109A (the thickness in the vertical direction in FIG. 3) is the highest is indicated as L1, and the point where the upper surface of the condenser lens 109B is the highest is indicated as L2. A point where the height of the upper surface of the lens 109C is the highest is indicated as L3, and a point where the height of the upper surface of the condenser lens 109D is the highest is indicated as L4.

  In the vertical direction of the pixel array region 151, as shown in FIG. 3A, the highest points L1 and L2 (L3 and L4) of the condensing lens 109 are equally spaced within the pixel array region 151. Is not arranged in the pixel cell 154 but is arranged symmetrically with respect to the boundary line 160 (center line of the pixel cell 154) of the unit pixel cell. That is, in the vertical direction, the points L1, L2, L3, and L4 having the highest height of the condensing lens 109 do not coincide with the centers C1, C2, C3, and C4 of the unit pixel cells. Similarly, the centers P 1 and P 2 (P 3 and P 4) of the photodiodes 110 and 120 are not arranged at equal pitches within the pixel array region 151, and the unit pixel cell boundary line (pixel cell 154) within the pixel cell 154. Center line) 160 is arranged in line symmetry. That is, in the vertical direction, the centers P1, P2, P3, and P4 of the photodiodes 110 and 120 do not coincide with the centers C1, C2, C3, and C4 of the unit pixel cells. The points L1, L2, L3, and L4 having the highest height of the condenser lens 109 coincide with the centers P1, P2, P3, and P4 of the photodiodes 110 and 120, respectively.

  In the horizontal direction of the pixel array region 151, as shown in FIG. 3B, the highest points L1 and L3 (L2 and L4) of the condensing lens 109 are equal in pitch within the pixel array region 151. It is arranged with. Further, the centers C1 and C2 (C3 and C4) of the photodiodes 110 and 120 are arranged at an equal pitch in the pixel array region 151. That is, in the horizontal direction, the centers C1, C2, C3 and C4 of the unit pixel cells, the centers P1, P2, P3 and P4 of the photodiodes 110 and 120, and the points L1 and L2 where the height of the condenser lens 109 is the highest. , L3 and L4 match.

  FIG. 4 is a view showing a vertical sectional structure of the condensing lens 109A (109C). Note that the vertical sectional structure of the condensing lens 109B (109D) is the left-right reversed structure of the condensing lens 109A shown in FIG. As shown in FIG. 4, the shape of the condensing lens 109 is asymmetric with respect to the normal of the point L1 where the height of the upper surface of the condensing lens 109 is the highest. Further, the curvature at the end portion 164 having the longer distance from the normal of the point L1 where the height of the upper surface of the condensing lens 109 is the highest to the end portion of the condensing lens 109 is greater than the curvature at the short end portion 163. large. That is, the shape of the condensing lens 109 is such that the region 163 at the end of the unit pixel cell on the left side 161 from the point L1 where the height of the condensing lens 109 is the highest has a small curvature, and the region 164 at the end of the unit pixel cell on the right side 162. Has a large curvature. In general, the angle θA of incident light after being refracted by the lens is small in a region where the curvature of the lens is small, and the angle θB of incident light after being refracted by the lens is large in a region where the curvature of the lens is large. Accordingly, the focal position of the condenser lens 109 at the center P1 of the photodiode 110A is reduced by reducing the curvature of the region 163 of the condenser lens 109 and increasing the curvature of the region 164 as shown in FIG. Can be brought closer. Thereby, the condensing efficiency to the photodiode 110 can be improved and the sensitivity can be improved. Note that the center P1 of the photodiode 110A and the point L1 where the height of the condensing lens 109 is the highest need not necessarily coincide. For example, the focal point of the condenser lens 109 is shifted by shifting the point L1 having the highest height of the condenser lens 109 in the direction in which the center of the photodiode 110A is shifted from the center C1 of the pixel (right side in FIG. 4). It can be brought close to the center P1 of the photodiode 110A. Therefore, the light collection efficiency to the photodiode 110A can be improved.

  FIG. 5 is a diagram showing a vertical cross-sectional structure of the solid-state imaging device according to Embodiment 1 of the present invention and the amount of light incident on each position on the pixel. As shown in FIG. 5, in the solid-state imaging device 100 according to Embodiment 1 of the present invention, the point L1 (L2) having the highest height of the condenser lens 109A (109B) is the center P1 of the photodiode 110A (120A). P2), the incident light intensity peak coincides with the center P1 (P2) of the photodiode 110A (120A). Thereby, compared with the conventional solid-state imaging device 500, scattering of incident light by the read gate 112 (122) can be suppressed. Therefore, variation in the amount of light incident on the photodiode 110A and the photodiode 120A due to scattering of incident light by the readout gate 112 (122) can be reduced. That is, the solid-state imaging device 100 according to Embodiment 1 of the present invention can suppress a decrease in sensitivity.

  Note that the above-described problem does not occur in the horizontal direction in which the centers of the photodiodes 110 are arranged at an equal pitch (the direction in which no readout gate is arranged).

  As described above, in the solid-state imaging device 100 according to the first embodiment of the present invention, the curvature of the convex surface of the condensing lenses 109A and 109B (109C and 109D) is maximum in the vertical direction of the pixel array region 151. The points L 1 and L 2 (L 3 and L 4) are arranged not symmetrically in the pixel array region 151 but symmetrically in the pixel cell 154. Furthermore, since the points L1, L2, L3, and L4 having the highest height of the condenser lens 109 coincide with the centers P1, P2, P3, and P4 of the photodiodes 110 and 120, the peak of the incident light amount is the photodiodes 110 and 120. Coincides with the centers P1, P2, P3 and P4. Thereby, since the scattering of the incident light by the read gates 112 and 122 can be reduced, an improvement in sensitivity can be realized. In addition, variation in sensitivity between the photodiodes 110 and 120 included in one pixel cell 154 due to scattering of incident light by the readout gate 112 (122) can be reduced. That is, the solid-state imaging device 100 according to Embodiment 1 of the present invention can suppress sensitivity shading.

Next, a method for manufacturing the solid-state imaging device 100 according to Embodiment 1 of the present invention will be described.
First, the photodiodes 110 and 120 and the detection capacitor 113 are formed on the semiconductor substrate 101. Next, read gates 112 and 122 are formed on the semiconductor substrate 101. Next, the insulating film 102 is formed over the photodiodes 110 and 120, the detection capacitor portion 113, and the read gates 112 and 122. Next, a metal wiring layer 103 is formed on the insulating film 102. Next, an insulating film 105 is formed on the insulating film 102 and the metal wiring layer 103. Next, a metal light shielding film 106 is formed on the insulating film 105. Next, an insulating film 107 is formed on the insulating film 105 and the metal light shielding film 106. Next, the color filter 108 is formed above the insulating film 107. Next, a condenser lens 109 is formed above the color filter 108. A manufacturing method other than the condensing lens 109 can be manufactured by a conventional technique. Hereinafter, a detailed manufacturing method of the condenser lens 109 will be described.

  FIG. 6 is a diagram illustrating a method for manufacturing the condensing lens 109 of the solid-state imaging device 100 according to Embodiment 1 of the present invention.

  First, a positive resist is formed on the entire surface of the lens material 170 made of an inorganic or organic transparent material. Next, the positive resist pattern is exposed using a gray scale mask 172 and then developed. As a result, a positive resist 171 having a cross-sectional shape shown in FIG.

  Next, the cross-sectional shape of the positive resist 171 is transferred to the lens material 170 by etch back. Thereby, the condensing lens 109 having the cross-sectional shape shown in FIG. 6B is formed.

  Here, as shown in FIG. 6C, the gray scale mask 172 has a distribution in which the light transmittance is not constant. In a normal mask, the transmittance is two types of 1 or 0, but in the gray scale mask 172, the transmittance can be continuously changed.

Through the above steps, the solid-state imaging device 100 is formed.
The solid-state imaging device and the manufacturing method thereof according to the embodiment of the present invention have been described above, but the present invention is not limited to this embodiment.

  For example, in the above description, the centers P1, P2, P3, and P4 of the photodiodes 110 and 120 and the points L1, L2, L3, and L4 having the highest height of the condenser lens 109 are coincident with each other. Not necessary. For example, in the example shown in FIG. 2, the point L1 (L2, L3, L4) where the height of the condenser lens 109 is the highest is the center C1 (C2, C3, C4) of the unit pixel cell and the photodiode 110A (120A, 120A, 110B, 120B). That is, the direction in which the point L1 (L2, L3, L4) having the highest height of the upper surface of the condenser lens with respect to the center C1 (C2, C3, C4) of the unit pixel cell is located is the center C1 of the unit pixel cell. It may be the same as the direction in which the centers P1 (P2, P3, P4) of the photodiodes 110 and 120 are located with respect to (C2, C3, C4). Thereby, the condensing position of the condensing lens 109 can be brought close to the center P1 (P2, P3, P4) of the photodiodes 110 and 120. Therefore, since the scattering of incident light by the readout gates 112 and 122 can be reduced, an improvement in sensitivity can be realized. In addition, variation in sensitivity between the photodiodes 110 and 120 in the pixel cell 154 can be reduced. That is, sensitivity shading can be suppressed.

  In the above description, two unit pixel cells included in one pixel cell 154 are arranged adjacent to each other in the vertical direction, but may be arranged adjacent to each other in the horizontal direction.

(Embodiment 2)
In the first embodiment described above, the example in which the present invention is applied to the solid-state imaging device having the pixel array region of the two-pixel one-cell structure has been described. In the second embodiment, an example in which the present invention is applied to a solid-state imaging device having a pixel array region having a four-pixel one-cell structure will be described.

  FIG. 7 is a diagram showing a circuit configuration of the solid-state imaging device according to Embodiment 2 of the present invention. Elements similar to those in FIG. 1 are denoted by the same reference numerals, and detailed description thereof is omitted. The solid-state imaging device 200 illustrated in FIG. 7 includes a pixel array region 251, a vertical scanning unit 152, and a horizontal scanning unit 153.

  The pixel array region 251 includes a plurality of pixel cells 254 arranged in a two-dimensional matrix in the row direction and the column direction. The pixel cell 254 includes four photodiodes 210, 220, 230, and 240, readout transistors 211, 221, 231, and 241, a detection capacitor unit 113, an amplification transistor 114, and a reset transistor 116. The pixel cell 254 has a 4-pixel 1-cell structure in which the four photodiodes 210, 220, 230, and 240 share the detection capacitor 113, the amplification transistor 114, and the reset transistor 116. In FIG. 7, only a part (four pixel cells 254) of a plurality of pixels constituting the pixel array region 251 is shown.

  The photodiodes 210, 220, 230, and 240 photoelectrically convert incident light into signal charges and store them. The read transistor 211 reads the signal charge accumulated in the photodiode 210 to the detection capacitor unit 113. The read transistor 221 reads the signal charge accumulated in the photodiode 220 to the detection capacitor unit 113. The read transistor 231 reads the signal charge accumulated in the photodiode 230 to the detection capacitor unit 113. The read transistor 241 reads the signal charge accumulated in the photodiode 240 to the detection capacitor 113. The amplification transistor 114 amplifies the signal charge of the detection capacitor unit 113 and outputs the amplified signal. The reset transistor 116 removes signal charges from the detection capacitor unit 113. The read transistors 211, 221, 231, 241, the amplification transistor 114 and the reset transistor 116 are MOS transistors.

  FIG. 8 is a diagram schematically showing a planar structure of the pixel array region 251 of the solid-state imaging device 200 according to Embodiment 2 of the present invention. 8 shows a planar structure of one pixel cell 254 shown in FIG. FIG. 9 is a diagram schematically showing a cross-sectional structure of the solid-state imaging device 200 according to Embodiment 2 of the present invention. FIG. 9A is a diagram schematically showing a cross-sectional structure at Y2-Y3 in FIG. FIG. 9B is a diagram schematically showing a cross-sectional structure at X2-X3 in FIG. 2 and 3 are denoted by the same reference numerals, and detailed description thereof is omitted.

  As shown in FIGS. 8 and 9, the solid-state imaging device 200 includes a semiconductor substrate 101, photodiodes 210, 220, 230, and 240, readout gates 212, 222, 232, and 242, a detection capacitor 113, and insulation. Film 102, metal wiring layer 103, insulating film 105, metal light shielding film 106, insulating film 107, color filter 108, condenser lenses 209A, 209B, 209C and 209D (condenser lenses 209A, 209B, 209C) And 209D are referred to as a condensing lens 209 unless otherwise distinguished), an amplification gate 115, and a reset gate 117.

  The photodiodes 210, 220, 230, and 240 are formed on the surface of the semiconductor substrate 101. The photodiodes 210, 220, 230, and 240 constitute a photoelectric conversion region.

  The read gates 212, 222, 232 and 242 are formed on the surface of the semiconductor substrate 101. The read gate 212 is used for reading charges accumulated in the photodiode 210. The read gate 222 is used for reading charges accumulated in the photodiode 220. The read gate 232 is used for reading charges accumulated in the photodiode 230. The read gate 242 is used for reading charges accumulated in the photodiode 240. The read gate 212 is a gate electrode of the read transistor 211, the read gate 222 is a gate electrode of the read transistor 221, the read gate 232 is a gate electrode of the read transistor 231, and the read gate 242 is a gate electrode of the read transistor 241. is there.

  The detection capacitor portion 113 is formed on the surface of the semiconductor substrate 101. The detection capacitor unit 113 accumulates the charges read through the read gates 212, 222, 232, and 242.

  The condensing lens 209 is formed above the color filter 108 and condenses incident light on the photodiodes 210, 220, 230 and 240. The condensing lens 209 </ b> A is formed above the photodiode 210 and condenses incident light on the photodiode 210. The condenser lens 209 </ b> B is formed above the photodiode 220 and collects incident light on the photodiode 220. The condensing lens 209 </ b> C is formed above the photodiode 230 and condenses incident light on the photodiode 230. The condensing lens 209 </ b> D is formed above the photodiode 240 and condenses incident light on the photodiode 240. Further, the center of the unit pixel cell including the photodiode 210 viewed from above is denoted as C1, the center of the unit pixel cell including the photodiode 220 is denoted as C2, and the center of the unit pixel cell including the photodiode 230 is denoted as C3. The center of the unit pixel cell including the photodiode 240 is denoted as C4. Further, the point where the height of the upper surface of the condenser lens 209A is the highest is indicated as L1, the point where the height of the upper surface of the condenser lens 209B is the highest is indicated as L2, and the height of the upper surface of the condenser lens 209C is the highest. A point is indicated as L3, and a point where the height of the upper surface of the condenser lens 209D is the highest is indicated as L4.

  The cross-sectional structure in the vertical direction of the solid-state imaging device 200 according to the second embodiment is the same as that of the solid-state imaging device 100 according to the first embodiment. In the vertical direction of the pixel array region 251, as shown in FIG. 9A, the highest points L1 and L2 (L3 and L4) of the condensing lens 209 are at equal pitches within the pixel array region 251. In the pixel cell 254, the pixel cell 254 is arranged symmetrically with respect to the boundary line 260 of the unit pixel cell in the horizontal direction. That is, the points L1, L2, L3, and L4 having the highest height of the condenser lens 209 in the vertical direction do not coincide with the centers C1, C2, C3, and C4 of the unit pixel cells. Similarly, the centers P 1 and P 2 (P 3 and P 4) of the photodiodes 210, 220, 230, and 240 are not arranged at equal pitches within the pixel array region 251, but are horizontal unit pixel cells within the pixel cell 254. Are arranged symmetrically with respect to the boundary line 260. That is, in the vertical direction, the centers P1, P2, P3, and P4 of the photodiodes 210, 220, 230, and 240 do not coincide with the centers C1, C2, C3, and C4 of the unit pixel cells. The points L1, L2, L3 and L4 having the highest height of the condenser lens 209 coincide with the centers P1, P2, P3 and P4 of the photodiodes 210, 220, 230 and 240, respectively.

  Unlike the horizontal sectional structure of the solid-state imaging device 100 according to the first embodiment, the horizontal sectional structure of the solid-state imaging device 200 according to the second embodiment is the same sectional structure as the vertical sectional structure. In the horizontal direction of the pixel array region 251, as shown in FIG. 9B, the highest points L1 and L3 (L2 and L4) of the condensing lens 209 are equal in pitch within the pixel array region 251. In the pixel cell 254, the pixel cell 254 is arranged symmetrically with respect to the boundary line 261 of the unit pixel cell in the vertical direction. That is, in the horizontal direction, the points L1, L2, L3 and L4 having the highest height of the condenser lens 209 do not coincide with the centers C1, C2, C3 and C4 of the unit pixel cells. Similarly, the centers P 1, P 2 (P 3 and P 4) of the photodiodes 210, 220, 230, and 240 are not arranged at equal pitches within the pixel array region 251, but are vertical unit pixel cells within the pixel cell 254. Are arranged symmetrically with respect to the boundary line 261. That is, in the horizontal direction, the centers P1, P2, P3, and P4 of the photodiodes 210, 220, 230, and 240 do not coincide with the centers C1, C2, C3, and C4 of the unit pixel cells. The points L1, L2, L3 and L4 having the highest height of the condenser lens 209 coincide with the centers P1, P2, P3 and P4 of the photodiodes 210, 220, 230 and 240, respectively.

  That is, the points L 1, L 2, L 3, and L 4 at which the heights of the four condenser lenses 209 included in the pixel cell 254 are maximum are relative to the center point (intersection of four unit pixel cells) 262 of the pixel cell 254. It is point symmetric. The centers P1, P2, P3, and P4 of the four photodiodes 210, 220, 230, and 240 included in the pixel cell 254 are point-symmetric with respect to the center point of the pixel cell 254.

  As described above, in the solid-state imaging device 200 according to Embodiment 2 of the present invention, the points L1, L2, L3, and L4 at which the curvatures of the convex surfaces of the condensing lenses 209A, 209B, 209C, and 209D become maximum are described. In the pixel array region 251, the pixel cells are arranged at point symmetry with respect to the center point 262 of the pixel cell 254 in the pixel cell 254, not at equal pitches in the vertical direction and the horizontal direction. Furthermore, since the points L1, L2, L3, and L4 having the highest height of the condenser lens 209 coincide with the centers P1, P2, P3, and P4 of the photodiodes 210, 220, 230, and 240, the incident light amount peak It coincides with the centers P1, P2, P3 and P4 of the diodes 210, 220, 230 and 240. Thereby, since scattering of incident light by the read gates 212, 222, 232, and 242 can be reduced, an improvement in sensitivity can be realized. In addition, variation in sensitivity between the photodiodes 210, 220, 230, and 240 in one pixel cell 254 due to scattering of incident light by the readout gate 212 (222, 232, 242) can be reduced. That is, the solid-state imaging device 200 according to Embodiment 2 of the present invention can suppress sensitivity shading.

  Further, the centers P1, P2, P3, and P4 of the photodiodes 210, 220, 230, and 240 are shifted in an oblique direction with respect to the pixel array region 251 from the centers C1, C2, C3, and C4 of the unit pixel cells. In this case, the shift direction of the condenser lens 209 is also an oblique direction. That is, the cross-sectional structure in the oblique direction of the condenser lens 209 is the cross-sectional structure shown in FIG. 4, and the points L 1, L 2, L 3, and L 4 at which the curvature of the convex surface of the condenser lens 209 is maximum are within the pixel cell 254. The pixel cell 254 is point-symmetric with respect to the center point 262. Also, as shown in FIG. 4, the cross-sectional shape of the condenser lens 209 in the oblique direction is such that the region 163 at the end of the unit pixel from the point L1 where the height of the condenser lens 209 is the highest to the left 161 has a small curvature, The region 164 at the end of the unit pixel 162 has a large curvature. In general, the angle θA of incident light after being refracted by the lens is small in a region where the curvature of the lens is small, and the angle θB of incident light after being refracted by the lens is large in a region where the curvature of the lens is large. Therefore, the focal position of the condenser lens 209 at the center P1 of the photodiode 210 is reduced by reducing the curvature of the region 163 of the condenser lens 209 and increasing the curvature of the region 164 as shown in FIG. Can be brought closer. Thereby, the condensing efficiency to the photodiode 210 can be improved and the sensitivity can be improved.

  Moreover, the manufacturing method of the solid-state imaging device 200 according to Embodiment 2 is the same as the manufacturing method of the solid-state imaging device 100 according to Embodiment 1, and description thereof is omitted.

  In the above description, the centers P1, P2, P3, and P4 of the photodiodes 210, 220, 230, and 240 coincide with the points L1, L2, L3, and L4 having the highest height of the condenser lens 209. , It does not necessarily need to match. For example, in the example shown in FIG. 8, the point L1 (L2, L3, L4) where the height of the condenser lens 209 is the highest is the center C1 (C2, C3, C4) of the unit pixel cell and the photodiode 210 (220, 220). 230, 240). That is, the direction in which the point L1 (L2, L3, L4) having the highest height of the upper surface of the condenser lens with respect to the center C1 (C2, C3, C4) of the unit pixel cell is located is the center C1 of the unit pixel cell. It may be the same as the direction in which the center P1 (P2, P3, P4) of the photodiodes 210, 220, 230, and 240 is located with respect to (C2, C3, C4). Thereby, the condensing position of the condensing lens 209 can be brought close to the center P1 (P2, P3, P4) of the photodiodes 210, 220, 230, and 240. Therefore, since scattering of incident light by the read gates 212, 222, 232, and 242 can be reduced, an improvement in sensitivity can be realized. In addition, variations in sensitivity between the photodiodes 210, 220, 230, and 240 in the pixel cell 254 can be reduced. That is, sensitivity shading can be suppressed.

  In the first embodiment, a solid-state imaging device having a pixel array region having a two-pixel one-cell structure has been described. In the second embodiment, a solid-state imaging device having a pixel array region having a four-pixel one-cell structure has been described. The present invention can be applied to a solid-state imaging device having a pixel array region having a multi-pixel 1-cell structure.

  The present invention can be applied to a solid-state imaging device, and in particular to a CMOS image sensor having a multi-pixel 1-cell structure. Furthermore, the present invention can be applied to a digital still camera, a digital video camera, a Web camera, a camera mounted on a mobile phone, and the like using a CMOS image sensor.

It is a figure which shows the circuit structure of the solid-state imaging device which concerns on Embodiment 1 of this invention. It is a figure which shows the planar structure of the pixel array area | region of the solid-state imaging device which concerns on Embodiment 1 of this invention. It is a figure which shows the cross-section of the pixel array area | region of the solid-state imaging device which concerns on Embodiment 1 of this invention. It is a figure which shows the cross-section of the condensing lens of the solid-state imaging device which concerns on Embodiment 1 of this invention. It is a figure which shows the cross-sectional structure of the solid-state imaging device which concerns on Embodiment 1 of this invention, and the light quantity which injects into each position on a pixel. It is a figure which shows the manufacturing method of the condensing lens of the solid-state imaging device which concerns on Embodiment 1 of this invention. It is a figure which shows the circuit structure of the solid-state imaging device which concerns on Embodiment 2 of this invention. It is a figure which shows the planar structure of the pixel array area | region of the solid-state imaging device which concerns on Embodiment 2 of this invention. It is a figure which shows the cross-section of the pixel array area | region of the solid-state imaging device which concerns on Embodiment 2 of this invention. It is a figure which shows the circuit structure of the conventional solid-state imaging device. It is a figure which shows the planar structure of the pixel array area | region of the conventional solid-state imaging device. It is a figure which shows the cross-section of the pixel array area | region of the conventional solid-state imaging device. It is a figure which shows the cross-sectional structure of the conventional solid-state imaging device, and the light quantity which injects into each position on a pixel.

Explanation of symbols

100, 200, 500 Solid-state imaging device 101, 501 Semiconductor substrate 102, 105, 107, 502, 505, 507 Insulating film 103, 503 Metal wiring layer 106, 506 Metal light shielding film 108, 508 Color filter 109, 109A, 109B, 109C 109D, 209, 209A, 209B, 209C, 209D, 509, 509A, 509B, 509C, 509D Condensing lens 110, 110A, 110B, 120, 120A, 120B, 210, 220, 230, 240, 510, 510A, 510B 520, 520A, 520B Photodiode 111, 121, 211, 221, 231, 241, 511, 521 Read transistor 113, 513 Detection capacitor 114, 514 Amplification transistor 115, 515 Amplification 116, 516 Reset transistor 117, 517 Reset gate 112, 122, 212, 222, 232, 242, 512, 522 Read gate 151, 251, 551 Pixel array region 152, 552 Vertical scanning unit 153, 553 Horizontal scanning unit 154 154A, 154B, 254, 554, 554A, 554B Pixel cell 160, 260, 261, 560 Unit pixel cell boundary 170 Lens material 171 Positive resist 172 Grayscale mask 262 Pixel cell center point C1, C2, C3, C4 Center of unit pixel cell L1, L2, L3, L4 Point with highest height of condenser lens P1, P2, P3, P4 Center of photodiode

Claims (6)

A solid-state imaging device having a pixel array region in which a plurality of pixel cells are arranged two-dimensionally in a row direction and a column direction,
Each pixel cell is
A plurality of photoelectric conversion regions for converting light into signal charges;
A plurality of readout gates for reading out signal charges converted by the photoelectric conversion regions;
A plurality of condensing lenses for condensing light on each photoelectric conversion region,
The plurality of photoelectric conversion regions included in the plurality of pixel cells are not arranged at an equal pitch in the pixel array region, and are point-symmetric with respect to a center point of the pixel cell in the pixel cell or the pixel cell Arranged symmetrically with respect to the center line of
The points having the highest heights of the upper surfaces of the plurality of condenser lenses included in the plurality of pixel cells are not arranged at an equal pitch in the pixel array region, and are center points of the pixel cells in the pixel cell. A solid-state imaging device, wherein the solid-state imaging device is arranged point-symmetrically with respect to the center line or line-symmetrically with respect to the center line of the pixel cell. Each of the pixel cells includes a plurality of units including a photoelectric conversion region included in the pixel cell, a read gate for reading signal charges in the photoelectric conversion region, and a condenser lens that collects light in the photoelectric conversion region. Including the pixel area,
The direction in which the point having the highest height of the upper surface of the condenser lens included in the unit pixel area with respect to the center of the unit pixel area is included in the unit pixel area with respect to the center of the unit pixel area. The solid-state imaging device according to claim 1, wherein the direction is the same as a direction in which the center of the photoelectric conversion region is located. The solid-state imaging device according to claim 1, wherein the center of the photoelectric conversion region coincides with a point having the highest height of the upper surface of the condenser lens. The shape of the condenser lens is asymmetric with respect to the normal of the highest point of the upper surface of the condenser lens,
4. The curvature at the end of the longer distance from the normal to the end of the condenser lens is greater than the curvature at the shorter end. 5. Solid-state imaging device. A plurality of photoelectric conversion regions for converting light into signal charges, a plurality of readout gates for reading signal charges converted by the respective photoelectric conversion regions, and a plurality of condensing lenses for condensing light in each of the photoelectric conversion regions A solid-state imaging device having a pixel array region in which a plurality of pixel cells are two-dimensionally arranged in a row direction and a column direction,
The photoelectric conversion regions that are not arranged at an equal pitch in the pixel array region and that are arranged point-symmetrically with respect to the center point of the pixel cell or line-symmetrically with respect to the center line of the pixel cell in the pixel cell A first step of forming
A second step of forming the plurality of read gates;
The points having the highest height of the upper surface of the condenser lens are not arranged at an equal pitch in the pixel array region, and are point-symmetric with respect to the center point of the pixel cell in the pixel cell or the center line of the pixel cell A third step of forming a plurality of condensing lenses arranged in line symmetry with respect to the solid-state imaging device. In the third step, the condensing lens having an asymmetric shape with respect to the normal of the highest point of the upper surface of the condensing lens is used with a gray mask having a distribution in which the light transmittance is not constant. The method of manufacturing a solid-state imaging device according to claim 5, wherein the solid-state imaging device is formed.

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