JP2008060198A - Method for manufacturing solid-state imaging device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To easily optimize a shape of a condensing lens, improve the light condensing efficiency, and also improve sensitivity without complicating the manufacturing processes and element structures with respect to the displacement between the condensing lens and the photoelectric converter due to unequally spaced arrangement of pixels. <P>SOLUTION: A microlens, having a deep lens surface, can be formed corresponding to a transistor region 112 by forming a V-shape groove 126 in the horizontal direction, along an enlarged part among pixels in which the transistor region 112 is provided on the occasion of forming the microlens 124. That is, each one of the microlenses has a deep lens surface due to the V-shape groove 126 in the side of the transistor region 112 of each photodiode, and also has a normal shallow lens surface in the opposite side. As a result, the center of microlens can be readily aligned with the center of the photodiode, and the effective surface of the lens of the microlens can be expanded. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a solid-state imaging device such as a CMOS image sensor or a CCD image sensor. Specifically, for example, the pixel pitch is unequal, such as a CMOS image sensor in which an arrangement region of a pixel transistor circuit is shared by a plurality of pixels. The present invention relates to a manufacturing method capable of easily optimizing the condensing position of an on-chip lens or an in-layer lens when formed at intervals.

In general, in a CMOS image sensor, a CCD image sensor, or the like, a solid-state imaging device is provided in which a microlens having a microlens surface for each of a plurality of pixels is mounted.
For example, in a CMOS image sensor, a multilayer wiring layer obtained by laminating various wirings and interlayer insulating films is provided on a semiconductor substrate on which a pixel array portion including a plurality of pixels is formed, and an intralayer lens or a planarizing film is provided thereon. A color filter and an on-chip microlens are arranged through this.
In addition, each pixel includes a photodiode serving as a photoelectric conversion unit, a transfer transistor that transfers signal charges accumulated in the photodiode to an FD (floating diffusion) unit, and an amplification that converts potential fluctuation in the FD unit into a pixel signal. A transistor, a reset transistor that resets the potential of the FD portion, a selection transistor that selects timing for outputting a pixel signal, and the like are formed.
The microlens collects external incident light from the outside onto the light receiving surface of the photodiode of each pixel. In addition to the on-chip microlens, an in-layer lens may be provided as the condensing lens. .

By the way, in such a CMOS image sensor, in order to reduce the size of the element by reducing the pixel pitch, a pixel transistor arrangement region shared by a plurality of pixels is provided. Hereinafter, such an image sensor is referred to as a pixel sharing type image sensor.
FIG. 6 is a plan view showing an example of a region arrangement in such a pixel sharing type image sensor.
The illustrated example shows a configuration example in which one transistor region (TR region) 12 is shared by four pixels 10, and the vertical of four pixel regions arranged adjacently in a 2 × 2 arrangement vertically and horizontally. One transistor region 12 is formed on the side in the direction, and pixel transistors for four pixels are provided.

However, in the pixel sharing type image sensor as described above, the pitch of adjacent pixels (photodiodes) is equally spaced in the horizontal direction, but is expanded in the vertical direction at the portion where the transistor region 12 is provided, The photodiodes are not arranged at equal intervals.
FIG. 7 shows this state. As shown in the figure, a photodiode 10A of each pixel and a transistor region 12 are formed in an upper layer portion of a silicon substrate 14, and the on-chip is formed on the silicon substrate 14 through a laminated film 16 made of wiring or an insulating film. A microlens 18 is formed.
Since the photodiodes 10A are formed in pairs and the transistor regions 12 are formed adjacent to each other in the vertical direction, the photodiodes 10A are not arranged at equal intervals depending on the presence or absence of the transistor regions 12.
As a result, as can be seen from FIG. 7, there is a problem that the center of the photodiode 10A is shifted from the condensing center of the on-chip microlens 18 and the sensitivity is lowered due to the reduction of the condensing efficiency.

Therefore, as a means for correcting the deterioration of the condensing characteristic due to the positional deviation between the on-chip microlens 18 and the photodiode 10A, conventionally, the direction of the incident light from the microlens is changed and incident on the photodiode. Means are provided (see, for example, Patent Document 1).
In this case, lenses are formed with prisms or double pitches, and the light is condensed on photodiodes arranged at non-uniform intervals by bending the direction of light collection.
JP 2005-244947 A

However, the conventional technology has a problem that the manufacturing process is complicated and the configuration is complicated because the light collecting direction is bent separately from the light collecting lens such as a microlens.
Note that it may be possible to simply form a condensing lens such as a microlens at non-equal intervals in accordance with the position of the photodiode, but in this case, an ineffective area having no lens effect is widened, and the condensing efficiency is increased. There was a problem that the sensitivity dropped due to the drop.

  Therefore, the present invention facilitates the shape of the condensing lens without complicating the manufacturing process and the element structure against the positional shift between the condensing lens and the photoelectric conversion unit due to the non-equal spacing of the pixels as described above. It is an object of the present invention to provide a method of manufacturing a solid-state imaging device that can be optimized, improve light collection efficiency, and achieve improved sensitivity.

  In order to achieve the above-described object, according to the method for manufacturing a solid-state imaging device of the present invention, a plurality of pixels each including a photoelectric conversion unit are arranged in a two-dimensional direction, and the interval between pixel columns or pixel rows is larger than other regions. A method for manufacturing a solid-state imaging device, comprising: a pixel array unit having a region; and a lens array that is arranged on the pixel array unit via a laminated film and includes microlenses corresponding to the plurality of pixels, When forming the lens array, a groove is formed on the upper surface of the lens material before forming the microlens along a region where the interval between the pixel columns or pixel rows is enlarged, and then the microlens is formed. To do.

According to the method for manufacturing a solid-state imaging device of the present invention, when forming the lens array, the groove is formed on the upper surface of the lens material before forming the microlens along the region where the interval between the pixel columns or the pixel rows is increased, and thereafter Since the minute lens is formed, the lens surface of the minute lens is expanded by the inner surface of the groove portion in the region where the pixel interval is enlarged, and the incident light can be effectively guided to the photoelectric conversion unit. .
As a result, it is possible to correct the misalignment between the microlens and the photoelectric conversion unit without complicating the manufacturing process and element structure, easily optimize the lens shape, and improve the light collection efficiency by expanding the effective lens area. In addition, the sensitivity can be improved.

FIG. 1 is a cross-sectional view showing a method of manufacturing a solid-state imaging device according to an embodiment of the present invention, and shows an example in which the present invention is applied to a pixel sharing type CMOS image sensor.
2 to 5 are diagrams showing an example of a pixel sharing type CMOS image sensor manufactured by the manufacturing method shown in FIG. 1, FIG. 2 is a block diagram showing an outline of the whole element, and FIG. 3 shows a pixel configuration. FIG. 4 is a circuit diagram, FIG. 4 is a plan view showing a shared structure of transistor regions, and FIG. 5 is a cross-sectional view showing an opposing structure of a photodiode and a microlens.

First, a pixel sharing type CMOS image sensor employed in the present embodiment will be described with reference to FIGS.
As shown in FIG. 2, the CMOS image sensor includes an imaging region 100 in which a plurality of pixels 110 including photodiodes (photoelectric conversion units) are arranged in a two-dimensional direction on the same chip to form a pixel array unit, A peripheral circuit region 200 formed outside the imaging region 100 is provided.
In the peripheral circuit region 200, a vertical selection drive circuit 210 that supplies various control pulses to the pixel array unit to read out pixel signals for each pixel column, and column signals read from the pixel array unit. A column signal processing unit 220 that performs signal processing such as noise processing, a horizontal scanning circuit 230 that transfers the pixel signal processed by the column signal processing unit 220 in the horizontal direction, and a pixel signal that is transferred from the horizontal scanning circuit 230 An output processing unit 240 that converts the video signal to output and a timing generator 250 that supplies a timing signal to each unit are provided.

  As shown in FIG. 3, each pixel 110 in the imaging region 100 generates a photodiode 111 that generates a signal charge corresponding to the amount of received light, and reads the signal charge of the photodiode 111 into an FD (floating diffusion). Pixel transistors such as a read transistor (transfer gate) 112, an amplification transistor 113 that generates a pixel signal corresponding to the potential of the FD, a selection transistor 114 that selects the output timing of the pixel signal, and a reset transistor 115 that resets the FD are provided. Further, wiring and other elements for exchanging various signals and power between the pixel array section and the peripheral circuit area are provided.

As shown in FIGS. 4 and 5, the photodiode 111 and the transistor region 112 of each pixel are formed in the upper layer portion of the silicon substrate 120, and the silicon substrate 120 is laminated with wiring and an insulating film. An on-chip microlens 124 is formed through the film 122.
As shown in FIG. 4, this example shows a configuration example in which one pixel region 112 is shared by four pixels 110, and four pixels arranged adjacently in a 2 × 2 arrangement vertically and horizontally. One transistor region 112 is formed adjacent to the vertical direction of the region, and pixel transistors for four pixels are provided. Therefore, in this image sensor, the pitch of adjacent pixels (photodiodes 111) is equal in the horizontal direction, but is enlarged in the vertical direction at the portion where the transistor region 112 is provided. It will not be arranged at equal intervals.

Therefore, in this example, when the microlens 124 is formed, a horizontal groove portion (hereinafter referred to as a V-shaped groove) 126 having, for example, a V-shaped cross section is formed along the enlarged portion between the pixels in which the transistor region 112 is provided. Thus, as shown in FIG. 5, a microlens having a deep lens surface corresponding to the transistor region 112 is formed.
That is, each lens of the microlens has a deep lens surface due to the V-shaped groove 126 on the transistor region 112 side of each photodiode, and has a normal shallow lens surface on the opposite side, resulting in FIG. As indicated by the broken line, the center of the microlens and the center of the photodiode can be easily matched, and the effective lens surface of the microlens can be enlarged.

Next, the manufacturing method of the solid-state imaging device of this example will be described with reference to FIG.
First, in FIG. 1A, a V-shaped groove 126 is formed by a photolithography process in a state where a lens base layer 130 made of a lens material such as a transparent resin is formed on an unillustrated base layer (flattened surface). The resist film 132 is patterned with a photosensitive resin or the like. This pattern is a pattern having a straight gap 132A along the position where the V-shaped groove 126 is formed.
Next, in FIG. 1B, isotropic etching is performed to form a V-shaped groove 126 </ b> A in the lens base layer 130. Thereafter, the resist film 132 is removed. Note that the V-shaped groove 126A at this time is deformed by a subsequent reflow process or the like, and finally becomes the V-shaped groove 126 integrated with the lens surface.

Next, in FIG. 1C, a resist film 134 made of a heat-meltable photosensitive resin for forming a microlens is patterned by a photolithography process. Then, in FIG. 1D, the resist film 134 is subjected to a hot melt reflow process to form a lens shape by surface tension.
Thereafter, in FIG. 1E, etch back is performed to transfer the lens shape of the resist film 134 to the lens base layer 130. Note that by selecting a lens material (transparent resin or the like) as the resist material, it is possible to complete at the stage of FIG. 1D without performing etch back.

As a result, a microlens 124 similar to the microlens shown in FIG. 4 can be formed. In this example, the inner surface of the V-shaped groove 126A is formed continuously with the lens surface of the microlens 124 and forms a part of the lens by selecting the etching conditions and the like as shown in the figure. Has an expanding role.
In FIG. 1E, a color filter 123 is formed in the lower layer of the microlens 124, and a laminated film 122 of multilayer wiring is formed thereunder, but this is not directly related to the present invention. Details are omitted.

In the above, the case where the present invention is applied to a CMOS image sensor has been described. However, the present invention is not necessarily limited to a CMOS image sensor, and may be applied to a method for manufacturing other solid-state imaging devices having non-uniformly spaced pixel arrays. It can be done.
In addition, the same manufacturing method can be applied to the in-layer lens instead of the on-chip lens as described above, and when the on-chip lens and the in-layer lens are provided, both or On the other hand, the manufacturing method of the present invention can be applied.
In the above-described example, the V-shaped groove is used as the groove for correcting the lens shape. However, a groove having another cross-sectional shape may be used as long as the same action can be obtained. The direction and size of the groove can be selected as appropriate.
The solid-state imaging device is not limited to a CCD image sensor or CMOS image sensor configured on one chip, and may be a module in which an imaging unit, a signal processing unit, and an optical system are packaged together. In addition, the imaging target includes one that performs fingerprint detection and the like.
In addition to such an image sensor (solid-state imaging device) alone, an imaging device (for example, a digital camera) combined with an image sensor and other modules (for example, a function unit such as an operation unit, communication, or display) By applying the manufacturing method of the present invention to a device, a mobile phone device, etc., there is an effect that a device having an imaging function with high sensitivity can be provided.

It is sectional drawing which shows the manufacturing method of the solid-state imaging device (CMOS image sensor) by embodiment of this invention. It is a block diagram which shows the outline | summary of the whole element of a pixel sharing type CMOS image sensor produced with the manufacturing method shown in FIG. FIG. 3 is a circuit diagram showing a pixel configuration of the pixel sharing type CMOS image sensor shown in FIG. 2. FIG. 3 is a plan view showing a shared structure of transistor regions of the pixel sharing type CMOS image sensor shown in FIG. 2. It is sectional drawing which shows the opposing structure of the photodiode and micro lens of the pixel sharing type CMOS image sensor shown in FIG. It is a top view which shows the shared structure of the transistor area | region of the conventional pixel sharing type CMOS image sensor. It is sectional drawing which shows the opposing structure of the photodiode and micro lens of the pixel sharing type CMOS image sensor shown in FIG.

Explanation of symbols

122... Laminated film, 123... Color filter, 124... Microlens, 126 and 126 A... V-shaped groove, 130 ... Lens base layer, 132 and 134.

Claims (7)

A plurality of pixels each including a photoelectric conversion unit are arranged in a two-dimensional direction, and a pixel array unit having a region in which the interval between pixel columns or pixel rows is larger than other regions;
A method of manufacturing a solid-state imaging device including a lens array that is arranged on the pixel array unit via a laminated film and includes microlenses corresponding to the plurality of pixels,
When forming the lens array, a groove is formed on the upper surface of the lens material before forming the microlens along the region where the interval between the pixel columns or pixel rows is enlarged, and then the microlens is formed.
A method of manufacturing a solid-state imaging device.   The solid-state imaging device has a photoelectric conversion unit and a pixel transistor circuit for reading out signal charges generated by the photoelectric conversion unit in each pixel, and an interval between the pixel columns or pixel rows is larger than other regions. 2. The method for manufacturing a solid-state imaging device according to claim 1, wherein the region is a shared transistor region in which pixel transistor circuits of a plurality of pixels are formed together.   2. The method of manufacturing a solid-state imaging device according to claim 1, wherein the groove is formed in a V-shaped step section.   The method of manufacturing a solid-state imaging device according to claim 1, wherein a lens surface of the minute lens is formed continuously with an inner surface of the groove portion.   The method of manufacturing a solid-state imaging device according to claim 1, wherein the lens array is an on-chip lens array formed on a laminated film.   The method for manufacturing a solid-state imaging device according to claim 1, wherein the lens array is an in-layer lens array formed in a laminated film. Forming a lens base layer made of a lens material on the base film;
Forming a groove along a region where an interval between the pixel columns or pixel rows is enlarged on an upper surface of the lens base layer;
Forming a microlens on the upper surface of the lens base layer;
The method of manufacturing a solid-state imaging device according to claim 1, wherein:

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