JP5285016B2 - Wiring board - Google Patents
Wiring board Download PDFInfo
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- JP5285016B2 JP5285016B2 JP2010090823A JP2010090823A JP5285016B2 JP 5285016 B2 JP5285016 B2 JP 5285016B2 JP 2010090823 A JP2010090823 A JP 2010090823A JP 2010090823 A JP2010090823 A JP 2010090823A JP 5285016 B2 JP5285016 B2 JP 5285016B2
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- Prior art keywords
- wiring board
- via conductor
- conductor
- ceramic
- copper
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- 239000004020 conductor Substances 0.000 claims description 134
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 68
- 239000000919 ceramic Substances 0.000 claims description 68
- 239000010949 copper Substances 0.000 claims description 63
- 229910052802 copper Inorganic materials 0.000 claims description 62
- 239000002245 particle Substances 0.000 claims description 44
- 238000007747 plating Methods 0.000 claims description 36
- 239000000126 substance Substances 0.000 claims description 30
- 238000010304 firing Methods 0.000 claims description 19
- 239000004065 semiconductor Substances 0.000 claims description 17
- 239000011521 glass Substances 0.000 description 21
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 20
- 230000000052 comparative effect Effects 0.000 description 16
- 239000000203 mixture Substances 0.000 description 16
- 238000000034 method Methods 0.000 description 15
- 229910001873 dinitrogen Inorganic materials 0.000 description 8
- 230000000694 effects Effects 0.000 description 8
- 229910004298 SiO 2 Inorganic materials 0.000 description 7
- 239000011230 binding agent Substances 0.000 description 7
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 7
- 239000000654 additive Substances 0.000 description 6
- 239000012298 atmosphere Substances 0.000 description 6
- 239000002241 glass-ceramic Substances 0.000 description 6
- 229910010272 inorganic material Inorganic materials 0.000 description 6
- 239000011147 inorganic material Substances 0.000 description 6
- 229910052757 nitrogen Inorganic materials 0.000 description 6
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 5
- 239000010408 film Substances 0.000 description 5
- 230000000996 additive effect Effects 0.000 description 4
- 230000005540 biological transmission Effects 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 229910052573 porcelain Inorganic materials 0.000 description 4
- 238000005245 sintering Methods 0.000 description 4
- 239000000758 substrate Substances 0.000 description 4
- YXFVVABEGXRONW-UHFFFAOYSA-N Toluene Chemical compound CC1=CC=CC=C1 YXFVVABEGXRONW-UHFFFAOYSA-N 0.000 description 3
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 3
- 230000007547 defect Effects 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 239000012299 nitrogen atmosphere Substances 0.000 description 3
- 239000000843 powder Substances 0.000 description 3
- 239000002002 slurry Substances 0.000 description 3
- 238000005219 brazing Methods 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 2
- DOIRQSBPFJWKBE-UHFFFAOYSA-N dibutyl phthalate Chemical compound CCCCOC(=O)C1=CC=CC=C1C(=O)OCCCC DOIRQSBPFJWKBE-UHFFFAOYSA-N 0.000 description 2
- 238000007606 doctor blade method Methods 0.000 description 2
- 230000017525 heat dissipation Effects 0.000 description 2
- 230000001771 impaired effect Effects 0.000 description 2
- 238000001465 metallisation Methods 0.000 description 2
- 239000011812 mixed powder Substances 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- 239000004925 Acrylic resin Substances 0.000 description 1
- 229920000178 Acrylic resin Polymers 0.000 description 1
- 229910010413 TiO 2 Inorganic materials 0.000 description 1
- 229910052783 alkali metal Inorganic materials 0.000 description 1
- 150000001340 alkali metals Chemical class 0.000 description 1
- 229910052784 alkaline earth metal Inorganic materials 0.000 description 1
- 150000001342 alkaline earth metals Chemical class 0.000 description 1
- WUOACPNHFRMFPN-UHFFFAOYSA-N alpha-terpineol Chemical compound CC1=CCC(C(C)(C)O)CC1 WUOACPNHFRMFPN-UHFFFAOYSA-N 0.000 description 1
- 238000010344 co-firing Methods 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- SQIFACVGCPWBQZ-UHFFFAOYSA-N delta-terpineol Natural products CC(C)(O)C1CCC(=C)CC1 SQIFACVGCPWBQZ-UHFFFAOYSA-N 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 239000006185 dispersion Substances 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 230000009477 glass transition Effects 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 230000001788 irregular Effects 0.000 description 1
- 238000005304 joining Methods 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000013508 migration Methods 0.000 description 1
- 230000005012 migration Effects 0.000 description 1
- 239000012046 mixed solvent Substances 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 239000004014 plasticizer Substances 0.000 description 1
- 229920000205 poly(isobutyl methacrylate) Polymers 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 229940116411 terpineol Drugs 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
- H01L2924/15172—Fan-out arrangement of the internal vias
- H01L2924/15174—Fan-out arrangement of the internal vias in different layers of the multilayer substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Description
本発明は、絶縁層を介して積層された導体層(配線パターン)間を接続するために、セラミックグリーンシートに形成したビアホール孔に充填されて同時焼成される銅ペーストを用いた配線基板に関するものである。 The present invention relates to a wiring board using a copper paste that is filled in via hole holes formed in a ceramic green sheet and simultaneously fired to connect between conductor layers (wiring patterns) laminated via an insulating layer. It is.
近年、配線基板は、情報通信の高速化に伴い、GHz帯以上の高周波領域で使用され、伝送損失の低減が要求されている。このため、配線基板は、比較的低い誘電率をもつセラミック基板上に、導体抵抗が低くて低融点な金属である銀や銅等から成る導体層を形成することにより作製されている。また、回路の高密度実装化や多層化が進むにしたがい、銀よりも耐マイグレーション性に優れた銅を導体層やビア導体に用いた配線基板が要求されている。 2. Description of the Related Art In recent years, wiring boards have been used in a high-frequency region of the GHz band or higher with the increase in information communication speed, and reduction of transmission loss is required. For this reason, the wiring board is produced by forming a conductor layer made of silver, copper or the like, which is a metal having a low conductor resistance and a low melting point, on a ceramic substrate having a relatively low dielectric constant. Further, as the circuit density is increased and the number of layers is increased, there is a demand for a wiring board using copper, which has better migration resistance than silver, as a conductor layer and a via conductor.
配線基板を多層化する場合には、セラミック層と導体層とを交互に積層し、セラミック層を介して重なり合う導体層を、セラミック層を貫通して形成されたビア導体により接続する。 When the wiring board is multilayered, the ceramic layers and the conductor layers are alternately laminated, and the conductor layers overlapping via the ceramic layers are connected by via conductors formed through the ceramic layers.
銅を導体層やビア導体に用いた配線基板を作製するには、銅の酸化を抑制しつつ、有機成分の除去を効率良く行う必要がある。この方法としては、例えば、湿潤窒素雰囲気中(水蒸気と窒素の混合雰囲気中)で焼成する方法が知られている。 In order to produce a wiring board using copper as a conductor layer or via conductor, it is necessary to efficiently remove organic components while suppressing copper oxidation. As this method, for example, a method of firing in a wet nitrogen atmosphere (in a mixed atmosphere of water vapor and nitrogen) is known.
即ち、この方法では、まず、セラミック原料粉末と有機バインダー、溶媒等を用いて調製したスラリーを作製し、ドクターブレード法等のシート成形法によりセラミックグリーンシートを成形する。次いで、このセラミックグリーンシートにビアホール孔を形成し、このビアホール孔に銅ペーストを充填し乾燥させて焼成前のビア導体を形成する。そして、さらに、セラミクグリンシートの表面に銅ペーストを用いて配線パターンと成る導体層を印刷して乾燥させ、ビア導体と導体層とが接続されたセラミックグリーンシートを形成する。次いで、セラミックグリーンシートを、複数積層して積層体とし、この積層体を水蒸気と窒素ガスの混合雰囲気中において、数百℃の温度で脱バインダーを行って銅ペースト及びセラミックグリーンシートに含有される有機成分を除去し、略1000℃以上に昇温して焼成を行う。これにより、セラミック層を介して積層された導体層がビア導体により接続され、多層化された配線基板が作製される。 That is, in this method, first, a slurry prepared using a ceramic raw material powder, an organic binder, a solvent and the like is prepared, and a ceramic green sheet is formed by a sheet forming method such as a doctor blade method. Next, via hole holes are formed in the ceramic green sheet, and the via hole holes are filled with a copper paste and dried to form a via conductor before firing. Further, a conductor layer serving as a wiring pattern is printed on the surface of the ceramic glue sheet using copper paste and dried to form a ceramic green sheet in which the via conductor and the conductor layer are connected. Next, a plurality of ceramic green sheets are laminated to form a laminated body, and this laminated body is debindered at a temperature of several hundred degrees Celsius in a mixed atmosphere of water vapor and nitrogen gas and contained in the copper paste and the ceramic green sheet. The organic component is removed and the temperature is raised to about 1000 ° C. or higher and firing is performed. Thereby, the conductor layers laminated via the ceramic layers are connected by the via conductors, and a multilayered wiring board is manufactured.
このように作製された配線基板は、焼成工程においてビア導体となる銅と絶縁層となるセラミック層との焼結温度及び焼成収縮のタイミングが異なるので、焼成によってビア導体が配線基板の表面から突き出してしまう突き上げという問題が発生しやすい。そこで、この問題を改善するための銅メタライズ組成物及びそれを用いたガラスセラミック配線基板が知られている。 The wiring board thus fabricated has different sintering temperatures and firing shrinkage timings between the copper serving as the via conductor and the ceramic layer serving as the insulating layer in the firing process, so that the via conductor protrudes from the surface of the wiring board by firing. The problem of pushing up is likely to occur. Then, the copper metallized composition for improving this problem and the glass ceramic wiring board using the same are known.
例えば、ガラスセラミック磁器と銅メタライズ組成物の焼成収縮挙動を整合してガラスセラミック配線基板の表面からビア導体の突き上げを低減するため、主成分の銅粉末100重量部に対してガラス転移点が700〜750℃のSiO2−Al2O3−RO(R:ア
ルカリ土塁金属)−B2O3系ガラスフリットを2〜20重量部含有したビアホール用の銅メタライズ組成物及びこの銅メタライズ組成物を用いて700〜1000℃の温度でガラスセラミック磁器と同時焼成したガラスセラミック配線基板がある(例えば、特許文献1参照)。
For example, in order to reduce firing of the via conductor from the surface of the glass ceramic wiring board by matching the firing shrinkage behavior of the glass ceramic porcelain and the copper metallized composition, the glass transition point is 700 with respect to 100 parts by weight of the main component copper powder. to 750 ° C. of SiO 2 -Al 2 O 3 -RO ( R: alkaline earth metal) -B 2 O 3 based copper metallization composition for via holes and the glass frit contains 2-20 parts by weight and the copper metallization composition There is a glass-ceramic wiring board that is co-fired with a glass-ceramic porcelain at a temperature of 700 to 1000 ° C. (for example, see Patent Document 1).
配線基板の小型化や伝送信号の高速化が進むにつれ、配線基板上に露出したビア導体上にメッキをして回路端子を形成し、この回路端子の上面に半導体の端子を重ねて半田で直接接合するフリチップ構造が要求されている。 As the size of the wiring board is reduced and the transmission signal speed increases, plating is performed on the via conductor exposed on the wiring board to form a circuit terminal, and a semiconductor terminal is superimposed on the upper surface of the circuit terminal and directly soldered. There is a demand for a free chip structure for bonding.
しかしながら、特許文献1に開示された銅メタライズ組成物及びそれを用いたガラスセラミック配線基板によれば、銅メタライズ組成物にガラスフリットを添加しているので、ビア導体の表面にガラスが浮き出して残留し易く、ビアホール電極面にメッキ処理を行って配線回路を形成する場合、メッキ処理が困難になるという問題点がある。 However, according to the copper metallized composition disclosed in Patent Document 1 and the glass-ceramic wiring board using the copper metallized composition, glass frit is added to the copper metallized composition, so that the glass floats on the surface of the via conductor and remains. When the wiring circuit is formed by plating the via hole electrode surface, the plating process becomes difficult.
本発明は、前記問題点を解決するもので、ビア導体に銅を用いた配線基板において、焼成によるビア導体の突き上げを低減でき、ビア導体表面にガラスの浮き出しがなくメッキ処理が容易にできる銅ペーストを用いた配線基板を提供することを目的とするものである。 The present invention solves the above-mentioned problems, and in a wiring board using copper as a via conductor, the push-up of the via conductor due to firing can be reduced, and there is no protrusion of glass on the via conductor surface, and the copper can be easily plated. An object of the present invention is to provide a wiring board using a paste.
かかる目的を達成するためになされた請求項1に記載の発明は、セラミック配線基板であって、焼成後に形成される銅を含むビア導体の内部に、配線基板の厚み方向の断面において、ビア導体に分散されている粒径2μm以上の、予め銅ペーストに含有されたセラミック粒子や、セラミックグリーンシートに含有されビア導体に拡散された無機成分が集まってできた無機物が存在し、粒径2μm以上の無機物の合計面積が、該ビア導体の断面積の10%以下、粒径5μm以上の無機物の合計面積が、該ビア導体の断面積の5%以下であり、かつ、粒径10μm以上の無機物の合計面積が、該ビア導体の断面積の2%以下であることを特徴とする配線基板である。 The invention according to claim 1, which has been made to achieve such an object, is a ceramic wiring board, wherein a via conductor is formed in a cross section in the thickness direction of the wiring board inside a via conductor containing copper formed after firing. above particle size 2μm being dispersed, and ceramic particles contained in the pre-copper paste, there are inorganic materials inorganic component diffused in the via conductor is contained is Deki gathered ceramic green sheet, the particle size 2μm or more The total area of the inorganic substance is 10% or less of the cross-sectional area of the via conductor, the total area of the inorganic substance having a particle diameter of 5 μm or more is 5% or less of the cross-sectional area of the via conductor, and the inorganic substance has a particle diameter of 10 μm or more. The total area of the wiring board is 2% or less of the cross-sectional area of the via conductor.
請求項1に記載の配線基板によれば、配線基板の厚み方向の断面において、ビア導体に分散されている粒径2μm以上の、予め銅ペーストに含有されたセラミック粒子や、セラミックグリーンシートに含有されビア導体に拡散された無機成分が集まってできた無機物の合計面積が、ビア導体の断面積の10%以下、かつ、粒径5μm以上の無機物の合計面積が、該ビア導体の断面積の5%以下であり、さらに、粒径10μm以上の無機物の合計面積が、該ビア導体の断面積の2%以下であるので、この無機物の一部がビア導体表面に露出しても、このビア導体表面のメッキ性を損なうことが無く、メッキ処理が容易に行えるという作用効果が得られる。
尚、この無機物は、球状または略球状あるいは不定形でビア導体内に存在し、その形状は略円径であることが多いので、その長径を無機物の大きさとしてよい。ただし、無機物の断面が円形で現れない場合には、その面積を円形に換算して得られた直径(d)つまり、無機物の断面積=π(d/2) 2 の関係から、d=2×(無機物の断面積/π) 0.5 を無機物の大きさとする。
According to the wiring board according to claim 1, in the cross-section in the thickness direction of the wiring board, the particle diameter of 2 μm or more dispersed in the via conductor is previously contained in the ceramic paste or in the ceramic green sheet. The total area of the inorganic substance formed by collecting the inorganic components diffused in the via conductor is 10% or less of the cross-sectional area of the via conductor and the total area of the inorganic substance having a particle diameter of 5 μm or more is the cross-sectional area of the via conductor. 5% or less, and furthermore, the total area of the inorganic substance having a particle diameter of 10 μm or more is 2% or less of the cross-sectional area of the via conductor. Therefore, even if a part of the inorganic substance is exposed on the via conductor surface, this via There is obtained an effect that the plating process can be easily performed without impairing the plating property of the conductor surface.
In addition, since this inorganic substance exists in the via conductor in a spherical shape, a substantially spherical shape, or an indefinite shape, and its shape is often a substantially circular diameter, the major axis may be the size of the inorganic substance. However, when the cross section of the inorganic substance does not appear circular, the diameter (d) obtained by converting the area into a circle, that is, the cross section area of the inorganic substance = π (d / 2) 2 , d = 2 X (Cross sectional area of inorganic substance / π) 0.5 is the size of the inorganic substance.
請求項2に記載の発明は、請求項1に記載の配線基板において、ビア導体が、配線基板の少なくとも一方の表面に露出し、この露出面に、その形状が球状又は略球状である場合は、その長径が、また、不定形である場合には、その断面を円形に換算して得られた直径が10μm以下の、予め銅ペーストに含有されたセラミック粒子や、セラミックグリーンシートに含有されビア導体に拡散された無機成分が集まってできた無機物が露出していることを特徴とする。 According to a second aspect of the present invention, in the wiring board according to the first aspect, when the via conductor is exposed on at least one surface of the wiring board and the shape of the via conductor is spherical or substantially spherical. When the major axis is irregular, the diameter obtained by converting the cross section into a circle is 10 μm or less, the ceramic particles previously contained in the copper paste, and the via contained in the ceramic green sheet. An inorganic substance formed by collecting inorganic components diffused in the conductor is exposed.
請求項2に記載の配線基板は、ビア導体の表面に露出する無機物の大きさが10μm以下であるので、ビア導体の表面のメッキ性を損なうことが無く、ピンホール等の欠陥の少ないメッキ皮膜が容易に形成できるという作用効果が得られる。 In the wiring board according to claim 2, since the size of the inorganic material exposed on the surface of the via conductor is 10 μm or less, the plating film on the surface of the via conductor is not impaired and the plating film with few defects such as pinholes is provided. The effect that can be formed easily is obtained.
なお本発明は、ビア導体はそのまま実装端子として利用してよいが、さらにその上に実装パッドを同時焼成法や厚膜法により形成した構成としてもよい。実装パッドの表面に無機物が殆ど拡散してこないため、やはり良好なメッキ皮膜を形成することができる。 In the present invention, the via conductor may be used as a mounting terminal as it is, but a mounting pad may be further formed thereon by a simultaneous firing method or a thick film method. Since the inorganic substance hardly diffuses on the surface of the mounting pad, a good plating film can be formed.
請求項3に記載の発明は、請求項1又は請求項2に記載の配線基板において、ビア導体が、配線基板の少なくとも一方の表面に露出し、この露出した上面にメッキ層が形成されたことを特徴とする。 The invention according to claim 3 is the wiring board according to claim 1 or 2, wherein the via conductor is exposed on at least one surface of the wiring board, and a plating layer is formed on the exposed upper surface. It is characterized by.
請求項3に記載の配線基板によれば、ビア導体の表面に無機物の残留が少ないため容易にメッキ処理ができ、メッキムラやピンホール等の欠損、剥離などの欠陥がなく良好なメッキ層を形成できるので、温度負荷、湿度負荷、熱負荷などの耐久性に優れた実装基板を構成できるという作用効果が得られる。 According to the wiring substrate of claim 3 , since there is little inorganic residue on the surface of the via conductor, the plating process can be easily performed, and a good plating layer is formed without defects such as plating unevenness, pinhole defects, and peeling. Therefore, it is possible to obtain an effect that a mounting board having excellent durability such as temperature load, humidity load, and heat load can be configured.
なお本発明は、メッキ層を形成したビア導体はそのまま実装端子として利用してよいが、ビアホール上に実装パッドを形成してからメッキ層を形成した構成としてもよい。実装パッドの表面に無機物が殆ど拡散してこないため、やはり良好なメッキ皮膜を形成することができる。 In the present invention, the via conductor on which the plated layer is formed may be used as a mounting terminal as it is, but the plated layer may be formed after the mounting pad is formed on the via hole. Since the inorganic substance hardly diffuses on the surface of the mounting pad, a good plating film can be formed.
請求項4に記載の発明は、請求項3に記載の配線基板において、半導体素子が搭載され、この半導体素子の端子と前記ビア導体とが接合材を介して接続されたことを特徴とする
請求項4に記載の配線基板によれば、ビア導体の導体抵抗が低く、このビア導体を、ハンダ、ロー材等の接合部材を介して半導体素子の端子に接続しているので、半導体の電気特性にバラツキや劣化を生じることなく信頼性に優れた配線基板を構成できるという作用効果が得られる。
According to a fourth aspect of the present invention, in the wiring board according to the third aspect , a semiconductor element is mounted, and a terminal of the semiconductor element and the via conductor are connected via a bonding material. According to the wiring board described in Item 4 , since the conductor resistance of the via conductor is low and the via conductor is connected to the terminal of the semiconductor element via a joining member such as solder or brazing material, the electrical characteristics of the semiconductor In addition, there can be obtained an operational effect that a highly reliable wiring board can be configured without causing variation and deterioration.
請求項5に記載の発明は、請求項1乃至請求項4の何れか記載の配線基板において、ビア導体が、熱伝導路となるサーマルビアとして構成されたことを特徴とする。
請求項5に記載の配線基板によれば、ビア導体が緻密に焼成されて熱伝導率も高くなっているので、高密度実装型配線基板において、サーマルビアとして構成すると放熱効果が優れた配線基板が得られるという作用効果が得られる。
According to a fifth aspect of the present invention, in the wiring board according to any one of the first to fourth aspects, the via conductor is configured as a thermal via serving as a heat conduction path.
According to the wiring board according to claim 5 , since the via conductor is densely baked to increase the thermal conductivity, the wiring board is excellent in the heat dissipation effect when configured as a thermal via in the high-density mounting type wiring board. Is obtained.
以下に、一実施例を用いて本発明について説明する。
「セラミックグリーンシートの作製」
まず、SiO2が63.3質量部、B2O3が24.1質量部、Al2O3が5.7質量部
、CaOが6.9質量部の組成を有するガラス粉末50質量部と、アルミナフィラー50質量部とを混合させて、粒径2.5μm、アルカリ金属不純物含有量が0.2mol%以下のアルミナとガラスの混合粉末を準備した。
Hereinafter, the present invention will be described with reference to one embodiment.
"Production of ceramic green sheets"
First, 50 parts by mass of glass powder having a composition of 63.3 parts by mass of SiO 2 , 24.1 parts by mass of B 2 O 3 , 5.7 parts by mass of Al 2 O 3 , and 6.9 parts by mass of CaO; Then, 50 parts by mass of an alumina filler was mixed to prepare a mixed powder of alumina and glass having a particle size of 2.5 μm and an alkali metal impurity content of 0.2 mol% or less.
次いで、アルミナとガラスの混合粉末100質量部に対して、アクリル樹脂から成るバインダーを20質量部とフタル酸ジブチルから成る可塑剤10質量部、適量のトルエン・MEK混合溶媒とを加えスラリーを作製した。 Next, 20 parts by mass of an acrylic resin binder, 10 parts by mass of a plasticizer consisting of dibutyl phthalate, and an appropriate amount of a toluene / MEK mixed solvent were added to 100 parts by mass of the mixed powder of alumina and glass to prepare a slurry. .
次いで、前記スラリーを用いてドクターブレード法等のシート成形により厚さ250μmのセラミックグリーンシートを成形した。このセラミックグリーンシートは、比較的低温(ここでは、1000℃をいう)で焼成できる低温焼成用のグリーンシートである。 Next, a ceramic green sheet having a thickness of 250 μm was formed by sheet forming such as a doctor blade method using the slurry. This ceramic green sheet is a green sheet for low-temperature firing that can be fired at a relatively low temperature (here, 1000 ° C.).
「銅ペーストの作製」
次いで、平均粒径5μmの球状銅紛100質量部に対して、ビヒクルを12質量部と(表1)に表した添加剤とを加え、3本ロールミルで混合して銅ペーストを作製した。なお、ビヒクルは70質量部のテルピネオールに30質量部のポリイソブチルメタクリレートを溶解して調整した。また、銅粉100質量部に対するビヒクルの添加量は、所定の粘度(5000ポイズ〜100万ポイズ)が得られるように設定した。ビヒクルの添加量12質量部、14質量部、16質量部の際、銅ペーストの粘度はそれぞれ、80万ポイズ、6万ポイズ、5000ポイズであった。
"Preparation of copper paste"
Next, 12 parts by mass of the vehicle and the additives shown in (Table 1) were added to 100 parts by mass of the spherical copper powder having an average particle size of 5 μm, and mixed with a three roll mill to prepare a copper paste. The vehicle was prepared by dissolving 30 parts by mass of polyisobutyl methacrylate in 70 parts by mass of terpineol. Moreover, the addition amount of the vehicle with respect to 100 mass parts of copper powder was set so that a predetermined | prescribed viscosity (5000 poise-1 million poise) might be obtained. When the addition amount of the vehicle was 12 parts by weight, 14 parts by weight, and 16 parts by weight, the viscosity of the copper paste was 800,000 poise, 60,000 poise, and 5000 poise, respectively.
実施例Aは、セラミック粒子として平均粒径13nmのAl2O3を1.0質量部添加した銅ペーストである。
実施例Bは、セラミック粒子として平均粒径21nmのTiO2を1.0質量部添加し
た銅ペーストである。
Example A is a copper paste to which 1.0 part by mass of Al 2 O 3 having an average particle diameter of 13 nm is added as ceramic particles.
Example B is a copper paste to which 1.0 part by mass of TiO 2 having an average particle diameter of 21 nm is added as ceramic particles.
実施例C〜Fは、セラミック粒子として平均粒径12nmのSiO2を添加し、このと
き、SiO2の添加量を0.2質量部〜2.0質量部の範囲で変化させて添加した銅ペー
ストである。
In Examples C to F, SiO 2 having an average particle diameter of 12 nm was added as ceramic particles, and at this time, the amount of SiO 2 added was changed in the range of 0.2 to 2.0 parts by mass. It is a paste.
比較例Aは、添加剤を添加していない銅ペーストである。
比較例Bは、セラミック粒子として平均粒径300nmのAl2O3を1.0質量部添加した銅ペーストである。
Comparative Example A is a copper paste to which no additive is added.
Comparative Example B is a copper paste to which 1.0 part by mass of Al 2 O 3 having an average particle size of 300 nm is added as ceramic particles.
比較例C、Dは、セラミックグリーンシートの作製において添加したガラス粉末と同一の組成を有し、粒径が800nmのガラスフリットを、添加量を1.0質量部、5.0質量部と変化させて添加した銅ペーストである。 Comparative Examples C and D have the same composition as the glass powder added in the production of the ceramic green sheet, and the glass frit having a particle size of 800 nm is changed in addition amount to 1.0 part by mass and 5.0 parts by mass. This is a copper paste added.
「焼成サンプルの作製」
次いで、前記のグリーンシートと銅ペーストを用いて、評価用のサンプルと成る焼成サンプルを作製した。
"Production of fired samples"
Next, a fired sample serving as a sample for evaluation was produced using the green sheet and the copper paste.
まず、セラミックグリーンシートを縦50mm×横60mmの寸法に裁断してセラミックグリーンシート片を2枚作製し、このセラミックグリーンシート片の略中央部に250μmの内径を有する貫通孔をあけてビアホール孔を形成した。 First, a ceramic green sheet is cut into a size of 50 mm in length and 60 mm in width to produce two ceramic green sheet pieces, and a through hole having an inner diameter of 250 μm is formed in a substantially central portion of the ceramic green sheet piece to form a via hole. Formed.
次いで、前記ビアホールの配置に合わせ、ビアホールと同径の貫通孔を形成した薄膜のメタルスクリーンで覆い、このメタルスクリーンの上方から銅ペーストをスキージで印刷し、セラミックグリーンシートのビアホール内に銅ペーストを充填した。 Next, in accordance with the arrangement of the via holes, it is covered with a thin-film metal screen in which a through hole having the same diameter as the via hole is formed, and copper paste is printed from above the metal screen with a squeegee, and the copper paste is placed in the via hole of the ceramic green sheet. Filled.
次いで、前記2枚のセラミックグリーンシートを、各ビアホール孔の中心がずれないで重なるように積層して圧着し、積層体を形成した。
次いで、前記積層体を、水蒸気と窒素ガスの混合雰囲気(水蒸気と窒素ガスの露点が70℃の混合雰囲気である。)を調製した炉内に曝し、850℃の温度下で放置し、銅ペースト及びセラミックグリーンシート中に含有する有機成分を脱脂し、続けて、乾燥窒素ガスに置換した後1000℃に昇温して2時間放置し、焼成を行って焼成サンプルを作製した。
Next, the two ceramic green sheets were laminated and pressed together so that the centers of the via hole holes were not displaced, and a laminate was formed.
Next, the laminate is exposed to a furnace in which a mixed atmosphere of water vapor and nitrogen gas (a mixed atmosphere having a dew point of water vapor and nitrogen gas of 70 ° C.) is prepared and left at a temperature of 850 ° C. And the organic component contained in the ceramic green sheet was degreased and subsequently replaced with dry nitrogen gas, then heated to 1000 ° C. and allowed to stand for 2 hours, and fired to prepare a fired sample.
「突き上げ量の測定」
次に、前記焼成サンプルを用いて、焼成サンプルの表面に露出して突き出したビア導体の突き上げ寸法を測定した。
"Measurement of push-up amount"
Next, using the fired sample, the push-up dimension of the via conductor exposed and projected on the surface of the fired sample was measured.
ビア導体の突き上げ寸法は、ビア導体の中心より400μm離れたセラミック層の上面を基準値とし、この基準値からビア導体が突き出した高さの最大寸法を顕微鏡で測定し、その結果を(表1)に示した。 The via conductor push-up dimension is based on the upper surface of the ceramic layer that is 400 μm away from the center of the via conductor, and the maximum height of the via conductor protruding from this reference value is measured with a microscope. )Pointing out toungue.
「ビア導体表面のガラス浮き出しの有無を確認」
次に、前記焼成サンプルを用いて、焼成サンプルの表面に露出したビア導体の表面を顕微鏡で500倍に拡大して観察し、ビア導体表面におけるガラスの浮き出しの有無を確認し、その結果を(表1)に示した。
"Check for vias on the surface of the via conductor"
Next, using the fired sample, the surface of the via conductor exposed on the surface of the fired sample was observed by magnifying it 500 times with a microscope, and the presence or absence of glass protrusion on the via conductor surface was confirmed. Table 1).
(表1)に示すように、本発明の実施例A〜Fは、焼成サンプル表面から突き出したビア導体の突き上げ量が1〜27μmの範囲であり、ビア導体表面のガラスの浮き出しが無く、メッキ処理が容易にでき、回路部品を精度良く実装できるビア導体を得ることができることが判る。 As shown in Table 1, in Examples A to F of the present invention, the amount of the via conductor protruding from the surface of the fired sample is in the range of 1 to 27 μm, the glass on the surface of the via conductor is not raised, and plating is performed. It can be seen that a via conductor can be obtained which can be easily processed and can mount circuit components with high accuracy.
比較例Aは、本発明の実施例A〜Fとを比較すると、銅ペースト中に添加物が添加されておらず、その結果、ビア導体の突き上げ量が54μmと大きくなっていることが判る。
また、比較例Bは、本発明の実施例Aとを比較すると、添加剤としてAl2O3を1.0質量部添加しており、添加剤の種類と添加量が実施例Aと等しいが、粒径が300nmであり本発明の実施例Aの粒径13nmよりも大きく、その結果、ビア導体の突き上げ量が52μmと大きくなっていることが判る。
When comparing Comparative Examples A with Examples A to F of the present invention, it can be seen that no additive was added to the copper paste, and as a result, the push-up amount of the via conductor was as large as 54 μm.
In addition, when Comparative Example B is compared with Example A of the present invention, 1.0 part by mass of Al 2 O 3 is added as an additive, and the type and amount of additive are the same as Example A. It can be seen that the particle diameter is 300 nm, which is larger than the particle diameter of 13 nm in Example A of the present invention, and as a result, the push-up amount of the via conductor is as large as 52 μm.
また、比較例C、Dは、本発明の実施例A〜Fと比較すると、ガラスフリットを添加することによって、ビア導体の突き上げ量が本発明の実施例C、E、Fと同等の水準まで低減できているが、ビア導体表面にガラスの浮き出しが発生し、メッキ処理が困難になることが判る。尚、比較例C、Dは、ビア導体表面を顕微鏡で拡大して観察した結果、15μm程度の大きさのガラスからなる多数の無機物が表面に浮き出していた。 Further, in Comparative Examples C and D, when the glass frit is added, the amount of push-up of the via conductor reaches a level equivalent to that of Examples C, E, and F of the present invention as compared with Examples A to F of the present invention. Although it can be reduced, it can be seen that glass is raised on the surface of the via conductor, making the plating process difficult. In Comparative Examples C and D, the surface of the via conductor was magnified and observed with a microscope, and as a result, a large number of inorganic substances made of glass having a size of about 15 μm appeared on the surface.
また、本発明の実施例中、実施例Cは、実施例A、Bと比較すると、実施例A、Bのビア導体の突き上げ量が27μm、22μmに対し、実施例Cのビア導体の突き上げ量が5μmと小さく、ガラスの浮き出しも無いので、セラミック粒子としてSiO2を添加する
と特に好ましいことが判る。
Further, among the examples of the present invention, compared to Examples A and B, Example C has a via conductor push-up amount of Example A and B of 27 μm and 22 μm, whereas the via conductor push-up amount of Example C It can be seen that it is particularly preferable to add SiO 2 as ceramic particles because the glass is as small as 5 μm and the glass is not raised.
更に、実施例中C〜Fは添加剤として同一のSiO2粒子を添加しているが、実施例D
に比べて実施例C、E、Fのビア導体の突き出し量が一層少ないので、SiO2粒子の添
加量が0.5質量部〜2.0質量部の範囲にあるのが好ましいことが判る。
Furthermore, in Examples C to F, the same SiO 2 particles are added as additives.
It can be seen that the amount of addition of the SiO 2 particles is preferably in the range of 0.5 parts by mass to 2.0 parts by mass because the amount of protrusion of the via conductors of Examples C, E, and F is much smaller than that of Example 2 .
「ビア導体の断面観察」
次いで、本発明の実施例Eと比較例Dの焼成サンプルの、ビア導体の断面を顕微鏡で拡大して観察し、ビア導体内部の無機物の分散状態を確認した。
"Section observation of via conductor"
Next, the cross section of the via conductor of the fired samples of Example E and Comparative Example D of the present invention was observed with a microscope, and the dispersion state of the inorganic substance inside the via conductor was confirmed.
図1は本発明における実施例Eの焼成サンプルの断面を表した断面図であり、図2は比較例Dの焼成サンプルの断面を表した断面図である。
図1、図2において、1、2はセラミック磁器、3、4はビア導体、5、6は焼成された銅、7、8は無機物である。
1 is a cross-sectional view showing a cross section of a fired sample of Example E in the present invention, and FIG. 2 is a cross-sectional view showing a cross section of a fired sample of Comparative Example D.
1 and 2, reference numerals 1 and 2 are ceramic porcelain, 3 and 4 are via conductors, 5 and 6 are baked copper, and 7 and 8 are inorganic materials.
図1と図2を用いて、本発明の実施例Eと比較例Dのビア導体の断面を比較する。図1に示した本発明の実施例Eは、ビア導体3中に含有されている無機物7が約5μm以下の細かく均一に分散され、銅5が緻密な焼結結晶に焼成されている。一方、図2に示した比較例Dは、ビア導体4中に15μm程度の無機物8が分散し、銅6の焼結構造も粗いものとなっている。したがって、本発明の実施例Eによれば、無機物7がビア導体3内に細かく分散され、緻密に焼成されたビア導体3を得ることができることが判る。 1 and 2, the cross sections of the via conductors of Example E and Comparative Example D of the present invention are compared. In Example E of the present invention shown in FIG. 1, the inorganic material 7 contained in the via conductor 3 is finely and uniformly dispersed with a thickness of about 5 μm or less, and the copper 5 is fired into a dense sintered crystal. On the other hand, in Comparative Example D shown in FIG. 2, the inorganic material 8 of about 15 μm is dispersed in the via conductor 4, and the sintered structure of the copper 6 is also rough. Therefore, according to Example E of this invention, it turns out that the inorganic substance 7 is disperse | distributed finely in the via conductor 3, and the via conductor 3 baked densely can be obtained.
次に、前記セラミックグリーンシートを用い、このセラミックグリーンシートに直径250μmの貫通孔を形成した。
次いで、本発明の実施例Eの銅ペーストと比較例Dの銅ペーストとを用いて、それぞれ、セラミックグリーンシートのビアホール孔に充填して乾燥させた後、セラミックグリーンシートの表面に配線パターンを形成するために銅ペーストを印刷した。
Next, using the ceramic green sheet, a through hole having a diameter of 250 μm was formed in the ceramic green sheet.
Next, using the copper paste of Example E of the present invention and the copper paste of Comparative Example D, respectively, after filling the via hole hole of the ceramic green sheet and drying, a wiring pattern is formed on the surface of the ceramic green sheet In order to do so, a copper paste was printed.
次いで、前記セラミックグリーンシートを複数枚積層して加圧しグリーンシート積層体を作製し、このグリーンシート積層体を水蒸気と窒素ガスの混合雰囲気(水蒸気と窒素ガスの露点が70℃の混合雰囲気である。)を調製した炉内に曝し、850℃の温度下で放置して脱脂し、銅ペースト及びセラミックグリーンシート中に含有する有機成分を脱脂し、続けて、乾燥窒素ガスに置換した後1000℃の温度下で2時間放置して焼成を行った。 Next, a plurality of ceramic green sheets are laminated and pressed to produce a green sheet laminate, and this green sheet laminate is mixed with water vapor and nitrogen gas (a mixed atmosphere with a dew point of water vapor and nitrogen gas of 70 ° C.). .) Was left in the furnace prepared and degreased by leaving it at a temperature of 850 ° C. to degrease the organic components contained in the copper paste and the ceramic green sheet, followed by replacement with dry nitrogen gas at 1000 ° C. The mixture was allowed to stand for 2 hours at the temperature of
次いで、この配線基板の表面に露出したビア導体表面にNiをメッキし、さらにNiの上面に直径80μmの円形となるようにAuをメッキして配線基板を作製した。
得られた配線基板の表面を観察した結果、本発明の実施例Eの銅ペーストを用いて形成した配線基板は、ビア導体表面に直径80μmの円形のAuメッキ層が精度良く形成され、メッキ付着のむらが無く良好なものであった。一方、比較例Dの銅ペーストを用いた配線基板は、ビア導体表面にガラスが浮き出してメッキができなかった。
Next, Ni was plated on the surface of the via conductor exposed on the surface of the wiring board, and Au was further plated on the upper surface of Ni so as to form a circle with a diameter of 80 μm to produce a wiring board.
As a result of observing the surface of the obtained wiring board, the wiring board formed using the copper paste of Example E of the present invention has a circular Au plating layer with a diameter of 80 μm formed on the surface of the via conductor with high precision, and adheres to the plating. It was good with no unevenness. On the other hand, the wiring board using the copper paste of Comparative Example D was not able to be plated because the glass was raised on the via conductor surface.
次に、実施例Eと比較例Dの銅ペーストを用いて作製した配線基板を切断して、切断面を研磨し、ビア導体の断面をSEM(走査型電子顕微鏡)で観察し反射電子組成像を得た。そして、ビア導体の任意の断面積4000μm2中に存在する粒径2μm以上、粒径5
μm以上、粒径10μm以上の無機物をそれぞれ反射電子組成像にもとづいて検出した。かかる反射電子組成像において、Cu等の重元素は明部(白色の部分)、無機物は暗部(黒色の部分)で表されている。ビア導体断面積に対する無機物(暗部)の合計面積の割合を画像処理により算出した結果、実施例Eは、粒径2μm以上が1.9%、粒径5μm以上が0%であって、比較例Dは、粒径2μm以上が29.5%、粒径5μm以上が26.6%、粒径10μm以上が15.0%であった。
Next, the wiring board produced using the copper paste of Example E and Comparative Example D was cut, the cut surface was polished, and the cross section of the via conductor was observed with an SEM (scanning electron microscope), and the reflected electron composition image Got. Further, the particle diameter of 2 μm or more existing in an arbitrary cross-sectional area of 4000 μm 2 of the via conductor is 5 μm.
An inorganic substance having a particle size of 10 μm or more was detected based on the reflected electron composition image. In such reflected electron composition image, heavy elements such as Cu are represented by bright portions (white portions), and inorganic substances are represented by dark portions (black portions). As a result of calculating the ratio of the total area of the inorganic substance (dark part) to the via conductor cross-sectional area by image processing, Example E had a particle size of 2 μm or more, 1.9%, and a particle size of 5 μm or more, 0%. D was 29.5% when the particle size was 2 μm or more, 26.6% when the particle size was 5 μm or more, and 15.0% when the particle size was 10 μm or more.
そこで、更に、ビア導体の断面積中における各粒径以上の無機物の合計面積を算出するとともに、ビア導体表面におけるメッキ性を評価した結果、ビア導体の断面積に対する各粒径以上の無機物の合計面積は、粒径2μm以上が10%以下、粒径5μm以上が5%以下、粒径10μm以上が2%以下であれば、無機物の一部がビア導体表面に露出しても、このビア導体表面のメッキ性を損なうことが無く、メッキ処理が容易に行うことができた。 Therefore, as a result of calculating the total area of the inorganic substances having a particle size or more in the cross-sectional area of the via conductor and evaluating the plating property on the via conductor surface, the total of the inorganic substances having the particle diameters or more with respect to the cross-sectional area of the via conductor. If the area is 10% or less with a particle size of 2 μm or more, 5% or less with a particle size of 5 μm or more, and 2% or less with a particle size of 10 μm or more, even if a part of the inorganic material is exposed on the via conductor surface, this via conductor The plating process could be easily performed without impairing the plating properties of the surface.
次いで、前記セラミックグリーンシートと実施例Eで表した組成を有する銅ペーストを用いて、半導体素子を搭載した配線基板を作製した。
図3は、本発明が適用された実施例の配線基板の構成を表す断面図である。
Next, using the ceramic green sheet and the copper paste having the composition shown in Example E, a wiring board on which a semiconductor element was mounted was produced.
FIG. 3 is a cross-sectional view showing a configuration of a wiring board according to an embodiment to which the present invention is applied.
図3において、10は配線基板であり、この配線基板10は複数のセラミックグリーンシートを積層して焼成し形成されたセラミック層11〜14と、このセラミック層11〜14の上面に設置された半導体素子15と、この半導体素子15を穴17に収納し、周囲面をセラミック層14とろう材(図示せず)で接合された蓋体16とより構成されている。 In FIG. 3, reference numeral 10 denotes a wiring board. The wiring board 10 is formed by laminating and firing a plurality of ceramic green sheets, and a semiconductor installed on the upper surface of the ceramic layers 11-14. The element 15 and the semiconductor element 15 are accommodated in the hole 17 and the peripheral surface is constituted by a ceramic layer 14 and a lid body 16 joined by a brazing material (not shown).
前記セラミック層11〜14は、それぞれ重なり合う面に内部導体層24〜29が形成されている。この内部導体層24〜29はセラミック層11〜14を貫通するように形成されたビア導体36〜47と接続されている。 The ceramic layers 11 to 14 have internal conductor layers 24 to 29 formed on the overlapping surfaces. The internal conductor layers 24 to 29 are connected to via conductors 36 to 47 formed so as to penetrate the ceramic layers 11 to 14.
セラミック層11の下面には、ビア導体36〜41に夫々接続するように回路端子18〜23が形成されている。この回路端子18〜23は、ビア導体36〜41の露出面上に銅ペーストを印刷して同時焼成により形成し、この導体の表面にNiメッキをし、次いでNiメッキの表面にAuメッキを行って形成したものである。セラミック層14の上面には、ビア導体42〜47に夫々接続するようメッキ層30〜35が形成されている。このメッキ層30〜35はビア導体42〜47の露出面にNiメッキをし、Niメッキの表面にAuメッキを行って形成されたものである。そして、前記メッキ層30〜35に重なるように半導体素子15の端子(図示せず)が半田付けして接続されている。 Circuit terminals 18 to 23 are formed on the lower surface of the ceramic layer 11 so as to be connected to the via conductors 36 to 41, respectively. The circuit terminals 18 to 23 are formed by printing copper paste on the exposed surfaces of the via conductors 36 to 41 and co-firing, Ni plating on the surface of the conductor, and then Au plating on the surface of the Ni plating. Is formed. On the upper surface of the ceramic layer 14, plating layers 30 to 35 are formed so as to be connected to the via conductors 42 to 47, respectively. The plated layers 30 to 35 are formed by performing Ni plating on the exposed surfaces of the via conductors 42 to 47 and performing Au plating on the Ni plating surface. The terminals (not shown) of the semiconductor element 15 are connected by soldering so as to overlap the plated layers 30 to 35.
前記のように、配線基板10は、下段のセラミック層11の回路端子18〜23が、前記ビア導体36〜47、内部導体層24〜29等を介して上段のセラミック層14のメッキ層30〜35と接続され、このメッキ層30〜35を介して半導体素子15の端子と接続して電気回路が構成されている。 As described above, the circuit board 18 to 23 of the lower ceramic layer 11 of the wiring board 10 has the plating layers 30 to 30 of the upper ceramic layer 14 via the via conductors 36 to 47, the internal conductor layers 24 to 29, and the like. 35 and is connected to the terminal of the semiconductor element 15 through the plated layers 30 to 35 to constitute an electric circuit.
以上のように構成して得られた配線基板10は、ビア導体36〜47が緻密に焼成されて電気抵抗が低く、半導体素子15の電気特性のバラツキや劣化が少ないものであった。また、ビア導体36〜47は配線基板10からの突き上げが少なくメッキ処理も容易で良好なメッキ層を得ることができた。 In the wiring substrate 10 obtained by the above configuration, the via conductors 36 to 47 are densely fired, the electric resistance is low, and the variation and deterioration of the electric characteristics of the semiconductor element 15 are small. In addition, the via conductors 36 to 47 were not pushed up from the wiring substrate 10 and could be easily plated and a good plating layer could be obtained.
また、ビア導体36〜47は熱伝導性良好であり、半導体素子15の温度上昇も低減できた。
前記の構成を有する本発明の実施例の銅ペーストと配線基板の作用効果を、以下に記載する。
Further, the via conductors 36 to 47 have good thermal conductivity, and the temperature rise of the semiconductor element 15 can be reduced.
The effects of the copper paste and the wiring board of the embodiment of the present invention having the above-described configuration will be described below.
本発明の実施例による銅ペーストは、セラミックグリーンシートのビアホール孔に充填され、一旦湿潤窒素雰囲気中で曝された後に焼成されると、ビア導体の突き上げが少なく、このビア導体表面のガラスの浮き出しが無くてメッキ処理が容易にでき、回路部品を精度良く実装できるビア導体を得ることができる。 When the copper paste according to the embodiment of the present invention is filled in the via hole hole of the ceramic green sheet, and once fired after being exposed in a wet nitrogen atmosphere, the via conductor is hardly pushed up, and the glass on the surface of the via conductor is raised. Therefore, a plating process can be easily performed, and a via conductor capable of mounting circuit components with high accuracy can be obtained.
また、本発明の実施例による銅ペーストは、セラミックグリーンシートのビアホール孔に充填され、一旦湿潤窒素雰囲気中で曝された後に焼成されると、緻密で低抵抗なビア導体が得られ、高周波信号の伝送損失の少ない配線基板を得ることができる。 In addition, the copper paste according to the embodiment of the present invention is filled in the via hole hole of the ceramic green sheet, and once exposed in a wet nitrogen atmosphere and baked, a dense and low resistance via conductor is obtained, and a high frequency signal is obtained. A wiring board with low transmission loss can be obtained.
また、本発明の実施例による配線基板は、ビア導体の表面に、メッキムラ、欠損、剥離などのない良好なメッキ層が形成されるので、温度負荷、湿度負荷、熱負荷などの耐久性に優れた電気回路を形成できる。 In addition, the wiring board according to the embodiment of the present invention is excellent in durability such as temperature load, humidity load, and heat load because a good plating layer free from plating unevenness, chipping and peeling is formed on the surface of the via conductor. An electric circuit can be formed.
また、本発明の実施例による配線基板は、ビア導体の電気抵抗が低く、このビア導体の表面メッキ層を介して半導体素子の端子を接続すると、半導体の電気特性にバラツキや劣化を生じることのない電気回路を形成できる。 In addition, the wiring board according to the embodiment of the present invention has a low electrical resistance of the via conductor, and if the terminals of the semiconductor element are connected through the surface plating layer of the via conductor, the electrical characteristics of the semiconductor may vary or deteriorate. No electrical circuit can be formed.
また、本発明の実施例による配線基板は、ビア導体が緻密に焼成されて熱伝導率が高いので、高密度に積層された配線基板において、サーマルビアとして構成すると放熱効果が優れている。 In addition, since the wiring board according to the embodiment of the present invention has a high thermal conductivity because the via conductors are densely fired, if the wiring board is laminated as a high density, it is excellent in heat dissipation effect.
尚、本発明の実施例においては、導体層として銅の上面にNiをメッキし、さらにその上面にAuをメッキしたが、この銅の上面には低抵抗を有する他の金属をメッキしてもよい。 In the embodiment of the present invention, Ni is plated on the upper surface of copper as the conductor layer, and Au is further plated on the upper surface. However, other metal having low resistance may be plated on the upper surface of the copper. Good.
また、本発明の実施例においては、セラミックグリーンシートを貫通するビアホール孔に導電ペーストを充填してビア導体を形成したが、このビアホール孔に代えて、配線基板の端面に溝を形成し、この溝に本発明の導ペーストを充填して配線パターンの接続導体を形成すると、この接続導体は、配線基板から突き上げが少なく、緻密で低抵抗な接続導体が得られるので、各種電気回路の形成に好適である。 Further, in the embodiment of the present invention, the via hole that penetrates the ceramic green sheet was filled with the conductive paste to form the via conductor, but instead of this via hole, a groove was formed on the end face of the wiring board. When the conductive paste of the present invention is filled in the groove to form the connection conductor of the wiring pattern, the connection conductor is less pushed up from the wiring board, and a dense and low resistance connection conductor can be obtained, so that various electrical circuits can be formed. Is preferred.
また、本発明の銅ペーストは、ガラスフリットを含むと、ビア導体のメッキ性を損なうのでガラスフリットを含むことの無いことが好ましいが、配線基板のパターン設計に合わせて、半田付け性やメッキ性が損なわれない程度に微量のガラスが含有されても良い。 Further, the copper paste of the present invention preferably contains no glass frit because it contains glass frit, which deteriorates the plating properties of the via conductors. However, according to the pattern design of the wiring board, solderability and plating properties are preferred. A trace amount of glass may be contained to such an extent that is not impaired.
尚、本発明の銅ペーストをビアホール孔に充填して配線基板を製造する際には、銅ペーストを塗布したセラミックグリーンシートを、650〜900℃の湿潤窒素中(水蒸気と窒素ガスの露点が70℃の混合雰囲気)で有機成分を除去(脱バインダー工程)し、次いで、850〜1050℃で焼成すると良い。ここで、脱バインダー工程は、続く焼成温度を越えない範囲で設定される。 When manufacturing the wiring board by filling the via hole with the copper paste of the present invention, the ceramic green sheet coated with the copper paste is placed in wet nitrogen at 650 to 900 ° C. (dew point of water vapor and nitrogen gas is 70 ° C.). The organic component is removed (debinding step) in a mixed atmosphere at 0 ° C., and then fired at 850 to 1050 ° C. Here, the binder removal step is set in a range not exceeding the subsequent firing temperature.
まず、650〜900℃の湿潤窒素中でセラミックグリーンシートおよび銅ペースト中に含まれる有機成分が除去(脱バインダー工程)される。ここで、脱バインダー工程は、続く焼成温度を越えない範囲で設定される。銅ペースト中の銅粉末の周囲にセラミック粒子が分散された状態で脱バインダーされているので、脱バインダー中は銅粉末の焼結開始が抑制されているが、続く高温下での焼成過程においては、脱バインダー時に湿潤窒素中に曝されたことにより銅粉末の焼結が促進されるので、緻密な導体層を得ることができる。 First, the organic components contained in the ceramic green sheet and the copper paste are removed (debindering step) in wet nitrogen at 650 to 900 ° C. Here, the binder removal step is set in a range not exceeding the subsequent firing temperature. Since the binder is removed in a state where the ceramic particles are dispersed around the copper powder in the copper paste, the sintering start of the copper powder is suppressed during the binder removal, but in the subsequent firing process at high temperature Since the sintering of the copper powder is promoted by exposure to wet nitrogen during debinding, a dense conductor layer can be obtained.
脱バインダー工程に次いで行われる焼成過程では、850〜1050℃の窒素中または湿潤窒素中で銅とセラミックグリーンシートとが同時に焼成される。それぞれの焼結開始の温度と焼成収縮のタイミングとが近くなるように制御されているので、ビア導体の突き上げが少なく、緻密で低抵抗で、高周波信号の伝送損失が少ない配線基板を得ることができる。 In the firing process performed after the binder removal step, copper and the ceramic green sheet are fired simultaneously in nitrogen at 850 to 1050 ° C. or wet nitrogen. Since each sintering start temperature and firing shrinkage timing are controlled to be close to each other, it is possible to obtain a wiring board with less via conductor push-up, dense, low resistance, and low transmission loss of high-frequency signals. it can.
1,2…セラミック磁器、3,4…ビア導体、5,6…銅、7,8…無機物、10…配線基板、11〜14…セラミック層(絶縁層)、15…半導体素子、16…蓋体、17…穴、18〜23…回路端子、24〜29…内部導体層、30〜35…メッキ層、36〜47…ビア導体。 DESCRIPTION OF SYMBOLS 1, 2 ... Ceramic porcelain, 3, 4 ... Via conductor, 5, 6 ... Copper, 7, 8 ... Inorganic substance, 10 ... Wiring board, 11-14 ... Ceramic layer (insulating layer), 15 ... Semiconductor element, 16 ... Cover Body, 17 ... hole, 18-23 ... circuit terminal, 24-29 ... inner conductor layer, 30-35 ... plated layer, 36-47 ... via conductor.
Claims (5)
焼成後に形成される銅を含むビア導体の内部に、配線基板の厚み方向の断面において、 ビア導体に分散されている、粒径2μm以上の、予め銅ペーストに含有されたセラミック粒子や、セラミックグリーンシートに含有されビア導体に拡散された無機成分が集まってできた無機物が存在し、
粒径2μm以上の無機物の合計面積が、該ビア導体の断面積の10%以下、
粒径5μm以上の無機物の合計面積が、該ビア導体の断面積の5%以下であり、かつ、
粒径10μm以上の無機物の合計面積が、該ビア導体の断面積の2%以下であることを特徴とする配線基板。 A ceramic wiring board,
Inside the via conductor containing copper formed after firing, in the cross-section in the thickness direction of the wiring board, ceramic particles dispersed in the via conductor and having a particle diameter of 2 μm or more and previously contained in the copper paste, or ceramic green There is an inorganic substance that is formed by collecting inorganic components contained in the sheet and diffused into the via conductor ,
The total area of inorganic substances having a particle size of 2 μm or more is 10% or less of the cross-sectional area of the via conductor,
The total area of the inorganic substance having a particle size of 5 μm or more is 5% or less of the cross-sectional area of the via conductor, and
A wiring board, wherein a total area of inorganic substances having a particle diameter of 10 μm or more is 2% or less of a cross-sectional area of the via conductor.
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