JP5282332B2 - Manufacturing method of zinc oxide laminated chip varistor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for manufacturing a zinc oxide laminated chip varistor having an excellent impulse resistance characteristic and capable of reducing characteristic dispersion. <P>SOLUTION: In the method for manufacturing the zinc oxide laminated chip varistor, a varistor raw material containing zinc oxide, bismuth oxide, antimony oxide, cobalt oxide or manganese oxide, chromium oxide, boric acid, silicon dioxide, and aluminum oxide is prepared, slurry is produced by adding a dispersant to the varistor raw material, a green sheet is produced by using the slurry, a green chip is produced by laminating the green sheets, and the green chip is heated up to a predetermined temperature to burn the green chip. In the burning, the temperature of the green chip is increased up to the predetermined temperature at a temperature rising speed of &ge;400&deg;C/hr. It is preferable to use copolymer of &alpha;-olefin and maleic anhydride as the dispersant. <P>COPYRIGHT: (C)2010,JPO&amp;INPIT

Description

  The present invention relates to a varistor element for protecting a semiconductor element and the like mounted on the above equipment from load dump surge, ignition surge, lightning surge, electrostatic discharge surge (ESD), switching surge, etc. in various electric / electronic devices. In particular, the present invention relates to a method of manufacturing a chip-type zinc oxide laminated chip varistor capable of surface mounting.

  In electrical and electronic devices such as mobile phones, with the rapid increase in frequency and capacity in recent years, the circuit is protected from various surges, pulse noise, electrostatic discharge (ESD), etc., and operation stability is ensured. In addition, there is a growing need for a varistor that is a higher performance overvoltage protection element in order to comply with noise regulations. Also, due to the downsizing of devices, zinc oxide multilayer chip varistors that are smaller than leaded disk varistors and can be surface mounted are often used. In particular, in the field of automobiles, the digitization has progressed rapidly, and in-vehicle electronic devices are equipped with semiconductor elements. However, semiconductor elements that are vulnerable to surges can be obtained from load dump surges, switching off surges, ignition surges, etc. It needs to be protected.

In general, zinc oxide varistors are mainly composed of zinc oxide (ZnO) and added with bismuth oxide (Bi ₂ O ₃ ) that promotes grain growth of zinc oxide and antimony oxide (Sb ₂ O ₃ ) that suppresses grain growth. Various glasses and the like are added as a sintering aid. Patent Document 1 discloses a varistor including zinc oxide (ZnO) as a main component and bismuth oxide (Bi ₂ O ₃ ), antimony oxide (Sb ₂ O ₃ ), tin oxide (SnO ₂ ), and the like as auxiliary components. It is disclosed.
JP-A-3-217055

  However, Patent Document 1 is premised on a disk-type large varistor, and in the case of the multilayer chip type varistor which is the subject of the present invention, a thin ceramic sheet having a small size of, for example, 5.7 mm × 5.0 mm (5750 type) is used. Since the structure is formed by laminating a plurality of layers, the state of the grain particles greatly affects the characteristics, and for example, sufficient characteristics cannot be obtained as a varistor for protecting a semiconductor element mounted on the above-mentioned in-vehicle electronic device.

  The present invention has been made on the basis of the above-described circumstances, and it is possible to manufacture a zinc oxide multilayer chip varistor that is excellent in impulse withstand characteristics required as a varistor mounted on an in-vehicle electronic device and can reduce variation in characteristics. It aims to provide a method.

The method for producing a zinc oxide multilayer chip varistor of the present invention includes zinc oxide, bismuth oxide, antimony oxide, cobalt oxide or manganese oxide, chromium oxide, boric acid, silicon dioxide, and aluminum oxide. A varistor raw material is prepared, a slurry is prepared by adding a diluent and a dispersant to the varistor raw material, a green sheet is prepared using the slurry, a green chip is formed by stacking the green sheets, and the green chip Is a method of manufacturing a zinc oxide laminated chip varistor that is heated to a predetermined temperature and calcined, wherein the dispersant uses a copolymer of α-olefin and maleic anhydride, and the calcining is performed at 500 ° C./hr. The temperature is increased to the predetermined temperature at the above temperature increase rate.

According to the present invention, by performing high-speed firing at a temperature rising rate of 500 ° C./hr or more, when heat is applied to the green chip at a high speed, the heat transfer speed is increased, that is, the lattice of the structure when the sintering proceeds. Since the movement is activated, the transfer of heat becomes smooth, and as a result, a homogeneous sintered body is obtained. And, by using a copolymer of α-olefin and maleic anhydride as a dispersant, each component of the material can be uniformly dispersed at the slurry stage, and the particle size of the material can be made uniform. A green chip is produced and fired to obtain a sintered body with high homogeneity. Thereby, it is possible to manufacture a zinc oxide multilayer chip varistor having excellent impulse withstand characteristics and reduced variation in characteristics.

  Embodiments of the present invention will be described below with reference to the accompanying drawings.

FIG. 1 shows an example of the element structure of a zinc oxide laminated chip varistor. This zinc oxide laminated chip varistor 10 is made of platinum on a green sheet mainly composed of zinc oxide (ZnO) as a varistor material and bismuth oxide (Bi ₂ O ₃ ), antimony oxide (Sb ₂ O ₃ ), or the like as subcomponents. It is a multilayer sintered body element produced by laminating and firing a conductive material paste pattern (internal electrode pattern) such as (Pt) or palladium (Pd). Then, the internal electrodes 12a and 12b of the conductive material are alternately arranged in a parallel plate shape inside the varistor sintered body 11 formed by firing the laminated green sheets, and the electrode arrangement is the same as that of the multilayer capacitor. ing.

  The plurality of internal electrodes 12a and 12b are connected to the left and right external electrodes 13a and 13b, respectively. The external electrodes 13a and 13b have a structure suitable for surface mounting, in which electrodes such as silver are subjected to nickel plating, solder or tin plating. Therefore, the voltage applied between the left and right external electrodes 13 a and 13 b is applied to the varistor sintered body portion between the electrodes 12 a and 12 b arranged in a parallel plate shape inside the varistor sintered body 11. In the illustrated example, a varistor element is constituted by four varistor sintered body layers, but the number of layers and the layer thickness of each layer are determined according to the required varistor voltage, withstand capability, and the like. The zinc oxide multilayer chip varistor 10 is, for example, 5.7 mm x 5.0 mm (5750 type), 3.2 mm x 1.6 mm (3216 type), 2.0 mm x 1.2 mm (2012 type), 1.0 mm x 0.5 mm (1005 type) ), Surface mount type parts having a size as a standard chip part such as 0.6 mm × 0.3 mm (0603 type).

For the test of the manufacturing process of the present invention, the prototype zinc oxide laminated chip varistor is 5.7 mm × 5.0 mm (5750 type), the number of internal electrode layers is 16, and the internal electrode is platinum (Pt). Is used. Varistor material is a zinc (ZnO) 100 mol% oxide in outer percentage amount with respect to this, and 0.5 mol% of bismuth oxide (Bi ₂ O _3), and 1.0 mol% of antimony oxide (Sb ₂ O _3), cobalt oxide (CoO) and manganese oxide (MnO ₂ ) 1.0 mol%, chromium oxide (Cr ₂ O ₃ ) 0.5 mol%, titanium oxide (TiO ₂ ) 0.1 mol%, boric acid (H ₃ BO ₃₎ and a 0.5 mol%, and 0.50 mol% of silicon dioxide (SiO2), and a 0.0001 mol% (100 ppm) of aluminum oxide (Al ₂ O _3), the varistor voltage is 22V products (when current 1mA is applied varistor The voltage between both ends is 19.8-24.2V).

  The electrical characteristics of the varistor manufactured according to the general manufacturing process are as follows. The average of the varistor voltage (voltage across the varistor when current of 1 mA is applied) is 22.6 V (σ = 1.6), and the voltage applied is 0.8 V of the varistor voltage. The average leakage current at the time is 4.2μA (σ = 1.2), the α value (non-linearity between 0.01-1mA) is 35 (σ = 1.2), and the limiting voltage (voltage across the varistor when current 2A is applied) ) Is 34V (σ = 2.1), surge resistance (maximum load current resistance) is 2200A, and energy resistance (load dump resistance, maximum load energy resistance) is 25J.

  The zinc oxide multilayer chip varistor is mainly composed of zinc oxide, and bismuth oxide, antimony oxide, at least one of cobalt oxide or manganese oxide, chromium oxide, boric acid, silicon dioxide, and aluminum oxide. A varistor raw material is prepared, a dispersant is added to the varistor raw material to create a slurry, a green sheet is formed using the slurry, a green chip is laminated to form a green chip, and the green chip is heated to a predetermined temperature. Is heated and fired to form a laminated varistor sintered body having electrodes arranged in a parallel plate shape inside.

  In a conventional manufacturing process, a general polycarboxylic acid-based dispersant is used as a dispersant. Also, the heating rate during firing was 200 ° C./hr which is the heating rate of a general zinc oxide varistor.

  By the way, in particular, in an in-vehicle zinc oxide multilayer chip varistor, it is desired to have excellent impulse withstand characteristics and to reduce variation in characteristics. The desirable shape as a varistor sintered body is that grains (ZnO grains) are uniform, that there are few voids between grains (ZnO), that there are few variations due to the formation of grain boundary levels (double Schottky barrier), The specific resistance of grains (ZnO) is small. For this purpose, it is necessary that the composition of the material is uniformly dispersed at the stage of the slurry or the stage of the green chip, and that the particle size of the material is uniform. It is necessary to be sintered so that it is homogeneous and grains (ZnO grains) are uniformly formed.

  Therefore, in the present invention, first, attention is paid to the temperature rising rate during the formation. When firing green chips, when heat is gradually applied, the heat is transferred from the outside to the inside, but then the components contained from the outside to the inside chemically react as theoretically and gradually form a crystal structure. To form. However, the present inventors have found that when there is no reaction in this process, the finished grain becomes uniform. In other words, if the heating rate is increased and the whole is rapidly heat-treated, the reaction that forms the crystal structure occurs, but the next reaction takes place in a very short time. It is thought that the adverse effect of forming the structure can be reduced.

  In other words, one of the factors that greatly hinders the function of a varistor is that even if it is a green chip manufactured by an optimal composition and process, the volatile additives that make up the green chip are exposed to high temperatures for a long time. As a result, it diffuses from the chip surface into the atmosphere, which impairs the homogeneity of grains. When it is gradually fired, the chemical reaction according to the composition is carried out sequentially from the outside to the inside, and the sintering proceeds. However, there is a difference in the burning rate between the outside and inside, and the burning state of the entire ceramic body is different between the outside and inside. However, if heat is applied at a high speed, the heat transfer speed becomes faster, that is, the lattice motion of the structure is activated as the sintering proceeds, and the heat transfer becomes smoother. It is considered that uniform sintering can be performed and the homogeneity of grains is improved.

From such a viewpoint, data verifying high-speed firing is shown in Table 1. That is, it is considered that by firing at high speed, the appearance of core particles that are a problem in grain growth can be suppressed, and the deterioration of characteristics due to volatilization of the additive can be suppressed by reducing the exposure time to high temperature. The data in Table 1 is obtained by changing the temperature rising rate and measuring and evaluating the limit value with a 2 ms impulse withstand waveform.

  As a result, an improvement in impulse withstand was observed at a heating rate of 400 ° C / hr or higher, especially when sintering at a heating rate of 500 ° C / hr or higher, especially when the conventional heating rate of 200 ° C / hr was used. On the other hand, an improvement in impulse tolerance of over 20% is observed. Note that the improvement of 2J at a temperature increase rate of 400 ° C./hr is an improvement in characteristics corresponding to the addition of, for example, one chip varistor having a size of 3.2 mm × 2.5 mm.

  Next important is the choice of dispersant. Conventionally, a general polycarboxylic acid-based dispersant has been used as a dispersant. By using a copolymer of α-olefin and maleic anhydride, each component of the material is uniformly dispersed at the slurry stage. Then, the particle diameters of the materials can be made uniform, and a green chip is formed and fired from this, whereby a sintered body with high homogeneity can be obtained.

Table 2 shows data verifying the effect of the combination of high-speed firing and dispersant.

Comparative Example 1 is a case where the conventional temperature increase rate was used and no dispersant was added. The finished product had a large variation in characteristics such as a varistor voltage due to variation in material mixing and particle size, and circuit protection ability was low. Comparative Example 2 is a case where a conventional polycarboxylic acid-based dispersant is used at a conventional temperature increase rate. In the finished product, material dispersion was accelerated and basic performance such as varistor voltage was obtained, but performance such as surge resistance was insufficient. Comparative Example 3 is a case where the conventional temperature rising rate is used, and the copolymer of the α-olefin and maleic anhydride of the present invention is used as the dispersant. The finished product has sufficiently advanced material dispersibility and can provide circuit protection functions such as surge resistance in addition to basic performance, but no significant improvement in characteristics compared to conventional products.

  Comparative Example 4 is a case where firing was performed at a temperature increase rate of 500 ° C./hr according to the present invention, and no dispersant was added. The finished product had a large variation in characteristics such as a varistor voltage due to variation in material mixing and particle size, and circuit protection ability was low. In addition, although ceramic sintering homogeneity increases, the influence of material mixing and particle size non-uniformity is strong, and effects such as improvement of impulse resistance are not seen.

The present invention 1 is a case where baking is performed at a heating rate of 500 ° C./hr of high-speed sintering, and a conventional polycarboxylic acid-based dispersant is used. The effect of the conventional dispersant and the effect of high-speed sintering have a synergistic effect, and the basic performance varies slightly, but the characteristics such as surge resistance are remarkably improved. However, it is inferior in terms of improvement in characteristics as compared with the case where a maleic anhydride-α-olefin dispersant is used. The present invention 2 is a case where firing is performed at a heating rate of 500 ° C./hr of high-speed sintering, and the copolymer of the α-olefin and maleic anhydride of the present invention is also used as the dispersant. The finished product exhibits the effect of sinterability due to the dispersant and high-speed temperature rise to the maximum. In addition to small variations in basic performance, circuit protection functions such as surge resistance and energy resistance are greatly improved.

Next, the reduction of the voltage limit by adding a Bi ₂ O ₃ —Sb ₂ O ₃ —ZnO-based mixture was studied. By making the ZnO grain growth and the pyrochlore and spinel formation reactions that occur in the ZnO—Bi ₂ O ₃ —Sb ₂ O ₃ system independent, the uniformity of the ZnO grains can be obtained and the voltage limit can be reduced. Therefore, it was confirmed how the limiting voltage changes by adding ZnO to the Bi ₂ O ₃ —Sb ₂ O ₃ mixture and adding it to the main raw material after calcination. The test data is shown in Table 3. The amount added is ZnO
Addition amount of 100 mol%, Bi / Sb ratio can be increased when lowering the varistor voltage, lower when increasing the varistor voltage, Bi / Sb ratio is 1, and ZnO is added to each 0.5 mol% added mixture Data was acquired with varying amounts.

この結果、ZnO0.1〜1mol%の範囲でBi₂O₃-Sb₂O₃混合物と一緒にZnOを加え仮焼きし、主原料に添加することで大幅に制限電圧特性が改善されることが確認出来た。

As a result, the limiting voltage characteristics can be greatly improved by adding ZnO together with the Bi ₂ O ₃ -Sb ₂ O ₃ mixture and calcining in the range of ZnO 0.1 to 1 mol% and adding it to the main raw material. I was able to confirm.

  Next, high impulse resistance by adding a donor element was examined. There are two ways to increase the impulse resistance, one is to increase the thickness of the double Schottky barrier at the grain boundary, and to suppress the phenomenon that electrons jump over the grain boundary due to the tunnel effect when a large current is applied. The other is to reduce the specific resistance of ZnO and increase the thermal diffusion efficiency, thereby quickly diffusing the generated Joule heat throughout the device and preventing the destruction of one grain boundary. In reality, however, even if the double Schottky barrier is thickened to form a grain boundary that can withstand a large current, the generated Joule heat is large, and it is difficult to obtain a sufficient tolerance when concentrated at one grain boundary. Therefore, in order to improve the impulse withstand capability, it is considered important to reduce the specific resistance of ZnO, which is the latter, and improve the thermal diffusion efficiency.

Therefore, Table 4 shows the results obtained by changing the addition amount of Al ₂ O _{3 as} a donor element with respect to ZnO. This data was obtained by fabricating a chip varistor based on the above conditions, applying 2000 (A) with an 8/20 μs surge waveform, and measuring the varistor voltage change rate. The amount of Al ₂ O ₃ added is expressed in ppm with respect to ZnO.

As a result, it can be seen that by adding Al ₂ O ₃ in the range of 10 to 1000 ppm, the specific resistance of ZnO is lowered, the thermal diffusion efficiency is improved, and a high impulse resistance can be achieved.

Next, the manufacturing process of the varistor of this invention is demonstrated with reference to FIG. First, 100 mol% of zinc oxide (ZnO) with a median average particle size of about 3 μm, and 0.1 to 1.5 mol% of bismuth oxide (Bi ₂ O ₃ ), and antimony oxide (Sb ₂ O ₃ ) in an amount of the outer coating. and 0.01~2.0mol%, and 0.1～1.5Mol% of at least one of cobalt oxide (CoO) or manganese oxide (MnO _2), and 0.01 to 2 mol% of chromium oxide (Cr ₂ O _3), boric acid (H ₃ and BO ₃₎ to 0.1 to 1.0 mol%, prepared with 0.1 to 1.0 mol% of silicon dioxide (SiO _2), aluminum oxide (Al ₂ O ₃₎ a raw material containing 10-1000 ppm. Of these raw materials, the total amount of bismuth oxide (Bi ₂ O ₃ ) and antimony oxide (Sb ₂ O ₃ ) and zinc oxide (ZnO) 0.1 to 1.0 mol% were prepared (step 100) to form a calcined raw material, The mixture is pulverized and sized with a ball mill or the like (step 101), calcined in an oxidizing atmosphere within a temperature range of 700 to 1000 ° C. (step 102), and pulverized and sized with a ball mill or the like (step 103).

  Then, the calcined raw material and other raw materials are added to prepare a raw material (step 104). And it grind | pulverizes with a ball mill etc. and arranges a grain (step 105), PVB, a plasticizer, a mold release material, and a dilution solvent are added, and a slurry is produced (step 106). At this time, 0.5 to 3 wt% of a dispersant composed of a copolymer of α-olefin and maleic anhydride (for example, Floren G700 from Kyoeisha Chemical Co., Ltd.) is added. By using a dispersant composed of a copolymer of α-olefin and maleic anhydride, the efficiency of dispersion is particularly improved, and in the slurry, the composition of the material is uniformly dispersed, and the material has a uniform particle size. it can.

  Next, a film is formed with a doctor blade to produce a green sheet having a thickness of about 10 to 100 μm (step 107). A platinum (Pt) or palladium (Pd) paste pattern is printed on the green sheet to form an internal electrode pattern, which is laminated by hot pressing or the like (step 108). And it cuts according to product size (5750 size etc.), forms a green chip (step 109), debinders at 500 degreeC for 10 hours (step 110), and bakes at 950-1300 degreeC (step 111) ). At the time of firing, the temperature is raised to the predetermined temperature at a temperature rising rate of 400 ° C./hr to 1000 ° C./hr. Then, it is kept at a predetermined temperature for 2 to 10 hours, and is then allowed to cool to room temperature.

  Further, annealing is performed at 700 ° C. (step 112), and a terminal electrode (external electrode) is formed by applying silver (Ag) or silver / palladium (Ag / Pd) paste and baking (step 113). Then, the terminal electrode is plated in the order of a nickel (Ni) layer and a tin (Sn) layer (step 114), and electrical characteristics such as varistor voltage and leakage current are measured (step 115), and a finished product is obtained.

The varistor manufactured in the above manufacturing process can achieve low voltage limit by adding ZnO to the Bi ₂ O ₃ -Sb ₂ O ₃ mixture and adding it to the main raw material after calcination, and the range of 10 to 1000 ppm By adding Al ₂ O ₃ in this step, the specific resistance of ZnO is reduced, the thermal diffusion efficiency is improved, the impulse resistance is increased, the high-speed sintering of 400 ° C / hr or more, the co-polymerization of α-olefin and maleic anhydride By using a dispersant made of coalescence, the effect of sinterability due to the dispersant and high-speed temperature rise is maximized, and in addition to small variations in basic performance, circuit protection functions such as surge withstand capability and energy withstand capability are outstanding. An improved zinc oxide multilayer chip varistor can be obtained.

  Although one embodiment of the present invention has been described so far, it is needless to say that the present invention is not limited to the above-described embodiment, and may be implemented in various forms within the scope of the technical idea.

It is sectional drawing of a zinc oxide laminated chip varistor. It is a flowchart of the manufacturing method of the zinc oxide multilayer chip varistor of one Embodiment of this invention.

Explanation of symbols

10 Zinc Oxide Chip Chip Varistor 11 Varistor Sintered Body 12a, 12b Internal Electrode 13a, 13b External Electrode

Claims (3)

Preparing a varistor raw material containing zinc oxide, bismuth oxide, antimony oxide, at least one of cobalt oxide or manganese oxide, chromium oxide, boric acid, silicon dioxide, and aluminum oxide;
Add slurry and dispersant to the varistor raw material to make a slurry,
Create a green sheet using the slurry,
A green chip is made by laminating the above green sheets,
A method for producing a zinc oxide laminated chip varistor, wherein the green chip is heated to a predetermined temperature and fired,
The dispersant uses a copolymer of α-olefin and maleic anhydride,
The method for producing a zinc oxide laminated chip varistor, characterized in that the firing is performed at a temperature elevation rate of 500 ° C./hr or higher up to the predetermined temperature. Among the varistor material, manufacturing method of the zinc oxide laminated chip varistor according to claim 1, wherein the total amount of bismuth oxide and antimony oxide, to advance calcining at least a portion of the zinc oxide. The varistor raw material is zinc oxide 100 mol%, and the amount of this applied is at least one of bismuth oxide 0.1 to 1.5 mol%, antimony oxide 0.01 to 2.0 mol%, and cobalt oxide or manganese oxide. 0.1 to 1.5 mol%, chromium oxide 0.01 to 2.0 mol%, boric acid 0.1 to 1.0 mol%, silicon dioxide 0.1 to 1.0 mol%, and aluminum oxide 10 The manufacturing method of the zinc oxide multilayer chip varistor according to claim 1 or 2 , characterized by comprising -1000 ppm.

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