JP5277806B2 - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device capable of miniaturizing the constitution of the whole of a switching element when the switching element used in an environment of a large current is formed relative to a case where a switching element is formed by using a semiconductor device in the prior art. <P>SOLUTION: This semiconductor device includes a plurality of sets of first and second semiconductor chips 13, 14, and is structured such that the surface sides of the first and second semiconductor chips 13, 14 are connected to an intermediate member 15, and the backsides thereof are connected to a first radiation member 16 or a second radiation member 17, or the surface sides are connected to the first radiation member 16 or the second radiation member 17, and connected to the first intermediate member 15, thereby a circuit is formed wherein a switching element 11 and a diode 12 formed in the first and second semiconductor chips 13, 14 of each set are connected in parallel to each other, and circuits each composed of the switching element 11 and the diode 12 formed in the first and second semiconductor chips 13, 14 of each set are connected in parallel to each other. <P>COPYRIGHT: (C)2010,JPO&amp;INPIT

Description

  The present invention relates to a semiconductor device that can dissipate heat from the front and back surfaces of a semiconductor chip by disposing heat radiating members on the front and back sides of the semiconductor chip.

  2. Description of the Related Art Conventionally, a semiconductor device that can dissipate heat from the front and back surfaces of a semiconductor chip by arranging a pair of heat dissipation members on the front and back surfaces of the semiconductor chip so as to sandwich the semiconductor chip is known.

  For example, Patent Document 1 discloses a semiconductor device that includes an insulated gate bipolar transistor (hereinafter referred to as IGBT) and a free wheel diode (hereinafter referred to as FWD) as a semiconductor chip. Specifically, in such a semiconductor device, an intermediate member is disposed on the surface side of the IGBT and FWD, respectively, and a pair of heat dissipation members are disposed so as to sandwich the IGBT, FWD, and the intermediate member. And these IGBT, FWD, an intermediate member, and a heat radiating member are sealed with resin so that the surface on the opposite side to the surface of IGBT and FWD side among heat radiating members may be exposed.

  Such a semiconductor device is used, for example, so as to constitute a three-phase circuit as a switching element such as an inverter. This three-phase circuit has, for example, a U-phase circuit, a V-phase circuit, and a W-phase circuit, and each phase circuit has an upper arm element that performs upstream switching of a drive load and a lower arm that performs downstream switching. It has an element. When the semiconductor device is used as a switching element, for example, in an environment with a large current of 400A to 800A, the semiconductor device is an IGBT or FWD that constitutes the upper arm element and the lower arm element of each phase circuit. The chip area is set to a chip area corresponding to the current so that a large current can be allowed.

  However, in the semiconductor device disclosed in Patent Document 1, when the semiconductor device is configured by increasing the chip area of the IGBT and FWD in the chip plane direction, there is a possibility that defects are introduced into the substrate constituting the IGBT and FWD. Get higher. For this reason, there is a high possibility that defects are generated in the IGBT and FWD chips, and there is a problem that the yield of the semiconductor device is lowered. Furthermore, there is a problem that the semiconductor device is increased in size in the chip plane direction.

Therefore, a configuration is adopted in which the upper arm element and the lower arm element of each phase circuit are configured using a plurality of IGBT and FWD chips, respectively, and the IGBT and FWD of each chip are connected in parallel to each other. With such a configuration, it is possible to obtain a chip area corresponding to the current, to reduce the possibility of defects occurring in the IGBT and FWD, and to suppress a decrease in yield. it can. In such a configuration, each of the IGBT and FWD chips is configured as a semiconductor device having a structure described in Patent Document 1, and the semiconductor devices are stacked to prevent the chip from being enlarged in the chip plane direction. can do.
JP 2006-147852 A

  However, in the structure in which the semiconductor devices of Patent Document 1 are stacked in this way, the semiconductor device can be prevented from increasing in size in the chip plane direction, but in a direction (height direction) perpendicular to the chip plane direction. There is a problem of increasing the size.

  In view of the above points, the present invention configures a semiconductor device by disposing a heat dissipation member so as to sandwich a semiconductor chip, and configures a switching element used in a high current environment using this semiconductor device. It is an object of the present invention to provide a semiconductor device capable of reducing the size of the entire switching element as compared with the case where the switching element is configured using a conventional semiconductor device.

  In order to achieve the above object, according to the first aspect of the present invention, the first semiconductor chip (13), the second semiconductor chip (14), the first semiconductor chip (13), and the second semiconductor chip (14) An intermediate member (15) disposed between and thermally and electrically connected to the first semiconductor chip (13) and the second semiconductor chip (14); the first and second semiconductor chips (13, 14); First and second heat radiating members (16, 17) disposed so as to sandwich the intermediate member (15) and thermally and electrically connected to the first and second semiconductor chips (13, 14); The second semiconductor chip (13, 14) is disposed between the intermediate member (15) and the first and second heat radiating members (16, 17), and the first and second semiconductor chips (13, 14) and the middle. A member (15) and first and second heat dissipating members (16, 17); Is characterized that: in a semiconductor device having a connecting member for connecting (18), the.

That is, according to the first aspect of the present invention, a plurality of first semiconductor chips (13) and second semiconductor chips (14) are provided, and the switching elements (11) are formed in the first semiconductor chip (13). The diode (12) is formed on the two semiconductor chips (14), and the switching element (11) and the diode (12) are connected between the first semiconductor chip (13) and the front surface and the back surface of the second semiconductor chip (14). It is assumed that the vertical element flows. The first and second semiconductor chips (13, 14) are connected to the intermediate member (15) on the surface side of the first and second semiconductor chips (13, 14), and the first and second semiconductor chips ( 13, 14) is connected to the first heat radiating member (16) or the second heat radiating member (17), or the surface side of the first and second semiconductor chips (13, 14) is connected to the first heat radiating member. (16) or the second heat dissipating member (17) and the back side of the first and second semiconductor chips (13, 14) are connected to the intermediate member (15), whereby the first and second of each set The switching elements (11) and diodes (12) formed on the two semiconductor chips (13, 14) are connected in parallel and formed on the first and second semiconductor chips (13, 14) of each set. Switching element (11) and diode (12) Has a circuit made a configuration connected in parallel, respectively. The diode (12) is turned off when the switching element (11) is energized, and the switching element (11) is turned off when the diode (12) is energized. The intermediate member (15) has a plate shape and includes the first semiconductor chip (13) and the second semiconductor chip (14) on one side, and the first semiconductor chip (13) and the other side opposite to the one side. A second semiconductor chip (14) is provided, and the first semiconductor chip (13) and the second semiconductor chip (14) are arranged so as to face each other with the intermediate member (15) interposed therebetween.

  When such a semiconductor device is used as a switching element in a high-current environment, the physique of the entire switching element can be reduced in size as compared with the case where a conventional semiconductor device is used as a switching element. Specifically, the intermediate members (15), the heat dissipation members, and the connection members (18) are reduced compared to the case where the upper and lower arm elements of each phase circuit have a structure in which semiconductor devices are stacked as in the prior art. And the size of the entire switching element can be reduced.

Further, since the switching element (11) is cut off when the diode (12) is energized, and the diode (12) is cut off when the switching element (11) is energized, the first semiconductor chip. The time when heat is generated in (13) and the second semiconductor chip (14) can be made different. Therefore, the first semiconductor chip (13) and the second semiconductor chip (14) can be disposed close to one surface of the intermediate member (15) and the other surface opposite to the one surface.

Further, as in the second aspect of the present invention, a part of the end portion of the first heat radiating member (16) protrudes toward the second heat radiating member (17), and the end of the second heat radiating member (17) is formed. A part of the portion may be shaped to protrude toward the first heat radiating member (16), and may be a cylindrical member having a first heat radiating member (16) and a second heat radiating member (17).

  According to such a semiconductor device, the heat transmitted to the first and second heat radiating members (16, 17) diffuses to the protruding portions of the first and second heat radiating members (16, 17), respectively. The heat resistance of the first and second heat radiating members (16, 17) can be reduced, and the heat dissipation can be improved.

Furthermore, like the invention of Claim 3 , the 1st heat radiating member (16) and the 2nd heat radiating member (17) can also be made into the cylindrical member of 1 member integrated.

  In addition, the code | symbol in the bracket | parenthesis of each means described in this column and the claim shows the correspondence with the specific means as described in embodiment mentioned later.

(First embodiment)
A first embodiment of the present invention will be described. FIG. 1 is a diagram showing a circuit when a semiconductor device according to the present embodiment is used and a three-phase circuit is configured as a switching element such as an inverter. In addition, the semiconductor device of this embodiment is used as switching elements, such as an inverter, in a 400A-800A high current environment, for example.

  As shown in FIG. 1, the three-phase circuit of the present embodiment has a U-phase circuit, a V-phase circuit, and a W-phase circuit, and each phase circuit is an upper arm element 1a that performs upstream switching of a drive load. -3a and lower arm elements 1b-3b for downstream switching. The upper and lower arm elements 1a to 3b in each phase circuit have a plurality of IGBTs 11 corresponding to the switching elements of the present invention and FWDs 12 corresponding to the diodes of the present invention so as to allow a large current. Has been. In the present embodiment, the upper and lower arm elements 1a to 3b of each phase circuit are configured by having two IGBTs 11 and FWDs 12, and the IGBT 11 and the FWD 12 are connected in parallel, and are configured by the IGBT 11 and the FWD 12. Each circuit is connected in parallel.

  FIG. 2 is a diagram showing a cross-sectional configuration of the semiconductor device according to the present embodiment corresponding to the upper arm element 1a of the U-phase circuit shown in FIG. 2 shows a cross-sectional configuration of the semiconductor device corresponding to the upper arm element 1a of the U-phase circuit, the lower arm element 1b of the U-phase circuit, the upper and lower arm elements 2a, 2b of the V-phase circuit, and A semiconductor device similar to that in FIG. 2 is also used in the upper and lower arm elements 3a and 3b of the W-phase circuit. 3 is a front view of the semiconductor device shown in FIG. 1, and the semiconductor device shown in FIG. 2 corresponds to a cross-sectional view taken along line AA in FIG.

  As shown in FIGS. 1 to 3, the semiconductor device according to the present embodiment includes two first semiconductor chips 13, two second semiconductor chips 14, a first semiconductor chip 13, and a second semiconductor chip 14. Intermediate member 15 disposed between the first semiconductor chip 13, the second semiconductor chip 14, and the intermediate member 15, and the first and second heat radiating members 16, 17 disposed therebetween. The semiconductor chips 13 and 14 are disposed between the intermediate member 15 and the first and second heat dissipation members 16 and 17, and the first and second semiconductor chips 13 and 14 and the intermediate member 15 and the first and second heat dissipation members 16 are disposed. , 17 and a connecting member 18 that connects the two.

  An IGBT 11 is formed on the first semiconductor chip 13, and an FWD 12 is formed on the second semiconductor chip 14. The first and second semiconductor chips 13, 14 are vertical elements in which current flows between the front surface and the back surface. It is said that. In the present embodiment, the first semiconductor chip 13 has the front side as the gate and emitter side and the back side as the collector side, and the second semiconductor chip 14 has the front side as the anode side and the back side. It is the cathode side.

  In the intermediate member 15, the first semiconductor chip 13 and the second semiconductor chip 14 are disposed on one surface, and the first semiconductor chip 13 and the second semiconductor chip 14 are disposed on the other surface opposite to the one surface. . In the present embodiment, the first and second semiconductor chips 13 and 14 are arranged so that the first semiconductor chip 13 and the second semiconductor chip 14 face each other with the intermediate member 15 in between.

  Further, the first heat radiation member 16 and the second heat radiation member 17 are arranged so as to sandwich the first semiconductor chip 13, the second semiconductor chip 14 and the intermediate member 15. In the present embodiment, the first heat radiating member 16 has a shape in which a part of the end protrudes toward the second heat radiating member 17, and the second heat radiating member 17 has a part of the end protruded toward the first heat radiating member 16. The first heat radiating member 16 and the second heat radiating member 17 are connected to each other through a connecting member 18 such as solder to form a cylindrical member.

  A connecting member 18 such as solder is disposed between the first and second semiconductor chips 13 and 14 and the intermediate member 15 and the first and second heat radiating members 16 and 17. (2) The semiconductor chips 13 and 14, the intermediate member 15, and the first and second heat radiating members 16 and 17 are connected thermally and electrically. In the present embodiment, the first and second semiconductor chips 13 and 14 are each connected to the intermediate member 15 on the front surface side and to the first heat radiating member 16 or the second heat radiating member 17 on the back surface side. Specifically, the gate and emitter sides of the first semiconductor chip 13 and the anode side of the second semiconductor chip 14 are connected to the intermediate member 15, and the collector side of the first semiconductor chip 13 and the cathode side of the second semiconductor chip 14 are the first. The heat radiating member 16 or the second heat radiating member 17 is connected.

  Since the first and second semiconductor chips 13 and 14 are connected to the intermediate member 15 and the first and second heat radiating members 16 and 17 as described above, the first heat radiating member 16 and the second heat radiating member 17 are connected. And become equipotential. For this reason, the IGBT 11 formed on the first semiconductor chip 13 and the FWD 12 formed on the second semiconductor chip 14 are connected in parallel, and this circuit composed of the IGBT 11 and the FWD 12 is connected in parallel. It becomes the composition.

  In the present embodiment, the intermediate member 15 and the first and second heat radiating members 16 and 17 are configured using, for example, a metal whose main component is Cu, Al, or the like.

  Further, the first semiconductor chip 13, the second semiconductor chip 14, the intermediate member 15, and the first and second heat radiating members 16 and 17 are the first semiconductor chip 13 and the second heat radiating members 16 and 17. It is sealed with a sealing member 19 so that the surface opposite to the surface on the semiconductor chip 14 side is exposed. 4 is a diagram showing an internal planar structure of the semiconductor device shown in FIG.

  As shown in FIGS. 1 to 4, the first power lead 20 is connected to the intermediate member 15, and the second power lead 21 is connected to the second heat radiating member 17. Further, the IGBT 11 formed on the first semiconductor chip 13 is electrically connected to the lead frame 22 via a wire 23 formed by wire bonding. Then, the wire-bonded portions of the first semiconductor chip 13, the second semiconductor chip 14, the intermediate member 15, and the lead frame 22 are sealed with a sealing member 19. As the sealing member 19, for example, a member having a thermal expansion coefficient close to that of the first and second heat radiating members 16 and 17 is preferably used. For example, an epoxy-based mold resin or polyamide can be used.

  Such a semiconductor device is manufactured as follows, for example.

  First, the first semiconductor chip 13 is connected to the first heat radiating member 16 from the back surface side via the connection member 18, and the second semiconductor chip 14 is connected from the back surface side via the connection member 18. Similarly, the first semiconductor chip 13 is connected to the second heat radiating member 17 from the back surface side via the connection member 18, and the second semiconductor chip 14 is connected from the back surface side via the connection member 18. .

  After that, the intermediate member 15 is connected to the surface side of the first semiconductor chip 13 and the second semiconductor chip 14 connected to the second heat dissipation member 17 via the connection member 18. Subsequently, the surface sides of the first semiconductor chip 13 and the second semiconductor chip 14 connected to the first heat dissipation member 16 are connected to the intermediate member 15 via the connection member 18, and the first heat dissipation member 16 and the second heat dissipation member 16 are connected to the second heat dissipation member 16. The heat radiating member 17 is connected via the connecting member 18. Thereafter, the wire-bonded portions of the first semiconductor chip 13, the second semiconductor chip 14, the intermediate member 15, and the lead frame 22 are sealed with the sealing member 19, whereby the semiconductor device of this embodiment is manufactured. .

  In such a semiconductor device, the FWD 12 is cut off when the IGBT 11 is energized, and the IGBT 11 is cut off when the FWD 12 is energized. Accordingly, when the IGBT 11 is energized, for example, heat generated from the first semiconductor chip 13 on the left side in FIG. 2 is transferred from the collector side to the first heat radiating member 16 and radiated, and from the gate and emitter sides to the intermediate member. 15, the FWD 12, and the second heat radiating member 17 are transmitted and radiated. Similarly, when the FWD 12 is energized, for example, heat generated from the second semiconductor chip 14 on the left side in FIG. 1 is transferred from the cathode side to the second heat radiating member 17 and radiated, and from the anode side to the intermediate member 15. The heat is transmitted to the first semiconductor chip 13 and the first heat radiating member 16 to be radiated.

  According to such a semiconductor device, the upper and lower arm elements 1a to 3b in each phase circuit are larger in size in the direction perpendicular to the chip plane direction than in the case where the conventional semiconductor devices are stacked. Can be prevented. FIG. 5 is a comparative view of a structure in which the semiconductor device of this embodiment corresponding to the upper arm element 1a in the U-phase circuit in FIG. 1 and the conventional semiconductor device are stacked. 5A is a diagram showing a cross-sectional configuration when a conventional semiconductor device is stacked, and FIG. 5B is a diagram showing a cross-sectional configuration of the semiconductor device of the present embodiment. . As shown in FIG. 5, when the conventional semiconductor device and the semiconductor device of this embodiment are applied as switching elements, each heat dissipating member is provided with a cooling member 24 with an insulating substrate (not shown) interposed therebetween. Further, in FIG. 5A, the same reference numerals are given to portions using the same members as those of the semiconductor device of the present embodiment.

  As shown in FIG. 5, in order to form the upper arm element 1a in the U-phase circuit, conventionally, a structure in which semiconductor devices are stacked has to be used. However, according to the semiconductor device of this embodiment, one semiconductor device is used. It can consist only of devices. For this reason, when the semiconductor device of this embodiment is applied as a switching element, the physique of a switching element can be reduced compared with the case where the conventional semiconductor device is applied.

Specifically, as shown in FIG. 5, in the semiconductor device according to the present embodiment, compared with the structure in which the conventional semiconductor devices are stacked, the intermediate member 15 for one layer in the direction perpendicular to the chip plane direction Further, the heat radiation member for one layer and the connection member 17 for two layers can be reduced, and the semiconductor device can be prevented from being enlarged in a direction perpendicular to the chip plane direction. Similarly, in the lower arm element 1b of the U-phase circuit, the upper and lower arm elements 2a and 2b of the V-phase circuit, and the upper and lower arm elements 3a and 3b of the W-phase circuit, respectively, the intermediate member 15, the heat dissipation member, and the connection member 17 can be reduced. Since the intermediate member 15, the heat radiating member, and the connecting member 17 can be reduced, the cost of the semiconductor device can be reduced. In the semiconductor device of the present embodiment, the first heat radiating member 16 and the second heat radiating member are also provided. Since the member 17 is equipotential, there is no need to dispose the sealing member 19 so as to ensure a predetermined creepage distance between the first heat radiating member 16 and the second heat radiating member 17. The sealing member 19 arrange | positioned in order to ensure creepage distance like an apparatus can be reduced. Therefore, according to the semiconductor device of this embodiment, the size of the semiconductor device in the chip plane direction can be reduced as compared with the conventional semiconductor device.

  Furthermore, in the present embodiment, since the first heat radiating member 16 and the second heat radiating member 17 are connected to form a cylindrical member, the heat generated from the first semiconductor chip 13 or the second semiconductor chip 14 1, after being transmitted to the second heat radiating members 3, 4, a portion of the first heat radiating member 16 that protrudes toward the second heat radiating member 17 and a portion of the second heat radiating member 17 that protrudes toward the first heat radiating member 16 It can also diffuse to the part where it is. Therefore, when the volume of the portion parallel to the chip plane direction in the first and second heat dissipation members 16 and 17 of the present embodiment is the same as the volume of the heat dissipation member in the conventional semiconductor device, the first and second The thermal resistance of the heat radiating members 16 and 17 can be reduced as compared with the conventional semiconductor device, and the heat dissipation can be improved. Moreover, since the 1st heat radiating member 16 and the 2nd heat radiating member 17 are connected and it is set as the cylindrical member, the part which arrange | positions the cooling members 13 and 14 can be increased rather than the conventional semiconductor device, and heat dissipation. Can be improved.

(Second Embodiment)
A second embodiment of the present invention will be described. The semiconductor device of the present embodiment is obtained by adding a first semiconductor chip 13 and a second semiconductor chip 14 to the first embodiment, and the other parts are the same as those of the first embodiment, and thus description thereof is omitted here. To do.

  FIG. 6 is a diagram showing a cross-sectional configuration of the semiconductor device of this embodiment. As shown in FIG. 6, the semiconductor device of the present embodiment is configured to include three first semiconductor chips 13 and three second semiconductor chips 14. Specifically, in the intermediate member 15, two first semiconductor chips 13 and one second semiconductor chip 14 are alternately arranged on one surface, and one first semiconductor chip is disposed on the other surface opposite to the one surface. Semiconductor chips 13 and two second semiconductor chips 14 are alternately arranged. The first and second semiconductor chips 14 are arranged so that the first semiconductor chip 13 and the second semiconductor chip 14 face each other with the intermediate member 15 interposed therebetween.

  In such a semiconductor device, since the first semiconductor chip 13 and the second semiconductor chip 14 are further provided with respect to the first embodiment, the semiconductor device can be used even in a higher current environment than the first embodiment. However, the same effect as the first embodiment can be obtained. Note that the semiconductor device of the present embodiment is a circuit in which the circuits composed of the IGBT 11 and the FWD 12 are further connected in parallel in the upper and lower arm elements 1a to 3b of each phase circuit in FIG.

(Third embodiment)
A third embodiment of the present invention will be described. The semiconductor device of this embodiment is obtained by adding a first semiconductor chip 13, a second semiconductor chip 14, an intermediate member 15, and a first heat dissipation member 16 to the first embodiment. Since it is the same as that, description is abbreviate | omitted here.

  FIG. 7 is a diagram showing a cross-sectional configuration of the semiconductor device of this embodiment. As shown in FIG. 7, the semiconductor device of this embodiment is configured to include four first semiconductor chips 13 and four second semiconductor chips 14. The semiconductor devices of the first embodiment are stacked in common. Specifically, the first semiconductor chip 13 and the second semiconductor chip 14 are arranged on one surface of each intermediate member 15, and the first semiconductor chip 13 and the second semiconductor chip 14 are arranged on the other surface opposite to the one surface, respectively. A semiconductor chip 14 is arranged. The first and second semiconductor chips 13 and 14 are arranged so that the first semiconductor chip 13 and the second semiconductor chip 14 face each other with the intermediate member 15 in between. Further, the first semiconductor chip 13 and the second semiconductor chip 14 are arranged to face each other with the second heat radiating member 17 interposed therebetween.

  In such a semiconductor device, since the first semiconductor chip 13 and the second semiconductor chip 14 are further provided with respect to the first embodiment, the semiconductor device can be used even in a higher current environment than the first embodiment. However, the same effect as the first embodiment can be obtained. The semiconductor device of the present embodiment is a circuit in which two more circuits composed of IGBTs 11 and FWDs 12 are connected in parallel in the upper and lower arm elements 1a to 3b of each phase circuit in FIG.

(Other embodiments)
In each said embodiment, although the example which connected the 1st heat radiating member 16 and the 2nd heat radiating member 17 with the connection members 18, such as solder, was given and demonstrated, you may connect by welding etc., for example. Moreover, the 1st heat radiating member 16 and the 2nd heat radiating member 17 may be made into the cylindrical member of one member by integrally forming. In this case, the first and second semiconductor chips 13 and 14 are connected to one surface of the intermediate member 15 via the connection member 18 so as to have the structure described above, and connected to the other surface opposite to the one surface. The first and second semiconductor chips 13 and 14 are connected via the member 18. Further, the first and second heat radiating members 16 and 17 that are formed as a single cylindrical member have good solder wettability by plating the portion where the first semiconductor chip 13 and the second semiconductor chip 14 are disposed. After that, solder is applied so as to include this portion. Then, the intermediate member 15 including the first semiconductor chip 13 and the second semiconductor chip 14 is disposed on the first and second heat radiating members 16 and 17, and heat treatment is performed to connect the first and second semiconductor chips 13 and 14 to the first. The semiconductor device is manufactured by connecting to the first heat radiating member 16 or the second heat radiating member 17 and sealing with the sealing member 19.

  In each of the above embodiments, the first and second heat radiating members 16 and 17 are arranged in a direction parallel to the surface on which the first and second heat radiating members 16 and 17 are exposed. A penetrating hole may be formed, and the sealing member 19 may be disposed in this hole. According to such a semiconductor device, since the sealing member 19 is disposed in the hole, peeling between the sealing member 19 and the first and second heat radiating members 16 and 17 can be suppressed.

  Further, in each of the above embodiments, the first semiconductor chip 13 and the second semiconductor chip 14 are disposed on one surface of the intermediate member 15 and the first semiconductor chip 13 and the second semiconductor chip are disposed on the other surface opposite to the one surface. 14 is disposed, and the first semiconductor chip 13 and the second semiconductor chip 14 are disposed so as to face each other with the intermediate member 15 interposed therebetween. However, the intermediate member 15 has the first semiconductor on one side. A configuration in which the chip 13 is disposed and the second semiconductor chip 14 is disposed on one surface opposite to the one surface may be employed.

  In the second embodiment, the intermediate member 15 has the first semiconductor chip 13 and the second semiconductor chip 14 alternately arranged on one surface, and the first semiconductor chip 13 and the second semiconductor chip 13 on the other surface opposite to the one surface. Although the example in which the two semiconductor chips 14 are alternately arranged has been described, the first semiconductor chip 13 and the second semiconductor chip 14 may not be alternately arranged.

  Furthermore, in the said 3rd Embodiment, although the example arrange | positioned so that the 1st semiconductor chip 13 and the 2nd semiconductor chip 14 may oppose on both sides of the 2nd heat radiating member 17, the 2nd heat radiating member 17 was demonstrated. The first semiconductor chip 13 and the second semiconductor chip 14 may not be disposed so as to face each other.

  Moreover, in each said embodiment, although the example made into the cylindrical member by having connected the 1st heat radiating member 16 and the 2nd heat radiating member 17 was given and explained, of course, the 1st heat radiating member 16 and the 2nd It does not need to be a cylindrical member by connecting the heat radiating member 17. That is, a part of the end portion of the first heat radiating member 16 may not have a shape protruding to the second heat radiating member 17 side, and a part of the end portion of the second heat radiating member 17 may be the first heat radiating member 16 side. It does not have to have a shape protruding.

  Furthermore, in each said embodiment, the surface side of the 1st semiconductor chip 13 and the 2nd semiconductor chip 14 is connected with the intermediate member 15, and the back surface side is connected with the 1st heat radiating member 16 or the 2nd heat radiating member 17. However, the front surface side of the first semiconductor chip 13 and the second semiconductor chip 14 may be connected to the first heat radiating member 16 or the second heat radiating member 17 and the back surface side may be connected to the intermediate member 15. .

  Further, the first and second semiconductor chips 13 and 14 may be disposed on the intermediate member 15 by combining the second embodiment and the third embodiment.

  Further, in each of the above embodiments, since the size of the switching element can be reduced as compared with the case where a conventional semiconductor device is applied as the switching element, the heat radiation member is made thicker in the direction perpendicular to the chip plane direction than in the past. May be. According to such a semiconductor device, the heat resistance of the heat dissipating member can be reduced, so that the heat dissipating property can be improved as compared with the related art.

It is a figure which shows a circuit when a three-phase circuit is comprised using the semiconductor device concerning 1st Embodiment of this invention. FIG. 2 is a diagram showing a cross-sectional configuration of a semiconductor device that constitutes an upper arm element in the U-phase circuit shown in FIG. 1. FIG. 3 is a front view of the semiconductor device shown in FIG. 2. It is a figure which shows the internal planar structure in the semiconductor device shown in FIG. (A) is a figure which shows the cross-sectional structure when it is set as the structure which laminated | stacked the conventional semiconductor device, (b) is a figure which shows the cross-sectional structure of the semiconductor device in 1st Embodiment. It is a figure which shows the cross-sectional structure of the semiconductor device in 2nd Embodiment of this invention. It is a figure which shows the cross-sectional structure of the semiconductor device in 3rd Embodiment of this invention.

Explanation of symbols

11 IGBT
12 FWD
13 First Semiconductor Chip 14 Second Semiconductor Chip 15 Intermediate Member 16 First Heat Dissipation Member 17 Second Heat Dissipation Member 18 Connection Member 19 Sealing Member 20 First Power Lead 21 Second Power Lead

Claims (3)

A first semiconductor chip (13) and a second semiconductor chip (14);
It is disposed between the first semiconductor chip (13) and the second semiconductor chip (14), and is thermally and electrically connected to the first semiconductor chip (13) and the second semiconductor chip (14). Intermediate member (15),
The first and second semiconductor chips (13, 14) and the intermediate member (15) are disposed so as to be sandwiched therebetween, and are thermally and electrically connected to the first and second semiconductor chips (13, 14). First and second heat radiating members (16, 17);
The first and second semiconductor chips (13, 14) are disposed between the intermediate member (15) and the first and second heat radiating members (16, 17). 13 and 14) and the connecting member (18) for connecting the intermediate member (15) and the first and second heat radiating members (16, 17),
A plurality of sets of the first semiconductor chip (13) and the second semiconductor chip (14) are provided,
A switching element (11) is formed on the first semiconductor chip (13), a diode (12) is formed on the second semiconductor chip (14), and the switching element (11) and the diode (12) are formed. ) Is a vertical element in which current flows between the front surface and the back surface of the first semiconductor chip (13) and the second semiconductor chip (14),
The first and second semiconductor chips (13, 14) are connected to the intermediate member (15) on the surface side of the first and second semiconductor chips (13, 14), and the first and second semiconductor chips. The back side of (13, 14) is connected to the first heat radiating member (16) or the second heat radiating member (17), or the surface side of the first and second semiconductor chips (13, 14) is the above By being connected to the first heat dissipating member (16) or the second heat dissipating member (17) and the back side of the first and second semiconductor chips (13, 14) being connected to the intermediate member (15), The switching elements (11) and the diodes (12) formed on the first and second semiconductor chips (13, 14) of each set are connected in parallel, and the first set of the first and second semiconductor chips (13, 14). 1. Second semiconductor chip (1 Are configured to the circuit composed out said diode (12) and the switching element formed on 14) (11) are connected in parallel, respectively,
With said diode (12) is blocked state when being energized the switching element (11), said switching element (11) is Ri cutoff state der when said diode (12) is energized,
The intermediate member (15) has a plate shape, and includes the first semiconductor chip (13) and the second semiconductor chip (14) on one surface, and the other surface opposite to the one surface. One semiconductor chip (13) and the second semiconductor chip (14) are provided, and the first semiconductor chip (13) and the second semiconductor chip (14) are opposed to each other with the intermediate member (15) interposed therebetween. A semiconductor device, wherein the semiconductor device is arranged as described above . A part of the end of the first heat radiating member (16) protrudes toward the second heat radiating member (17), and a part of the end of the second heat radiating member (17) is the first. It is made into the shape protruded to the 1 heat radiating member (16) side, The cylindrical member which has the said 1st heat radiating member (16) and the said 2nd heat radiating member (17) is comprised, It is characterized by the above-mentioned. The semiconductor device according to claim 1 . The semiconductor device according to claim 1, wherein the first heat radiating member (16) and the second heat radiating member (17) are integrated into a single cylindrical member.

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