JP5271661B2 - Liquid crystal display - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a liquid crystal display wherein a plurality of switching elements for static electricity protection are formed in individual dummy pixel formed on the periphery of a display area. <P>SOLUTION: A plurality of dummy pixels enclosed by scanning lines 12 and signal lines 16 are formed in a non-display area ND on the periphery of the display area DA on an array substrate of the liquid crystal display, protection TFTs 30 as the plurality of switching elements connected to the scanning lines 12 or signal lines 16 are formed in each of the plurality of dummy pixels and the plurality of protection TFTs 30 are connected to be parallel to each other and a drain electrode D of electrodes of the protection TFTs 30 is connected to a common potential. <P>COPYRIGHT: (C)2010,JPO&amp;INPIT

Description

The present invention relates to a liquid crystal display device, and more particularly to a liquid crystal display device in which a plurality of electrostatic protection switching elements are formed in individual dummy pixels formed around a display region.

In general, liquid crystal display devices are characterized by thinness, light weight, and low power consumption. In particular, active matrix liquid crystal display devices using thin film transistors (TFTs) as switching elements are used in mobile phones and portable terminals for large televisions. Widely used. However, in the liquid crystal display device, when static electricity enters the display area during the manufacturing process or during use, a display defect occurs when the liquid crystal display device is completed. Especially in small and medium-sized models, static electricity defects are more likely to occur as the resolution becomes higher. Static electricity is generated only by contact with other objects in the manufacturing process and when the panel is transported. Further, when the alignment film is rubbed, static electricity is most likely to occur due to friction. Therefore, in the manufacturing technical field of liquid crystal display devices, it is required to prevent display defects due to static electricity.

In order to prevent the occurrence of such pixel defects due to static electricity, Japanese Patent Application Laid-Open No. 2004-151867 discloses that dummy pixels are formed in the periphery of the display area, and a plurality of minute dummy pixels for electrostatic protection are formed in the dummy pixels. An invention of a liquid crystal display device in which an electrode and a switching element are formed is disclosed. Here, the configuration of the dummy pixel portion of the liquid crystal display device disclosed in Patent Document 1 below will be described with reference to FIGS.

FIG. 8 is an enlarged plan view of the dummy pixel region of the array substrate disclosed in Patent Document 1 below. FIG. 9 is an enlarged plan view of a portion IX in FIG. 10 is a cross-sectional view taken along line XX of FIG.

The liquid crystal display device 50 of the conventional example is a transflective liquid crystal display device, and a plurality of scanning lines and signal lines provided in a matrix with a gate insulating film interposed therebetween are provided on a first translucent substrate 51. ing. In FIG. 8, scanning lines Xn-2, Xn-1, Xn, Xn + 1, Xn are used as scanning lines.
Only the portion of +2, and only the portions of Y1, Y2,... Ym are shown as signal lines. Among these, the area surrounded by the plurality of scanning lines X1, X2... Xn and the signal lines Y1, Y2... Ym is a display area, and the plurality of scanning lines Xn, Xn + 1, Xn + 2 and the signal lines Y1, Y2 are.・ ・
The area surrounded by Ym is a non-display area.

In this display area, a pixel electrode 52 and a reflecting plate 65 contributing to display are provided for each area surrounded by each scanning line and signal line. In the TFT 54, the source electrode S is connected to the signal lines Y1, Y2,... Ym, and the gate electrode G is connected to the scanning lines X1, X2,.
The drain electrode D is electrically connected to the pixel electrode 52 and the reflection plate 65 through a contact hole (not shown). In addition, an auxiliary capacitance electrode 53 is provided below the drain electrode D. The operation principle of the liquid crystal display device 50 having such a configuration is as follows.
Since it is already known, its detailed description is omitted.

On the other hand, a non-display area surrounded by scanning lines Xn, Xn + 1, Xn + 2 and signal lines Y1, Y2,... Ym is formed around the display area of the liquid crystal display device 50. In this non-display area, a TFT 66 is formed. A plurality of dummy pixels having dummy pixel electrodes 67 that do not contribute to display are provided for each of the signal lines Y1, Y2,. The source electrode S of the TFT 66 of the dummy pixel is connected in parallel for each signal line Y1, Y2,... Ym, the gate electrode G is connected in parallel for each scanning line Xn + 1, Xn + 2, and the drain electrode D is further connected. As shown in FIG. 10, it is connected to a dummy pixel electrode 67 provided on the interlayer film 69 through a contact hole 68. The TFT 66 of the dummy pixel is smaller than the channel width and channel length of the TFT 54 connected to the pixel electrode 52 contributing to display, and is thereby connected to the pixel electrode 52 contributing to display. The electrostatic breakdown is preferentially performed over the TFT 54.

The area of the dummy pixel electrode 67 is the pixel electrode 5 that contributes to the display of one pixel in the display region.
2 and the area of the reflecting plate 65 are made smaller. 8 and 9, each area of the dummy pixel electrode 67 is set to 1/10 of the area of the pixel electrode 52 and the reflecting plate 65 contributing to display for one pixel in the display region, and the scanning lines Xn and Xn + 1 are used. A total of 20 units are shown, 10 units between each of Xn + 1 and Xn + 2 respectively.

In the liquid crystal display device 50 having such a configuration, it enters the static electricity from the signal line input terminal 62 Then, TFT 66 ₁ of the nearest dummy pixel region to the signal line input terminal 62 to discharge static electricity causing the electrostatic breakdown . Thereafter, when static electricity enters from the signal line input terminal 62 again, the TFT 66 ₂ adjacent to the TFT 66 _{1 in} the dummy pixel region that first caused the electrostatic breakdown is electrostatically destroyed, thereby discharging the static electricity. For this reason, in the manufacturing process of the liquid crystal display device 50, since the static electricity approach that destroys the thin film transistor 54 in the display region can be allowed up to 20 times, a transflective type in which display defects do not substantially occur. The liquid crystal display device 50 is obtained.
JP 2006-276590 A

However, the dummy pixels shown in the liquid crystal display device 50 disclosed in Patent Document 1 are formed in a non-display area on the upper and lower sides of the display area in plan view (hereinafter referred to as “source dummy pixel area”). It is what has been. Therefore, in the source dummy pixel region, a plurality of dummy pixels are formed in the region for one pixel, so that it is possible to cope with a plurality of times of static electricity entering from the signal line side. However, in the non-display area on the left and right sides of the display area in plan view (hereinafter referred to as “gate dummy pixel area”), it is difficult to form a plurality of dummy pixels in one pixel area. In order to cope with a plurality of static electricity intrusions from the side, it is necessary to form a plurality of dummy pixels toward the outside on both the left and right sides of the display area in a plan view. Therefore, it is difficult to reduce the width of the gate dummy pixel region. In addition, the dummy pixel shown in the liquid crystal display device 50 disclosed in Patent Document 1 is
Since the TFT 66 and the dummy pixel electrode 67 are provided, the configuration is complicated.

The present invention has been made to solve the above-described problems of the prior art. That is, according to the present invention, it is possible to form a plurality of electrostatic protection elements having a simple configuration in the area corresponding to one pixel in all the non-display areas, and without increasing the width of the non-display area. An object of the present invention is to provide a liquid crystal display device that can cope with a large number of static electricity ingresses .

In order to achieve the above object, a liquid crystal display device of the present invention has a first substrate and a second substrate that are arranged to face each other with a liquid crystal layer interposed therebetween, and the liquid crystal layer side of the first substrate has a matrix shape. A plurality of scanning lines and signal lines arranged, a thin film transistor arranged in the vicinity of the intersection of each scanning line and signal line in the display area, and a pixel area surrounded by each scanning line and signal line in the display area A plurality of dummy pixels surrounded by the scanning lines and signal lines are formed in a non-display area around the display area and a pixel electrode that is arranged for each and electrically connected to the thin film transistor . in the liquid crystal display device, each of the plurality of the dummy pixel, the gate electrode and the scanning lines, a plurality of thin film transistors source electrode connected to said signal lines are formed, the plurality of thin films Thorens Star drain electrodes of said plurality of thin film transistor is connected in parallel with each other that is connected to the common potential.

In the liquid crystal display device of the present invention, a plurality of dummy pixels surrounded by each scanning line and signal line are formed in a non-display area around the display area. That is, the liquid crystal display device of the present invention is located on both ends of the display region in the row direction in plan view also in the source dummy pixel region, which is a non-display region located on both ends in the column direction of the display region in plan view. A dummy pixel region is also formed in the gate dummy pixel region which is a non-display region. Then, the dummy pixel area a plurality of dummy pixels formed in each of the dummy pixels are formed with a plurality of thin film transistors, multiple thin film transistor is connected in parallel with each other, the drain electrodes of the thin film transistor is connected to the common potential ing. Note that a dummy pixel electrode may be formed in the dummy pixel region, and this dummy pixel electrode is connected to the drain electrode of the thin film transistor through the contact hole, and is used to connect the drain electrode of the thin film transistor to the common potential. Also good.

In addition, since the plurality of thin film transistors are connected to the scanning lines or signal lines, they are formed side by side along the scanning lines or signal lines. Moreover, since the drain electrodes of the plurality of thin film transistors is connected to the common potential, when static electricity to the scan line or signal line enters, the electrostatic breakdown from TFT near the entry point of the static electricity in order, the static electricity common potential Therefore, the display area of the liquid crystal display device can be effectively protected. In addition, since the entrance of static electricity is allowed until all of the plurality of thin film transistors are electrostatically destroyed, a liquid crystal display device in which display defects do not substantially occur can be obtained by increasing the number of thin film transistors .

The present invention is not limited to a vertical electric field liquid crystal display device such as a TN (Twisted Nematic) mode, a VA (Vertical Alignment) mode, and an ECB (Electrically Controlled Birefringence) mode, but also an IPS (In-Plane Switching) mode, The present invention can also be applied to a horizontal electric field type liquid crystal display device such as an FFS (Fringe Field Switching) mode. Further, as a switching element which can be used in the present invention, a thin film transistor (TFT: Thin Film Transistor) Besides, the thin-film diode (Thin Film Diode), may be used a MIM (Metal Insulator Metal) element or the like.

In the liquid crystal display device of the present invention, it is preferable that the plurality of thin film transistors formed in the dummy pixels have substantially the same size as the thin film transistors formed in the pixel region.

If a plurality of thin film transistors TFT and substantially the same size formed in the pixel region formed in the dummy pixel, there is no particular need to take a mask or the like of the thin film transistor formed in the dummy pixel region, moreover, the liquid crystal display device It can be formed simultaneously with the formation of the thin film transistor . Therefore, the liquid crystal display device of the present invention can be easily manufactured even though it includes a plurality of thin film transistors in the dummy pixel region. The “substantially the same size” in the present invention is not necessarily the same size, but is used in the sense that the same size is preferable.

In the liquid crystal display device of the present invention, a plurality of thin film transistors formed on the dummy pixel is made form along the scan lines, wiring which runs in a straight line from the signal line of the plurality thin film transistors It is preferable to be connected to the source electrode .

In the liquid crystal display device of the present invention, a plurality of thin film transistors can be easily formed in one dummy pixel. Therefore, according to the liquid crystal display device of the present invention, a plurality of thin film transistors can be formed along the scanning line without increasing the width of the source dummy pixel region. The display area can be effectively protected.

In the liquid crystal display device of the present invention, a plurality of thin film transistors formed on the dummy pixels, along said signal line made form, the extended wiring linearly from the scanning line said plurality of thin film transistors It is preferably connected to the gate electrode .

According to the liquid crystal display device of the present invention, since a plurality of thin film transistors can be formed along the signal line without increasing the width of the source dummy pixel region, the display of the liquid crystal display device can be achieved even when the width of the gate dummy pixel region is small. The area can be effectively protected.

The TFT is generally used as a switching element of a liquid crystal display device.
Therefore, according to the liquid crystal display device of the present invention, the switching element in the display area and the switching element in the dummy pixel are made of TFTs, and therefore, these switching elements can be simultaneously and easily manufactured.

Furthermore, in the liquid crystal display device of the present invention, the TFT formed in the dummy pixel is
It is preferable that the channel width and channel length of the TFT formed in the display region are smaller.

If the channel width and channel length of the TFT formed in the dummy pixel are smaller than those of the TFT formed in the display region, electrostatic breakdown is more likely to occur. Therefore, according to the liquid crystal display device of the present invention, even if static electricity enters from the outside, the TFT formed on the dummy pixel is surely electrostatically destroyed first, so that it is difficult for static electricity to enter the display area. Thus, the display area of the liquid crystal display device can be effectively protected.

Hereinafter, the best mode for carrying out the present invention will be described with reference to the embodiment and the drawings.
The embodiments described below are not intended to limit the present invention to those described herein, and the present invention has been variously modified without departing from the technical idea shown in the claims. It can be applied equally. In each drawing used for the description in this specification, each layer and each member are displayed in different scales so that each layer and each member can be recognized on the drawing. However, it is not necessarily displayed in proportion to the actual dimensions.

FIG. 1 is a schematic plan view showing an array substrate of the liquid crystal panel of the embodiment. FIG. 2 is an enlarged plan view of a portion II in FIG. FIG. 3 is an enlarged plan view of one sub pixel in the display area of FIG. FIG.
FIG. 4 is a sectional view taken along line IV-IV in FIG. 3. FIG. 5 is an enlarged plan view of one dummy pixel in the gate dummy pixel region of FIG. 6 is a sectional view taken along line VI-VI in FIG. FIG. 7 is an enlarged plan view of one dummy pixel in the gate dummy pixel region of the modification.

[Embodiment]
A liquid crystal panel 10 according to an embodiment will be described with reference to FIGS. In the liquid crystal panel 10 according to the embodiment, as shown in FIG. 4, the liquid crystal layer LC is sandwiched between the array substrate AR and the color filter substrate CF. The thickness of the liquid crystal layer LC is uniformly maintained by columnar spacers (not shown). Further, polarizing plates (not shown) are respectively formed on the back surface of the array substrate AR and the front surface of the color filter substrate CF. Light is irradiated from the back side of the array substrate AR by a backlight (not shown).

As shown in FIG. 1, the array substrate AR includes a display area DA on which various images are displayed and a non-display area ND that is a periphery of the display area DA. A first terminal portion Dr for mounting the driver IC and a second terminal portion Tp for external connection are formed. In the non-display area ND, the scanning line routing wiring GL for routing the scanning line of the display area DA to the first terminal portion Dr and the signal line routing wiring S for routing the signal line to the first terminal portion Dr.
L is provided. In addition, the auxiliary capacitance line 13 (see FIGS. 3 to 5) is provided in the non-display area ND for the first time.
A common wiring line COM for routing to the terminal portion Dr is also formed.

As shown in FIG. 2, dummy pixel areas DP each including a source dummy pixel area SD, a gate dummy pixel area GD, and a common dummy pixel area CD are formed at the boundary between the display area DA and the non-display area ND. Has been. The source dummy pixel region SD is formed on the signal line routing line SL side of the non-display area ND, and forms an electrostatic protection means against static electricity that has entered from the signal line routing line SL side. The gate dummy pixel region GD is formed on the scanning line routing line GL side of the non-display area ND, and forms an electrostatic protection means against static electricity entering from the scanning line routing line GL side. Further, the common dummy pixel region CD is formed at a corner between the source dummy pixel region SD and the gate dummy pixel region GD, and is used for static electricity that has entered from both sides of the signal line routing line SL and the scanning line routing line GL. An electrostatic protection means is formed. The detailed configuration of these dummy pixel regions DP will be described later.

First, the configuration of the array substrate AR will be described in the order of the manufacturing process. The array substrate AR is shown in FIG.
As shown in FIG. 4, the liquid crystal LC of the first substrate 11 made of glass, quartz, plastic, or the like.
On the side, a plurality of scanning lines 12 made of an opaque metal such as an aluminum metal, an aluminum alloy, and molybdenum, and an auxiliary capacitance line formed in parallel between the scanning lines 12 (acting as an auxiliary capacitance electrode having a wide width) And a common wiring COM (see FIG. 1) formed in the non-display area ND. Among these, the scanning line 12 and the auxiliary capacitance line 13 are formed not only in the display area DA but also in the dummy pixel area DP. In addition, when the scanning lines 12 and the like are formed, a plurality of gate wirings extending toward the first terminal portion Dr are formed in the scanning line routing wiring GL portion of the non-display area ND, and the signal line routing wiring SL is also the same. 1 terminal part D
A plurality of gate wirings extending toward r are formed (not shown).

These scanning lines 12, auxiliary capacitance lines 13, gate lines and common lines COM are formed by forming an opaque metal layer such as aluminum metal, aluminum alloy, molybdenum over the entire surface of the first substrate 11, and then applying the spin coating method. The resist is applied by, and after performing exposure and development processing so as to form a predetermined pattern, the unnecessary portion is etched. Thereafter, a gate insulating film 14 made of an inorganic insulating film such as silicon oxide or silicon nitride is formed so as to cover the scanning lines 12, gate wirings, auxiliary capacitance lines 13, and exposed surfaces of the first substrate 11.

Next, a semiconductor layer 15 made of, for example, amorphous silicon is formed on the gate insulating film 14. This semiconductor layer 15 is also unnecessary after an amorphous silicon layer is formed over the entire surface of the gate insulating film 14, a resist is applied by a spin coating method, and exposure and development processes are performed to form a predetermined pattern. It is produced by etching a part. The semiconductor layer 15 is formed not only in the display area DA but also in the dummy pixel area DP.

Next, a first contact hole 19 ′ (see FIGS. 5 and 6) is formed in a portion of the dummy pixel region DP that faces the storage capacitor line 13. Thereafter, a source electrode S and a drain electrode D are formed so as to partially run over the semiconductor layer 15. In the liquid crystal display device 10 of this embodiment, the semiconductor layer 15 is disposed so as to face a portion where the width of the scanning line 12 is partially widened via the gate insulating film 14, and overlaps with the scanning line 12 in plan view. This portion constitutes the gate electrode G of the TFT. The source electrode S is a portion branched from the signal line 16. Signal line 1
6 and the drain electrode D are each formed of an opaque metal such as an aluminum metal, an aluminum alloy, or molybdenum, and are formed not only in the display area DA but also in the dummy pixel area DP. Therefore, the drain electrode D portion formed in the dummy pixel region DP is in a state of being electrically connected to the auxiliary capacitance line 13 through the contact hole 19 ′.

In addition, when the signal line 16 and the drain electrode D are formed, a plurality of source wirings extending toward the first terminal portion Dr are formed in the scanning line routing wiring GL in the non-display area ND.
Similarly, a source line extending toward the first terminal portion Dr is formed in the signal line routing line SL (not shown). Note that the gate wiring and the source wiring in the present invention do not necessarily mean wiring connected to the scanning lines 12 to 16 of the liquid crystal panel, and wiring formed simultaneously with the scanning lines 12 is called gate wiring. The wiring formed simultaneously with the signal line 16 is referred to as a source wiring. Therefore, in the liquid crystal display device 10 of the above embodiment, the wiring part under the gate insulating film 14 becomes a gate wiring, and the wiring part above the gate insulating film 14 becomes a source wiring. Absent.

Then, both the display area DA and the non-display area ND are covered with silicon oxide or silicon nitride so as to cover the semiconductor layer 15, the source electrode S, the drain electrode D, the signal line 16, the source wiring, etc. and the exposed portion of the gate insulating film 14. A passivation film 17 made of an inorganic insulating film is formed.
Further, in the display area DA, an interlayer film 18 made of a resin material is formed so as to cover the passivation film 17. As the interlayer film 18, a photosensitive resist material having good transparency and excellent electrical insulation can be appropriately selected and used. The interlayer film 18 is manufactured by applying a resist to the surface of the passivation film 17 by spin coating, performing exposure and development processes so as to form a predetermined pattern, and then etching unnecessary portions.

Next, a contact hole 19 is formed so as to penetrate the passivation film 17 and the interlayer film 18 and reach the drain electrode D. Further, the display area DA is covered so as to cover the interlayer film 18.
A pixel electrode 20 made of a transparent conductive material such as ITO or IZO is formed for each pixel region. The pixel electrode 20 is electrically connected to the drain electrode D through the contact hole 19. Furthermore, an alignment film (not shown) is formed so as to cover the surface of the pixel electrode 20, and the array substrate AR in the liquid crystal display device 10 of the embodiment is obtained.

Next, the color filter substrate CF will be described. The color filter substrate CF has a second substrate 21 made of glass, quartz, plastic or the like. On the second substrate 21, a color filter layer 22 and a light shielding layer 23 that transmit different colors of light (R, G, B, or colorless) for each subpixel are formed. A top coat layer 24 is formed so as to cover the color filter layer 22 and the light shielding layer 23, and ITO or IZ is covered so as to cover the top coat layer 24.
A common electrode 25 made of O is formed. An alignment film (not shown) is formed on the surface of the common electrode 25, and the color filter substrate of the liquid crystal display device 10 of the embodiment is completed.

Then, the array substrate AR and the color filter substrate CF formed as described above are arranged to face each other, the peripheral portion is sealed with a sealing material (not shown), and the liquid crystal LC is interposed between the array substrate AR and the color filter substrate CF. By sealing in the formed sealing area, the liquid crystal device 10 of the embodiment is obtained.

Next, the dummy pixel area DP formed around the display area DA will be described. The dummy pixel region DP includes a source dummy pixel region SD, a gate dummy pixel region GD, and a common dummy pixel region CD. In the source dummy pixel area SD, the interval between the scanning lines 12 is narrowed, but in the gate dummy pixel area GD, the interval between the scanning lines 12 in the display area DA is the same.

A plurality of, here two, TFTs (hereinafter referred to as “protection TFTs”) 30 as electrostatic protection elements are formed along the scanning line 12 for each dummy pixel in the dummy pixel region DP. Yes. These protective TFTs 30 are substantially the same in size as the TFTs formed in the display area DA in order to facilitate the formation simultaneously with the TFTs formed in the display area DA. Is smaller than that of the TFT formed in the display area DA. For this reason, the protective TFT 30 is electrostatically weaker than the TFT formed in the display area DA, so that it is electrostatically destroyed before the TFT formed in the display area DA.

As apparent from the description of FIGS. 2, 5, and 6, in each dummy pixel, the gate electrode G is formed on the same scanning line 12, and the source electrode S is electrically connected to the same signal line 16. Further, the drain electrode D is also electrically connected to the auxiliary capacitance line 13 formed in the same dummy pixel. That is, a plurality of protective TFTs 3 are provided for each dummy pixel.
0 are connected in parallel to each other.

According to the dummy pixel having such a configuration, for example, the first terminal portion Dr to the second terminal portion Tp
When static electricity enters along the signal line 16 through the signal line routing wiring SL (see FIG. 1), the signal line 16 is first connected to the signal line 16 closest to the first terminal portion Dr or the second terminal portion Tp. The protective TFT 30 is electrostatically destroyed, and the static electricity flows to the common potential via the contact hole 19 ′ and the auxiliary capacitance line 13 and is discharged.

Similarly, even when static electricity enters along the scanning line 12 from the first terminal portion Dr to the second terminal portion Tp through the scanning line routing wiring GL, the first terminal portion Dr to the second terminal portion Tp first. The protective TFT 30 connected to the scanning line 12 at a nearby position is electrostatically broken, and the static electricity flows to the common potential through the contact hole 19 ′ and the auxiliary capacitance line 13 and is discharged.

Therefore, according to the liquid crystal display device 10 of the present invention, even if static electricity enters from the signal line 16 side or the scanning line 12 side, the protective TFT closest to the side where static electricity has entered is electrostatically destroyed, The other protection TFT 30 and the TFT in the display area DA are protected. Such a protective operation can be continued until the protective TFT 30 closest to the display area DA is electrostatically destroyed. Therefore, by increasing the number of protective TFTs 30 connected per scanning line or per signal line, It will be able to withstand more static ingress.

In the liquid crystal display device 10 of the above-described embodiment, an example in which only two protective TFTs 30 are formed in the area of one dummy pixel in the gate dummy pixel region GD is shown. In the case of the third static electricity approach, the TFT in the display area DA may be electrostatically destroyed. Therefore, a plurality of gate dummy pixel regions GD may be formed in parallel so that more protective TFTs 30 are connected per scanning line.

[Example of change]
In the liquid crystal display device 10 of the above embodiment, an example in which two protective TFTs 30 are formed per dummy pixel is shown. The number of protective TFTs 30 that can be formed per dummy pixel is determined by the width of the portion parallel to the scanning line 12 per dummy pixel. In recent liquid crystal display devices, the pixel size is reduced due to high definition, and one dot (one pixel) in the display area is square, so that the shape of one sub-pixel is rectangular. Therefore, the width of the portion parallel to the scanning line 12 per dummy pixel is very narrow.

Therefore, with the configuration of the liquid crystal display device 10 of the above-described embodiment, in order to increase the number of protection TFTs in the gate dummy pixel region GD, it is necessary to increase the width of the gate dummy pixel region GD. In the source dummy pixel region SD, as shown in FIG.
Since the inter-distance can be narrowed, a large number of protective TFTs 30 can be formed without increasing the width of the source dummy pixel region SD.

Therefore, as shown in FIG. 7, as a dummy pixel of the modification, a branch scanning line 12 ′ in which the scanning line 12 is branched in a single dummy pixel is formed, and the number of pixels is larger than that per dummy pixel. In the example shown in FIG. 7, eight protective TFTs 30 were formed. With such a configuration, a large number of protective TFTs 30 can be formed without particularly increasing the area of the gate dummy pixel region GD.

In the dummy pixel of this modification, the auxiliary capacitance line 13 cannot be arranged in a solid shape in the dummy pixel so as not to increase the number of manufacturing steps. Therefore, the gate wiring and the source wiring are appropriately used. The drain electrode D of each protection TFT 30 may be electrically connected to the auxiliary capacitance line 13. Further, as in the case of the pixel electrode 20 in the display area, the interlayer film 18 and the dummy pixel electrode are formed in the dummy pixel area, and the dummy pixel electrode is connected to the common wiring COM outside the display area, and the dummy pixel electrode May be electrically connected to the drain electrode D of the protective TFT 30 through contact holes formed in the interlayer film 18 and the passivation film 17.

Further, the dummy pixels of this modification can be employed not only in the gate dummy pixel region GD but also in the source dummy pixel region SD and the common dummy pixel region CD. In the dummy pixel of this modification, the width of the branch scanning line 12 ′ branched from the scanning line 12 is made as thick as possible in order to reduce the impedance so that all the protective TFTs 30 can operate effectively. Good.

In this embodiment, the TN mode vertical electric field type transmissive liquid crystal display device has been described as an example. However, the present invention is not limited to this, and other modes of the vertical electric field type liquid crystal display device are used. Alternatively, the present invention is equally applicable to a horizontal electric field type liquid crystal display device and further to a liquid crystal display device having a reflective portion. In particular, in the FFS mode liquid crystal display device having a lower electrode and an upper electrode having a slit on the interlayer film, the upper electrode or the lower electrode is connected to a common potential, so the configuration of the above modification is adopted. However, the drain electrode D of the protection TFT 30 can be easily connected to the common potential without increasing the number of manufacturing steps.

It is a schematic plan view which shows the array board | substrate of the liquid crystal panel of embodiment. It is an enlarged plan view of the II part of FIG. FIG. 3 is an enlarged plan view of one sub pixel in the display area of FIG. 2. It is sectional drawing of the IV-IV line of FIG. FIG. 3 is an enlarged plan view of one dummy pixel in the gate dummy pixel region of FIG. 2. It is sectional drawing of the VI-VI line of FIG. It is an enlarged plan view for one dummy pixel in a gate dummy pixel region of a modification. It is an enlarged plan view of a dummy pixel region of an array substrate in a liquid crystal display device of a conventional example. It is an enlarged plan view of the IX part of FIG. It is sectional drawing of the XX line of FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 ... Liquid crystal display device 11 ... 1st board | substrate 12 ... Scanning line 12 '... Branch scanning line 13 ... Auxiliary capacitance line 14 ... Gate insulating film 15 ... Semiconductor layer 16 ... Signal line 17 ... Passivation film 18 ... Interlayer film 19, 19' ... Contact hole 20 ... Pixel electrode 21 ... Second substrate 22 ... Color filter layer 23 ... Light shielding layer 24 ... Top coat layer 25 ... Common electrode 3
0 ... Protective TFT AR ... Array substrate CF ... Color filter substrate DA ... Display area ND
... non-display area COM ... common wiring GL ... scanning line routing wiring SL ... signal line routing wiring DP ... dummy pixel area GD ... gate dummy pixel area SD ... source dummy pixel area CD ... common dummy pixel area

Claims (5)

A first substrate and a second substrate are disposed opposite to each other with a liquid crystal layer interposed therebetween. On the liquid crystal layer side of the first substrate, a plurality of scanning lines and signal lines arranged in a matrix, and a display region A thin film transistor disposed near the intersection of each scanning line and signal line and a pixel area surrounded by each scanning line and signal line in the display area and electrically connected to the thin film transistor In a liquid crystal display device in which a plurality of dummy pixels surrounded by the scanning lines and signal lines are formed in the non-display area around the pixel electrode and the display area,
Each of a plurality of said dummy pixels, the gate electrode and the scanning lines are formed with a plurality of thin film transistors source electrode connected to said signal line, said plurality of thin film transistors of the plurality of connected in parallel to each other liquid crystal display device the drain electrode of the thin film transistor that is connected to the common potential. Wherein the plurality of thin film transistors formed on the dummy pixels, the liquid crystal display device according to the thin film transistor substantially the same formed in the pixel region Ru magnitude der 請 Motomeko 1. A plurality of thin film transistors formed on the dummy pixel is made form along the scan line, the extended wiring linearly from the signal line that is connected to the source electrode of said plurality of thin film transistors 請 Motomeko 2. A liquid crystal display device according to 1. A plurality of thin film transistors formed on the dummy pixel is made form along the signal line, the that the extended wiring linearly from the scanning line is not connected to a gate electrode of said plurality of thin film transistors 請 Motomeko 2. A liquid crystal display device according to 1.   The liquid crystal display device according to claim 1, wherein the plurality of thin film transistors formed in the dummy pixels are smaller than a channel width and a channel length of the thin film transistors formed in the display region.

Images