JP5262159B2 - Method for manufacturing thin film chip resistor - Google Patents

Method for manufacturing thin film chip resistor Download PDF

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JP5262159B2
JP5262159B2 JP2008032857A JP2008032857A JP5262159B2 JP 5262159 B2 JP5262159 B2 JP 5262159B2 JP 2008032857 A JP2008032857 A JP 2008032857A JP 2008032857 A JP2008032857 A JP 2008032857A JP 5262159 B2 JP5262159 B2 JP 5262159B2
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thin film
surface electrode
resistor
electrode
forming
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JP2009194129A (en
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一宏 神田
光明 中尾
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Panasonic Corp
Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method manufacturing a thin film chip resistor of a highly accurate resistance value with a small number of processes and a reduced cost. <P>SOLUTION: The thin chip resistor manufacturing method includes the processes of: forming a thin film upper surface electrode 12 on an upper surface of an insulating substrate 11; forming a conductor by a thin film process almost on the entire surface of the insulating substrate 11; forming a resistor pattern by a photo-lithographic process to form a thin film resistor 13; and forming a conductor resin upper surface electrode 15 to cover a part of the thin film resistor 13 superposed on the thin film upper surface electrode 12. A plurality of holes 14 are formed in the part of the thin film resistor 13 superposed on the thin film upper surface electrode 12 to expose the thin film upper surface electrode 12 and the thin film upper surface electrode 12 is electrically connected to the conductor resin upper surface electrode 15 via the plurality of holes 14. <P>COPYRIGHT: (C)2009,JPO&amp;INPIT

Description

本発明は、各種電子機器に用いられる薄膜チップ抵抗器の製造方法に関するものである。   The present invention relates to a method of manufacturing a thin film chip resistor used in various electronic devices.

近年、電子機器の小形化およびコストダウンに伴い、搭載される電子部品に対しても小形化およびコストダウンへの要求が高まっている。チップ抵抗器においても小形化が進められるとともに、高精度でかつ電流雑音特性に優れた薄膜チップ抵抗器を安価に提供する要求が高まっている。   In recent years, with the downsizing and cost reduction of electronic devices, there is an increasing demand for downsizing and cost reduction of mounted electronic components. As chip resistors are also being miniaturized, there is an increasing demand for providing thin film chip resistors with high accuracy and excellent current noise characteristics at low cost.

従来の薄膜チップ抵抗器は、図4に示すように、純度約96%のアルミナからなる絶縁基板1の裏面の両端部に形成した一対の裏面電極2と、前記絶縁基板1の上面の両端部に形成した一対の第1上面電極3と、この一対の第1上面電極3と電気的に接続されるようにスパッタリングにより成膜した後フォトリソ工法を用いて所望の形状にパターニングしたニッケルクロム合金等からなる抵抗体4と、この抵抗体4の一部を覆う保護膜5(第1の保護膜5a、第2の保護膜5b、第3の保護膜5c)と前記上面電極3および前記抵抗体4と電気的に接続され、かつ前記保護膜5と接するように前記絶縁基板1の上面の両端部に形成した銀系の樹脂からなる一対の第2上面電極6と、この第2上面電極6と前記裏面電極2を電気的に接続するように前記絶縁基板1の両端部に形成した一対の端面電極7と、この端面電極7と前記第2上面電極6と前記裏面電極2の露出部分に形成されたニッケルめっき層8と、このニッケルめっき層8を覆う錫めっき層9とを備えた構成としていた。   As shown in FIG. 4, the conventional thin film chip resistor includes a pair of back electrodes 2 formed on both ends of the back surface of the insulating substrate 1 made of alumina having a purity of about 96%, and both end portions of the top surface of the insulating substrate 1. A pair of first upper surface electrodes 3 formed on the substrate, and a nickel chromium alloy formed by sputtering so as to be electrically connected to the pair of first upper surface electrodes 3 and then patterned into a desired shape using a photolithography method, etc. A resistor 4 comprising a protective film 5, a protective film 5 (first protective film 5 a, second protective film 5 b, third protective film 5 c) covering the part of the resistor 4, the upper surface electrode 3, and the resistor 4 and a pair of second upper surface electrodes 6 made of silver-based resin formed on both ends of the upper surface of the insulating substrate 1 so as to be in contact with the protective film 5, and the second upper surface electrodes 6 And the back electrode 2 are electrically connected. A pair of end surface electrodes 7 formed on both ends of the insulating substrate 1, a nickel plating layer 8 formed on the exposed portions of the end surface electrode 7, the second upper surface electrode 6 and the back electrode 2, and the nickel plating. The tin plating layer 9 covering the layer 8 was provided.

なお、この出願の発明に関する先行技術文献情報としては、例えば、特許文献1が知られており、これに記載の従来の薄膜チップ抵抗器においては、抵抗体4のみを薄膜で形成し、かつそれ以外の主要な構成要素、すなわち裏面電極2、第1上面電極3、第2上面電極6および端面電極7はすべて導電性ペーストを用いたスクリーン印刷等の厚膜プロセスによって形成しているため、抵抗体以外の主要な構成要素(電極等)を薄膜で形成する場合に比べて安価に製造することができ、また、抵抗体4に形成した貫通孔を通じて第1上面電極3と第2上面電極6で抵抗体4をサンドイッチすることにより、薄膜からなる抵抗体4と厚膜からなる第1上面電極3および第2上面電極6との密着性を向上させることができるという特徴を有していた。
特開2002−64002号公報
As prior art document information relating to the invention of this application, for example, Patent Document 1 is known. In the conventional thin film chip resistor described therein, only the resistor 4 is formed of a thin film, and The main constituent elements other than those, ie, the back electrode 2, the first top electrode 3, the second top electrode 6 and the end electrode 7 are all formed by a thick film process such as screen printing using a conductive paste, Compared with the case where main components (electrodes, etc.) other than the body are formed as thin films, the first upper surface electrode 3 and the second upper surface electrode 6 can be manufactured at low cost through the through holes formed in the resistor 4. By sandwiching the resistor 4, the adhesion between the thin film resistor 4 and the first upper surface electrode 3 and the second upper surface electrode 6 made of a thick film can be improved.
JP 2002-640002 A

しかしながら、上記特許文献1に記載の従来の薄膜チップ抵抗器の製造方法においては、第1上面電極3と第2上面電極6とを相互に密着させるために抵抗体4に設けられる貫通孔を、フォトリソ工法を用いて抵抗体4のパターニングを行う際に同時に形成しているため、第1上面電極3に金等の酸化しにくい材料を用いた場合には、第1上面電極3上に位置する抵抗体4の一部をエッチングで除去する際に、貴金属である第1上面電極3と卑金属である抵抗体4との間で局部電池反応が進行して、第1上面電極3上に位置する抵抗体4が過エッチングとなり、第1上面電極3に近接する部分の抵抗体パターンに影響して所望の薄膜抵抗体パターンの形状が得られず、初期抵抗値の段階で不良が生じるため、それ以降の物づくりができないものであった。一方、過エッチングによる不良を出さないようにエッチング量を控えめにした場合には、抵抗体4に貫通孔が十分に形成されず第1上面電極3が露出しないため、抵抗体4の表面に存在するごく薄い酸化皮膜が影響して第2上面電極6と第1上面電極3の電気的なコンタクトを得ることができず、第2上面電極6上にプローブを接触させて抵抗値の精密な修正(トリミング)を行う際に、トリミング時の抵抗値の測定と完成品検査時の抵抗値の測定との間に誤差が生じて、抵抗値許容差が±0.1%以下の高精度の抵抗器を製造する場合に歩留りが悪化するものであった。また、抵抗体4のパターンと貫通孔をマスクスパッタ工法で同時に形成する方法も考えられるが、マスクスパッタ工法で用いられるメタルマスクの厚みは通常50〜300μmであり、このような厚みを有するメタルマスクを用いたマスクスパッタ工法では、線幅が10〜20μmでラダーエリアと微調整エリアを兼ね備えた抵抗体パターンを形成することが困難であった。さらに、第1上面電極3と第2上面電極6が直接コンタクトするために設けられる第1上面電極3の露出部分が現れるように、マスクスパッタ工法で抵抗体材料となる薄膜を形成した後にフォトリソ工法で別途抵抗体パターンを形成する方法や、第1上面電極3の露出部分を形成する工程と抵抗体パターンを形成する工程でそれぞれ別個にフォトリソ工法を実施する方法も考えられるが、工数が増えたり温度特性のばらつきが大きくなる等コストアップや精度低下につながるものであった。   However, in the conventional method for manufacturing a thin film chip resistor described in Patent Document 1, a through-hole provided in the resistor 4 in order to bring the first upper surface electrode 3 and the second upper surface electrode 6 into close contact with each other, Since the resistor 4 is formed at the same time when the photolithographic method is used, the first upper surface electrode 3 is positioned on the first upper surface electrode 3 when a material that is difficult to oxidize, such as gold, is used. When a part of the resistor 4 is removed by etching, a local cell reaction proceeds between the first upper surface electrode 3 that is a noble metal and the resistor 4 that is a base metal, and is positioned on the first upper surface electrode 3. Since the resistor 4 is over-etched and affects the portion of the resistor pattern in the vicinity of the first upper surface electrode 3, the desired thin film resistor pattern shape cannot be obtained, and a defect occurs at the initial resistance value stage. I can't make things later It was. On the other hand, when the etching amount is conserved so as not to cause a defect due to overetching, the through hole is not sufficiently formed in the resistor 4 and the first upper surface electrode 3 is not exposed, and therefore exists on the surface of the resistor 4. Due to the influence of the very thin oxide film, electrical contact between the second upper surface electrode 6 and the first upper surface electrode 3 cannot be obtained, and the probe is brought into contact with the second upper surface electrode 6 to accurately correct the resistance value. When performing (trimming), an error occurs between the measurement of the resistance value at the time of trimming and the measurement of the resistance value at the inspection of the finished product, and a high-precision resistor having a resistance tolerance of ± 0.1% or less When manufacturing a vessel, the yield deteriorated. Although a method of simultaneously forming the pattern of the resistor 4 and the through hole by a mask sputtering method is also conceivable, the thickness of the metal mask used in the mask sputtering method is usually 50 to 300 μm, and the metal mask having such a thickness In the mask sputtering method using, it was difficult to form a resistor pattern having a line width of 10 to 20 μm and having both a ladder area and a fine adjustment area. Further, after forming a thin film as a resistor material by a mask sputtering method so that an exposed portion of the first upper surface electrode 3 provided for direct contact between the first upper surface electrode 3 and the second upper surface electrode 6 appears, a photolithographic method is used. However, a method of separately forming a resistor pattern and a method of separately performing a photolithographic method in the step of forming the exposed portion of the first upper surface electrode 3 and the step of forming the resistor pattern are also conceivable. This resulted in increased costs and decreased accuracy, such as increased variations in temperature characteristics.

本発明は上記従来の課題を解決するもので、抵抗値精度の高い薄膜チップ抵抗器を少ない工数で安価に製造することができる薄膜チップ抵抗器の製造方法を提供することを目的とするものである。   SUMMARY OF THE INVENTION The present invention solves the above-described conventional problems, and an object of the present invention is to provide a method of manufacturing a thin film chip resistor that can manufacture a thin film chip resistor having a high resistance value accuracy at a low cost with a small number of steps. is there.

上記目的を達成するために、本発明は以下の構成を有するものである。   In order to achieve the above object, the present invention has the following configuration.

本発明の請求項1に記載の発明は、シート状の絶縁基板の上面に貴金属からなる複数の薄膜上面電極を形成する工程と、前記シート状の絶縁基板のほぼ全面に薄膜プロセスで導体を形成した後フォトリソプロセスで抵抗体パターンを形成することによって複数の薄膜抵抗体を形成する工程と、前記薄膜抵抗体における前記薄膜上面電極と重なる部分を覆うように導体樹脂ペーストを印刷することにより複数の導体樹脂上面電極を形成する工程と、前記抵抗体パターンにレーザートリミングを施すことにより抵抗値を調整する工程とを備え、前記薄膜抵抗体における前記薄膜上面電極と重なる部分にレーザーにより複数の孔を設けて前記薄膜上面電極を露出させ、かつこの複数の孔を介して前記薄膜上面電極と前記導体樹脂上面電極とを電気的に接続するように構成したもので、この製造方法によれば、前記薄膜抵抗体における前記薄膜上面電極と重なる部分にレーザーにより複数の孔を設けて前記薄膜上面電極を露出させ、かつこの複数の孔を介して前記薄膜上面電極と前記導体樹脂上面電極とを電気的に接続するように構成しているため、従来のようにフォトリソ工法を用いて薄膜抵抗体のパターニングを行うと同時に貫通孔を形成するようにしたものに比べて、レーザーを用いることにより、所望の位置に所望の大きさの孔を迅速にかつ確実に形成することができ、また、レーザーにより設けられた複数の孔を介してトリミングプローブが接する導体樹脂上面電極と、表面が酸化しにくい貴金属からなる薄膜上面電極とは直接接することになるため、抵抗値の測定が薄膜抵抗体の表面に存在する酸化皮膜の影響を受けることはなくなり、これにより、トリミング時の抵抗値と完成抵抗値との誤差がほとんどなくなるため、抵抗値精度の高い薄膜チップ抵抗器が少ない工数で安価に得られるという作用効果を有するものである。 According to a first aspect of the present invention, a plurality of thin film upper surface electrodes made of a noble metal are formed on the upper surface of a sheet-like insulating substrate, and a conductor is formed on almost the entire surface of the sheet-like insulating substrate by a thin film process. Then, a plurality of thin film resistors are formed by forming a resistor pattern by a photolithography process, and a plurality of conductive resin pastes are printed so as to cover a portion of the thin film resistor that overlaps the thin film upper surface electrode. A step of forming a conductive resin upper surface electrode and a step of adjusting a resistance value by applying laser trimming to the resistor pattern, and a plurality of holes are formed by a laser in a portion overlapping the thin film upper surface electrode in the thin film resistor. The thin film upper surface electrode is exposed, and the thin film upper surface electrode and the conductive resin upper surface electrode are electrically connected through the plurality of holes. According to this manufacturing method, a plurality of holes are provided by a laser in a portion overlapping the thin film upper surface electrode in the thin film resistor to expose the thin film upper surface electrode, and the plurality of holes Since the thin film upper surface electrode and the conductive resin upper surface electrode are electrically connected via a thin film resistor patterning using a photolithographic method as in the prior art, a through hole is formed at the same time. By using a laser, a hole of a desired size can be quickly and reliably formed at a desired position as compared with the one made to do so, and through a plurality of holes provided by the laser Since the upper surface electrode of the conductor resin that contacts the trimming probe and the upper surface electrode of the thin film made of a noble metal that is difficult to oxidize are in direct contact with each other, the resistance value is measured by the thin film resistor. It is not affected by the oxide film existing on the surface, and this eliminates the error between the resistance value at the time of trimming and the completed resistance value. It has the effect that it is.

以上のように本発明の薄膜チップ抵抗器の製造方法は、薄膜抵抗体における薄膜上面電極と重なる部分にレーザーにより複数の孔を設けて前記薄膜上面電極を露出させ、かつこの複数の孔を介して前記薄膜上面電極と導体樹脂上面電極とを電気的に接続するように構成しているため、従来のようにフォトリソ工法を用いて薄膜抵抗体のパターニングを行うと同時に貫通孔を形成するようにしたものに比べて、レーザーを用いることにより、所望の位置に所望の大きさの孔を迅速にかつ確実に形成することができ、また、トリミングプローブが接する導体樹脂上面電極と、表面が酸化しにくい貴金属からなる薄膜上面電極とは、レーザーにより設けられた前記複数の孔を介して直接接することになり、これにより、抵抗値の測定が薄膜抵抗体の表面に存在する酸化皮膜の影響を受けることはなくなるため、トリミング時の抵抗値と完成抵抗値との誤差はほとんどなくなり、これにより、抵抗値精度の高い薄膜チップ抵抗器が少ない工数で安価に得られるという優れた効果を奏するものである。   As described above, the method for manufacturing a thin film chip resistor according to the present invention provides a plurality of holes by a laser in a portion overlapping the thin film upper surface electrode in the thin film resistor to expose the thin film upper surface electrode, and through the plurality of holes. Since the thin film upper surface electrode and the conductive resin upper surface electrode are electrically connected to each other, the thin film resistor is patterned using the photolithographic method as in the conventional method, and at the same time, the through hole is formed. Compared to the above, by using a laser, a hole of a desired size can be formed quickly and surely at a desired position, and the surface of the conductive resin top electrode that contacts the trimming probe and the surface are oxidized. The thin film upper surface electrode made of a difficult precious metal is in direct contact with the plurality of holes provided by the laser, so that the resistance value can be measured on the thin film resistor. Since there is no influence of the oxide film on the surface, there is almost no error between the resistance value at the time of trimming and the completed resistance value, and this makes it possible to obtain a thin film chip resistor with high resistance accuracy at low cost with less man-hours. This is an excellent effect.

以下、本発明の実施の形態における薄膜チップ抵抗器の製造方法について、図面を参照しながら説明する。   Hereinafter, a method for manufacturing a thin film chip resistor in an embodiment of the present invention will be described with reference to the drawings.

図1は本発明の一実施の形態における薄膜チップ抵抗器の断面図である。この図1において、11は純度96%のアルミナからなる絶縁基板、12は絶縁基板11の上面の両端部に形成された一対の薄膜上面電極、13は薄膜上面電極12の少なくとも一部を覆い、かつこの薄膜上面電極12と電気的に接続された薄膜抵抗体で、この薄膜抵抗体13には薄膜上面電極12が露出するように孔14が設けられているものである。15は薄膜上面電極12と孔14を覆うように形成された一対の導体樹脂上面電極、16は薄膜抵抗体13のすべてと導体樹脂上面電極15の一部を覆うように形成された保護膜、17は絶縁基板11の裏面の両端部に形成された一対の裏面電極、18は薄膜上面電極12、導体樹脂上面電極15および裏面電極17と電気的に接続される一対の端面電極、19は導体樹脂上面電極15、裏面電極17および端面電極18の表面を覆うニッケルめっき層、20はニッケルめっき層19の表面を覆う錫めっき層である。   FIG. 1 is a cross-sectional view of a thin film chip resistor according to an embodiment of the present invention. In FIG. 1, 11 is an insulating substrate made of alumina with a purity of 96%, 12 is a pair of thin film upper surface electrodes formed on both ends of the upper surface of the insulating substrate 11, 13 covers at least a part of the thin film upper surface electrode 12, The thin film resistor is electrically connected to the thin film upper surface electrode 12, and the thin film resistor 13 is provided with a hole 14 so that the thin film upper surface electrode 12 is exposed. 15 is a pair of conductor resin upper surface electrodes formed so as to cover the thin film upper surface electrode 12 and the hole 14, 16 is a protective film formed so as to cover all of the thin film resistor 13 and a part of the conductor resin upper surface electrode 15, Reference numeral 17 denotes a pair of back electrodes formed on both ends of the back surface of the insulating substrate 11, reference numeral 18 denotes a pair of end face electrodes electrically connected to the thin film top electrode 12, conductor resin top electrode 15 and back electrode 17, and 19 denotes a conductor. A nickel plating layer that covers the surfaces of the resin upper surface electrode 15, the back surface electrode 17, and the end surface electrode 18, and 20 is a tin plating layer that covers the surface of the nickel plating layer 19.

次に、本発明の一実施の形態における薄膜チップ抵抗器の製造方法を図1の断面図、図2(a)〜(d)および図3(a)〜(d)の製造工程図にもとづいて説明する。   Next, the manufacturing method of the thin film chip resistor in one embodiment of the present invention is based on the cross-sectional view of FIG. 1 and the manufacturing process diagrams of FIGS. 2 (a) to 2 (d) and FIGS. 3 (a) to 3 (d). I will explain.

まず、図2(a)に示すように、純度96%のアルミナからなる絶縁基板11の上面の両端部に、空気中で酸化しにくい貴金属材料、例えば金を主成分とする金属有機物ペーストをスクリーン印刷して乾燥させ、その後、金属有機物ペーストの有機成分だけを飛ばし、そして金属成分だけを絶縁基板11上に焼き付けるために、ベルト式連続焼成炉によって600〜900℃で焼成し、薄膜上面電極12を形成する。ここで図2(a)には、薄膜チップ抵抗器の個片サイズである長辺がL(mm)で短辺W(mm)の矩形状の絶縁基板11が示されており、以下の製造工程の説明でもこの個片サイズの絶縁基板11を用いて説明しているが、実際の製造工程では、この個片サイズの絶縁基板11を多数個縦横に得ることができるシート状の絶縁基板を用いて、後述する端面電極の形成工程前にシート状の絶縁基板を短冊状または個片状に分割しているものである。なお、この薄膜上面電極12を構成する材料は金系の材料に限定されるものではなく、空気中で酸化しにくい他の貴金属材料、例えば銀、白金、イリジウムやそれらの合金を用いてもよいものである。   First, as shown in FIG. 2 (a), a noble metal material that hardly oxidizes in the air, for example, a metal organic paste mainly composed of gold, is screened on both ends of the upper surface of the insulating substrate 11 made of 96% purity alumina. After printing and drying, in order to remove only the organic component of the metal organic paste, and to burn only the metal component onto the insulating substrate 11, it is fired at 600 to 900 ° C. in a belt-type continuous firing furnace, and the thin film upper surface electrode 12 Form. Here, FIG. 2A shows a rectangular insulating substrate 11 having a long side L (mm) and a short side W (mm), which is the individual size of the thin film chip resistor. In the description of the process, the individual-sized insulating substrate 11 is used for explanation, but in an actual manufacturing process, a sheet-shaped insulating substrate capable of obtaining a large number of the individual-sized insulating substrates 11 vertically and horizontally is used. The sheet-like insulating substrate is divided into strips or individual pieces before the end face electrode forming step described later. The material constituting the thin film upper surface electrode 12 is not limited to a gold-based material, and other noble metal materials that are difficult to oxidize in air, such as silver, platinum, iridium, and alloys thereof may be used. Is.

次に、図2(b)に示すように、絶縁基板11のほぼ全面にスパッタリング等の薄膜プロセスを用いてニッケルクロム合金等からなる薄膜導体を形成した後、フォトリソプロセスを用いて薄膜導体の不要部分を除去した抵抗体パターンを形成することにより、薄膜抵抗体13を形成する。ここで、図2(b)に示す薄膜抵抗体13のパターンは線幅が10〜20μmと細く、ラダーエリア(粗調整エリア)と微調整エリアを兼ね備えた複雑な形状であるため、マスクスパッタ工法で形成することは困難なものであり、そのため、薄膜抵抗体13のパターンはフォトリソプロセスを用いて形成することが必要となるものである。なお、この薄膜抵抗体13を構成する材料はニッケルクロム系合金に限定されるものではなく、要求される特性に応じて他の材料、例えば窒化タンタル系、クロムシリコン系、酸化タンタル系等の抵抗体として使用できる金属合金やその複合体を用いてもよいものである。   Next, as shown in FIG. 2B, a thin film conductor made of a nickel chromium alloy or the like is formed on almost the entire surface of the insulating substrate 11 using a thin film process such as sputtering, and then the thin film conductor is not required using a photolithography process. The thin film resistor 13 is formed by forming the resistor pattern from which the portion is removed. Here, the pattern of the thin film resistor 13 shown in FIG. 2B has a thin line width of 10 to 20 μm and a complicated shape having both a ladder area (coarse adjustment area) and a fine adjustment area. Therefore, the pattern of the thin film resistor 13 must be formed using a photolithography process. The material constituting the thin film resistor 13 is not limited to a nickel-chromium alloy, and other materials such as tantalum nitride, chromium silicon, and tantalum oxide can be used depending on required characteristics. A metal alloy that can be used as a body or a composite thereof may be used.

次に、図2(c)に示すように、薄膜抵抗体13における薄膜上面電極12と重なる部分にレーザーを当てて複数の孔14を設けることにより、薄膜上面電極12の表面を露出させる。ここで、ビーム径や出力を制御したレーザーを薄膜抵抗体13に当てることによって所望の位置に所望の大きさの孔14を迅速にかつ確実に形成することができるため、後述する導体樹脂上面電極と薄膜上面電極12の電気的コンタクトも良好となるものである。なお、図1の断面図においては、孔14は薄膜上面電極12の厚み方向の一部を除去するように形成されているが、この孔14は薄膜上面電極12の厚み方向のすべてを除去して絶縁基板11の一部に達するように形成してもよいものである。この場合は、後述する導体樹脂上面電極と薄膜上面電極12の電気的コンタクトは、孔14の側面を介して確保されるものである。   Next, as shown in FIG. 2C, the surface of the thin film upper surface electrode 12 is exposed by providing a plurality of holes 14 by applying a laser to a portion of the thin film resistor 13 that overlaps the thin film upper surface electrode 12. Here, by applying a laser whose beam diameter and output are controlled to the thin film resistor 13, a hole 14 having a desired size can be quickly and reliably formed at a desired position. The electrical contact between the thin film upper surface electrode 12 and the thin film upper surface electrode 12 is also improved. In the cross-sectional view of FIG. 1, the hole 14 is formed so as to remove a part of the thin film upper surface electrode 12 in the thickness direction, but the hole 14 removes all of the thin film upper surface electrode 12 in the thickness direction. Thus, it may be formed so as to reach a part of the insulating substrate 11. In this case, an electrical contact between the conductor resin upper surface electrode and the thin film upper surface electrode 12 described later is ensured through the side surface of the hole 14.

次に、図2(d)に示すように、孔14を覆い、かつ薄膜上面電極12と電気的に接続されるように、導体樹脂上面電極15をその厚みが3μm以上20μm以下となるように形成する。この導体樹脂上面電極15は、例えばエポキシ系等の樹脂と銀等の導電性粒子の混合体からなる導電性樹脂ペーストを印刷して硬化させることにより形成するものであり、ガラスフリットと導電性粒子を混合焼成した電極材料と比較した場合、鉛を含まず製造プロセスの温度も低くできるため、環境保護の観点からも優れているものである。   Next, as shown in FIG. 2D, the conductor resin upper surface electrode 15 is 3 μm or more and 20 μm or less so as to cover the hole 14 and be electrically connected to the thin film upper surface electrode 12. Form. The conductor resin upper surface electrode 15 is formed by printing and curing a conductive resin paste made of a mixture of epoxy-based resin and conductive particles such as silver, and the glass frit and conductive particles. Compared with the electrode material obtained by mixing and firing, it is excellent from the viewpoint of environmental protection because it does not contain lead and the temperature of the manufacturing process can be lowered.

次に、図3(a)に示すように、薄膜抵抗体13にレーザートリミングを施すことにより、薄膜抵抗体13の抵抗値の調整を行う。ここで、レーザートリミングを施す際には、抵抗値測定用のプローブを導体樹脂上面電極15上に配置するため、このプローブが接する導体樹脂上面電極15と薄膜上面電極12とが直接接することによって、抵抗値の測定において薄膜抵抗体13の表面に存在する酸化皮膜の影響を受けることはほとんどなくなり、これにより、トリミング時の抵抗値と完成抵抗値との誤差もほとんどなくなるため、抵抗値精度が±0.1%以下である高精度品が迅速にかつ確実に生産できるものである。なお、薄膜抵抗体13にレーザートリミングを施す前に、マスクスパッタ工法を用いて、酸化ケイ素やアルミナ等の高絶縁性材料からなる無機保護膜(図示せず)を、薄膜抵抗体13を覆うように50nm〜10μmの厚みで形成してもよいものである。   Next, as shown in FIG. 3A, the resistance value of the thin film resistor 13 is adjusted by performing laser trimming on the thin film resistor 13. Here, when performing laser trimming, the probe for resistance measurement is arranged on the conductor resin upper surface electrode 15, and therefore, the conductor resin upper surface electrode 15 and the thin film upper surface electrode 12 in contact with the probe are in direct contact with each other. The resistance value is hardly affected by the oxide film existing on the surface of the thin film resistor 13, so that there is almost no error between the resistance value at the time of trimming and the completed resistance value. High-precision products of 0.1% or less can be produced quickly and reliably. Before the thin film resistor 13 is subjected to laser trimming, an inorganic protective film (not shown) made of a highly insulating material such as silicon oxide or alumina is covered with the mask sputtering method so as to cover the thin film resistor 13. Further, it may be formed with a thickness of 50 nm to 10 μm.

また、レーザートリミング時に抵抗値を計測するプローブが接触する導体樹脂上面電極15の厚みは、3μm以上20μm以下となるようにすることが適当である。なぜならば、導体樹脂上面電極15の厚みが3μmより薄い場合は、プローブが導体樹脂上面電極15の内部を傷つけたり貫通することによって、プローブと導体樹脂上面電極15との接触が不安定になるため、抵抗値の測定が安定しないものであり、一方、導体樹脂上面電極15の厚みが20μmより厚い場合は、導体樹脂上面電極15の厚み方向の抵抗値が大きくなるため、それに伴う抵抗値の変動により薄膜チップ抵抗器の抵抗値測定精度が安定しなくなるものである。なお、レーザートリミング工程の終了後に、必要に応じて絶縁基板11を水系またはアルコール系の洗浄液を用いて超音波洗浄することによってレーザートリミング工程において発生した滓を除去する洗浄工程を設けるようにしてもよいものである。   In addition, it is appropriate that the thickness of the conductor resin upper surface electrode 15 that contacts the probe for measuring the resistance value during laser trimming be 3 μm or more and 20 μm or less. This is because, when the thickness of the conductor resin upper surface electrode 15 is less than 3 μm, the contact between the probe and the conductor resin upper surface electrode 15 becomes unstable because the probe damages or penetrates the inside of the conductor resin upper surface electrode 15. On the other hand, when the thickness of the conductor resin upper surface electrode 15 is larger than 20 μm, the resistance value in the thickness direction of the conductor resin upper surface electrode 15 is increased, and the resistance value fluctuates accordingly. Thus, the resistance measurement accuracy of the thin film chip resistor becomes unstable. In addition, after the laser trimming process is finished, a cleaning process may be provided to remove wrinkles generated in the laser trimming process by ultrasonically cleaning the insulating substrate 11 using an aqueous or alcohol-based cleaning liquid as necessary. It ’s good.

次に、図3(b)に示すように、薄膜抵抗体13のすべてと導体樹脂上面電極15の一部を覆うように熱硬化性樹脂ペーストを印刷して硬化させることにより保護膜16を形成する。この保護膜16には、必要に応じて抵抗値等の特性を表示する捺印や薄膜チップ抵抗器の方向性判別に用いる認識マークを印刷する。この保護膜16は導体樹脂上面電極15と重なる寸法を200μm以下とするのが好ましい。なぜならば、保護膜16における導体樹脂上面電極15と重なる寸法が200μmを越える場合は、保護膜16と導体樹脂上面電極15の重なっている部分に後述するニッケルめっき層と錫めっき層が付かないため、保護膜16と導体樹脂上面電極15の重なっている部分において導体樹脂上面電極15の抵抗値が薄膜チップ抵抗器の完成抵抗値に直列に加わることになって、特に低い抵抗値において薄膜チップ抵抗器の完成抵抗値の精度ならびにTCRの精度を保証することが困難になるからである。   Next, as shown in FIG. 3B, a protective film 16 is formed by printing and curing a thermosetting resin paste so as to cover all of the thin film resistor 13 and a part of the conductor resin upper surface electrode 15. To do. The protective film 16 is printed with a marking for displaying characteristics such as a resistance value and a recognition mark used for determining the direction of the thin film chip resistor as necessary. The protective film 16 preferably has a dimension overlapping with the conductive resin upper surface electrode 15 of 200 μm or less. This is because if the dimension of the protective film 16 that overlaps the conductor resin upper surface electrode 15 exceeds 200 μm, a nickel plating layer and a tin plating layer, which will be described later, are not attached to the portion where the protective film 16 and the conductor resin upper surface electrode 15 overlap. The resistance value of the conductive resin upper surface electrode 15 is added in series to the completed resistance value of the thin film chip resistor at the portion where the protective film 16 and the conductive resin upper surface electrode 15 overlap, and the thin film chip resistance particularly at a low resistance value. This is because it is difficult to guarantee the accuracy of the complete resistance value of the vessel and the accuracy of the TCR.

次に、図1および図3(c)に示すように、絶縁基板11の裏面に裏面電極17を形成した後、薄膜上面電極12、導体樹脂上面電極15および裏面電極17とそれぞれ電気的に接続されるように絶縁基板11の両端面に端面電極18を形成する。この端面電極18は、例えばエポキシ系等の樹脂と銀、ニッケル、カーボン等の導電性粒子の混合体からなる導電性樹脂ペーストを塗布して硬化させることにより形成するものであり、この場合、鉛を含まないため、環境保護の観点からも優れており、また、端面電極18をスパッタ等の薄膜で形成する場合と比べて安価に製造できるものである。   Next, as shown in FIG. 1 and FIG. 3C, after the back electrode 17 is formed on the back surface of the insulating substrate 11, it is electrically connected to the thin film top electrode 12, the conductor resin top electrode 15 and the back electrode 17, respectively. Thus, the end face electrodes 18 are formed on both end faces of the insulating substrate 11. This end face electrode 18 is formed, for example, by applying and curing a conductive resin paste made of a mixture of epoxy-based resin and conductive particles such as silver, nickel, and carbon. In this case, lead Therefore, it is excellent from the viewpoint of environmental protection, and can be manufactured at a lower cost than the case where the end face electrode 18 is formed of a thin film such as sputtering.

最後に、図1および図3(d)に示すように、はんだ付け時の信頼性を確保するために、絶縁基板11の上面、裏面および端面の露出した電極部分にニッケルめっき層19を形成し、さらにこのニッケルめっき層19を覆うように錫めっき層20を形成することにより、本発明の一実施の形態における薄膜チップ抵抗器は製造されるものである。なお、上記したニッケルめっき層19を形成する前に銅あるいは銅系合金等の低抵抗率の材料をめっきするようにすれば、めっき部分の抵抗値を下げることができるため、薄膜チップ抵抗器の完成抵抗値精度をさらに上げることが可能となるものである。   Finally, as shown in FIGS. 1 and 3 (d), in order to ensure reliability during soldering, a nickel plating layer 19 is formed on the exposed electrode portions of the top surface, back surface, and end surface of the insulating substrate 11. Further, by forming the tin plating layer 20 so as to cover the nickel plating layer 19, the thin film chip resistor in one embodiment of the present invention is manufactured. If a low resistivity material such as copper or a copper-based alloy is plated before the nickel plating layer 19 is formed, the resistance value of the plated portion can be lowered. It is possible to further increase the accuracy of the completed resistance value.

以上の説明から明らかなように、本発明の一実施の形態における薄膜チップ抵抗器の製造方法においては、薄膜抵抗体13における薄膜上面電極12と重なる部分にレーザーにより複数の孔14を設けて前記薄膜上面電極12を露出させ、かつこの複数の孔14を介して前記薄膜上面電極12と導体樹脂上面電極15とを電気的に接続するようにしているため、トリミングプローブが接する導体樹脂上面電極15と、表面が酸化しにくい貴金属からなる薄膜上面電極12とは、レーザーにより設けられた前記複数の孔14を介して直接接することになり、これにより、抵抗値の測定が薄膜抵抗体13の表面に存在する酸化皮膜の影響を受けることはほとんどなくなるため、トリミング時の抵抗値と完成抵抗値との誤差はほとんどなくなり、これにより、抵抗値精度の高い薄膜チップ抵抗器が少ない工数で安価に製造できるものである。   As is apparent from the above description, in the method of manufacturing a thin film chip resistor in one embodiment of the present invention, a plurality of holes 14 are provided by a laser in a portion overlapping the thin film upper surface electrode 12 in the thin film resistor 13. Since the thin film upper surface electrode 12 is exposed and the thin film upper surface electrode 12 and the conductive resin upper surface electrode 15 are electrically connected through the plurality of holes 14, the conductive resin upper surface electrode 15 in contact with the trimming probe. The thin film upper surface electrode 12 made of a noble metal whose surface is difficult to oxidize is in direct contact with the plurality of holes 14 provided by the laser, whereby the resistance value is measured on the surface of the thin film resistor 13. Therefore, there is almost no error between the resistance value during trimming and the completed resistance value. Accordingly, it is intended to be produced inexpensively with high resistance precision thin film chip resistor is small steps.

なお、上記本発明の一実施の形態においては、1個の薄膜チップ抵抗器に一対の薄膜上面電極12および1個の薄膜抵抗体13を有する構成について説明したが、この構成に限定されるものではなく、1個の薄膜チップ抵抗器に複数対の薄膜上面電極12および複数個の薄膜抵抗体13を有する多連またはネットワークタイプの構成のものにも、本発明は適用できるものである。   In the above-described embodiment of the present invention, the configuration in which one thin film chip resistor has a pair of thin film upper surface electrodes 12 and one thin film resistor 13 has been described. However, the present invention is limited to this configuration. Instead, the present invention can also be applied to a multiple or network type configuration having a plurality of pairs of thin film upper surface electrodes 12 and a plurality of thin film resistors 13 in one thin film chip resistor.

本発明に係る薄膜チップ抵抗器の製造方法は、薄膜抵抗体における薄膜上面電極と重なる部分にレーザーにより複数の孔を設け、かつこの複数の孔を介して薄膜上面電極と導体樹脂上面電極とを電気的に接続するように構成することにより、トリミング時の抵抗値と完成抵抗値の誤差が低減されるようにしたものであり、特に抵抗値精度が±0.1%以下である高精度の薄膜チップ抵抗器の製造方法において有用なものである。   In the method of manufacturing a thin film chip resistor according to the present invention, a plurality of holes are provided by a laser in a portion overlapping with a thin film upper surface electrode in the thin film resistor, and the thin film upper surface electrode and the conductive resin upper surface electrode are provided via the plurality of holes. By being configured to be electrically connected, the error between the resistance value at the time of trimming and the completed resistance value is reduced. Particularly, the resistance value accuracy is ± 0.1% or less. It is useful in the manufacturing method of a thin film chip resistor.

本発明の一実施の形態における薄膜チップ抵抗器の断面図Sectional drawing of the thin film chip resistor in one embodiment of this invention (a)〜(d)同薄膜チップ抵抗器の製造方法を示す製造工程図(A)-(d) Manufacturing process figure which shows the manufacturing method of the thin film chip resistor (a)〜(d)同薄膜チップ抵抗器の製造方法を示す製造工程図(A)-(d) Manufacturing process figure which shows the manufacturing method of the thin film chip resistor 従来の薄膜チップ抵抗器の断面図Cross-sectional view of a conventional thin film chip resistor

符号の説明Explanation of symbols

11 絶縁基板
12 薄膜上面電極
13 薄膜抵抗体
14 孔
15 導体樹脂上面電極
DESCRIPTION OF SYMBOLS 11 Insulation board | substrate 12 Thin film upper surface electrode 13 Thin film resistor 14 Hole 15 Conductor resin upper surface electrode

Claims (1)

シート状の絶縁基板の上面に貴金属からなる複数の薄膜上面電極を形成する工程と、前記シート状の絶縁基板のほぼ全面に薄膜プロセスで導体を形成した後フォトリソプロセスで抵抗体パターンを形成することによって複数の薄膜抵抗体を形成する工程と、前記薄膜抵抗体における前記薄膜上面電極と重なる部分を覆うように導体樹脂ペーストを印刷することにより複数の導体樹脂上面電極を形成する工程と、前記抵抗体パターンにレーザートリミングを施すことにより抵抗値を調整する工程とを備え、前記薄膜抵抗体における前記薄膜上面電極と重なる部分にレーザーにより複数の孔を設けて前記薄膜上面電極を露出させ、かつこの複数の孔を介して前記薄膜上面電極と前記導体樹脂上面電極とを電気的に接続するように構成した薄膜チップ抵抗器の製造方法。 Forming a plurality of thin film upper surface electrodes made of noble metal on the upper surface of a sheet-like insulating substrate, and forming a resistor pattern by a photolithography process after forming a conductor on a substantially entire surface of the sheet-like insulating substrate by a thin film process Forming a plurality of thin film resistors, forming a plurality of conductive resin upper surface electrodes by printing a conductive resin paste so as to cover a portion of the thin film resistor overlapping the thin film upper surface electrode, and the resistance A step of adjusting a resistance value by performing laser trimming on a body pattern, a plurality of holes are provided by a laser in a portion overlapping the thin film upper surface electrode in the thin film resistor, and the thin film upper surface electrode is exposed. A thin film chip configured to electrically connect the thin film upper surface electrode and the conductive resin upper surface electrode through a plurality of holes. Method of manufacturing a resistor.
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