JP5235051B2 - Method for manufacturing semiconductor device - Google Patents

Description

  The present invention relates to a method for manufacturing a semiconductor device. In particular, the present invention relates to a method for manufacturing a semiconductor device using a plasma processing apparatus in a manufacturing process of a semiconductor element such as a thin film transistor (TFT).

  2. Description of the Related Art In recent years, a technique for forming a thin film transistor (TFT) using a semiconductor thin film (thickness of about several nm to several hundred nm) formed on a substrate having an insulating surface such as glass has attracted attention. Thin film transistors are widely applied to semiconductor devices such as ICs and electro-optical devices, and development of finer and higher performance thin film transistors is required in accordance with demands for miniaturization or higher performance of semiconductor devices.

  Therefore, in order to promote crystallization of the amorphous silicon film, a method for producing a crystalline semiconductor film by adding a metal element such as nickel to the amorphous silicon film and crystallization has been proposed (for example, a patent). Reference 1). By adding an element that promotes crystallization to crystallize, it is possible to reduce the heating temperature required for crystallization and to increase the orientation of crystal orientation in a single direction. However, by adding an element that promotes crystallization to the amorphous silicon film, the element remains in the crystalline semiconductor film or on the surface of the film, and the characteristics of the resulting semiconductor element may vary. is there. That is, the element that promotes crystallization becomes unnecessary once the crystalline semiconductor film is formed.

Therefore, as a method for removing (gettering) an element that promotes crystallization, phosphorus is ion-doped and heat-treated to getter into a region doped with phosphorus, and a crystalline semiconductor film is formed using a sputtering apparatus. A method of forming an amorphous silicon film containing Ar in the film and performing heat treatment to getter the film, and forming an amorphous silicon film containing Ar using an RF-excited PE-CVD apparatus and performing the heat treatment. A method of gettering in a film has been proposed.
Japanese Patent No. 3431041

  However, an integrated circuit manufactured using a crystallized semiconductor film is miniaturized, and in order to realize a higher function circuit, generation of tiny dust is prevented, gettering is performed without damaging the semiconductor film. There is an increasing demand for forming an amorphous silicon film.

  In view of the above problems, the present invention has an object to provide a method for forming an amorphous silicon film containing a rare gas element at high speed without damaging a crystalline semiconductor film and for gettering an element that promotes crystallization. And

  The present invention provides a rare gas using a plasma having a low electron temperature and a high electron density when removing an element that promotes crystallization from a semiconductor film crystallized using an element that promotes crystallization of the semiconductor film. The gist is to form an amorphous silicon film containing an element, and then to perform heat treatment for gettering.

In a method for manufacturing a semiconductor device of the present invention, a crystalline semiconductor film containing an element that promotes crystallization of a semiconductor film is formed over a substrate having an insulating surface, and an oxide film is formed over the crystalline semiconductor film. Using a plasma processing apparatus that generates plasma having an electron temperature of 0.5 eV or more and 1.5 eV or less and an electron density of 1.0 × 10 ¹¹ cm ⁻³ or more and 1.0 × 10 ¹³ cm ⁻³ or less, An amorphous silicon film containing a rare gas element is formed on the oxide film, and the crystalline semiconductor film, the oxide film, and the amorphous silicon film containing the rare gas are heated to crystallize the semiconductor film from the crystalline semiconductor film. It is characterized by removing an element that promotes.

In a method for manufacturing a semiconductor device of the present invention, a crystalline semiconductor film containing an element that promotes crystallization of a semiconductor film is formed over a substrate having an insulating surface, and an electron temperature of 0.5 eV to 1.5 eV is used. And an oxide film is formed on the crystalline semiconductor film using a plasma processing apparatus that generates plasma having an electron density of 1.0 × 10 ¹¹ cm ⁻³ or more and 1.0 × 10 ¹³ cm ⁻³ or less, An amorphous silicon film containing a rare gas element is formed on the oxide film using the plasma processing apparatus, and the crystalline semiconductor film, the oxide film, and the amorphous silicon film containing the rare gas are heated to form the crystalline semiconductor film. An element that promotes crystallization of the semiconductor film is removed.

According to a method for manufacturing a semiconductor device of the present invention, a crystalline semiconductor film containing an element that promotes crystallization of a semiconductor film is formed over a substrate having an insulating surface, and the crystalline semiconductor film is etched to form an island-shaped semiconductor. An oxide film is formed on the island-shaped semiconductor film, and has an electron temperature of 0.5 eV or more and 1.5 eV or less, and 1.0 × 10 ¹¹ cm ⁻³ or more and 1.0 × 10 ¹³ cm ^−3. An amorphous silicon film containing a rare gas element is formed on the oxide film using a plasma processing apparatus that generates plasma having the following electron density, and the amorphous semiconductor containing the crystalline semiconductor film, the oxide film, and the rare gas The film is heated to remove an element that promotes crystallization of the semiconductor film from the crystalline semiconductor film.

According to a method for manufacturing a semiconductor device of the present invention, a crystalline semiconductor film containing an element that promotes crystallization of a semiconductor film is formed over a substrate having an insulating surface, and the crystalline semiconductor film is etched to form an island-shaped semiconductor. A plasma processing apparatus that generates plasma with an electron temperature of 0.5 eV or more and 1.5 eV or less and an electron density of 1.0 × 10 ¹¹ cm ⁻³ or more and 1.0 × 10 ¹³ cm ⁻³ or less is used. Forming an oxide film on the island-shaped semiconductor film, forming an amorphous silicon film containing a rare gas element on the oxide film using the plasma processing apparatus, the crystalline semiconductor film, the oxide film, and The amorphous silicon film containing the rare gas is heated to remove an element that promotes crystallization of the semiconductor film from the crystalline semiconductor film.

  In the method for manufacturing a semiconductor device of the present invention, when the oxide film is formed using the plasma processing apparatus, a mixed gas of oxygen and a rare gas or a mixed gas of oxygen, hydrogen, and a rare gas is used as a source gas. It is characterized by that.

  In the method for manufacturing a semiconductor device of the present invention, the substrate is heated to a temperature of 200 ° C. to 550 ° C. when the oxide film is formed using the plasma processing apparatus.

  In the method for manufacturing a semiconductor device of the present invention, when an amorphous silicon film containing a rare gas element is formed using the plasma processing apparatus, a mixed gas of silane and a rare gas or a mixture of disilane and a rare gas is used as a source gas. It is characterized by using gas.

  In the method for manufacturing a semiconductor device of the present invention, when the oxide film or the amorphous silicon film containing the rare gas element is formed using the plasma processing apparatus, the substrate is heated to a temperature of 200 ° C. to 550 ° C. Features.

  In the method for manufacturing a semiconductor device of the present invention, the plasma is generated under a pressure of 20 Pa to 133 Pa.

  In the method for manufacturing a semiconductor device of the present invention, the element that promotes crystallization is nickel, germanium, iron, palladium, tin, lead, cobalt, platinum, copper, or gold.

  According to the present invention, the deposition rate of an amorphous silicon film containing a rare gas can be improved, and the productivity of the semiconductor device can be improved. Furthermore, the rare gas ions generated at a high density can be actively taken into the amorphous silicon film, the concentration of the rare gas in the film can be increased, and elements that promote crystallization can be gettered with high efficiency. .

  According to the present invention, damage on the surface of the crystalline semiconductor film can be suppressed. Furthermore, since the in-plane film thickness distribution of the amorphous silicon film containing a rare gas element can be improved and generation of particles can be suppressed, a high-quality crystalline silicon film can be obtained. Thereby, the characteristics of the semiconductor device can be improved.

  The best mode for carrying out the present invention will be described with reference to the drawings. However, the present invention is not limited to the following forms, and those skilled in the art can easily understand that the forms and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited to the description of the embodiments below. Note that in structures of the present invention described below, the same portions or portions having similar functions are denoted by the same reference numerals in different drawings, and description thereof is not repeated. The following Embodiments 1 to 9 can be used in any combination.

(Embodiment 1)
In this embodiment mode, a manufacturing process of a semiconductor device including a process of forming an amorphous silicon film containing a rare gas for gettering using a plasma treatment apparatus will be described with reference to drawings.

  First, as illustrated in FIG. 1A, a base film 101 is formed over an insulating substrate 100. As the insulating substrate 100, for example, a glass substrate such as barium borosilicate glass or alumino borosilicate glass, a quartz substrate, a ceramic substrate, or the like can be used. A substrate made of a synthetic resin having flexibility such as plastic generally has a lower heat-resistant temperature than the above-mentioned substrate, but can be used as long as it can withstand the processing temperature in the manufacturing process. It is. Further, the surface of the insulating substrate 100 may be polished and planarized by a CMP method or the like.

  Further, as a method for forming the base film 101, a CVD method typified by a plasma CVD method or a low-pressure CVD method, a sputtering method, or the like may be used. Further, as the base film, a single-layer structure using any one of a silicon oxide film, a silicon nitride film, a silicon oxynitride film, and a silicon nitride oxide film may be used, or a structure in which these layers are appropriately stacked may be used. As the base film, for example, a silicon nitride oxide film with a thickness of 10 to 400 nm can be used. Note that in this specification, silicon oxynitride refers to a substance having a higher oxygen composition ratio than nitrogen, and can also be referred to as silicon oxide containing nitrogen. In this specification, silicon nitride oxide refers to a substance having a higher nitrogen composition ratio than oxygen, and can also be referred to as silicon nitride containing oxygen.

  Next, the semiconductor film 102 is formed over the base film 101. An amorphous semiconductor film may be formed as the semiconductor film 102, but a microcrystalline semiconductor film or a crystalline semiconductor film may be formed. There is no limitation on the material of the semiconductor film, but silicon or silicon germanium (SiGe) is preferably used. In this embodiment, an amorphous silicon film with a thickness of about 25 to 100 nm (preferably 30 to 60 nm) is formed. Note that a step of removing hydrogen contained in the semiconductor film may be performed after the semiconductor film is formed. Specifically, heating may be performed at 500 ° C. for 1 hour.

  Further, when the base film 101 and the semiconductor film 102 are formed, if the interface between the base film 101 and the semiconductor film 102 is not exposed to the air, contamination of the interface can be prevented, and characteristics of the manufactured TFT can be prevented. Can be reduced. In this embodiment mode, the base film 101 and the semiconductor film 102 are continuously formed using the plasma CVD method without being exposed to the atmosphere.

  Next, as illustrated in FIG. 1B, an element that promotes crystallization of the semiconductor film is added to the semiconductor film 102. In this embodiment, a solution containing 10 to 100 ppm of nickel (Ni) in terms of weight, for example, a solution of nickel acetate, is applied to the surface of the semiconductor film 102 by a spin coating method. Note that a dotted line in FIG. 1B indicates that an element that promotes crystallization is added. The addition of an element that promotes crystallization is not limited to the above method, and may be added using a sputtering method, a vapor deposition method, a plasma treatment, or the like.

  And it heat-processes at 500-650 degreeC for 4 to 24 hours, for example, 570 degreeC and 14 hours. By this heat treatment, a semiconductor film 103 in which crystallization is promoted in the vertical direction from the surface coated with the nickel acetate solution toward the substrate 100 is formed (FIG. 1C).

  The heat treatment may be performed by RTA (Rapid Thermal Anneal) using the radiation of the lamp as a heat source or RTA (gas RTA) using a heated gas at a set heating temperature of 740 ° C. for 180 seconds. The set heating temperature here is the temperature of the substrate measured with a pyrometer, and this temperature is set as the set temperature during heat treatment. In addition, there is a heat treatment for 4 hours at 550 ° C. using a furnace annealing furnace, which may be used for heat treatment. Further, heat treatment may be performed by laser beam irradiation, or a combination of these may be used. The lowering of the crystallization temperature and the shortening of the crystallization time are due to the action of elements that promote crystallization.

  In this embodiment, nickel (Ni) is used as an element for promoting crystallization of the semiconductor film, but germanium (Ge), iron (Fe), palladium (Pd), tin (Sn) is also used in addition to this. Further, elements such as lead (Pb), cobalt (Co), platinum (Pt), copper (Cu), and gold (Au) may be used.

Through the above steps, the crystalline semiconductor film 105 is formed (FIG. 1D). Note that it is considered that the element (here, Ni) is contained in the crystalline semiconductor film 105 using the above element at a concentration of about 1 × 10 ¹⁹ atoms / cm ³ . Therefore, gettering of the element present in the crystalline semiconductor film 105 is performed. Since gettering can remove a metal element mixed in the semiconductor film, off-state current can be reduced.

  First, an oxide film 106 is formed on the surface of the semiconductor film 105 as illustrated in FIG. By forming the oxide film 106 having a thickness of about 1 nm to 10 nm, the surface of the semiconductor film 105 can be prevented from being etched in a later etching step. Note that the oxide film 106 can be formed by oxidizing the surface of the semiconductor film 105 with, for example, an aqueous solution in which sulfuric acid, hydrochloric acid, nitric acid, and the like are mixed with hydrogen peroxide water, or ozone water. Alternatively, plasma treatment in an atmosphere containing oxygen, heat treatment, ultraviolet irradiation, or the like may be used. In addition, an oxide film may be separately formed by a plasma CVD method, a sputtering method, a vapor deposition method, or the like.

Next, an amorphous silicon film 107 for gettering containing a rare gas element at a concentration of 1 × 10 ¹⁹ atoms / cm ³ or higher and 1 × 10 ²² atoms / cm ³ or lower is formed on the oxide film 106 using a plasma processing apparatus. The film is formed with a thickness of 25 to 250 nm. The amorphous silicon film 107 containing a rare gas for gettering preferably has a lower film density than the semiconductor film 105 in order to increase the selectivity between the semiconductor film 105 and the etching. As the rare gas element, one or more selected from helium (He), neon (Ne), argon (Ar), krypton (Kr), and xenon (Xe) are used.

When a film is formed using a plasma processing apparatus, plasma is generated by using high-frequency microwaves. In this specification, a plasma processing apparatus has an electron density of plasma of 1 × 10 ¹¹ cm ⁻³ or more (preferably 1 × 10 ¹¹ cm ⁻³ or more and 1 × 10 ¹³ cm ⁻³ or less), This is an apparatus that generates plasma having an electron temperature of 0.5 eV or more (preferably 0.5 eV or more and 1.5 eV or less). In addition, the pressure in that case is 20-133Pa.

In this embodiment mode, a mixed gas of silane (SiH ₄ ) and a rare gas, a mixed gas of disilane (Si ₂ H ₆ ) and a rare gas, or the like is used as a source gas for plasma generation. it can. Note that the mixed gas may contain hydrogen (H ₂ ). As the rare gas, at least one of helium (He), neon (Ne), argon (Ar), krypton (Kr), and xenon (Xe) may be used. The amorphous silicon film formed using a gas containing such a rare gas as a raw material contains a rare gas element contained in the raw material gas. Since the plasma processing apparatus can generate rare gas plasma about 10 to 1000 times higher in density than the RF excitation plasma apparatus, an amorphous silicon film containing a rare gas is formed at a higher density than the film formed by the RF excitation plasma apparatus. can do. Further, by using high-density rare gas ions for plasma generation, the decomposition efficiency of the deposition gas can be improved, and the deposition rate of the amorphous silicon film containing the rare gas element can be improved.

Here, the plasma processing apparatus in this embodiment will be described with reference to FIG. First, the processing chamber is evacuated and a gas containing silane and a rare gas or disilane and a rare gas is introduced from a gas introduction source 65. In this embodiment mode, a mixed gas of silane (SiH ₄ ) and argon (Ar) is introduced. Next, the insulating substrate 100 formed up to the oxide film 106 is placed on a support base 64 having a heating mechanism, and the insulating substrate 100 is heated to 400 ° C. The heating temperature should just be in the range of 200 degreeC-550 degreeC (preferably 250 degreeC or more). When a plastic substrate is used as the insulating substrate 100, a glass substrate having a glass transition point of 200 ° C. or higher is used, and the plastic substrate is heated to a temperature not higher than the glass transition point. The distance between the insulating substrate 100 and the antenna 62 is in the range of 20 to 80 mm (preferably 20 to 60 mm).

Next, a microwave is supplied from the waveguide 60 to an antenna 62, for example, a radial line slot antenna. In this embodiment, a microwave with a frequency of 2.45 GHz is supplied. Then, microwaves are introduced into the processing chamber from the antenna 62 through the dielectric plate 63 provided in the processing chamber to generate excited plasma 66 in which SiH ₄ gas and Ar gas are mixed, and a rare gas is formed on the oxide film 106. An amorphous silicon film containing is formed. The SiH ₄ gas and Ar gas used in this step are exhausted from the exhaust port 67 to the outside of the processing chamber. Since the region where the plasma 66 is generated and the insulating substrate 100 installed on the support base 64 are separated from each other, film damage due to charge charging on the film surface does not occur. A shower plate in which a plurality of holes through which plasma can pass may be provided between the insulating substrate 100 and the region where the plasma 66 is generated.

  By using plasma with a low electron temperature and a high electron density in this embodiment mode, the amorphous silicon film 107 can contain a rare gas element at a high concentration, and the deposition rate can be improved. Thereby, the processing time per substrate can be shortened, and the productivity of the semiconductor device can be improved. Further, by forming an amorphous silicon film for segregating an element used for promoting crystallization with plasma having a low electron temperature, damage to the surface of the crystalline semiconductor film can be suppressed.

  Next, as shown in FIG. 2B, heat treatment is performed using a furnace annealing method or an RTA method to perform gettering. In the case of performing furnace annealing, heat treatment is performed at 450 to 600 ° C. for 0.5 to 12 hours in a nitrogen atmosphere. When the RTA method is used, the lamp light source for heating is turned on for 1 to 60 seconds, preferably 30 to 60 seconds, and this is repeated 1 to 10 times, preferably 2 to 6 times. The emission intensity of the lamp light source is arbitrary, but the semiconductor film is instantaneously heated to 600 to 1000 ° C., preferably about 700 to 750 ° C.

  By the heat treatment, an element that promotes crystallization in the semiconductor film 105 moves to the amorphous silicon film 107 for gettering due to diffusion, and is gettered.

  Note that an element for promoting crystallization may be added and heat treatment may be performed to promote crystallization, and then laser beam irradiation may be performed, or laser beam irradiation may be performed instead of the heat treatment. Further, after the heat treatment, the laser treatment may be performed while maintaining the temperature.

In the case of performing laser beam irradiation, a continuous-wave (CW) laser beam or a pulsed laser beam (pulse laser beam) can be used. The laser beam that can be used here is a gas laser such as an Ar laser, a Kr laser, or an excimer laser, single crystal YAG, YVO ₄ , forsterite (Mg ₂ SiO ₄ ), YAlO ₃ , GdVO ₄ , or polycrystalline ( (Ceramics) YAG, Y ₂ O ₃ , YVO ₄ , YAlO ₃ , GdVO ₄ with one or more of Nd, Yb, Cr, Ti, Ho, Er, Tm, Ta added as dopants A laser oscillated from one or more of laser, glass laser, ruby laser, alexandrite laser, Ti: sapphire laser, copper vapor laser, or gold vapor laser as a medium can be used. By irradiating the fundamental wave of such a laser beam and the second to fourth harmonic laser beams of these fundamental waves, a crystal having a large grain size can be obtained. For example, a second harmonic (532 nm) or a third harmonic (355 nm) of an Nd: YVO ₄ laser (fundamental wave 1064 nm) can be used. This laser can be emitted by CW or pulsed oscillation. When injected at a CW, the power density 0.01 to 100 MW / cm ² of about laser (preferably 0.1 to 10 MW / cm ²⁾ is required. Then, irradiation is performed at a scanning speed of about 10 to 2000 cm / sec.

Note that single crystal YAG, YVO ₄ , forsterite (Mg ₂ SiO ₄ ), YAlO ₃ , GdVO ₄ , or polycrystalline (ceramic) YAG, Y ₂ O ₃ , YVO ₄ , YAlO ₃ , GdVO ₄ , dopants Nd, Yb, Cr, Ti, Ho, Er, Tm, Ta, a laser using a medium added with one or more, an Ar ion laser, or a Ti: sapphire laser should oscillate continuously It is also possible to perform pulse oscillation at an oscillation frequency of 10 MHz or more by performing Q switch operation, mode synchronization, or the like. When the laser beam is oscillated at an oscillation frequency of 10 MHz or more, the semiconductor film is irradiated with the next pulse during the period from when the semiconductor film is melted by the laser to solidification. Therefore, unlike the case of using a pulse laser having a low oscillation frequency, the solid-liquid interface can be continuously moved in the semiconductor film, so that crystal grains continuously grown in the scanning direction can be obtained.

  When ceramic (polycrystal) is used as the medium, it is possible to form the medium in a free shape in a short time and at low cost. When a single crystal is used, a cylindrical medium having a diameter of several millimeters and a length of several tens of millimeters is usually used. However, when ceramic is used, a larger one can be made.

  Since the concentration of dopants such as Nd and Yb in the medium that directly contributes to light emission cannot be changed greatly regardless of whether it is a single crystal or a polycrystal, there is a certain limit to improving the laser output by increasing the concentration. However, in the case of ceramic, since the size of the medium can be remarkably increased as compared with the single crystal, a significant output improvement can be realized.

  Further, in the case of ceramic, a medium having a parallelepiped shape or a rectangular parallelepiped shape can be easily formed. When a medium having such a shape is used to cause oscillation light to travel in a zigzag manner inside the medium, the oscillation optical path can be made longer. As a result, amplification is increased and oscillation can be performed with high output. Further, since the laser beam emitted from the medium having such a shape has a quadrangular cross-sectional shape at the time of emission, it is advantageous for shaping into a linear beam as compared with a round beam. By shaping the emitted laser beam using an optical system, it is possible to easily obtain a linear beam having a short side length of 1 mm or less and a long side length of several mm to several m. Become. In addition, by irradiating the medium with the excitation light uniformly, the linear beam has a uniform energy distribution in the long side direction.

  By irradiating the semiconductor film with this linear beam, the entire surface of the semiconductor film can be annealed more uniformly. When uniform annealing is required up to both ends of the linear beam, it is necessary to arrange a slit at both ends to shield the energy attenuating portion.

  When a semiconductor film is annealed using a linear beam having a uniform intensity obtained in this manner and an electronic device is manufactured using this semiconductor film, the characteristics of the electronic device are good.

Next, the amorphous silicon film 107 for gettering is selectively etched and removed. Etching can be performed by dry etching without using plasma with ClF ₃ or wet etching with an alkaline solution such as an aqueous solution containing hydrazine or tetramethylammonium hydroxide ((CH ₃ ) ₄ NOH). At this time, the oxide film 106 serves as an etching stopper, and the semiconductor film 105 can be prevented from being etched.

  Next, after the oxide film 106 is removed with hydrofluoric acid, the semiconductor film 105 is etched to form an island-shaped semiconductor film 108 (FIG. 2C). After that, as shown in FIG. 3A, a gate insulating film 109 is formed so as to cover the island-shaped semiconductor film 108.

  The gate insulating film 109 may be an insulating film containing at least oxygen or nitrogen, and may be a single layer or a multilayer. As a film formation method at that time, a plasma CVD method or a sputtering method can be used. In this embodiment, silicon nitride oxide (SiNxOy (x> y, x, y = 1, 2, 3,...)) And silicon oxide silicon (SiOxNy (x> y, x) are formed by plasma CVD. , Y = 1, 2, 3,...)) Are continuously formed to form a total film thickness of 115 nm. Note that in the case where a TFT having a channel length of 1 μm or less (also referred to as a submicron TFT) is formed, the gate insulating film is preferably formed with a thickness of 10 to 50 nm.

  Next, a conductive film is formed over the gate insulating film 109 and etched to form the gate electrode 110. The outline is as follows. First, the material of the conductive film formed on the gate insulating film 109 may be a conductive film. In this embodiment, a laminated film of W (tungsten) and TaN (tantalum nitride) is used. A conductive film in which Mo, Al, and Mo are stacked in this order using (aluminum) and Mo (molybdenum), or a conductive film that is stacked in the order of Mo, Al, and Mo using Ti (titanium) and Al may be used. In addition, an element selected from gold (Au), silver (Ag), copper (Cu), platinum (Pt), aluminum (Al), molybdenum (Mo), tungsten (W), titanium (Ti), or these A synthetic material or a compound material containing an element as a main component can be used. Furthermore, a laminate of these materials can also be used.

  Then, a resist mask for etching this conductive film is formed. First, a photoresist is applied on the conductive film by a spin coating method or the like, and exposure is performed. Next, heat treatment (pre-bake) is performed on the photoresist. The pre-baking temperature is 50 to 120 ° C., which is lower than the post-baking performed later. In this example, the heating temperature was 90 ° C. and the heating time was 90 seconds.

  Next, the exposed resist is developed by dropping a developer onto the photoresist or spraying the developer from a spray nozzle.

  Thereafter, the developed photoresist is subjected to a so-called post-bake in which heat treatment is performed at 125 ° C. for 180 seconds to remove moisture remaining in the resist mask, and at the same time, stability against heat is enhanced. A resist mask is formed by the above steps. The conductive film is etched based on this resist mask to form the gate electrode 110.

  Note that as another method, the gate electrode 110 may be directly formed over the gate insulating film 109 by a droplet discharge method typified by a printing method or an ink jet method capable of discharging a material to a predetermined place. Good.

  As a material to be discharged, a material obtained by dissolving or dispersing a conductive material in a solvent is used. Materials used for the conductive film are gold (Au), silver (Ag), copper (Cu), platinum (Pt), aluminum (Al), chromium (Cr), palladium (Pd), indium (In), molybdenum (Mo) ), Nickel (Ni), lead (Pb), iridium (Ir), rhodium (Rh), tungsten (W), cadmium (Cd), zinc (Zn), iron (Fe), titanium (Ti), zirconium (Zr) ), Barium (Ba) or other metals, or an alloy of these metals. As the solvent, esters such as butyl acetate and ethyl acetate, alcohols such as isopropyl alcohol and ethyl alcohol, organic solvents such as methyl ethyl ketone and acetone can be used.

  Moreover, the viscosity of a composition shall be 300 cp or less. This is for preventing drying and smoothly discharging the composition from the discharge port. Note that the viscosity and surface tension of the composition may be appropriately adjusted according to the solvent to be used and the application.

  Then, the gate electrode 110 or the resist used when forming the gate electrode 110 is used as a mask, and an impurity imparting n-type or p-type conductivity is selectively added to the island-shaped semiconductor film 108. A source region 111, a drain region 112, a lightly doped drain (hereinafter also referred to as “LDD”) region 113, and the like are formed. Through the above steps, the N-channel TFTs 114 and 115 and the P-channel TFT 116 can be formed over the same substrate (FIG. 3B).

  Subsequently, as shown in FIG. 3B, an insulating film 117 is formed as a protective film thereof. The insulating film 117 is formed by using a plasma CVD method or a sputtering method to form a silicon nitride film or a silicon nitride oxide film with a thickness of 100 to 200 nm with a single layer or a stacked structure. In the case of combining a silicon nitride oxide film and a nitrogen oxide silicon film, continuous film formation can be performed by switching gases. In this embodiment, a silicon oxynitride film having a thickness of 100 nm is formed by plasma CVD. By providing the insulating film 117, it is possible to obtain a blocking action that prevents intrusion of various ionic impurities including oxygen and moisture in the air.

  Next, an insulating film 118 is further formed. Here, a skeleton structure is formed by bonding of polyimide, polyamide, BCB (benzocyclobutene), acrylic, siloxane (silicon (Si) and oxygen (O) applied by SOG (Spin On Glass) method or spin coating method. An organic group containing at least hydrogen (for example, an alkyl group or an aromatic hydrocarbon) is used as a substituent, a fluoro group may be used as the substituent, or an organic group containing at least hydrogen as a substituent. And an organic resin film, an inorganic interlayer insulating film (insulating film containing silicon such as silicon nitride or silicon oxide), a low-k (low dielectric constant) material, or the like. Can do. Moreover, an oxazole resin can also be used, for example, photosensitive polybenzoxazole can be used. Photosensitive polybenzoxazole has a low dielectric constant (dielectric constant 2.9 at room temperature of 1 MHz), high heat resistance (thermal decomposition temperature 550 ° C. at a differential thermal balance (TGA) temperature increase of 5 ° C./min), and water absorption. Low (0.3% at room temperature for 24 hours) material. Oxazole resin is more suitable as the insulating film 118 because it has a lower dielectric constant than polyimide. The insulating film 118 is preferably a film having excellent flatness because it has a strong meaning of relieving unevenness due to TFTs formed over a glass substrate and flattening.

  Further, the gate insulating film 109, the insulating film 117, and the insulating film 118 are patterned using photolithography to form contact holes that reach the source region 111 and the drain region 112.

  Next, a conductive film is formed using a conductive material, and the wiring 119 is formed by patterning the conductive film. After that, when the insulating film 120 is formed as a protective film, a semiconductor device as shown in FIG. 3B is completed.

  Note that the structure of the thin film transistor included in the semiconductor device of the present invention is not limited to the above structure. For example, a structure in which the LDD region is not provided may be employed, or a structure in which a sidewall is provided on the side surface of the gate electrode 110 (FIG. 4A) may be employed. Further, the structure of the thin film transistor is not limited to the above-described structure, and may be a single gate structure in which one channel formation region is formed, or a multi-gate such as a double gate structure in which two channel regions are formed or a triple gate structure in which three channel regions are formed. A structure can be used. Alternatively, a bottom gate structure may be used, or a dual gate type including two gate electrodes arranged above and below a channel formation region with a gate insulating film interposed therebetween may be used. In the case where the gate electrode is provided in a stacked structure, the first conductive film 105a formed below the gate electrode and the second conductive film 105b formed over the first conductive film 105a are provided. The conductive film may be formed in a tapered shape and provided with a structure in which an impurity region having a lower concentration than the impurity region functioning as a source region or a drain region is provided so as to overlap only with the first conductive film (FIG. 4B). it can. In the case where the gate electrode is provided in a stacked structure, the first conductive film 225a formed below the gate electrode and the second conductive film 225b formed over the first conductive film 225a are provided. A structure in which a sidewall is provided so as to be in contact with the sidewall of the second conductive film 225b and above the conductive film 225a (FIG. 4C) can also be employed. Note that in the above structure, an impurity region functioning as a source region or a drain region of the semiconductor films 103a and 103b can be provided using silicide such as Ni, Co, or W.

  Through the process of this embodiment, a highly reliable semiconductor device can be manufactured with high productivity. In addition, since the rare gas ions generated at a high density can be actively taken into the amorphous silicon film and the rare gas concentration in the film can be increased by the process of this embodiment, the crystalline semiconductor after gettering is obtained. The concentration of the element that promotes crystallization of the semiconductor film remaining in the film can be reduced as compared with the conventional gettering process. That is, gettering efficiency can be improved.

(Embodiment 2)
In this embodiment, a manufacturing process of a semiconductor device including a process of forming the oxide film 106 illustrated in FIG. 2A using a plasma treatment apparatus will be described. In this embodiment, steps up to the formation of the semiconductor film 105 illustrated in FIG. 1D can be performed in a manner similar to that of Embodiment 1.

In this embodiment, after the semiconductor film 105 in FIG. 2A is formed, the oxide film 106 is formed over the surface of the semiconductor film 105 using a plasma treatment apparatus. Oxygen or a gas containing oxygen is activated by plasma excitation and reacts with the material of the semiconductor film 105 to form an oxide film 106 having a thickness of about 1 nm to 10 nm on the semiconductor film. The oxide film 106 is for preventing the surface of the semiconductor film 105 from being etched in a later etching process. When forming with an oxide film using a plasma processing apparatus, plasma is generated by using a high frequency microwave, for example, a microwave of 2.45 GHz. As a source gas for generating plasma, a mixed gas of oxygen (O ₂ ) and a rare gas, a mixed gas of oxygen (O ₂ ), hydrogen (H ₂ ), and a rare gas, or the like can be used. As the rare gas, at least one of helium (He), neon (Ne), argon (Ar), krypton (Kr), and xenon (Xe) may be used.

When an oxide film is formed using a plasma processing apparatus, the plasma electron density is high, but the electron temperature in the vicinity of the object formed on the substrate is low, so that plasma damage to the substrate is prevented. be able to. Further, since the electron density of plasma is as high as 1 × 10 ¹¹ cm ⁻³ or more, a dense oxide film with few defects can be formed.

  In this embodiment, the oxide film 106 is formed using a plasma treatment apparatus, whereby a dense oxide film with few defects can be formed at low temperature. Accordingly, it is possible to prevent the surface of the semiconductor film 105 from being roughened due to defects such as pinholes on the surface of the oxide film 106 in a later etching step, and the reliability of the semiconductor device can be further improved.

  After that, by performing a process similar to that in Embodiment 1, a highly reliable semiconductor device can be manufactured.

(Embodiment 3)
In this embodiment, a manufacturing process of a semiconductor device including a process of gettering an element that promotes crystallization of a semiconductor film after an island-shaped semiconductor film is formed by etching the crystalline semiconductor film will be described. In this embodiment, steps up to and including the step illustrated in FIG. 1D can be performed as in Embodiment 1.

  After the crystalline semiconductor film 105 is formed, the crystalline semiconductor film 105 is etched to form an island-shaped semiconductor film 501 (FIG. 5A). Next, as illustrated in FIG. 5A, an oxide film 502 with a thickness of about 1 nm to 10 nm is formed on the surface of the semiconductor film 501. The oxide film 502 can be formed by the method described in Embodiment 1 or 2.

Next, the amorphous silicon film 503 containing a rare gas for gettering containing a rare gas element at a concentration of 1 × 10 ¹⁹ atoms / cm ³ or more and 1 × 10 ²² atoms / cm ³ or less is plasma-treated on the oxide film 502. It forms with the thickness of 25-250 nm using an apparatus. The amorphous silicon film 503 can be formed in the same manner as in Embodiment Mode 1.

  Next, as shown in FIG. 5B, heat treatment is performed using a furnace annealing method or an RTA method to perform gettering. In the case of performing furnace annealing, heat treatment is performed at 450 to 600 ° C. for 0.5 to 12 hours in a nitrogen atmosphere. When the RTA method is used, the lamp light source for heating is turned on for 1 to 60 seconds, preferably 30 to 60 seconds, and this is repeated 1 to 10 times, preferably 2 to 6 times. The emission intensity of the lamp light source is arbitrary, but the semiconductor film is instantaneously heated to 600 to 1000 ° C., preferably about 700 to 750 ° C.

  By the heat treatment, an element that promotes crystallization of the semiconductor film in the semiconductor film 501 moves to the amorphous silicon film 503 for gettering due to diffusion, and is gettered.

  Note that an element for promoting crystallization may be added and heat treatment may be performed to promote crystallization, and then laser beam irradiation may be performed, or laser beam irradiation may be performed instead of the heat treatment. Further, after the heat treatment, the laser treatment may be performed while maintaining the temperature.

Next, the amorphous silicon film 503 for gettering is selectively etched and removed. Etching can be performed by dry etching without using plasma with ClF ₃ or wet etching with an alkaline solution such as an aqueous solution containing hydrazine or tetramethylammonium hydroxide ((CH ₃ ) ₄ NOH). At this time, the oxide film 502 serves as an etching stopper, and the semiconductor film 501 can be prevented from being etched.

  Next, as illustrated in FIG. 5C, the gate insulating film 109 is formed so as to cover the island-shaped semiconductor film 501. The gate insulating film 109 may be an insulating film containing at least oxygen or nitrogen, and may be a single layer or a multilayer. As a film formation method at that time, a plasma CVD method or a sputtering method can be used. In this embodiment, silicon nitride oxide (SiNxOy (x> y, x, y = 1, 2, 3,...)) And silicon oxide silicon (SiOxNy (x> y, x) are formed by plasma CVD. , Y = 1, 2, 3,...)) Are continuously formed to form a total film thickness of 115 nm. Note that in the case where a TFT having a channel length of 1 μm or less (also referred to as a submicron TFT) is formed, the gate insulating film is preferably formed with a thickness of 10 to 50 nm.

  After that, a semiconductor device can be manufactured by performing the same process as in Embodiment Mode 1.

  In this embodiment mode, by performing gettering after the island-shaped semiconductor film 501 is formed, an element that promotes crystallization is also gettered from the end portion of the island-shaped semiconductor film 501, and thus gettering is performed. It can be performed with high efficiency.

(Embodiment 4)
Here, a method for manufacturing a semiconductor device capable of transmitting and receiving data without contact, for example, an IC tag and an RFID (Radio Frequency Identification) using the present invention will be described. In addition, the same thing as the said embodiment is represented with the same code | symbol.

  First, the separation layer 700 is formed on one surface of the substrate 1 (FIG. 7A). As the substrate 1, a glass substrate, a quartz substrate, a metal substrate or a stainless substrate having an insulating layer formed on one surface, a heat-resistant plastic substrate that can withstand the processing temperature in this step, or the like is used. With such a substrate 1, there is no significant limitation on the size and shape, and thus, if the substrate 1 is, for example, one side having a length of 1 meter or more and a rectangular shape, the productivity is remarkably improved. be able to. Such an advantage is a great advantage as compared with a case where a wireless chip is taken out from a circular silicon substrate. Further, the thin film integrated circuit formed over the substrate 1 is peeled off from the substrate 1 later. That is, a semiconductor device that can transmit and receive data without contact using the present invention does not have the substrate 1. Therefore, the substrate 1 from which the thin film integrated circuit has been peeled can be reused any number of times. Thus, if the substrate 1 is reused, the cost can be reduced. As the substrate 1 to be reused, a quartz substrate is desirable.

  Note that in this embodiment mode, the release layer 700 is formed by selectively forming a release layer by forming a thin film over one surface of the substrate 1 and then processing the shape by a photolithography method.

  The release layer 700 is formed by tungsten (W), molybdenum (Mo), titanium (Ti), tantalum (Ta), niobium (Nb), nickel (Ni), cobalt (Co), zirconium, or the like by sputtering or plasma CVD. An element selected from (Zr), zinc (Zn), ruthenium (Ru), rhodium (Rh), lead (Pb), osmium (Os), iridium (Ir), silicon (Si) or the element as a main component A layer made of an alloy material or a compound material is formed as a single layer or a stacked layer. The layer containing silicon may be amorphous, microcrystalline, or polycrystalline.

  In the case where the separation layer 700 has a single-layer structure, a tungsten layer, a molybdenum layer, or a layer containing a mixture of tungsten and molybdenum is preferably formed. Alternatively, a layer containing tungsten oxide or oxynitride, a layer containing molybdenum oxide or oxynitride, or a layer containing an oxide or oxynitride of a mixture of tungsten and molybdenum is formed. Note that the mixture of tungsten and molybdenum corresponds to, for example, an alloy of tungsten and molybdenum. The oxide of tungsten may be expressed as tungsten oxide.

  In the case where the separation layer 700 has a stacked structure, preferably, a tungsten layer, a molybdenum layer, or a layer containing a mixture of tungsten and molybdenum is formed as a first layer, and tungsten, molybdenum, or a mixture of tungsten and molybdenum is formed as a second layer. An oxide, nitride, oxynitride, or nitride oxide is formed.

  Note that in the case where a layered structure of a layer containing tungsten and a layer containing tungsten oxide is formed as the separation layer 700, a layer containing tungsten is formed, and a layer containing silicon oxide is formed thereover. The fact that a layer containing an oxide of tungsten is formed at the interface between the tungsten layer and the silicon oxide layer may be utilized. The same applies to the case where a layer containing tungsten nitride, oxynitride, and nitride oxide is formed. After a layer containing tungsten is formed, a silicon nitride layer, a silicon oxynitride layer, and a silicon nitride oxide layer are formed thereon. Form a layer. Note that after the layer containing tungsten is formed, a silicon oxide layer, a silicon oxynitride layer, a silicon nitride oxide layer, or the like which is formed thereover functions as an insulating layer to be a base later.

Moreover, the oxide of tungsten is represented by WOx, and X is 2-3. When x is 2 (WO ₂ ), when x is 2.5 (W ₂ O ₅ ), when x is 2.75 (W ₄ O ₁₁ ), when x is 3 (WO ₃ ), etc. . In forming the tungsten oxide, the value of X mentioned above is not particularly limited, and may be determined based on the etching rate. However, the layer having the best etching rate is a layer containing tungsten oxide (WOx, 0 <X <3) formed by a sputtering method in an oxygen atmosphere. Therefore, in order to shorten the manufacturing time, a layer containing a tungsten oxide is preferably formed as the separation layer by a sputtering method in an oxygen atmosphere.

  Note that according to the above process, the release layer 700 is formed so as to be in contact with the substrate 1, but the process is not limited thereto. An insulating layer serving as a base may be formed so as to be in contact with the substrate 1, and the peeling layer 700 may be formed so as to be in contact with the insulating layer.

  Next, the insulating film 2 serving as a base is formed so as to cover the peeling layer 700. As the base insulating layer, a layer containing a silicon oxide or a silicon nitride is formed as a single layer or a stacked layer by a sputtering method, a plasma CVD method, or the like. The silicon oxide material is a substance containing silicon (Si) and oxygen (O), and corresponds to silicon oxide, silicon oxynitride, silicon nitride oxide, or the like. The silicon nitride material is a substance containing silicon and nitrogen (N), and corresponds to silicon nitride, silicon oxynitride, silicon nitride oxide, or the like.

  Next, after an amorphous silicon film is formed on the insulating film 2, a p-channel TFT and an n-channel TFT are manufactured. The manufacturing process up to the insulating film 120 in FIG. 7B can be performed here because the method described in the above embodiment mode can be used. After the insulating film 120 is formed, a contact hole reaching the wiring 119 is formed, and a conductive film 702 is formed so as to cover the contact hole and the insulating film 120.

  The conductive film 702 in FIG. 7B functions as an antenna. The conductive film 702 is an element selected from aluminum (Al), titanium (Ti), silver (Ag), and copper (Cu), or an alloy material or a compound material containing these elements as a main component. Form with. For example, a laminated structure such as a laminated structure of a barrier layer and an aluminum layer or a laminated structure of a barrier layer, an aluminum layer, and a barrier layer may be employed. The barrier layer corresponds to titanium, titanium nitride, molybdenum, molybdenum nitride, or the like. Note that various shapes of antennas can be obtained by processing the conductive film 702 into a shape such as a dipole, a ring (for example, a loop antenna), and a rectangular parallelepiped (for example, a patch antenna).

  Note that a protective layer may be formed so as to cover the thin film integrated circuit 703. The protective layer corresponds to a layer containing carbon such as DLC (Diamond Like Carbon), a layer containing silicon nitride, a layer containing silicon nitride oxide, or the like.

  Next, the insulating films 2, 109, 117, 118, and 120 are etched by photolithography so that the peeling layer 700 is exposed, so that openings 704 and 705 are formed (FIG. 8A).

  Next, an insulating layer 706 is formed so as to cover the thin film integrated circuit 703 by an SOG method, a droplet discharge method, or the like (FIG. 8B). The insulating layer 706 is formed using an organic material, preferably an epoxy resin. The insulating layer 706 is formed so that the thin film integrated circuit 703 is not scattered. In other words, since the thin film integrated circuit 703 is small and thin, the thin film integrated circuit 703 is likely to be scattered after the peeling layer is removed because it is not in close contact with the substrate. However, by forming the insulating layer 706 around the thin film integrated circuit 703, the thin film integrated circuit 703 is weighted and scattering from the substrate 1 can be prevented. In addition, although the thin film integrated circuit 703 alone is thin and light, by forming the insulating layer 706, a certain degree of strength can be ensured without forming a wound shape. Note that in the illustrated structure, the insulating layer 706 is formed on the upper surface and side surfaces of the thin film integrated circuit 703, but the present invention is not limited to this structure, and the insulating layer 706 may be formed only on the upper surface of the thin film integrated circuit 703. Further, according to the above description, the step of forming the insulating layer 706 is performed after the step of forming the openings 704 and 705, but the order is not limited. After the step of forming the insulating layer 706 over the insulating film 120, a step of etching the plurality of insulating layers to form openings may be performed. In this case, the insulating layer 706 is formed only on the upper surface of the thin film integrated circuit 703.

Next, an etchant is introduced into the openings 704 and 705 to remove the peeling layer 700 (FIG. 9A). As the etchant, a gas or liquid containing halogen fluoride or an interhalogen compound is used. For example, chlorine trifluoride (ClF ₃ ) is used as a gas containing halogen fluoride. Then, the thin film integrated circuit 703 is peeled from the substrate 1.

  Next, one surface of the thin film integrated circuit 703 is bonded to the first base 707 and is completely separated from the substrate 1 (FIG. 9B).

  Subsequently, the other surface of the thin film integrated circuit 703 is bonded to the second base 708, and then laminated and bonded, and the thin film integrated circuit 703 is sealed by the first base 707 and the second base 708. (FIG. 10). Then, an IC tag in which the thin film integrated circuit 703 is sealed with the first base 707 and the second base 708 is completed.

  The first base 707 and the second base 708 are an antistatic film (antistatic film), a film made of polypropylene, polyester, vinyl, polyvinyl fluoride, vinyl chloride, or a paper made of a fibrous material. It corresponds to a laminated film of a base film (polyester, polyamide, inorganic vapor deposition film, paper, etc.) and an adhesive synthetic resin film (acrylic synthetic resin, epoxy synthetic resin, etc.). Examples of the antistatic film include a film in which an antistatic material is dispersed in a resin, a film on which an antistatic material is attached, and the like. The film with an antistatic material attached may be a film with an antistatic material attached to one side, or a film with an antistatic material attached to both sides. Good. Also, a film with an antistatic material affixed on one side may be affixed so that the surface with the antistatic material affixed is on the inside of the film, or on the outside of the film It may be pasted. The antistatic material may be attached to the entire surface or a part of the film. Materials that can be antistatic include metals such as aluminum, indium tin oxide (ITO), double-sided activator metal salts, imidazoline-type amphoteric surfactants, and crosslinkability with carboxyl groups and quaternary ammonium bases in the side chains. Examples thereof include a resin material containing a copolymer polymer. By using the antistatic films as the first substrate 707 and the second substrate 708, adverse effects on the integrated circuit due to external static electricity can be prevented. Laminated film (made of polypropylene, polyester, vinyl, polyvinyl fluoride, vinyl chloride, etc.), paper made of fibrous material, base film (polyester, polyamide, inorganic vapor deposition film, paper, etc.) and adhesive synthetic resin film It corresponds to a laminated film with (acrylic synthetic resin, epoxy synthetic resin, etc.). The laminated film is laminated with the object to be processed by thermocompression bonding. When the laminated film is laminated, the laminated film is an adhesive layer provided on the outermost surface of the laminated film or the A layer (not an adhesive layer) provided in the outer layer is melted by heat treatment and bonded by pressure.

  An adhesive layer may be provided on the surfaces of the first base 707 and the second base 708, or no adhesive layer may be provided. The adhesive layer corresponds to a layer containing an adhesive such as a thermosetting resin, an ultraviolet curable resin, an epoxy resin adhesive, or a resin additive.

  Next, application examples of a semiconductor device capable of transmitting and receiving data without contact will be described below with reference to the drawings. Note that a semiconductor device that can transmit and receive data without contact depends on a use form, such as an RFID (Radio Frequency Identification), an ID tag, an IC tag, an IC chip, an RF tag (Radio Frequency), a wireless tag, an electronic tag, or Also called a wireless chip.

  The RFID 80 has a function of communicating data without contact, and includes a power supply circuit 81, a clock generation circuit 82, a data demodulation circuit 83, a data modulation circuit 84, a control circuit 85 that controls other circuits, a storage circuit 86, and an antenna 87. (FIG. 11A). Note that the number of memory circuits is not limited to one, and a plurality of memory circuits may be used. An SRAM, a flash memory, a ROM, an FeRAM, or the like or an organic compound layer described in the above embodiment is used for a memory element portion. Can do.

  A signal transmitted as a radio wave from the reader / writer 88 is converted into an AC electrical signal by electromagnetic induction in the antenna 87. In the power supply circuit 81, a power supply voltage is generated using an AC electrical signal, and the power supply voltage is supplied to each circuit using a power supply wiring. The clock generation circuit 82 generates various clock signals based on the AC signal input from the antenna 87 and supplies the generated clock signal to the control circuit 85. The demodulation circuit 83 demodulates the AC electric signal and supplies it to the control circuit 85. The control circuit 85 performs various arithmetic processes according to the input signal. The storage circuit 86 stores programs and data used in the control circuit 85, and can also be used as a work area during arithmetic processing. Then, data is sent from the control circuit 85 to the modulation circuit 84, and load modulation can be applied to the antenna 87 from the modulation circuit 84 in accordance with the data. The reader / writer 88 can read the data as a result by receiving the load modulation applied to the antenna 87 by radio waves.

  The RFID may be of a type in which power supply voltage is supplied to each circuit by radio waves without mounting a power supply (battery), or each circuit is powered by radio waves and power supply (battery). It is good also as a type which supplies a voltage.

  By using the structure described in this embodiment mode, an RFID that can be bent can be manufactured; therefore, it can be attached to an object having a curved surface.

  Next, an example of a usage form of a flexible RFID will be described. A reader / writer 320 is provided on the side surface of the portable terminal including the display portion 321, and an RFID 323 is provided on the side surface of the article 322 (FIG. 11B). When the reader / writer 320 is held over the RFID 323 included in the item 322, the display unit 321 displays information about the product, such as a description of the product, such as the raw material and origin of the product, the inspection result for each production process, and the history of the distribution process. . In addition, when the product 326 is conveyed by the belt conveyor, the product 326 can be inspected using the reader / writer 324 and the RFID 325 provided in the product 326 (FIG. 11C). In this way, by using RFID in the system, information can be easily acquired, and high functionality and high added value are realized. In addition, as shown in this embodiment mode, even when attached to an object having a curved surface, it is possible to prevent damage to transistors included in the RFID and to provide a highly reliable RFID. Become.

  In addition to the above, flexible RFID has a wide range of uses, and it can be applied to any product that can be used for production and management by clarifying information such as the history of objects without contact. can do. For example, banknotes, coins, securities, certificate documents, bearer bonds, packaging containers, books, recording media, personal belongings, vehicles, foods, clothing, health supplies, daily necessities, chemicals, etc. It can be provided and used in an electronic device or the like. These examples will be described with reference to FIG.

  Banknotes and coins are money that circulates in the market, and include those that are used in the same way as money in a specific area (cash vouchers), commemorative coins, and the like. Securities refer to checks, securities, promissory notes, etc. (see FIG. 12A). The certificate refers to a driver's license, a resident's card, etc. (see FIG. 12B). Bearer bonds refer to stamps, gift cards, various gift certificates, and the like (see FIG. 12C). Packaging containers refer to wrapping paper for lunch boxes, plastic bottles, and the like (see FIG. 12D). Books refer to books, books, and the like (see FIG. 12E). The recording media refer to DVD software, video tapes, and the like (see FIG. 12F). The vehicles refer to vehicles such as bicycles, ships, and the like (see FIG. 12G). Personal belongings refer to bags, glasses, and the like (see FIG. 12H). Foods refer to food products, beverages, and the like. Clothing refers to clothing, footwear, and the like. Health supplies refer to medical equipment, health equipment, and the like. Livingware refers to furniture, lighting equipment, and the like. Chemicals refer to pharmaceuticals, agricultural chemicals, and the like. Electronic devices refer to liquid crystal display devices, EL display devices, television devices (television receivers, thin television receivers), cellular phones, and the like.

  Forgery can be prevented by providing RFID 2000 for banknotes, coins, securities, certificates, bearer bonds, and the like. In addition, by providing RFID for personal items such as packaging containers, books, and recording media, foods, daily necessities, electronic devices, etc., the efficiency of inspection systems and rental store systems can be improved. . By providing RFID for vehicles, health supplies, medicines, etc., counterfeiting and theft can be prevented, and medicines can prevent mistakes in taking medicine. As a method of providing the RFID, the RFID is provided on the surface of the article or embedded in the article. For example, a book may be embedded in paper, and a package made of an organic resin may be embedded in the organic resin. By using a flexible RFID, even when it is provided on paper or the like, by providing the RFID using the semiconductor device having the structure described in the above embodiment mode, an element included in the RFID can be used. Damage or the like can be prevented.

  In this way, by providing RFID for packaging containers, recording media, personal items, foods, clothing, daily necessities, electronic devices, etc., it is possible to improve the efficiency of inspection systems and rental store systems. . In addition, forgery and theft can be prevented by providing RFID for vehicles. Moreover, by embedding it in creatures such as animals, it is possible to easily identify individual creatures. For example, by embedding an RFID equipped with a sensor in a living creature such as livestock, it is possible to easily manage the health status such as the current body temperature as well as the year of birth, gender or type.

  As described above, an amorphous silicon film for gettering is formed using plasma having a low electron temperature and a high electron density in the semiconductor device capable of transmitting and receiving data without contact according to this embodiment. A TFT having a process is used. By forming the amorphous silicon film using a plasma with a low electron temperature and a high electron density, the deposition rate can be improved, so that the processing time per substrate can be shortened. The productivity of the semiconductor device can be improved. Further, since the plasma used when depositing the amorphous silicon film for segregating the element used for promoting crystallization has a low electron temperature, damage to the surface of the crystalline semiconductor film can be suppressed. In addition, by forming an oxide film functioning as an etching stopper with low electron temperature and high electron density plasma, damage due to etching of the surface of the crystalline semiconductor film can be suppressed, so that a favorable semiconductor device can be manufactured. it can.

  In the case where the semiconductor device according to this embodiment includes a TFT having a crystalline semiconductor film with a thin film thickness (50 nm or less), the amorphous silicon film for gettering may be thin. When the amorphous silicon film is formed using low electron temperature and high electron density plasma, it is possible to increase the concentration of rare gas in the film and improve gettering efficiency. Thus, the amorphous silicon film can be formed. By thinning the amorphous silicon film, it is possible to prevent the amorphous silicon film from being peeled off in a heat treatment process during gettering. Further, when the amorphous silicon film is etched, the etching time is shortened and the over-etching time is shortened, so that damage such as defects of the silicon film can be suppressed. In addition, since the thin film may be formed, the time for forming the amorphous silicon film can be shortened.

(Embodiment 5)
In this embodiment, an example of manufacturing a liquid crystal display device (LCD) using the present invention is described.

  The manufacturing method of the display device described here is a method in which a pixel portion including a pixel TFT and a TFT of a driver circuit portion provided around the pixel portion are simultaneously manufactured. However, in order to simplify the explanation, a CMOS circuit which is a basic unit with respect to the drive circuit is illustrated.

  First, the steps up to the formation of the TFT in FIG. 13 are performed based on the above embodiment. In addition, the same thing as the said embodiment is represented with the same code | symbol. In this embodiment, the pixel TFT 552 is a multi-gate TFT.

  After the insulating film 117 is formed, a planarizing film to be the second insulating film 118 is formed. As the planarizing film, those described in the above embodiment can be used.

  Next, contact holes are formed in the second insulating film 118 and the insulating film 117 using a resist mask.

  Next, a resist mask is formed over the second insulating film 118, and the second insulating film 118 and the insulating film 117 are etched using the resist mask, whereby contacts located on the source region and the drain region, respectively. A hole is formed.

  After the resist mask is removed and a conductive film is formed, etching is performed using another resist mask to form electrodes or wirings 540 to 544 (such as TFT source wiring and drain wiring). As the conductive film, a laminated film of TiN, Al and TiN, an Al alloy film, or the like can be used.

  Here, the electrodes and wiring are preferably routed so that the corners are rounded when viewed from the direction perpendicular to the substrate 1. By rounding the corners, dust and the like can be prevented from remaining at the corners of the wiring, and defects caused by the dust can be suppressed and the yield can be improved. In etching, a mask prepared by exposure and development using a photosensitive resist as a photomask is used, but the transmittance of light for exposure in any part of the photomask is suppressed, and the thickness of the mask after development is reduced. Can be controlled. By controlling the thickness of the mask, finer and more accurate processing can be performed.

  Next, a third interlayer insulating film 610 is formed over the second insulating film 118 and the electrodes or wirings 540 to 544. Note that the third interlayer insulating film 610 can be formed using a material similar to that of the second insulating film 118.

Next, a resist mask is formed using a photomask, and a part of the third interlayer insulating film 610 is removed by dry etching to form an opening (a contact hole is formed). In this contact hole formation, carbon tetrafluoride (CF ₄ ), oxygen (O ₂ ), and helium (He) are used as an etching gas. Note that the bottom of the contact hole reaches the electrode or wiring 544.

  After removing the resist mask, a second conductive film is formed over the entire surface. Next, the second conductive film is processed using a photomask to form a pixel electrode 623 electrically connected to the electrode or the wiring 544 (FIG. 13). In the case of manufacturing a reflective liquid crystal display panel, a metal material having light reflectivity such as Ag (silver), Au (gold), Cu (copper), W (tungsten), Al (aluminum), or the like by a pixel electrode 623 sputtering method. What is necessary is just to form using.

When a transmissive liquid crystal display panel is manufactured, a transparent conductive film such as indium tin oxide (ITO), indium tin oxide containing silicon oxide, zinc oxide (ZnO), or tin oxide (SnO ₂ ) is used. A pixel electrode 623 is formed.

  FIG. 15 is an enlarged top view of a part of the pixel portion including the pixel TFT. FIG. 13 shows a state in which the pixel electrode is being formed. In the right pixel, the pixel electrode is formed, but in the left pixel, the pixel electrode is not formed. In FIG. 15, a diagram cut along a solid line A-A ′ corresponds to the cross section of the pixel portion in FIG. 13, and the same reference numerals are used for portions corresponding to FIG.

  A pixel is provided at an intersection of a source signal line 543 and a gate signal line 4802 and includes a transistor 552, a capacitor 4804, and a liquid crystal element. In the figure, only one electrode (pixel electrode 623) of the pair of electrodes for driving the liquid crystal of the liquid crystal element is shown.

  The transistor 552 includes the semiconductor layer 4806, the first insulating layer, and part of the gate signal line 4802 which overlaps with the semiconductor layer 4806 with the first insulating layer interposed therebetween. The semiconductor layer 4806 becomes an active layer of the transistor 552. The first insulating layer functions as a gate insulating layer of the transistor. One of a source and a drain of the transistor 552 is connected to the source signal line 4801 through the contact hole 4807 and the other is connected to the connection wiring 544 through the contact hole 4808. The connection wiring 544 is connected to the pixel electrode 623 through a contact hole 4810. The connection wiring 544 can be formed by using the same conductive layer as the source signal line 543 and simultaneously etching.

  The capacitor 4804 includes a semiconductor layer 4806, a first insulating layer, and a capacitor wiring 4811 that overlaps the semiconductor layer 4806 with the first insulating layer interposed therebetween as a pair of electrodes, and the first insulating layer as a dielectric layer. Capacitor element (referred to as a first capacitor element). Further, the capacitor 4804 has a structure in which the capacitor wiring 4811 and the pixel electrode 623 that overlaps the capacitor wiring 4811 with the second insulating layer interposed therebetween are used as a pair of electrodes, and the second insulating layer is a dielectric layer. (Referred to as a second capacitor element). Since the second capacitor element is connected in parallel with the first capacitor element, the capacitance value of the capacitor element 4804 can be increased by providing the second capacitor element. The capacitor wiring 4811 can be formed using the same conductive layer as the gate signal line 4802 and simultaneously etched.

  The pattern of the semiconductor layer 4806, the gate signal line 4802, the capacitor wiring 4811, the source signal line 543, the connection wiring 544, and the pixel electrode 623 has a shape in which a corner is chamfered with a length of 10 μm or less on one side. By creating a mask pattern using this photomask pattern and processing the shape using the mask pattern, the corner can be chamfered. The corners may be further rounded. That is, the pattern shape may be made smoother than the photomask pattern by appropriately determining the exposure conditions and the etching conditions.

  In the wiring and the electrode, the following effects can be obtained by making the corners of the bent portion and the portion where the wiring width changes smooth and round. By chamfering the convex portion, generation of fine powder due to abnormal discharge can be suppressed when dry etching using plasma is performed. Further, by chamfering the recess, even if it is fine powder, the fine powder can be prevented from collecting at the corners during washing, and the fine powder can be washed away. Thus, the problem of dust and fine powder in the manufacturing process can be solved and the yield can be improved.

  Through the above steps, the TFT substrate of the liquid crystal display device in which the top gate pixel TFT 552, the CMOS circuit 553 including the top gate TFTs 550 and 551, and the pixel electrode 623 are formed on the substrate is completed. In this embodiment, a top gate type TFT is formed, but a bottom gate type TFT can be used as appropriate.

  Next, an alignment film 624 a is formed so as to cover the pixel electrode 623. Note that the alignment film 624a may be formed using a droplet discharge method, a screen printing method, or an offset printing method. Thereafter, a rubbing process is performed on the surface of the alignment film 624a.

  The counter substrate 625 is provided with a color filter composed of a colored layer 626a, a light shielding layer (black matrix) 626b, and an overcoat layer 627, a counter electrode 628 composed of a transparent electrode or a reflective electrode, and an alignment film thereon. 624b is formed (FIG. 14). Then, a sealing material 600 having a closed pattern is formed so as to surround a region overlapping with the pixel portion 650 including the pixel TFT by a droplet discharge method (FIG. 16A). Here, an example in which a sealing material 600 having a closed pattern is drawn in order to drop liquid crystal is shown. However, a dip type (in which liquid crystal is injected by using a capillary phenomenon after providing a sealing pattern having an opening and bonding the substrate 500 together) A pumping type) may be used.

  Next, the liquid crystal composition 629 is dropped under reduced pressure so that bubbles do not enter (FIG. 16B), and both the substrates 500 and 625 are attached (FIG. 16C). The liquid crystal is dropped once or a plurality of times in the closed loop seal pattern. As an alignment mode of the liquid crystal composition 629, a TN mode in which the alignment of liquid crystal molecules is twisted by 90 ° from light incidence to light emission is used. And it bonds so that the rubbing direction of a board | substrate may orthogonally cross.

  Note that the distance between the pair of substrates may be maintained by scattering spherical spacers, forming columnar spacers made of resin, or including a filler in the sealant 600. The columnar spacer is an organic resin material mainly containing at least one of acrylic, polyimide, polyimide amide, and epoxy, or any one material of silicon oxide, silicon nitride, and silicon oxide containing nitrogen, or a laminate thereof. It is an inorganic material made of a film.

  Next, the substrate is divided. In case of multi-chamfering, each panel is divided. In the case of one-sided chamfering, the dividing step can be omitted by attaching a counter substrate that has been cut in advance (FIGS. 14 and 16D).

  Then, FPC (Flexible Printed Circuit) is pasted through the anisotropic conductive layer. The liquid crystal display device is completed through the above steps. If necessary, an optical film is attached. In the case of a transmissive liquid crystal display device, the polarizing plate is attached to both the TFT substrate and the counter substrate.

  FIG. 17A shows a top view of the liquid crystal display device obtained through the above steps, and FIG. 17B shows an example of a top view of another liquid crystal display device.

  In FIG. 17A, 1 is a TFT substrate, 625 is a counter substrate, 650 is a pixel portion, 600 is a sealing material, and 801 is an FPC. Note that the liquid crystal composition is discharged by a droplet discharge method, and the pair of substrates 500 and 625 is bonded to each other with the sealant 600 under reduced pressure.

  In FIG. 17B, 1 is a TFT substrate, 625 is a counter substrate, 802 is a source signal line driver circuit, 803 is a gate signal line driver circuit, 650 is a pixel portion, 600a is a first sealant, and 801 is an FPC. . Note that the liquid crystal composition is discharged by a droplet discharge method, and the pair of substrates 500 and 625 are bonded to each other with the first sealant 600a and the second sealant 600b. Since the driving circuit portions 802 and 803 do not require liquid crystal, only the pixel portion 650 holds the liquid crystal, and the second sealant 600b is provided to reinforce the entire panel.

  As described above, the liquid crystal display device according to this embodiment uses a TFT having a step of forming an amorphous silicon film for gettering using plasma with a low electron temperature and a high electron density. By forming the amorphous silicon film using plasma with a low electron temperature and a high electron density, the deposition rate can be improved. Accordingly, the processing time per substrate can be shortened, and the productivity of the liquid crystal display device can be improved. Further, since the plasma used when depositing the amorphous silicon film for segregating the element used for promoting crystallization has a low electron temperature, damage to the surface of the crystalline semiconductor film can be suppressed. In addition, by forming an oxide film functioning as an etching stopper with low electron temperature and high electron density plasma, damage due to etching of the crystalline semiconductor film surface can be suppressed, so that a favorable liquid crystal display device is manufactured. Can do.

Note that in this embodiment mode, the TFT is a top gate type TFT, but the present invention is not limited to this structure, and a bottom gate type (reverse stagger type) TFT or a forward stagger type TFT can be used as appropriate. is there. Further, the TFT is not limited to a multi-gate TFT, and may be a single gate TFT.
(Embodiment 6)
In this embodiment mode, an example of manufacturing a light-emitting device using the present invention will be described.

  First, the process up to the formation of the TFT in FIG. In addition, the same thing as the said embodiment is represented with the same code | symbol. FIG. 18 shows only one TFT.

  After the insulating film 117 is formed, a planarizing film to be the second insulating film 118 is formed. As the planarization film, the one described in the above embodiment can be used (FIG. 18A).

  Next, contact holes are formed in the second insulating film 118 and the insulating film 117 using a resist mask.

  Next, a contact hole reaching the semiconductor layer is opened. The contact hole can be formed by etching using a resist mask until the semiconductor layer is exposed, and can be formed by either wet etching or dry etching. Note that etching may be performed once depending on conditions, or etching may be performed in a plurality of times. In addition, when etching is performed a plurality of times, both wet etching and dry etching may be used. (Fig. 18B)

  Then, a conductive layer covering the contact hole and the second insulating film 118 is formed. The conductive layer is processed into a desired shape, so that the connection portion 161a, the wiring 161b, and the like are formed. This wiring may be a single layer of aluminum, copper, an alloy of aluminum, carbon, and nickel, an alloy of aluminum, carbon, and molybdenum, or a laminated structure of molybdenum, aluminum, molybdenum, titanium, and aluminum from the substrate side. A structure such as titanium, titanium, titanium nitride, aluminum, or titanium may be used. (Figure 18 (C))

  After that, a third insulating film 163 is formed so as to cover the connection portion 161a, the wiring 161b, and the second insulating film 118. As the material of the third insulating film 163, a coating film of acrylic, polyimide, siloxane or the like having self-flatness can be suitably used. In this embodiment mode, siloxane is used as the third insulating film 163. (Fig. 18D)

  Subsequently, a fourth insulating film may be formed using silicon nitride or the like over the third insulating film 163. This is formed in order to prevent the third insulating film 163 from being etched more than necessary in the subsequent etching of the pixel electrode. Therefore, when the ratio of the etching rate between the pixel electrode and the third insulating film is large, it may not be provided.

  Subsequently, a contact hole that penetrates the third insulating film 163 and reaches the connection portion 161a is formed.

  Then, after forming the light-transmitting conductive layer so as to cover the contact hole and the third insulating film 163 (or the fourth insulating film), the light-transmitting conductive layer is processed to form a thin film light emitting element. The first electrode 164 is formed. Here, the first electrode 164 is in electrical contact with the connection portion 161a.

  The material of the first electrode 164 is aluminum (Al), silver (Ag), gold (Au), platinum (Pt), nickel (Ni), tungsten (W), chromium (Cr), molybdenum (Mo), iron (Fe), cobalt (Co), copper (Cu), palladium (Pd), lithium (Li), cesium (Cs), magnesium (Mg), calcium (Ca), strontium (Sr), titanium (Ti), etc. Conductive metals, or alloys such as aluminum-silicon (Al-Si), aluminum-titanium (Al-Ti), aluminum-silicon-copper (Al-Si-Cu), or titanium nitride (TiN) Metal material nitride, indium tin oxide (ITO), indium tin oxide containing silicon oxide (ITSO), acid Metal compounds such as indium zinc oxide (IZO) in which 2 to 20 atomic% zinc oxide (ZnO) is mixed with indium phosphide can be formed.

  In addition, an electrode for extracting light may be formed of a conductive film having transparency. Indium tin oxide (ITO), indium tin oxide containing silicon oxide (ITSO), and indium oxide are 2 to 2. In addition to a metal compound such as indium zinc oxide (IZO) in which 20 atomic% of zinc oxide (ZnO) is mixed, an ultrathin metal such as Al or Ag is used. In the case where light emission is extracted from the second electrode, a material with high reflectivity (Al, Ag, or the like) can be used for the first electrode 164. In this embodiment mode, ITSO is used as the first electrode 164 (FIG. 19A).

  Next, an insulating layer made of an organic material or an inorganic material is formed so as to cover the third insulating film 163 (or the fourth insulating film) and the first electrode 164. Subsequently, the insulating film is processed so that part of the first electrode 164 is exposed, so that a partition 165 is formed. As a material for the partition wall 165, a photosensitive organic material (acrylic, polyimide, or the like) is preferably used, but it may be formed of an organic material or an inorganic material that does not have photosensitivity. Alternatively, a black pigment or dye such as titanium black or carbon nitride may be dispersed in the material of the partition wall 165 using a dispersing agent or the like, and the partition wall 165 may be blacked to be used like a black matrix. It is desirable that the end face of the partition wall 165 facing the first electrode has a curvature and has a tapered shape in which the curvature continuously changes (FIG. 19B).

  Next, a layer 166 containing a light-emitting substance is formed, and then a second electrode 167 covering the layer 166 containing a light-emitting substance is formed. Accordingly, a light-emitting element 193 in which the layer 166 containing a light-emitting substance is sandwiched between the first electrode 164 and the second electrode 167 can be manufactured, and a voltage higher than that of the second electrode can be applied to the first electrode. Light emission can be obtained by applying the light (FIG. 19C). As an electrode material used for forming the second electrode 167, a material similar to the material of the first electrode can be used. In this embodiment mode, aluminum is used as the second electrode.

  The layer 166 containing a light-emitting substance is formed by a vapor deposition method, an inkjet method, a spin coating method, a dip coating method, or the like. The layer 166 containing a light-emitting substance may be a stack of layers having functions such as hole transport, hole injection, electron transport, electron injection, and light emission, or may be a single layer of a light-emitting layer. In addition, as a material used for a layer containing a light-emitting substance, an organic compound is usually used in a single layer or a stacked layer. For example, a layer in contact with the first electrode or the second electrode is part of a film made of an organic compound. It is good also as a structure using an inorganic compound.

Thereafter, a silicon oxide film containing nitrogen is formed as a passivation film by a plasma CVD method. In the case of using a silicon oxide film containing nitrogen, a silicon oxynitride film manufactured from SiH ₄ , N ₂ O, NH ₃ by a plasma CVD method, or a silicon oxynitride film manufactured from SiH ₄ , N ₂ O, Alternatively, a silicon oxynitride film formed from a gas obtained by diluting SiH ₄ and N ₂ O with Ar may be formed.

Further, a silicon oxynitride silicon film formed from SiH ₄ , N ₂ O, and H ₂ may be applied as the passivation film. Needless to say, the first passivation film is not limited to a single layer structure, and another insulating layer containing silicon may be used as a single layer structure or a stacked structure. Further, a multilayer film of carbon nitride film and silicon nitride film, a multilayer film of styrene polymer, a silicon nitride film, or a diamond-like carbon film may be formed instead of the silicon oxide film containing nitrogen.

  Subsequently, the display portion is sealed in order to protect the light emitting element from a substance that promotes deterioration such as water. In the case where the counter substrate is used for sealing, bonding is performed with an insulating sealing material so that the external connection portion is exposed. A space between the counter substrate and the element substrate may be filled with an inert gas such as dry nitrogen, or a sealing material may be applied to the entire surface of the pixel portion to bond the counter substrate. It is preferable to use an ultraviolet curable resin or the like for the sealing material. The sealing material may contain a desiccant or particles for keeping the gap between the substrates constant. Subsequently, a flexible wiring substrate is attached to the external connection portion, whereby the light emitting device is completed.

  One example of the structure of the light-emitting device manufactured as described above will be described with reference to FIG. In addition, even if the shapes are different, parts showing similar functions are denoted by the same reference numerals, and explanations thereof are omitted. In this embodiment mode, the thin film transistor 170 is connected to the light emitting element 193 through the connection portion 161a.

  FIG. 20A illustrates a structure in which the first electrode 164 is formed using a light-transmitting conductive film, and light emitted from the layer 166 containing a light-emitting substance is extracted from the substrate 1 side. Reference numeral 194 denotes a counter substrate, which is fixed to the substrate 1 using a sealant or the like after the light emitting element 193 is formed. By filling a light-transmitting resin 188 between the counter substrate 194 and the element and sealing the element, the light-emitting element 193 can be prevented from being deteriorated by moisture. Further, it is desirable that the resin 188 has a hygroscopic property. Further, when a highly light-transmitting desiccant 189 is dispersed in the resin 188, the influence of moisture can be further suppressed, which is a more desirable form.

  20B illustrates a structure in which both the first electrode 164 and the second electrode 167 are formed using a light-transmitting conductive film, and light can be extracted to both the substrate 1 and the counter substrate 194. It has become. Further, in this configuration, by providing the polarizing plate 190 outside the substrate 1 and the counter substrate 194, it is possible to prevent the screen from being seen through, and visibility is improved. A protective film 191 is preferably provided outside the polarizing plate 190.

  Note that either an analog video signal or a digital video signal may be used for the light-emitting device according to this embodiment having a display function. When a digital video signal is used, the video signal is classified into one using a voltage and one using a current. When the light emitting element emits light, the video signal input to the pixel has a constant voltage and a constant current. When the video signal has a constant voltage, the voltage applied to the light emitting element is constant. And the current flowing through the light emitting element is constant. In addition, a video signal having a constant current includes a constant voltage applied to the light emitting element and a constant current flowing in the light emitting element. A constant voltage applied to the light emitting element is constant voltage driving, and a constant current flowing through the light emitting element is constant current driving. In constant current driving, a constant current flows regardless of the resistance change of the light emitting element. Any of the above driving methods may be used for the light emitting device and the driving method thereof according to the present embodiment.

  As described above, the light-emitting device according to this embodiment uses a TFT including a step of forming an amorphous silicon film for gettering using plasma having a low electron temperature and a high electron density. By forming the amorphous silicon film using plasma with a low electron temperature and a high electron density, the deposition rate can be improved. Thus, the processing time per substrate can be shortened, and the productivity of the light emitting device can be improved. Further, since the plasma used when depositing the amorphous silicon film for segregating the element used for promoting crystallization has a low electron temperature, damage to the surface of the crystalline semiconductor film can be suppressed. In addition, by forming an oxide film functioning as an etching stopper with low electron temperature and high electron density plasma, damage due to etching of the surface of the crystalline semiconductor film can be suppressed, so that a favorable light-emitting device can be manufactured. it can. The light-emitting device manufactured in this embodiment can be used as a display portion of various electronic devices.

(Embodiment 7)
In this embodiment, the appearance of the panel of the light-emitting device according to this embodiment will be described with reference to FIGS. FIG. 21 is a top view of a panel in which a transistor and a light-emitting element formed over a substrate are sealed with a sealant formed between a counter substrate 4006 and FIG. 21B is a cross-sectional view of FIG. It corresponds to. Moreover, the structure which the light emitting element mounted in this panel has is a structure as shown in the above embodiment.

  A sealant 4005 is provided so as to surround the pixel portion 4002, the signal line driver circuit 4003, and the scan line driver circuit 4004 which are provided over the substrate 4001. A counter substrate 4006 is provided over the pixel portion 4002, the signal line driver circuit 4003, and the scan line driver circuit 4004. Therefore, the pixel portion 4002, the signal line driver circuit 4003, and the scan line driver circuit 4004 are sealed together with the filler 4007 by the substrate 4001, the sealant 4005, and the counter substrate 4006.

  The pixel portion 4002, the signal line driver circuit 4003, and the scan line driver circuit 4004 provided over the substrate 4001 include a plurality of thin film transistors. In FIG. 21B, the thin film transistor 4008 included in the signal line driver circuit 4003 is provided. And a thin film transistor 4010 included in the pixel portion 4002.

  The light emitting element 4011 is electrically connected to the thin film transistor 4010.

  The lead wiring 4014 corresponds to a wiring for supplying a signal or a power supply voltage to the pixel portion 4002, the signal line driver circuit 4003, and the scan line driver circuit 4004. The lead wiring 4014 is connected to the connection terminal 4016 through the lead wiring 4015. The connection terminal 4016 is electrically connected to a terminal included in a flexible printed circuit (FPC) 4018 through an anisotropic conductive film 4019.

  Note that as the filler 4007, in addition to an inert gas such as nitrogen or argon, an ultraviolet curable resin or a thermosetting resin can be used, and polyvinyl chloride, acrylic, polyimide, epoxy resin, silicon resin, polyvinyl butyral, Alternatively, ethylene vinylene acetate can be used.

  Note that the light-emitting device according to this embodiment includes in its category a panel in which a pixel portion having a light-emitting element is formed and a module in which an IC is mounted on the panel.

(Embodiment 8)
In this embodiment, pixel circuits and protection circuits included in the panel and module described in Embodiment 7 will be described. Note that the cross-sectional views shown in FIGS. 18 to 21 are cross-sectional views of the driving TFT 1403 or the switching TFT 1401 and the light emitting element 1405.

  In the pixel shown in FIG. 22A, a signal line 1410 and power supply lines 1411 and 1412 are arranged in the column direction, and a scanning line 1414 is arranged in the row direction. The pixel further includes a switching TFT 1401, a driving TFT 1403, a current control TFT 1404, a capacitor element 1402, and a light emitting element 1405.

  The pixel shown in FIG. 22C is the same as the pixel shown in FIG. 22A except that the gate electrode of the driving TFT 1403 is connected to the power supply line 1412 arranged in the row direction. It is a configuration. That is, both pixels shown in FIGS. 22A and 22C show the same equivalent circuit diagram. However, in the case where the power supply line 1412 is arranged in the row direction (FIG. 22A) and the case where the power supply line 1412 is arranged in the column direction (FIG. 22C), each power supply line has a different layer. It is formed of a conductive film. Here, attention is paid to the wiring to which the gate electrode of the driving TFT 1403 is connected, and FIGS. 22A and 22C are shown separately to show that the layers for manufacturing these are different.

  As a feature of the pixel shown in FIGS. 22A and 22C, a driving TFT 1403 and a current control TFT 1404 are connected in series in the pixel, and the channel length L (1403) and channel width W (1403) of the driving TFT 1403 are connected. ), The channel length L (1404) and the channel width W (1404) of the current control TFT 1404 satisfy L (1403) / W (1403): L (1404) / W (1404) = 5 to 6000: 1. It is good to set to.

  Note that the driving TFT 1403 operates in a saturation region and has a role of controlling a current value flowing through the light emitting element 1405, and the current control TFT 1404 operates in a linear region and has a role of controlling supply of current to the light emitting element 1405. . Both TFTs preferably have the same conductivity type in terms of manufacturing process, and in this embodiment mode, they are formed as n-channel TFTs. The driving TFT 1403 may be a depletion type TFT as well as an enhancement type. In the light emitting device according to this embodiment having the above-described configuration, since the current control TFT 1404 operates in a linear region, a slight change in Vgs of the current control TFT 1404 does not affect the current value of the light emitting element 1405. . That is, the current value of the light emitting element 1405 can be determined by the driving TFT 1403 operating in the saturation region. With the above structure, it is possible to provide a light-emitting device in which luminance unevenness of a light-emitting element due to variation in TFT characteristics is improved and image quality is improved.

  In the pixels shown in FIGS. 22A to 22D, the switching TFT 1401 controls input of a video signal to the pixel. When the switching TFT 1401 is turned on, a video signal is input into the pixel. Then, the voltage of the video signal is held in the capacitor element 1402. Note that FIGS. 22A and 22C illustrate a structure in which the capacitor 1402 is provided; however, the present invention is not limited to this, and the capacitor that holds a video signal can be covered by a gate capacitor or the like. The element 1402 is not necessarily provided.

  The pixel shown in FIG. 22B has the same pixel structure as that shown in FIG. 22A except that a TFT 1406 and a scanning line 1414 are added. Similarly, the pixel illustrated in FIG. 22D has the same pixel structure as that illustrated in FIG. 22C except that a TFT 1406 and a scanning line 1414 are added.

  The TFT 1406 is controlled to be turned on or off by a newly arranged scanning line 1414. When the TFT 1406 is turned on, the charge held in the capacitor element 1402 is discharged, and the current control TFT 1404 is turned off. That is, the arrangement of the TFT 1406 can forcibly create a state where no current flows through the light-emitting element 1405. Therefore, the TFT 1406 can be called an erasing TFT. Accordingly, the configurations in FIGS. 22B and 22D can improve the duty ratio because the lighting period can be started simultaneously with or immediately after the start of the writing period without waiting for signal writing to all pixels. It becomes possible.

  In the pixel shown in FIG. 22E, a signal line 1410, a power supply line 1411 are arranged in the column direction, and a scanning line 1414 is arranged in the row direction. Further, the pixel includes a switching TFT 1401, a driving TFT 1403, a capacitor element 1402, and a light emitting element 1405. The pixel illustrated in FIG. 22F has the same pixel structure as that illustrated in FIG. 22E except that a TFT 1406 and a scanning line 1415 are added. Note that the duty ratio of the structure in FIG. 22F can also be improved by the arrangement of the TFT 1406.

  As described above, various pixel circuits can be employed. In particular, in the case where a thin film transistor is formed from an amorphous semiconductor film, it is preferable to increase the semiconductor film of the driving TFT 1403. Therefore, it is preferable that the pixel circuit be a top emission type in which light from the light emitting laminate is emitted from the sealing substrate side.

  Such an active matrix light-emitting device is considered to be advantageous because it can be driven at a low voltage because a TFT is provided in each pixel when the pixel density is increased.

  In this embodiment mode, an active matrix light-emitting device in which each pixel is provided with each TFT has been described; however, the present invention can also be applied to a passive matrix light-emitting device. A passive matrix light-emitting device has a high aperture ratio because a TFT is not provided for each pixel. In the case of a light-emitting device in which light emission is emitted to both sides of a light-emitting stack, transmittance using a passive matrix light-emitting device is increased.

  Next, the case where a diode is provided as a protective circuit in the scan line and the signal line will be described using the equivalent circuit illustrated in FIG.

  In FIG. 23, switching TFTs 1401 and 1403, a capacitor element 1402, and a light emitting element 1405 are provided in the pixel portion 1500. The signal line 1410 is provided with diodes 1561 and 1562. Similarly to the switching TFT 1401 or 1403, the diodes 1561 and 1562 are manufactured based on the above embodiment mode and include a gate electrode, a semiconductor layer, a source electrode, a drain electrode, and the like. The diodes 1561 and 1562 operate as diodes by connecting a gate electrode and a drain electrode or a source electrode.

  Common potential lines 1554 and 1555 connected to the diode are formed in the same layer as the gate electrode. Therefore, in order to connect to the source electrode or the drain electrode of the diode, it is necessary to form a contact hole in the gate insulating layer.

  A diode provided in the scan line 1414 has a similar structure.

  Thus, according to this embodiment, the protection diode provided in the input stage can be formed simultaneously. Note that the position where the protective diode is formed is not limited to this, and the protective diode can be provided between the driver circuit and the pixel.

(Embodiment 9)
As an electronic device having a light emitting device in which a module as shown in the above embodiment is mounted, a video camera, a digital camera, a goggle type display (head mounted display), a navigation system, a sound reproducing device (car audio component, etc.) ), A computer, a game device, a portable information terminal (mobile computer, mobile phone, portable game machine, electronic book, or the like), and an image playback device (specifically, a DigiAl Versatile Disc (DVD)) provided with a recording medium. For example, a device provided with a display capable of reproducing the image and displaying the image. Specific examples of these electronic devices are shown in FIGS.

  FIG. 24A illustrates a television receiver, a personal computer monitor, and the like. A housing 3001, a display portion 3003, a speaker portion 3004, and the like are included. The display portion 3003 is provided with an active matrix display device. The display portion 3003 includes a TFT manufactured by the manufacturing method described in any of Embodiments 1 to 3 for each pixel. By having this TFT, a television receiver or monitor with little deterioration can be obtained.

  FIG. 24B illustrates a cellular phone, which includes a main body 3101, a housing 3102, a display portion 3103, an audio input portion 3104, an audio output portion 3105, operation keys 3106, an antenna 3108, and the like. The display portion 3103 is provided with an active matrix display device. The display portion 3103 includes a TFT manufactured by the manufacturing method described in Embodiment Modes 1 to 3 for each pixel. By having this TFT, a mobile phone with little deterioration can be obtained.

  FIG. 24C illustrates a computer, which includes a main body 3201, a housing 3202, a display portion 3203, a keyboard 3204, an external connection port 3205, a pointing mouse 3206, and the like. The display portion 3203 is provided with an active matrix display device. The display portion 3203 includes a TFT manufactured by the manufacturing method described in Embodiment Modes 1 to 3 for each pixel. By having this TFT, a computer with little deterioration can be obtained.

  FIG. 24D shows a mobile computer, which includes a main body 3301, a display portion 3302, a switch 3303, operation keys 3304, an infrared port 3305, and the like. The display portion 3302 is provided with an active matrix display device. The display portion 3302 has a TFT manufactured by the manufacturing method described in Embodiment Modes 1 to 3 for each pixel. By having the TFT, a mobile computer with little deterioration can be obtained.

  FIG. 24E illustrates a portable game machine including a housing 3401, a display portion 3402, speaker portions 3403, operation keys 3404, a recording medium insertion portion 3405, and the like. The display portion 3402 is provided with an active matrix display device. The display portion 3402 includes a TFT manufactured by the manufacturing method described in any of Embodiments 1 to 3 for each pixel. By having this TFT, a portable game machine with little deterioration can be obtained.

  FIG. 25 shows a paper display, which includes a main body 3110, a pixel portion 3111, a driver IC 3112, a receiving device 3113, a film battery 3114, and the like. The receiving device can receive a signal from the infrared communication port 3107 of the mobile phone. The pixel portion 3111 is provided with an active matrix display device. The pixel portion 3111 has a TFT manufactured by the manufacturing method described in Embodiment Modes 1 to 3 for each pixel. By having this TFT, a paper display with little deterioration can be obtained.

8A and 8B illustrate a manufacturing process of a semiconductor device. 8A and 8B illustrate a manufacturing process of a semiconductor device. 8A and 8B illustrate a manufacturing process of a semiconductor device. FIG. 11 illustrates an example of a semiconductor device. 8A and 8B illustrate a manufacturing process of a semiconductor device. 8A and 8B illustrate a manufacturing process of a semiconductor device. 8A and 8B illustrate a manufacturing process of a semiconductor device capable of transmitting and receiving data without contact. 8A and 8B illustrate a manufacturing process of a semiconductor device capable of transmitting and receiving data without contact. 8A and 8B illustrate a manufacturing process of a semiconductor device capable of transmitting and receiving data without contact. 8A and 8B illustrate a manufacturing process of a semiconductor device capable of transmitting and receiving data without contact. 8A and 8B illustrate a manufacturing process of a semiconductor device capable of transmitting and receiving data without contact. FIG. 9 illustrates an application example of a semiconductor device capable of transmitting and receiving data without contact. 8A and 8B illustrate a manufacturing process of a liquid crystal display device. 8A and 8B illustrate a manufacturing process of a liquid crystal display device. FIG. 6 is a top view of a pixel portion of a liquid crystal display device. 8A and 8B illustrate a manufacturing process of a liquid crystal display device. 8A and 8B illustrate a manufacturing process of a liquid crystal display device. 4A and 4B illustrate a manufacturing process of a light-emitting device. 4A and 4B illustrate a manufacturing process of a light-emitting device. 4A and 4B illustrate a manufacturing process of a light-emitting device. Sectional drawing of a light-emitting device. The equivalent circuit schematic of a light-emitting device. The equivalent circuit schematic of a light-emitting device. FIG. 14 illustrates an example of an electronic device. FIG. 14 illustrates an example of an electronic device.

Explanation of symbols

100 Substrate 101 Base film 102 Semiconductor film 103 Semiconductor film 105 Semiconductor film 106 Oxide film 107 Amorphous silicon film 108 Semiconductor film

Claims (8)

Forming a first crystalline semiconductor film containing an element that promotes crystallization of the semiconductor film over a substrate having an insulating surface;
Etching the first crystalline semiconductor film to form an island-shaped second crystalline semiconductor film;
Forming an oxide film containing a rare gas on the second crystalline semiconductor film;
Using a plasma processing apparatus that generates plasma having an electron temperature of 0.5 eV or more and 1.5 eV or less and an electron density of 1.0 × 10 ¹¹ cm ⁻³ or more and 1.0 × 10 ¹³ cm ⁻³ or less, on the oxide film to form an amorphous silicon film containing rare gas scan,
The second crystalline semiconductor film by heating the oxide film and before Kia mole Fass silicon film, characterized by removing the element which promotes crystallization of the semiconductor film from said second crystalline semiconductor film A method for manufacturing a semiconductor device. Forming a first crystalline semiconductor film containing an element that promotes crystallization of the semiconductor film over a substrate having an insulating surface;
Etching the first crystalline semiconductor film to form an island-shaped second crystalline semiconductor film;
Using a plasma processing apparatus that generates plasma having an electron temperature of 0.5 eV or more and 1.5 eV or less and an electron density of 1.0 × 10 ¹¹ cm ⁻³ or more and 1.0 × 10 ¹³ cm ⁻³ or less, Forming an oxide film containing a rare gas on the second crystalline semiconductor film;
An amorphous silicon film containing a rare gas is formed on the oxide film using the plasma processing apparatus,
The second crystalline semiconductor film by heating the oxide film and before Kia mole Fass silicon film, characterized by removing the element which promotes crystallization of the semiconductor film from said second crystalline semiconductor film A method for manufacturing a semiconductor device. A crystalline semiconductor film containing an element that promotes crystallization of a semiconductor film is formed over a substrate having an insulating surface,
Forming an oxide film containing a rare gas on the crystalline semiconductor film;
Using a plasma processing apparatus that generates plasma having an electron temperature of 0.5 eV or more and 1.5 eV or less and an electron density of 1.0 × 10 ¹¹ cm ⁻³ or more and 1.0 × 10 ¹³ cm ⁻³ or less, on the oxide film to form an amorphous silicon film containing rare gas scan,
Preparation of the crystalline semiconductor film, by heating the oxide film and before Kia mole Fass silicon film, a semiconductor device and removing the element which promotes crystallization of the semiconductor film from the crystalline semiconductor film Method. A crystalline semiconductor film containing an element that promotes crystallization of a semiconductor film is formed over a substrate having an insulating surface,
Using a plasma processing apparatus that generates plasma having an electron temperature of 0.5 eV or more and 1.5 eV or less and an electron density of 1.0 × 10 ¹¹ cm ⁻³ or more and 1.0 × 10 ¹³ cm ⁻³ or less, An oxide film containing a rare gas is formed on the crystalline semiconductor film,
Wherein using the plasma processing apparatus on the oxide film to form an amorphous silicon film containing rare gas scan,
Preparation of the crystalline semiconductor film, by heating the oxide film and before Kia mole Fass silicon film, a semiconductor device and removing the element which promotes crystallization of the semiconductor film from the crystalline semiconductor film Method. In claim 2 or claim 4 ,
A semiconductor characterized by using a mixed gas of oxygen and a rare gas or a mixed gas of oxygen, hydrogen and a rare gas as a source gas when forming the oxide film containing the rare gas using the plasma processing apparatus. Device fabrication method. In any one of claims 1 to 5,
When forming an amorphous silicon film containing the rare gas scan by using the plasma processing apparatus, a mixed gas of silane and a rare gas as a source gas or disilane and the semiconductor, which comprises using a mixed gas of a rare gas Device fabrication method. In any one of Claims 1 thru | or 6,
The method for manufacturing a semiconductor device, wherein the plasma processing apparatus includes a shower plate between a region where the plasma is generated and the substrate. In any one of claims 1 to 7,
The element for promoting crystallization is nickel, germanium, iron, palladium, tin, lead, cobalt, platinum, copper, or gold.

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