JP5226573B2 - Photoelectric conversion element - Google Patents

Description

  The present invention relates to a photoelectric conversion element for detecting a focus of a camera, for example.

  TTL phase-difference automatic focus detection that detects the defocus amount of a photographic lens by guiding the light beam that has passed through the photographic lens onto a pair of photoelectric conversion elements and performing a focus detection calculation on the output of the light beam that has passed through the photographic lens. In general, the (AF) method is widely used in single-lens reflex cameras. In addition, recent single-lens reflex cameras generally perform focus detection or distance measurement in a plurality of focus detection areas in the imaging area.

  In order to realize such a plurality of distance measuring points, photoelectric conversion element arrays composed of a plurality of pixels are densely arranged. Then, in order to control each of the plurality of photoelectric conversion element arrays with an optimum accumulation time for distance measurement, it is necessary to perform accumulation control for each line (for each photoelectric conversion element array). However, if the number of storage control circuits is prepared for the number of lines, the circuit scale becomes large, so the number of storage control circuits needs to be kept to a minimum. Therefore, in the prior art, one accumulation control circuit is common to all lines, and accumulation control is performed in a time division manner.

  However, since this system performs accumulation control of each line in a time division manner, it takes time to occupy the accumulation control circuit for each line. For example, if 10 μsec per line is required for processing of the accumulation control circuit, for example, if accumulation control is performed on 14 lines in a time-sharing manner, the period for performing accumulation control for all lines will be 140 μsec. In this case, accumulation control is not in time for a high-luminance subject.

  In addition, as disclosed in Patent Document 1, some pixels include a pixel column that is subjected to accumulation control using the monitor output of both the reference portion and the reference portion, and a pixel row that is subjected to accumulation control using the monitor output of only the reference portion. is there.

Japanese Patent Laid-Open No. 10-333021

  However, the device described in Patent Document 1 only uses the monitor output of one pixel row due to wiring restrictions. Accumulation control that uses the monitor output on only one side of the reference unit or reference unit has a problem in that the accuracy of the accumulation control is insufficient such that the accumulation amount is saturated or insufficient. At present, sensors composed of three wiring layers are mainly used, and wiring crossing is possible.

  The present invention has been made in view of the above, and an object of the present invention is to provide a photoelectric conversion element capable of accurately realizing accumulation control of an area sensor having a plurality of distance measuring points with a minimum necessary circuit.

  In order to solve the above-described problems and achieve the object, a photoelectric conversion element according to the present invention includes an area sensor unit having a two-dimensional extension for receiving a focus detection light beam divided into a reference unit and a reference unit. A photoelectric conversion element that divides the area sensor unit into a plurality of regions and independently controls accumulation of a plurality of pixels in the divided regions, and is divided into the reference unit and the reference unit. A plurality of monitor units for monitoring the accumulated amount of pixels of the area sensor unit corresponding to each of the focus detection light beams, and an accumulation control unit for individually controlling the accumulation operation of the plurality of divided regions. The accumulation control unit performs an accumulation operation of the partial area of the area sensor unit using an output of the monitor unit corresponding to the reference part of the partial area of the area sensor unit. With control Controlling the accumulation operation of the other partial area of the area sensor unit using the output of the monitor unit corresponding to the reference part of the other partial area of the area sensor unit. Features.

  In the photoelectric conversion element according to the present invention as set forth in the invention described above, the accumulation control unit divides the area sensor unit into two in a direction perpendicular to a dividing direction of the focus detection light beam, and the reference unit of one divided region Controlling the accumulation operation of the one divided region using the output of the monitor unit, and controlling the accumulation operation of the other divided region using the output of the monitor unit of the reference unit of the other divided region. Features.

  In the photoelectric conversion element according to the present invention as set forth in the invention described above, the area sensor unit is configured by arranging a plurality of pixel columns, and the accumulation control unit has an odd arrangement order among the plurality of pixel columns. The accumulation operation of the pixel array arranged in the odd-numbered or even-numbered one is controlled using the output of the monitor unit of the reference section of the pixel array arranged in the th-numbered or even-numbered one, and the odd numbered Alternatively, the accumulation operation of the pixel column arranged in the odd-numbered or even-numbered other is controlled using the output of the monitor unit of the reference unit of the pixel column arranged in the even-numbered other. .

  In the photoelectric conversion element according to the present invention as set forth in the invention described above, the monitor unit uses an output indicating a maximum accumulation amount among outputs of a plurality of pixels constituting the pixel column as an output of the monitor unit. And

  In the photoelectric conversion element according to the present invention as set forth in the invention described above, the accumulation control unit includes a plurality of accumulation control units respectively corresponding to the plurality of monitor units.

  In the photoelectric conversion element according to the present invention, in the above invention, the area sensor unit is divided into a plurality of vertical pixel columns corresponding to the focus detection light beam divided in one direction and a direction perpendicular to the one direction. A plurality of horizontal pixel rows corresponding to the focus detection light beam, and each of the plurality of monitor units is disposed in a four-corner region adjacent to both the vertical pixel row and the horizontal pixel row. And

  ADVANTAGE OF THE INVENTION According to this invention, the photoelectric conversion element which can implement | achieve accumulating control of the area sensor which has several ranging points with a minimum required circuit accurately can be provided.

  Exemplary embodiments of a focus detection apparatus including a photoelectric conversion element according to the present invention will be described below with reference to the accompanying drawings. The present invention is not limited to this embodiment, and various modifications can be made without departing from the spirit of the present invention.

  FIG. 1 is a block diagram including a schematic mechanism showing an example of a configuration around an AF of a camera system to which the multi-AF type focus detection apparatus of the present embodiment is applied. Here, an example in which the TTL phase difference AF method is applied to a single-lens reflex camera is shown.

  First, an interchangeable lens 10 that is detachably mounted on a camera body (not shown) includes a photographing lens 11. An in-focus state is obtained by driving the photographing lens 11 in the optical axis direction by the motor driver 12. Further, the interchangeable lens 10 includes a lens CPU 13. The lens CPU 13 receives the defocus amount from the camera body side, calculates the driving amount of the photographing lens 11, and drives and controls the photographing lens 11 via the motor driver 12 by the driving amount.

  On the other hand, in the camera body, a main mirror 14 is provided on the optical axis of the taking lens 11. The main mirror 14 has a movable mirror configuration, and is positioned at a down position as shown in the figure during AF, and splits the light beam that has passed through the photographing lens 11 into a finder optical system 16 and an AF optical system 19. When the subject is photographed, it is retracted upward, and the total luminous flux transmitted through the photographing lens 11 is guided to the image sensor 24.

  Here, as is well known, the finder optical system 16 is composed of an optical element such as a pentaprism, and a finder screen 15 is disposed in the preceding stage, and a finder eyepiece 17 that the photographer looks into is disposed in the subsequent stage. ing. Further, behind the main mirror 14 in the optical axis direction, there is provided a sub mirror 18 that totally reflects the light beam transmitted through the main mirror 14 toward the AF optical system 19 when the main mirror 14 is located at the down position. . When the main mirror 14 is retracted up, the sub mirror 18 is retracted together at a position where the light flux to the image sensor 24 is not blocked.

  In addition, an AF sensor 20 is provided which is a photoelectric conversion element that generates a signal for focus detection by causing a light beam split by the main mirror 14 and passed through the AF optical system 19 to enter a pair of internal photoelectric conversion element arrays. ing. As will be described in detail later, the AF sensor 20 is a multi-AF sensor having a pair of photoelectric conversion element arrays for each of a plurality of focus detection areas.

  Further, a microcomputer (CPU) 21 that functions as a system controller that controls each part including AF-related control and image processing is provided in the camera body. The microcomputer (CPU) 21 transmits lens data necessary for the calculation prior to the calculation from the lens CPU 13, and transmits a defocus amount as an AF calculation result to the lens CPU 13.

  Between the AF sensor 20 and the microcomputer (CPU) 21, an AF controller 22 having an ASIC configuration that is controlled by the microcomputer (CPU) 21 and controls the AF sensor 20 is provided.

  In FIG. 1, a two-dimensional CCD device is used as the image sensor 24, but a film corresponds to a silver salt camera. A focal plane shutter 23 is provided in front of the image sensor 24.

  Next, configuration examples of the AF optical system 19 and the AF sensor 20 will be described. FIG. 2 is a schematic configuration diagram showing an example of the basic configuration of the AF optical system 19 including the AF sensor 20. Since the AF optical system 19 has a configuration of a known TTL phase difference AF optical system, it will be briefly described. When the photographic lens 11 is in focus, the light beam that has passed through the photographic lens 11 is focused on the imaging equivalent surface 31 that is a virtual surface on the front surface of the AF optical system 19, condensed and divided by the condenser lens 32, and paired. The light beam is narrowed by the separator diaphragm 33 and imaged by the pair of separator lenses 34 on the sensor arrays 35 </ b> A and 35 </ b> B that are a pair of photoelectric conversion element arrays in the AF sensor 20. Here, a known TTL phase difference AF method for measuring the defocus amount of the photographing lens 11 by measuring the imaging interval between the pair of sensor arrays 35A and 35B is constructed.

  FIG. 3 is a schematic front view showing a distance measuring point arrangement on the photographing screen 25 as an arrangement example of the multi-configuration AF sensor 20. The AF sensor 20 of the present embodiment shows an application example to a multi-AF sensor having, for example, 7 × 5 = 35 distance measuring points (focus detection areas) P. These distance measuring points P are set as combinations of horizontal pixel columns and vertical pixel columns, respectively. In FIG. 3, in order to make the drawing easy to see, the horizontal pixel columns for 14 lines are back-projected on the photographing screen 25 and displayed. Actually, the vertical pixel columns for 10 lines can be back-projected on the photographing screen 25 in the same manner as the horizontal pixel columns.

  FIG. 4 is a schematic front view showing an arrangement example of the AF sensor 20 on the sensor chip 26 corresponding to the arrangement of the distance measuring points P as shown in FIG. In the sensor chip 26, the reference portion and the reference portion are paired corresponding to the pair of sensor arrays 35A and 35B, and receive a focus detection light beam divided into the reference portion and the reference portion. The area sensor unit 27 has a general spread. The area sensor unit 27 is divided into a plurality of regions in units of line-configured pixel columns, and is configured by densely arranging the plurality of pixel columns. Specifically, the horizontal pixel column is composed of 14 lines and the vertical pixel column is composed of 10 lines. A horizontal pixel column for 14 lines is composed of a reference horizontal pixel column group 28a and a reference horizontal pixel column group 28b located on the left and right, and a vertical pixel column for 10 lines is vertically aligned with a vertical reference unit. It consists of a pixel column group 29a and a reference portion vertical pixel column group 29b. That is, the area sensor unit 27 includes a plurality of vertical pixel column groups 29a and 29b corresponding to the focus detection light beam divided in one direction and a plurality of horizontal pixel columns corresponding to the focus detection light beam divided in the direction perpendicular to one direction. It consists of groups 28a and 28b.

  In the present embodiment, accumulation control is performed for each line (pixel column) that is a divided region. The accumulation control is performed when the maximum value of the pixel output in one line becomes equal to or greater than a certain value Vth. And the read signal φR is output for the one line.

  Here, the basic operation of the maximum value detection circuit will be described with reference to FIG. FIG. 5 is a circuit diagram showing a configuration example of the maximum value detection circuit. The number of pixels per line is N, and the output of each pixel n in one line is Vn. Here, 1 ≦ n ≦ N. The number of lines is L, and a symbol indicating which line is l (el). Here, 1 ≦ l ≦ L. 5, the maximum value detection circuit provided for each line includes a differential amplifier 31 to which the output of each pixel n is input, a MOS switch 32 that is on / off controlled by the output of the differential amplifier 31, and a MOS switch. Each pixel has a pair with a voltage follower 33 that outputs the output of the corresponding pixel n when 32 is ON, and a differential amplifier 34 is provided on a common output line that is OR-connected.

  In such a configuration, Vn (l) input from each pixel n to the maximum value detection circuit l is compared with the current maximum value Vp (l) in the differential amplifier 31, and Vn (l) is the maximum value Vp ( If l) is exceeded, the output of the differential amplifier 31 is inverted and the MOS switch 32 is turned on. Then, the corresponding pixel output Vn (l) is output to the differential amplifier 34 via the voltage follower 33, and the pixel output Vn (l) becomes a new maximum value Vp (l). The new maximum value Vp (l) is differentially amplified by the dark pixel output Vd and the differential amplifier 34 to obtain the maximum value VP (l) of the line l.

  The maximum value VP (l) of the maximum value detection circuit l turns on SW (l) in a time-sharing manner for each line by the φS (l) signal output from the control circuit 41. Then, the comparator 42 compares the maximum value VP (l) with the accumulation control level Vth. When the differential output exceeds the set level Vth in the comparator 42, it is determined that the accumulation is completed, and the control circuit 41 applies the corresponding line l to the corresponding line l. Thus, the accumulation end signal TG (l) is output. This accumulation end signal TG (l) is output to all the pixels in the corresponding line l for which accumulation has been completed. The control circuit 41 and the comparator 42 constitute an accumulation control unit 40.

  In this case, for example, when attention is paid to the horizontal pixel column, there are 14 horizontal pixel columns. Therefore, if the maximum value is detected only by the reference portion, L = 14. Here, since accumulation control is performed for each line in a time-sharing manner, if 10 μsec is required for detection of one line, 140 μsec is required to perform accumulation control for all 14 lines. As a result, accumulation control can be performed only at a period of 140 μsec. In this case, there is a high possibility that the accumulation control for the high-luminance subject is not correctly performed. In other words, the accumulated amount is saturated and subject image data suitable for focus detection cannot be obtained, and focus detection becomes impossible. There is a possibility that 140 μsec + 70 μsec = 210 μsec may be required for a subject that should be accumulated in 70 μsec.

  Therefore, in the present embodiment, as shown in FIG. 4, a horizontal pixel column consisting of 14 lines is divided into two in the vertical direction, and the reference half horizontal pixel column for the upper half of 7 lines (1 to 7). Accumulation control is performed based on the output of the corresponding maximum value detection circuit (1-7) in the group 28a, and the correspondence in the reference horizontal pixel column group 28b is applied to the lower seven lines (8-14). The accumulation control is performed by the output of the maximum value detection circuit (8 to 14). The maximum value detection circuits (1 to 7) and the maximum value detection circuits (8 to 14) constitute monitor units 30a and 30b, respectively, and an accumulation control unit such as the accumulation control unit 40 is provided for each of the monitor units 30a and 30b. It is done. By doing this, L = 7 can be set, so that the accumulation can be completed at 70 μsec + 70 μsec = 140 μsec at the worst for the subject that should be accumulated at 70 μsec.

  Similarly, for the 10 vertical pixel columns, the 10 lines are divided into two in the left-right direction, and the corresponding maximum value detection circuit (in the reference vertical pixel column group 29a (for the right half 5 lines (6 to 10)) ( 6 to 10), accumulation control is performed based on the outputs of the left half 5 lines (1 to 5), and corresponding maximum value detection circuits (1 to 5) in the reference unit vertical pixel column group 29b are output. Accumulation control is performed at. The maximum value detection circuits (6 to 10) and the maximum value detection circuits (1 to 5) constitute monitor units 30c and 30d, respectively, and an accumulation control unit such as the accumulation control unit 40 is provided for each of the monitor units 30c and 30d. It is done.

  The accumulation control level Vth is normally set to end slightly below the saturation voltage of the pixel output. However, in the case of a high-luminance subject as in the present embodiment, the accumulation control level Vth is normally set. Therefore, accumulation can be completed at an appropriate level. That is, by setting the accumulation control level Vth to ½ of the maximum change range of the accumulation amount, the accumulation is terminated at 70 μsec + 70/2 μsec = 105 μsec including the accumulation control delay for the subject to be accumulated at 70 μsec. Therefore, it is possible to obtain appropriate subject image data without saturating the accumulation amount. Further, according to the present embodiment, since the accumulation control is performed by using the monitor outputs of both the reference unit and the reference unit in half, the accumulation control can be performed with high accuracy.

  Here, the monitor units 30a to 30d including the maximum value detection circuit are less susceptible to noise as they are closer to each pixel column. Further, with respect to the area sensor unit 27, since the horizontal pixel column and the vertical pixel column spread in a cross shape on the left, right, and top, there are no pixel columns in the four corner directions with respect to the center of the sensor chip 26. Therefore, in the present embodiment, as shown in FIG. 4, the monitor units 30a to 30d are arranged one by one so as to be clockwise in the four corner regions adjacent to both the vertical pixel column and the horizontal pixel column. I am letting. With such an arrangement, the arrangement of the monitor units 30a to 30d on the sensor chip 26 can be easily made efficient, and the noise performance can be improved.

  As for the horizontal pixel column allocation, the lower half of the 14 lines (8 to 14) is accumulated based on the output of the corresponding maximum value detection circuit in the reference unit horizontal pixel column group 28a. Control may be performed, and accumulation control may be performed on the upper half of the seven lines (1 to 7) by the output of the corresponding maximum value detection circuit in the reference unit horizontal pixel column group 28b. As for the allocation of the vertical pixel columns, the accumulation control is performed on the left half of the ten lines (1 to 5) based on the output of the corresponding maximum value detection circuit in the reference unit vertical pixel column group 29a. The accumulation control may be performed on the right half 5 lines (6 to 10) by the output of the corresponding maximum value detection circuit in the reference unit vertical pixel column group 29b. In this case, each of the four monitor units may be arranged one by one so as to be counterclockwise in the four corner regions adjacent to both the vertical pixel column and the horizontal pixel column.

  Further, in the above description, the accumulation control target is divided into two by dividing the horizontal pixel column of 14 lines vertically into two. However, the pixel column number is assigned in order from the top, and the reference is applied to the odd-numbered 7 lines. The accumulation control may be performed using the partial horizontal pixel column group 28a, and the accumulation control may be performed using the reference horizontal pixel column group 28b for even-numbered seven lines. Similarly, for 10 vertical pixel columns, pixel column numbers are assigned sequentially from the left side, and even numbered 5 lines are subjected to accumulation control using the reference unit vertical pixel column group 29a to become odd numbered. For the five lines, accumulation control may be performed using the reference unit vertical pixel column group 29b.

  FIG. 6 is a schematic front view showing an example of the arrangement of the odd-numbered and even-numbered bisection AF sensor 20 on the sensor chip 26. That is, with respect to the horizontal pixel column consisting of 14 lines in which the pixel column numbers are assigned in order from the top, for the odd-numbered 7 lines (1, 3, 5, 7, 9, 11, 13), the reference horizontal pixel The accumulation control is performed based on the output of the corresponding maximum value detection circuit (1, 3, 5, 7, 9, 11, 13) in the column group 28a, and the even-numbered 7 lines (2, 4, 6, 8, 10, 12, 14), accumulation control is performed by the output of the corresponding maximum value detection circuit (2, 4, 6, 8, 10, 12, 14) in the reference unit horizontal pixel column group 28 b. is there. The maximum value detection circuit (1, 3, 5, 7, 9, 11, 13) and the maximum value detection circuit (2, 4, 6, 8, 10, 12, 14) constitute the monitor units 30a and 30b, respectively. A storage control unit such as the storage control unit 40 is provided for each of the monitor units 30a and 30b.

  Similarly, with respect to the vertical pixel column 10 lines, with respect to the even-numbered 5 lines (2, 4, 6, 8, 10) with respect to the vertical pixel column consisting of 10 lines in which the pixel column numbers are assigned sequentially from the left. Storage control is performed based on the output of the corresponding maximum value detection circuit (2, 4, 6, 8, 10) in the reference unit vertical pixel column group 29a, and the odd-numbered five lines (1, 3, 5, 7, For 9), accumulation control is performed by the output of the corresponding maximum value detection circuit (1, 3, 5, 7, 9) in the reference unit vertical pixel column group 29b. The maximum value detection circuit (2, 4, 6, 8, 10) and the maximum value detection circuit (1, 3, 5, 7, 9) constitute the monitor units 30c and 30d, respectively, for each of the monitor units 30c and 30d. An accumulation control unit such as the accumulation control unit 40 is provided.

  In this case, for example, the distance between the horizontal pixel column and the corresponding maximum value detection circuit is longer than the case where the horizontal pixel column is divided into upper and lower parts. Since the accumulation control target lines are different, it is possible to reduce adverse effects caused by subject conditions (for example, subjects whose light reception amount is extremely large only on the reference side).

  For example, when an extremely bright subject that is different from the main subject is included only on the reference side, if accumulation control is performed using the output of the maximum value detection circuit on the reference side, the above-mentioned high brightness subject is properly stored. Since accumulation control is performed as a quantity, the accumulation quantity for the main subject is not appropriate. Therefore, focus detection becomes impossible.

  On the other hand, as shown in FIG. 6, the accumulation control is performed by the output of the maximum value detection circuit of the reference unit by making the accumulation control target line different between the reference unit side and the reference unit side alternately for each line. In the case where the main subject is to be stored, accumulation control is performed so that an appropriate accumulation amount is obtained with respect to the main subject, and appropriate focus detection can be performed.

  In addition, as shown in FIG. 6, in the bisection method by the odd number and the even number, the combinations of the odd number, the even number, the standard part side, and the reference part side may be switched. Further, each of the monitor units 30a to 30d may be arranged one by one in the four corner areas adjacent to both the vertical pixel column and the horizontal pixel column, or may be counterclockwise. May be arranged one by one.

  FIG. 7 is a schematic block diagram illustrating a configuration example of the AF controller 22. The AF controller 22 includes a sequencer 51 that controls the operation of the AF sensor 20 under the control of the microcomputer (CPU) 21, an A / D converter 52, a data memory 53, an AF calculation unit 54, a timer 55, a register 56, flash ROM 57, and the like. The A / D converter 52 is for converting the pixel output output from the AF sensor 20 side into digital data. The data memory 53 stores the data A / D converted by the A / D converter 52 and provides it for the calculation of focus information.

  FIG. 8 is a schematic flowchart showing an example of the focus detection / focus correction operation executed under the control of the CPU 21. First, with the first release (half-press operation) (step S201; Yes), an accumulation operation for each pixel column is started (step S202). When an accumulation end island is generated, the accumulation time (current time) of the photoelectric conversion element array of the target island is detected by the timer 55 (step S203). This process is repeated until the accumulation is completed for all islands (step S204). The island is a plurality of pixel rows corresponding to the distance measuring points P shown in FIG.

  Next, transfer of pixel output is started (step S205), predetermined illumination correction is performed (step S206), correlation calculation is performed according to the TTL phase difference method (step S207), and a defocus amount is calculated as focus information. (Step S208). The distance measuring point P to be employed is selected according to the calculated defocus amount (step S209), and the defocus amount at the distance measuring point P is output to the lens CPU 13 by the CPU 21, whereby the lens CPU 13 is motor driver. 12 is controlled to drive the imaging lens 11 in a focused state (step S210). As a result, it becomes possible to capture an image, and the process proceeds to an imaging operation.

FIG. 1 is a block diagram including a schematic mechanism showing a configuration example around an AF of a camera system to which a multi-AF type focus detection apparatus according to an embodiment of the present invention is applied. FIG. 2 is a schematic configuration diagram showing an example of the basic configuration of the AF optical system including the AF sensor. FIG. 3 is a schematic front view showing the arrangement of distance measuring points on the photographing screen as an example of the arrangement of multi-configuration AF sensors. FIG. 4 is a schematic front view showing an arrangement example of the AF sensor on the sensor chip corresponding to the arrangement of the distance measuring points. FIG. 5 is a circuit diagram showing a configuration example of the maximum value detection circuit. FIG. 6 is a schematic front view showing an arrangement example of the odd-numbered and even-numbered bisection AF sensors on the sensor chip. FIG. 7 is a schematic block diagram illustrating a configuration example of the AF controller. FIG. 8 is a schematic flowchart showing an example of a focus detection / focus correction operation executed under the control of the CPU.

20 AF sensor 27 area sensor unit 28a reference unit horizontal pixel column group 28b reference unit horizontal pixel column group 29a reference unit vertical pixel column group 29b reference unit vertical pixel column group 30a to 30d monitor unit 40 accumulation control unit

Claims (4)

An area sensor unit having a two-dimensional spread for receiving the focus detection light beam divided into the reference unit and the reference unit, the area sensor unit being divided into a plurality of regions, and a plurality of the divided region regions In a photoelectric conversion element that performs pixel accumulation control independently for each divided region,
A plurality of monitor units for monitoring the accumulated amount of pixels of the area sensor unit corresponding to each of the focus detection light beams divided into the reference unit and the reference unit;
A storage control unit for controlling the storage operation for each of the divider region,
Have
The area sensor unit is configured by arranging a plurality of pixel columns,
The accumulation control unit uses the output of the monitor unit of the reference unit of the pixel column arranged in an odd number or even number one of the plurality of pixel columns, and outputs the odd number or even number. And controlling the accumulation operation of the pixel array arranged in one of the
The accumulation operation of the pixel array arranged in the other of the odd-numbered or even-numbered one is controlled using the output of the monitor section of the reference section of the pixel array arranged in the odd-numbered or even-numbered other A photoelectric conversion element. 2. The photoelectric conversion element according to claim 1 , wherein the monitor unit uses, as an output of the monitor unit, an output indicating a maximum accumulation amount among outputs of a plurality of pixels constituting a pixel column. The photoelectric conversion element according to claim 1 , wherein the accumulation control unit includes a plurality of accumulation control units respectively corresponding to the plurality of monitor units. The area sensor unit includes a plurality of vertical pixel columns corresponding to the focus detection light beam divided in one direction and a plurality of horizontal pixel columns corresponding to the focus detection light beam divided in a direction perpendicular to the one direction. And
4. The photoelectric conversion according to claim 1 , wherein each of the plurality of monitor units is disposed in a four-corner region adjacent to both the vertical pixel column and the horizontal pixel column. element.

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