JP5225434B2 - Solid-state imaging device and imaging system - Google Patents

Description

  The present invention relates to a solid-state imaging device used as an image input imaging device such as a digital camera.

  In recent years, the demand for solid-state imaging devices has been rapidly increasing as imaging devices for image input centering on digital still cameras and video camcorders.

  As these solid-state imaging devices, CCD (Charge Coupled Device) and MOS type sensors are used. Compared to the latter, the former has higher sensitivity and lower noise, so it is widely used as a high-quality imaging device. On the other hand, the power consumption is high, the drive voltage is high, and a general-purpose semiconductor manufacturing process cannot be used. MOS type that can cover the above weak points for applications to portable devices where demand is expected to expand in the future because it has high weakness and it is difficult to integrate peripheral circuits such as drive circuits. It is expected that solid-state imaging devices will be applied.

  A CMOS solid-state imaging device formed by a CMOS process as a representative of a MOS solid-state imaging device has been put into practical use. FIG. 1 shows a pixel circuit of the CMOS solid-state imaging device, FIG. 2 shows a planar layout of the pixel, and FIG. 3 shows a sectional structure thereof.

  In FIG. 1, 1 is a photodiode, 2 is a transfer MOS transistor for transferring the charge of the photodiode, 3 is a floating diffusion for temporarily storing the transferred charge, and 4 is for resetting the floating diffusion and the photodiode. Reset MOS transistor 5 is a selection MOS transistor for selecting any one row in the array, 6 is a source follower MOS transistor for converting the charge of the floating diffusion into a voltage and amplifying it by a source follower type amplifier, and 7 is 1 A readout line that is shared by two columns and reads out the pixel voltage signal, and 8 is a constant current source for making the readout line 7 a constant current.

  The operation will be briefly described. Incident light is converted into electric charge by the photodiode 1, and the electric charge is stored in the floating diffusion 3 by the transfer MOS transistor 2. Since the floating diffusion 3 and the photodiode 1 are previously reset to a constant potential by opening the reset MOS transistor 4 and the transfer MOS transistor 2, the potential of the floating diffusion 3 changes in accordance with the charge generated by the incident light. To do. The potential of the floating diffusion 3 is amplified by the source follower MOS transistor 6 and output to the read line 7. The pixel is selected by opening the selection MOS transistor 5. In the output circuit (not shown), the difference between the reset potential of the floating diffusion 3 and the potential after storing the optical signal is calculated to detect the optical signal.

  FIG. 2 is an example of the layout of the pixel circuit of FIG. Reference numeral 10 denotes an active region where a photodiode is formed, and 11 denotes an active region where a selection MOS transistor and a source follower transistor are formed. Reference numeral 20 denotes a transfer MOS transistor region, and reference numeral 21 denotes a transfer MOS transistor gate line. A region 30 surrounded by a broken line indicates a portion of the floating diffusion formed by a semiconductor PN junction. Further, 31 is a contact for drawing out an electrode from the floating diffusion, 32 is a metal electrode for drawing out the floating diffusion, 33 is a contact for connecting 32 metal electrodes to polysilicon, and 34 is a polysilicon electrode. Reference numeral 40 denotes a reset MOS transistor region, and 41 denotes a contact for connection to a reset power source. 50 denotes a gate region of the selection MOS transistor, 51 denotes a contact for connection to the VDD power source, 60 denotes a source follower MOS transistor region, and the polysilicon 34 electrically connected to the floating diffusion is used as a gate electrode. . Reference numeral 70 denotes an output line composed of a metal electrode. Reference numeral 71 denotes a contact connecting the output line 70 and the main electrode of the source follower MOS transistor 60.

  FIG. 3 shows an AA ′ cross section of the layout of FIG. 301 is an n-type silicon substrate, 302a is a P-type well, 302b is a P-type buried layer, 303a is a gate oxide film of a MOS transistor, 303b is a thin oxide film on a light receiving portion, 304 is a gate electrode of a transfer MOS transistor, 305 is The N-type cathode of the photodiode 1, 306 is a surface P-type region for embedding the photodiode, 307a is a LOCOS oxide film for element isolation, 307b is a P-type channel stop layer, and 308 forms a floating diffusion 3. N-type high concentration region serving as the drain region of the transfer MOS transistor 2, 309 is a silicon oxide film that insulates the gate electrode and the first metal layer, 320 is a contact plug, 321 is the first metal layer, and 322 is the first metal layer. An interlayer insulating film 323 for insulating the metal layer from the metal second layer Le second layer, 324 denotes an interlayer insulating film for insulating the second layer and the third layer metal metal, 325 Third layer metal 326 is a passivation film. In the color photoelectric conversion device, a color filter layer (not shown) is further formed on the passivation film 326 and a microlens for improving sensitivity is formed.

  Light incident from the surface enters the photodiode through the opening without the third metal layer. The light is absorbed in the N-type anode 305 or the P-type well 302a of the photodiode to generate electron / hole pairs. Among these, electrons are accumulated in the N-type anode region.

Japanese Patent Laid-Open No. 03-116840

  However, the conventional CMOS solid-state imaging device has a problem in that signal electrons generated by incident light are mixed into the floating diffusion 3 to change the output voltage. As shown in FIG. 3, electrons out of the electron-hole pair 330 b generated under the gate of the transfer MOS transistor by the obliquely incident light beam 330 a make N a floating diffusion from the N-type cathode 305 of the photodiode. It is attracted to the mold high concentration layer 308. Further, for example, the light 331a incident on the gate electrode 304 of the transfer MOS transistor is repeatedly reflected as shown in FIG. 3 to generate electron / hole pairs 331b immediately below the N-type high concentration layer 308. Among these, electrons are attracted to the N-type high concentration layer. If the first layer metal 320 is extended to the opening side in FIG. 3 to improve the light shielding property, the capacitance of the floating diffusion portion increases, and the charge conversion coefficient decreases, resulting in a problem that the S / N deteriorates. It was.

  As described above, the electrons directly captured by the floating diffusion without going through the photodiode become a pseudo signal, increase the noise of the solid-state imaging device, reduce the dynamic range, increase the output in the dark, It causes problems such as increasing shading in the dark. For this reason, improving the light shielding property of the floating diffusion has been a problem of the conventional CMOS type solid-state imaging device.

Even in a CCD solid-state imaging device, a source follower type amplifier circuit using a floating diffusion at the final stage of a readout circuit is generally used. For example, there is an example in which the electrode extraction to the source follower amplifier is performed by polysilicon (for example, see Patent Document 1).
However, this example does not mention improvement of the light shielding property, and does not take into consideration that electrons generated in the silicon flow into the floating diffusion as shown in the conventional example. Further, in the CCD type solid-state imaging device, since there is only one floating diffusion amplifier circuit in the subsequent stage of the horizontal CCD, since it is far from the pixel portion, it can be laid out without being constrained by the pixel area. .

  On the other hand, in the CMOS type solid-state imaging device, since there is a floating diffusion for each pixel, the photodiode and the floating diffusion are close to each other, and the metal electrode serving as a light shield is also used as a circuit wiring. Since the situation is different from that of the CCD type solid-state imaging device in that it needs to be made, a new device on the structure is required.

  SUMMARY OF THE INVENTION An object of the present invention is to provide a solid-state imaging device that can increase the dynamic range and S / N without shading in the dark by improving the light shielding property of the floating diffusion.

  A first aspect of the present invention relates to a solid-state imaging device, which includes a photoelectric conversion unit, a floating diffusion to which charges of the photoelectric conversion unit are transferred, and a charge from the photoelectric conversion unit to the floating diffusion. In a solid-state imaging device having a transfer transistor for transferring a signal and a signal amplifying unit electrically connected to the floating diffusion, the signal amplifying unit includes a MOS transistor, from the floating diffusion to the gate electrode of the MOS transistor Is electrically connected using the same wiring layer as that of the gate electrode of the MOS transistor, and the plurality of metal layers including a first metal layer disposed above the same wiring layer as the gate electrode. Before the closest to the floating diffusion The light shielding metal of the metal first layer, characterized in that it obscures the floating diffusion in a planar layout.
  A second aspect of the present invention relates to a solid-state imaging device, which includes a photoelectric conversion unit, a floating diffusion to which charges of the photoelectric conversion unit are transferred, and a charge from the photoelectric conversion unit to the floating diffusion. A signal amplification unit electrically connected to the floating diffusion, the signal amplification unit includes a MOS transistor, and a gate electrode of the MOS transistor is connected to the floating diffusion. The light shielding metal of the first metal layer closest to the floating diffusion among the plurality of metal layers including the first metal layer disposed in contact with the first metal layer, the floating diffusion in the planar layout. Covering Hidden, characterized in that is.

  According to the present invention, the light shielding property of the floating diffusion of the solid-state imaging device can be improved. As a result, there is no shading in the dark, and the dynamic range and S / N can be increased. Furthermore, when the present invention is used, an all-pixel simultaneous storage type electronic shutter can be realized with high image quality in a solid-state imaging device.

It is a figure which shows the pixel circuit of the conventional CMOS type solid-state imaging device. It is an example of the pixel layout of the conventional CMOS type solid-state imaging device. It is pixel sectional drawing of the conventional CMOS type solid-state imaging device. It is a pixel layout example of the CMOS type solid-state imaging device of the first embodiment according to the present invention. It is sectional drawing of the CMOS type solid-state imaging device of 1st Example by this invention. It is sectional drawing of the CMOS type solid-state imaging device of 2nd Example by this invention. It is sectional drawing of the CMOS type solid-state imaging device of 3rd Example by this invention. It is a circuit block diagram of the CMOS type solid-state imaging device by this invention. FIG. 5 is a timing diagram of an all-pixel simultaneous storage type electronic shutter operation using the CMOS solid-state imaging device according to the present invention. 1 is a configuration block diagram of a camera system using a CMOS solid-state imaging device according to the present invention.

  Next, the best mode of the present invention will be described with reference to the drawings.

  FIG. 4 shows a layout of a pixel circuit for explaining the first embodiment. 110 denotes an active region in which a photodiode is formed, and 111 denotes an active region in which a selection MOS transistor and a source follower transistor are formed. Reference numeral 120 denotes a transfer MOS transistor region, and 121 denotes a transfer MOS transistor gate line. A region 130 surrounded by a broken line indicates a portion of the floating diffusion formed by a semiconductor PN junction.

  The difference from the conventional example is that the electrodes are drawn from the floating diffusion by direct contact from the polysilicon 131. The polysilicon 131 directly serves as the gate electrode of the source follower MOS transistor without passing through the metal electrode. A light shielding metal 132 covers the floating diffusion. In this embodiment, the light shielding metal covers the gate electrode of the transfer transistor unit 120 and the junction 130 of the floating diffusion PN with an oversize. By drawing out the floating diffusion with polysilicon in this way, it is possible to shield the floating diffusion at a position close to the silicon. This floating diffusion may be electrically floating, or may be set at a fixed potential by being connected to a second layer metal or a third layer metal. The other parts are the same as in FIG. 2, 140 is a reset MOS transistor region, 141 is a contact for connection with a reset power supply, 150 is a gate region of a selection MOS transistor, 151 is a contact for connection with a VDD power supply, Reference numeral 160 denotes a source follower MOS transistor region, which uses a polysilicon 131 electrically connected to the floating diffusion as a gate electrode. Reference numeral 170 denotes an output line composed of a metal electrode. Reference numeral 171 denotes a contact connecting the output line 170 and the main electrode of the source follower MOS transistor 160.

  FIG. 5 shows a BB ′ cross section of FIG. 501 is an n-type silicon substrate, 502a is a P-type well, 502b is a P-type buried layer, 503a is a gate oxide film of a MOS transistor, 503b is a thin oxide film on the light receiving portion, 504 is a gate electrode of a transfer MOS transistor, and 505 is The N-type cathode of the photodiode 1, 506 is a surface P-type region for embedding the photodiode, 507a is a LOCOS oxide film for element isolation, 507b is a P-type channel stop layer, and 508a is a floating diffusion. This is an N-type high concentration region that also serves as a drain region of the transfer MOS transistor. A polysilicon lead electrode 508b is in direct contact with the N-type high concentration region. Reference numeral 509 denotes a silicon oxide film that insulates the gate electrode from the first metal layer, and reference numeral 521 denotes a first metal layer that shields the floating diffusion portion. 522 is an interlayer insulation film that insulates the metal first layer and the metal second layer, 523 is a metal second layer, 524 is an interlayer insulation film that insulates the metal second layer and the metal third layer, 525 is a metal third layer, Reference numeral 526 denotes a passivation film. In the color photoelectric conversion device, a color filter layer (not shown) and a microlens for improving sensitivity are formed on the passivation film 526 as in the conventional case.

  Light incident from the surface enters the photodiode through the opening without the third metal layer. Of the incident light, the light reflected on the upper surface of the gate electrode 504 of the transfer MOS transistor is reflected by the first layer metal immediately above the polysilicon as shown in FIG. 5, so that it is reflected a plurality of times before entering the floating diffusion portion. Are sufficiently attenuated, and the false signal becomes extremely small. Also, as shown in FIG. 4, the floating diffusion is covered with metal without a gap, so that it has a high light shielding property even for light that follows a path other than the cross section of FIG.

  The first layer metal is usually formed of aluminum or an alloy mainly composed of aluminum. However, in order to make the effect of the present invention remarkable, the bottom layer of the first layer metal is formed of TiN to reflect stray light. It is preferable to reduce the rate. TiN also serves as a barrier metal, and is therefore a suitable material for forming fine wiring.

  According to this embodiment, the light shielding property of the floating diffusion can be improved, and the influence of the false signal can be eliminated.

  FIG. 8 is a schematic diagram of a circuit configuration when a number of pixel circuits of the present invention are two-dimensionally arranged. One pixel 801 includes a photodiode 802, a transfer MOS transistor 803, a source follower MOS transistor 804, a reset MOS transistor 805, and a selection MOS transistor 806. A selection MOS transistor in the same row has a gate connected to a selection line 807, a reset MOS transistor gate connected to a reset line 808, and a transfer MOS transistor gate connected to a transfer line 809, and is scanned and selected by a vertical scanning circuit 801. A current source 812 is connected to the output line 811 in the same column, and the potential of the output line can be read by a source follower operation. The optical signal is stored in the charge storage unit 818 by the optical signal transfer MOS transistor 813 selected by the optical signal readout line 815 on the output line, and the noise signal is stored by the noise 814 signal transfer MOS transistor selected by the noise signal readout line 816, respectively. It is done. The signal stored in the charge storage unit 818 is sequentially scanned and read out by a horizontal scanning circuit, and a difference between an optical signal and a noise signal is output by a differential amplifier circuit (not shown).

  The present invention is a CMOS type solid-state imaging device, and a remarkable effect can be obtained when an all-pixel simultaneous storage type electronic shutter operation is performed. FIG. 9 is a timing chart for explaining this electronic shutter operation. First, in order to reset the photodiodes of all pixels, the reset pulse for all rows is turned on and the transfer pulse for all rows is turned on. From the moment when both pulses are turned OFF, the accumulation operation of the photodiode starts simultaneously on the entire screen. Accumulation is performed for a desired time, and the transfer pulses of all the rows are turned on and then turned off, so that the signal charges of each pixel are transferred to the floating diffusion of each pixel at the same time. Next, by turning ON / OFF the selection pulse for each row, the charges of the floating diffusion are sequentially read for each row. The read signal is stored as an “S + N” signal in the charge storage unit 818 of FIG.

  Next, by turning ON the reset pulse of all rows, the floating diffusions of all the pixels are simultaneously reset. After the reset pulse is turned OFF, the potential of the floating diffusion in each row is read sequentially. The read signal is stored as an “N” signal in a capacitor unit that is provided with “S + N” in the charge storage unit 818. By using the stored “S + N” and “N” signals as inputs to the differential amplifier, the “S” signal is extracted.

  In this operation, since the time during which charges are held in the floating diffusion varies from row to row, the conventional structure has a long holding time (in this case, compared to the row having a short holding time (in this case, the first row)). In the last row), the output potential is shaded by a false signal entering the floating diffusion. In the present invention, although it flows into the floating diffusion is suppressed, such shading does not occur or does not cause a problem.

  FIG. 10 shows an example of a circuit block when the solid-state imaging device according to the present invention is applied to a camera. A shutter 1001 is provided in front of the taking lens 1002 and controls exposure. The amount of light is controlled by the diaphragm 1003 as necessary, and an image is formed on the solid-state imaging device 1004. A signal output from the solid-state imaging device 1004 is processed by a signal processing circuit 1005 and converted from an analog signal to a digital signal by an A / D converter 1006. The output digital signal is further processed by a signal processing unit 1007. The processed digital signal is stored in the memory 1010 or sent to an external device through the external I / F 1013. The solid-state imaging device 1004, the imaging signal processing circuit 1005, the A / D converter 1006, and the signal processing unit 1007 are controlled by a timing generation unit 1008, and the entire system is controlled by an overall control unit / arithmetic unit 1009. In order to record an image on the recording medium 1012, the output digital signal is recorded through a recording medium control I / F unit 1011 controlled by the overall control unit / arithmetic unit.

  Needless to say, this embodiment can be applied to a case where a hole accumulation type pixel is formed by inverting all other conductivity types.

  FIG. 6 is a cross-sectional view of the pixel portion of the solid-state imaging device according to the second embodiment of the present invention. 601 is an n-type silicon substrate, 602a is a P-type well, 602b is a P-type buried layer, 603a is a gate oxide film of a MOS transistor, 603b is a thin oxide film on a light receiving portion, 604 is a gate electrode of a transfer MOS transistor, and 605 is The N-type cathode of the photodiode 1, 606 is a surface P-type region for embedding the photodiode, 607a is a LOCOS oxide film for element isolation, 607b is a P-type channel stop layer, and 608a is a floating diffusion. This is an N-type high concentration region that also serves as a drain region of the transfer MOS transistor. A polysilicon lead electrode 608b is in direct contact with the N-type high concentration region. The polysilicon lead electrode 608b is made of a metal on the top surface. 608c is, for example, a silicide of Ti, W, or Mo. Reference numeral 609 denotes a silicon oxide film that insulates the gate electrode from the first metal layer, and reference numeral 621 denotes a first metal layer that shields the floating diffusion portion. 622 is an interlayer insulating film that insulates the metal first layer and the metal second layer, 623 is a metal second layer, 624 is an interlayer insulating film that insulates the metal second layer and the metal third layer, 625 is a metal third layer, Reference numeral 626 denotes a passivation film.

  In this example, the light entering the floating diffusion was further reduced by making the upper surface of the polysilicon electrode low reflective to visible light. That is, the light incident on the upper surface of the gate electrode 604 of the transfer MOS transistor is not transmitted among the incident light, so that the light directly entering the silicon is reduced. In addition, the intensity of the reflected light can be reduced by keeping the reflectance of the silicide 608c low. Since the upper surface of the polysilicon direct contact 608b is also covered with silicide, the light component directly transmitted through the polysilicon can be reduced even if stray light is present.

  FIG. 7 is a cross-sectional view of the pixel portion of the solid-state imaging device according to the third embodiment of the present invention. 701 is an N-type silicon substrate, 702 is a buried P-type high concentration layer, 703a is an N-type epitaxial layer, 703b is an N-type cathode of a photodiode, 704a, 704b and 704c are P-type isolation layers, and 705a, 705b and 705c are P It is a mold well layer. Reference numerals 706a and 706b denote channel stop P-type layers below the field oxide film. Reference numeral 714 defines a charge transfer path from the photodiode to the floating diffusion, a field stop layer for forming a potential barrier immediately below the transfer MOS transistor, 707 a field oxide film, 708 a gate oxide film of the MOS transistor, and 709a transfer. The metal silicide layers 709b and 710 on the surface of the gate polysilicon of the MOS transistor are surface P-type layers for embedding photodiodes. Reference numeral 711 denotes an N-type high concentration diffusion region of the transfer MOS transistor. Reference numeral 712a denotes a polysilicon lead electrode in direct contact with the N-type high concentration region. The uppermost surface of the polysilicon lead electrode 712b is a metal silicide. Reference numeral 713 denotes a silicon oxide film that insulates the gate electrode from the first metal layer, and reference numeral 721 denotes the first metal layer that shields the floating diffusion portion from light. 722 is an interlayer insulating film that insulates the metal first layer and the metal second layer, 723 is a metal second layer, 724 is an interlayer insulating film that insulates the metal second layer and the metal third layer, 725 is a metal third layer, Reference numeral 726 denotes a passivation film.

  As in the second embodiment, this embodiment reduces the false signal incident on the floating diffusion from the upper surface by metalizing the uppermost layer of the polysilicon gate, and at the same time, is generated at the end of the photodiode by the oblique incident light 731a. Of the pair of electrons and holes 731b, electrons are collected by the P-type isolation layer 704b, the P-type well layer 705b, and the field stop layer 714 without being diffused to the floating diffusion side, but at the cathode 703 of the photodiode.

  As described above, in this embodiment, diffusion can be suppressed from the inside of silicon to the floating diffusion. By combining the silicide and the potential barrier, the false signal can be eliminated more effectively.

(Figure 1)
1 Photodiode 2 Transfer MOS transistor 3 Floating diffusion 4 Reset MOS transistor 5 Select MOS transistor 6 Source follower MOS transistor 7 Read line 8 Constant current source (FIG. 2)
DESCRIPTION OF SYMBOLS 10 Active region in which photodiode is formed 11 Active region in which selective MOS transistor and source follower transistor are formed 20 Transfer MOS transistor region 21 Transfer MOS transistor gate line 30 Floating diffusion PN junction 31 Floating diffusion to electrode Contact for drawing out 32 Metal electrode for drawing out floating diffusion 34 Contact for connecting to polysilicon 34 Polysilicon electrode 40 Reset MOS transistor region 41 Contact for connection with reset power supply 50 Gate region of selection MOS transistor 51 Contact for connecting to VDD power supply 60 Source follower MOS transistor region 70 Output line 71 Contact connecting the force line 70 and the main electrode of the source follower MOS transistor 60 (FIG. 3)
301 n-type silicon substrate 302a P-type well 302b P-type buried layer 303a Gate oxide film 303b of MOS transistor Thin oxide film 304 on light receiving portion Gate electrode 305 of transfer MOS transistor Photodiode N-type cathode 306 Surface P-type region 307a Element LOCOS oxide film 307b P-type channel stop layer 308 N-type high concentration region 309 Silicon oxide film 320 Contact plug 321 Metal first layer 322 Interlayer insulating film 323 Metal second layer 324 Interlayer insulating film 325 Metal third layer 326 Passivation films 330a and 331a Obliquely incident light 330b and 331b Electron / hole pairs (FIG. 4)
110 Active region 111 in which photodiode is formed Active region 120 in which selection MOS transistor and source follower transistor are formed 120 Region of transfer MOS transistor 121 Gate line 130 of transfer MOS transistor Floating diffusion PN junction floating differential 131 Polysilicon 132 Light shielding metal 140 by first metal layer 140 Reset MOS transistor region 141 Contact 150 for connection to reset power supply Gate region 151 of selection MOS transistor Contact 160 for connection to VDD power supply Source follower MOS transistor region 170 Output line (FIG. 5)
501 n-type silicon substrate 502a P-type well 502b P-type buried layer 503a MOS transistor gate oxide film 503b Thin oxide film 504 on light receiving portion Transfer MOS transistor gate electrode 505 Photodiode N-type cathode 506 Surface P-type region 507a Element LOCOS oxide film 507b P-type channel stop layer 508a N-type high concentration region 508b Polysilicon extraction electrode 509 Silicon oxide film 521 Metal first layer 522 Interlayer insulating film 523 Metal second layer 524 Interlayer insulating film 525 Metal third Layer 526 Passivation film 531 Obliquely incident light (FIG. 6)
601 n-type silicon substrate 602a P-type well 602b P-type buried layer 603a MOS transistor gate oxide film 603b Thin oxide film 604 on light receiving portion Transfer MOS transistor gate electrode 605 Photodiode N-type cathode 606 Surface P-type region 607a Element LOCOS oxide film 607b for isolation P-type channel stop layer 608a N-type high concentration region 608b Polysilicon lead electrode 608c Metal silicide 609 Silicon oxide film 621 Metal first layer 622 Interlayer insulating film 623 Metal second layer 624 Interlayer insulating film 625 Metal third layer 626 Passivation film 631 Obliquely incident light (FIG. 7)
701 N-type silicon substrate 702 Embedded P-type high concentration layer 703a N-type epitaxial layer 703b N-type cathodes 704a, 704b, 704c of photodiode P-type isolation layers 705a, 705b, 705c P-type well layers 706a, 706b Channel stop P-type layer 707 Field oxide film 708 MOS transistor gate oxide film 709a Gate polysilicon 709b Metal silicide layer 710 Surface P-type layer 711 N-type high concentration diffusion region 712a Polysilicon lead electrode 713 Silicon oxide film 714 Field stop layer 721 Metal first layer 722 Interlayer insulating film 723 Metal second layer 724 Interlayer insulating film 725 Metal third layer 726 Passivation film 731a Obliquely incident light 731b Electron / hole pair

Claims (8)

A photoelectric conversion unit;
Floating diffusion to which charges of the photoelectric conversion unit are transferred;
A transfer transistor for transferring charge from the photoelectric conversion unit to the floating diffusion;
In a solid-state imaging device having a signal amplifying unit electrically connected to the floating diffusion,
The signal amplification unit includes a MOS transistor, and the electrical connection from the floating diffusion to the gate electrode of the MOS transistor is made using the same wiring layer as the gate electrode of the MOS transistor,
Of the plurality of metal layers including the metal first layer disposed above the same wiring layer as the gate electrode, the light shielding metal of the metal first layer closest to the floating diffusion is the floating diffusion in a planar layout. A solid-state imaging device characterized by covering and concealing . A photoelectric conversion unit;
Floating diffusion to which charges of the photoelectric conversion unit are transferred;
A transfer transistor for transferring charge from the photoelectric conversion unit to the floating diffusion;
In a solid-state imaging device having a signal amplifying unit electrically connected to the floating diffusion,
The signal amplification unit includes a MOS transistor, and the gate electrode of the MOS transistor is in contact with the floating diffusion,
Of the plurality of metal layers including the metal first layer disposed above the gate electrode, the light shielding metal of the metal first layer closest to the floating diffusion covers the floating diffusion in a planar layout . A solid-state imaging device. The gate electrode of the transfer transistor, a polysilicon, a solid-state imaging device according to claim 1 or 2, characterized in that it is composed of a metal silicide layer disposed over the polysilicon. The said 1st metal layer consists of two or more layers, The lowermost layer has a reflectance lower than the other layer of the said 1st metal layer, The any one of Claim 1 thru | or 3 characterized by the above-mentioned. Solid-state imaging device. The gate electrodes of the previous SL MOS transistor, and polysilicon, according to any one of claims 1 to 4, characterized in that it is composed of a metal silicide layer disposed over the polysilicon Solid-state imaging device. Between the photoelectric conversion unit and the floating diffusion is one of the claims 1 to 5 signal charge generated in the photoelectric conversion portion and having a potential barrier that prevents flowing into the floating diffusion 1 The solid-state imaging device according to item. A plurality of pixels having the photoelectric conversion unit and the signal amplification unit are arranged in an array, and the floating diffusion is arranged for each pixel or for each of a plurality of pixels,
Each pixel has reset means and charge transfer means,
After reset simultaneously all the pixels, the stored was the signal charge in the photoelectric conversion unit are transferred to the floating diffusion simultaneously all pixels to claim 1, characterized in that sequentially reading a potential of the floating diffusion 6 The solid-state imaging device according to any one of the above. An imaging optical system for imaging light from a subject;
The solid-state imaging device according to any one of claims 1 to 7 , which photoelectrically converts the formed image.
An image pickup system comprising: a signal processing circuit for digitally converting and processing an output signal from the solid-state image pickup device.

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