JP5177887B2 - Liquid crystal display - Google Patents

Description

  The present invention relates to a liquid crystal display device, and more particularly to a liquid crystal display device having a structure in which a pair of electrodes is provided on one substrate constituting the liquid crystal display device.

  In recent years, flat display devices have been actively developed, and among them, liquid crystal display devices have been applied to various fields by taking advantage of features such as light weight, thinness, and low power consumption. Such a liquid crystal display device has a configuration in which a liquid crystal layer is held between a pair of substrates, and displays an image by controlling a modulation rate for light passing through the liquid crystal layer by an electric field between a pixel electrode and a common electrode. Is.

  In such a liquid crystal display device, a structure using a lateral electric field (including a fringe electric field) is particularly attracting attention from the viewpoint of wide viewing angle. 2. Description of the Related Art A lateral electric field mode liquid crystal display device such as an In-Plane Switching (IPS) mode or a Ringe Field Switching (FFS) mode includes a pixel electrode and a common electrode formed on an array substrate. The liquid crystal molecules are switched by a horizontal electric field that is almost parallel.

For example, according to Patent Document 1, a pixel electrode and a common electrode are formed through an FFS insulating film made of silicon nitride, and a horizontal electric field that is mainly parallel to the substrate surface is applied by applying a voltage between the electrodes. A technique for generating liquid crystal molecules to drive liquid crystal molecules is disclosed.
JP 2008-116484 A

  In the lateral electric field method as described above, when an interface of an insulating film is located between conductive layers having different potentials, charges are likely to accumulate at this interface. For example, in the case of the configuration as in Patent Document 1, two types of insulating films (interlayer insulating film and planarizing film) are interposed between the gate wiring and the pixel electrode or the common electrode, and between these insulating films. The interface is easily charged.

  Such undesired charging causes display defects such as burn-in.

  An object of the present invention is to provide a liquid crystal display device capable of improving display quality.

According to one aspect of the invention,
A liquid crystal display device having a configuration in which a liquid crystal layer is held between a first substrate and a second substrate,
The first substrate is
An insulating substrate;
A gate line disposed on the insulating substrate;
A first insulating film disposed to cover the insulating substrate and the gate line;
A first electrode disposed on the first insulating film;
A source line disposed on the first insulating film so as to be orthogonal to the gate line;
A shield electrode disposed on the first insulating film so as to be separated from the source line and to face the gate line;
A second insulating film disposed to cover the first insulating film, the first electrode, the source line, and the shield electrode;
A second electrode disposed on the second insulating film so as to face the first electrode, electrically connected to the shield electrode, and formed with a slit facing the first electrode;
A liquid crystal display device is provided.

  According to the present invention, a liquid crystal display device capable of improving display quality can be provided.

  A liquid crystal display device according to an embodiment of the present invention will be described below with reference to the drawings. Here, a liquid crystal mode in which a first electrode and a second electrode are provided on one substrate, and liquid crystal molecules are switched mainly using a lateral electric field (an electric field substantially parallel to the main surface of the substrate) formed therebetween. As an example, an FFS mode liquid crystal display device will be described.

  As shown in FIG. 1, the liquid crystal display device is an active matrix type liquid crystal display device and includes a liquid crystal display panel LPN. The liquid crystal display panel LPN includes an array substrate (first substrate) AR, a counter substrate (second substrate) CT arranged to face the array substrate AR, and between the array substrate AR and the counter substrate CT. And a held liquid crystal layer LQ. Such a liquid crystal display panel LPN includes a display area (active area) DSP for displaying an image. This display area DSP is composed of a plurality of pixels PX arranged in an m × n matrix (where m and n are positive integers).

  In the display area DSP, the array substrate AR includes m × n first electrodes (pixel electrodes) E1 arranged in each pixel PX, and n gate lines extending along the row direction H of each pixel PX. Y (Y1 to Yn), m source lines X (X1 to Xm) extending along the column direction V of each pixel PX so as to intersect with each gate line Y, and the gate line Y in each pixel PX M × n switching elements W arranged in a region including an intersection with the source line X, a second electrode (common electrode) E2 arranged so as to face the first electrode E1 through an insulating film, and the like. I have.

  Each gate line Y is drawn out of the display area and connected to a gate driver YD controlled by the controller CNT. Each source line X is drawn out of the display area and connected to a source driver XD controlled by the controller CNT. The second electrode E2 is connected to a common wiring COM having a common potential supplied from a controller CNT or the like.

  The gate driver YD sequentially supplies scanning signals (drive signals) to the n gate lines Y based on control by the controller CNT. Further, the source driver XD supplies video signals (drive signals) to the m source lines X at the timing when the switching elements W in each row are turned on by the scanning signal based on the control by the controller CNT. The first electrode E1 in each row is set to a pixel potential corresponding to the video signal supplied via the corresponding switching element W with respect to the potential of the second electrode E2.

  The structure of the liquid crystal display panel LPN will be described in detail below.

  As shown in FIGS. 2 and 3, the array substrate AR is formed by using an insulating substrate 20 having optical transparency such as a glass plate. In the array substrate AR, the gate line Y is disposed on the insulating substrate 20. Similarly, the common wiring COM is also disposed on the insulating substrate 20. Similar to the gate line Y, the common wiring line COM extends along the row direction H. Such a gate line Y and a common wiring COM can be formed in the same process using the same material, for example, and are formed of a conductive material such as molybdenum, aluminum, tungsten, or titanium.

  The insulating substrate 20, the gate line Y, and the common wiring COM are covered with a gate insulating film 22 that is a first insulating film. The gate insulating film 22 is formed of an inorganic material such as silicon nitride (SiN).

  The source line X is disposed on the gate insulating film 22. The source line X is substantially orthogonal to the gate line Y and the common wiring line COM through the gate insulating film 22. Such a source line X is formed of, for example, a titanium / aluminum / titanium laminate.

  The first electrode E1 is disposed on the gate insulating film 22. That is, the first electrode E1 is arranged in the same layer as the source line X. Each source line X is disposed between adjacent first electrodes E1. That is, the first electrode E1 is disposed between the two source lines X so as to be separated from the source line X in each pixel.

  The first electrode E1 is formed of a material different from the source line X and the like, and is formed of a light-transmitting conductive material such as indium tin oxide (ITO) and indium zinc oxide (IZO). Yes. In addition, the first electrode E1 is formed in an island shape corresponding to the pixel shape in each pixel PX, for example, a substantially square shape.

  The gate insulating film 22, the source line X, and the first electrode E1 are covered with a passivation film 24 that is a second insulating film. The passivation film 24 is formed of an inorganic material such as silicon nitride (SiN).

  The second electrode E <b> 2 is disposed on the passivation film 24. The second electrode E2 is opposed to the first electrode E1 of each pixel PX via the passivation film 24. That is, the passivation film 24 functions as an interlayer insulating film interposed between the first electrode E1 and the second electrode E2.

  Such a second electrode E2 is disposed over the entire display area DSP. That is, the second electrode E2 has a substantially solid shape that is arranged corresponding to each pixel PX and also arranged between the pixels. That is, the second electrode E2 is arranged so as to face the gate line Y and the common wiring COM as shown in FIG. 3 and also face the source line X as shown in FIG. In FIG. 4, only the main part of the array substrate AR is shown. Similar to the first electrode E1, the second electrode E2 is formed of a light-transmitting conductive material such as ITO or IZO.

  The second electrode E2 is formed with a slit SL facing the first electrode E1. Here, the slit SL of the second electrode E2 is formed in, for example, a substantially rectangular shape or a substantially oval shape. In the example shown in FIG. 2, the slit SL is formed such that its long axis L is not parallel to the row direction H and the column direction V. Such a plurality of slits SL are arranged in the column direction V, but are not limited to this shape. For example, the direction of the slit SL may be different between the upper half and the lower half of the vertically long pixels in the column direction V.

  The second electrode E2 is electrically connected to the common wiring COM. A gate insulating film 22 and a passivation film 24 are interposed between the common wiring COM and the second electrode E2. The second electrode E2 is electrically connected to the common wiring line COM through a contact hole CH that penetrates the gate insulating film 22 and the passivation film 24.

  The switching element W is configured by, for example, a thin film transistor (TFT). The semiconductor layer SC of the switching element W can be formed of, for example, polysilicon, amorphous silicon, or the like. Here, the semiconductor layer SC is formed of amorphous silicon and constitutes a bottom gate type transistor.

  The gate electrode WG of the switching element W is electrically connected to the gate line Y. The gate electrode WG can be formed in the same process using the same material as the gate line Y. Here, the gate electrode WG is formed integrally with the gate line Y on the insulating substrate 20. The gate electrode WG is covered with a gate insulating film 22.

  The semiconductor layer SC of the switching element W is arranged in an island shape on the gate insulating film 22 so as to face the gate electrode WG.

  The source electrode WS and the drain electrode WD of the switching element W are disposed on the gate insulating film 22. The source electrode WS is electrically connected to the source line X (or formed integrally with the source line X) and is in contact with the semiconductor layer SC. The drain electrode WD is electrically connected to the first electrode E1, and is in contact with the semiconductor layer SC away from the source electrode WS. That is, the first electrode E1 and the drain electrode WD of the switching element W are directly connected without going through a through hole.

  The source electrode WS and the drain electrode WD can be formed in the same process using the same material as the source line X. Such semiconductor layer SC, source electrode WS, and drain electrode WD are covered with a passivation film 24.

  The surface in contact with the liquid crystal layer LQ of the array substrate AR having such a configuration is covered with the alignment film AL1.

  On the other hand, the counter substrate CT is formed using an insulating substrate 30 having optical transparency such as a glass plate. As shown in FIG. 3, the counter substrate CT includes a black matrix BM that partitions each pixel PX on the inner surface of the insulating substrate 30 (that is, the surface facing the liquid crystal layer LQ).

  The black matrix BM is arranged in a lattice pattern on the insulating substrate 30 so as to face the gate lines Y and the source lines X provided on the array substrate AR, and further the wiring portions such as the switching elements W. The black matrix BM is formed of a light shielding metal material such as a resin material colored black or chromium (Cr), for example.

  In particular, in a color display type liquid crystal display device, the counter substrate CT includes a color filter layer CF in a region surrounded by the black matrix BM. The color filter layer CF is disposed on the insulating substrate 30 and is formed of resins colored in a plurality of different colors, for example, three primary colors such as red, blue, and green. The red colored resin, the blue colored resin, and the green colored resin are disposed corresponding to the red pixel, the blue pixel, and the green pixel, respectively.

  In the liquid crystal mode using the lateral electric field as described above, it is desirable that the surface of the counter substrate CT in contact with the liquid crystal layer LQ is flat, and the counter substrate CT further flattens the unevenness of the surface of the color filter layer CF. Thus, it is desirable to have an overcoat layer or the like disposed with a relatively thick film thickness.

  The surface in contact with the liquid crystal layer LQ of the counter substrate CT is covered with the alignment film AL2. The alignment films AL1 and AL2 are made of polyimide, for example.

  The array substrate AR and the counter substrate CT as described above are arranged so that the alignment films AL1 and AL2 face each other. At this time, a spacer (not shown) (for example, a columnar spacer formed integrally with one substrate by a resin material) is disposed between the array substrate AR and the counter substrate CT, thereby forming a predetermined gap. Is done. The array substrate AR and the counter substrate CT are bonded together with a sealing material in a state where a predetermined gap is formed.

  The liquid crystal layer LQ is composed of a liquid crystal composition including liquid crystal molecules LM sealed in a gap formed between the alignment film AL1 of the array substrate AR and the alignment film AL2 of the counter substrate CT.

  The alignment film AL1 and the alignment film AL2 are rubbed so as to regulate the alignment of the liquid crystal molecules LM contained in the liquid crystal layer LQ. The liquid crystal molecules LM contained in the liquid crystal layer LQ are aligned by the regulating force by the alignment film AL1 and the alignment film AL2. The rubbing directions of the alignment film AL1 and the alignment film AL2 are nonparallel and non-perpendicular to the major axis of the slit SL formed in the second electrode E2.

  The liquid crystal display device including the transmissive liquid crystal display panel LPN further includes an illumination unit, that is, a backlight unit BL disposed on the array substrate AR side with respect to the liquid crystal display panel LPN. The backlight unit BL illuminates the liquid crystal display panel LPN from the array substrate AR side. As such a backlight, various forms are applicable, and any of those using a light emitting diode (LED) or a cold cathode tube (CCFL) as a light source can be applied. A description of the detailed structure is omitted.

  The liquid crystal display device includes an optical element OD1 provided on one outer surface of the liquid crystal display panel LPN (that is, the surface opposite to the surface in contact with the liquid crystal layer LQ of the array substrate AR). The optical element OD2 provided on the other outer surface (that is, the surface opposite to the surface in contact with the liquid crystal layer LQ of the counter substrate CT) is provided.

  Each of these optical elements OD1 and OD2 includes a polarizing plate, for example, no potential difference is formed between the first electrode E1 and the second electrode E2 (that is, the first electrode E1 and the second electrode E2 A normally black mode is realized in which the transmittance of the liquid crystal display panel LPN is lowest (that is, a black screen is displayed) when there is no electric field between which no electric field is formed.

  That is, in such a liquid crystal display device, when there is no electric field, the liquid crystal molecules LM are aligned such that the major axis D is oriented in a direction parallel to the rubbing direction S of the alignment films AL1 and AL2. In such a state, the backlight light from the backlight unit BL passes through the optical element OD1, passes through the liquid crystal display panel LPN, and is absorbed by the optical element OD2 (black screen display).

  When a potential difference is formed between the first electrode E1 and the second electrode E2 (that is, when a voltage having a potential different from the common potential is applied to the first electrode E1), the first electrode E1 A lateral electric field (fringe electric field) is formed between the first electrode E2 and the second electrode E2. This transverse electric field is formed in the direction orthogonal to the major axis L through the slit SL.

  At this time, the alignment state of the liquid crystal molecules LM changes, for example, such that the major axis D of the liquid crystal molecules LM is directed from the rubbing direction S in a direction parallel to the lateral electric field. As described above, when the orientation of the major axis D of the liquid crystal molecule LM changes from the rubbing direction S, the modulation factor for the light transmitted through the liquid crystal layer LQ changes. Therefore, part of the backlight light emitted from the backlight unit BL and transmitted through the liquid crystal display panel LPN is transmitted through the second optical element OD2 (white screen display). That is, the transmittance of the liquid crystal display panel LPN changes depending on the magnitude of the electric field. In the liquid crystal mode using the horizontal electric field, the backlight is selectively transmitted in this way, and an image is displayed.

  By the way, in this embodiment, the liquid crystal display device includes a shield electrode SE that electrically shields between the gate line Y and the second electrode E2. That is, as shown in FIGS. 2 and 5, the shield electrode SE is disposed on the gate insulating film 22 so as to be separated from the source line X and to face the gate line Y. In FIG. 5, only the main part of the array substrate AR is shown. Such a shield electrode SE is covered with a passivation film 24.

  The second electrode E2 faces the shield electrode SE through the passivation film 24, and is electrically connected to the shield electrode SE through a through hole TH penetrating the passivation film 24. That is, the shield electrode SE is set to a common potential similarly to the second electrode E2.

  According to such a configuration, the interface of the insulating film is not located between the conductive layers having different potentials. That is, according to this embodiment, the interface of the insulating film is formed at the portion where the gate insulating film 22 and the passivation film 24 directly overlap. Such an interface is likely to be charged due to a difference in film quality.

  In the present embodiment, the gate insulating film 22 and the common wiring COM disposed in the same layer on the insulating substrate 20 and the second electrode E2 disposed in the same layer on the passivation film 24 A passivation film 24 is interposed. Here, the common wiring COM and the second electrode E2 are substantially at the same potential, and even if the interface of the insulating film is interposed between them, the common wiring COM and the second electrode E2 are not charged up. On the other hand, when the gate line Y and the second electrode E2 are at different potentials, and there is an interface of the insulating film between them, there is a possibility of charging up.

  Therefore, by arranging the shield electrode SE on the gate insulating film 22 located between the gate line Y and the second electrode E2, the gate insulating film 22 and the passivation film 24 do not directly overlap, and charge-up is performed. The causal interface is not formed. For this reason, generation | occurrence | production of defects, such as image sticking resulting from charge-up, can be suppressed, and it becomes possible to improve display quality.

  Since the shield electrode SE has a common potential, it is electrically insulated from the source line X and the first electrode E1 arranged in the same layer. That is, the shield electrode SE, the source line X, and the first electrode E1 are separated from each other.

  Such a shield electrode SE can be formed of the same material as another conductive layer disposed on the gate insulating film 22, for example, the first electrode E1 or the source line X. According to this, the shield electrode SE can be formed in the same process as the first electrode E1 or the source line X. For this reason, it is not necessary to add a separate process for forming the shield electrode SE, and it is possible to improve the material utilization efficiency and further suppress an increase in manufacturing cost.

  If there are restrictions on the manufacturing process, the shield electrode SE is more preferably formed of the same material as the source line X. Specifically, when simultaneously forming the contact hole CH connecting the second electrode E2 and the common wiring COM and the through hole TH connecting the second electrode E2 and the shield electrode SE, in this etching step, the contact hole The selection ratio is set such that CH penetrates the gate insulating film 22 and the passivation film 24 reliably while the through hole TH penetrates the passivation film 24 and remains at the shield electrode SE.

  At this time, the conductive material such as ITO that forms the first electrode E1 is easily scraped by the etching that forms the through hole TH, which causes an increase in connection resistance or is removed in the worst case to ensure conduction. It may not be possible.

  On the other hand, the metal material forming the source line X can be easily controlled to remain reliably by the selection ratio during etching. Therefore, it is easy to ensure the reliability of conduction.

  In the example shown in FIG. 5, the shield electrode SE is formed as a single conductive layer using the same material as the first electrode E1 or the source line X, but may be formed by combining a plurality of conductive layers.

  For example, in the example shown in FIG. 6, the shield electrode SE includes a contact part SE1 that contacts the second electrode E2 through the through hole TH, and a shield part that is mainly interposed between the gate line Y and the second electrode E2. And SE2. In FIG. 6, only the main part of the array substrate AR is shown.

  As described above, the contact part SE1 is preferably formed of a metal material for forming the source line X in order to ensure the reliability of conduction. The shield part SE2 is formed of the same material as the first electrode E1.

  Even with such a configuration, the same effect as the example described above can be obtained.

  As described above, according to this embodiment, it is possible to provide a liquid crystal display device capable of realizing a good display quality.

  In addition, this invention is not limited to the said embodiment itself, In the stage of implementation, it can change and implement a component within the range which does not deviate from the summary. Further, various inventions can be formed by appropriately combining a plurality of constituent elements disclosed in the embodiment. For example, some components may be deleted from all the components shown in the embodiment. Furthermore, you may combine suitably the component covering different embodiment.

FIG. 1 is a diagram schematically showing a configuration of a liquid crystal mode liquid crystal display device using a lateral electric field according to an embodiment of the present invention. FIG. 2 is a plan view schematically showing a configuration example of a pixel applied to the liquid crystal display device shown in FIG. FIG. 3 is a cross-sectional view schematically showing a structure including a switching element obtained by cutting the pixel shown in FIG. 2 along the line AA. FIG. 4 is a cross-sectional view schematically showing a structure including a source line obtained by cutting the pixel shown in FIG. 2 along the line BB. FIG. 5 is a cross-sectional view schematically showing a structure including a shield electrode obtained by cutting the pixel shown in FIG. 2 along the line CC. FIG. 6 is a cross-sectional view schematically showing another structure including a shield electrode obtained by cutting the pixel shown in FIG. 2 along the line CC.

Explanation of symbols

LPN ... Liquid crystal display panel AR ... Array substrate CT ... Counter substrate LQ ... Liquid crystal layer DSP ... Display area PX ... Pixel Y ... Gate line X ... Source line COM ... Common wiring W ... Switching element E1 ... First electrode (pixel electrode) E2 ... Second electrode (common electrode) SL ... Slit 22 ... Gate insulating film (first insulating film) 24 ... Passivation film (second insulating film)
30 ... Insulating substrate BM ... Black matrix CF ... Color filter layer SE ... Shield electrode SE1 ... Contact part SE2 ... Shield part

Claims (6)

A liquid crystal display device having a configuration in which a liquid crystal layer is held between a first substrate and a second substrate,
The first substrate is
An insulating substrate;
A gate line disposed on the insulating substrate;
A first insulating film disposed to cover the insulating substrate and the gate line;
A first electrode disposed on the first insulating film;
A source line disposed on the first insulating film so as to intersect the gate line;
A shield electrode disposed on the first insulating film so as to be separated from the source line and to face the gate line;
A second insulating film disposed to cover the first insulating film, the first electrode, the source line, and the shield electrode;
A second electrode disposed on the second insulating film so as to face the first electrode, electrically connected to the shield electrode, and formed with a slit facing the first electrode;
A liquid crystal display device comprising:   The liquid crystal display device according to claim 1, wherein the shield electrode is made of the same material as the first electrode.   The liquid crystal display device according to claim 1, wherein the shield electrode is made of the same material as the source line. A common wiring having a common potential disposed on the insulating substrate;
The liquid crystal display device according to claim 1, wherein the second electrode is electrically connected to the common wiring through a contact hole penetrating the first insulating film and the second insulating film.   The liquid crystal display device according to claim 4, wherein the second electrode is formed over the entire display area in which pixels are arranged in a matrix.   The liquid crystal display device according to claim 1, further comprising a switching element that is disposed on the first insulating film and includes a drain electrode connected to the first electrode.

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