JP5172287B2 - Integrated circuit device - Google Patents

Description

  The present invention relates to an integrated circuit device, and more particularly to an integrated circuit device capable of measuring the magnitude of a current flowing in an internal wiring.

  Conventionally, there is a demand for measuring the magnitude of current flowing through wiring in an integrated circuit device. This is because, for example, the output current value is controlled in a power supply IC (Integrated Circuit). As one method for measuring the magnitude of the current, there is a method in which a resistor is interposed in the current path and the voltage between both ends of the resistor is measured. However, in this method, a part of the power supply voltage input to the integrated circuit device is used to measure the current. For this reason, measurement has become difficult as the output voltage decreases in recent years. In one example, in the conventional power supply IC, the output voltage is 5 V and the voltage used for current measurement is 50 mV. However, in recent power supply ICs for personal computers, the output voltage is about 1V, and it is difficult to secure a current measurement voltage of 50 mV for the output voltage of 1V. On the other hand, if the voltage for current measurement is reduced to about 10 mV in accordance with the output voltage, for example, accurate measurement cannot be performed.

  Therefore, there is a need for means for measuring the magnitude of the current without intervening in the current path. As such means, there is a Rogowski coil (for example, see Patent Document 1). The Rogowski coil is an annular coil in which wiring is wound around an annular body, and a return line is provided inside the coil. Then, if the measured wiring to be measured is inserted into the annular body, an induced current is generated in the coil, and the measured wiring flows through the measured wiring regardless of the position of the measured wiring with respect to the annular body and the external magnetic field. The magnitude of the current can be measured.

  In order to always measure the magnitude of the current flowing in the wiring to be measured using such a Rogowski coil, it is preferable to integrate the Rogowski coil on the same substrate as the wiring to be measured. However, the Rogowski coil has a problem that it is difficult to integrate the Rogowski coil because the coil must be wound around the wiring to be measured. That is, in the integrated circuit device, when a Rogowski coil is formed around the wiring to be measured, at least seven wiring layers including the wiring to be measured and the return line are required.

JP 2006-189319 A

  An object of the present invention is to provide an integrated circuit device capable of measuring the magnitude of a current flowing through an internal wiring.

According to an aspect of the present invention , there is provided an integrated circuit device in which a first wiring layer, a first insulating layer, a second wiring layer, a second insulating layer, and a third wiring layer are stacked in this order, and the third wiring A main wiring formed in a layer and extending in a first direction parallel to the surface of the first wiring layer; a wiring formed in the first wiring layer; a wiring formed in the second wiring layer And a coil formed by a via formed in the first insulating layer and having a central axis extending in a direction parallel to the surface of the first wiring layer and intersecting the first direction. An integrated circuit device is provided.

According to another aspect of the present invention , there is provided an integrated circuit device in which a first wiring layer, a first insulating layer, a second wiring layer, a second insulating layer, and a third wiring layer are stacked in this order. A main wiring having a first portion formed in three wiring layers and extending in a first direction parallel to the surface of the first wiring layer, and a second portion extending in the opposite direction to the first direction And a wiring formed in the first wiring layer, a wiring formed in the second wiring layer, and a via formed in the first insulating layer, in a region immediately below the first portion. A first coil disposed in the first wiring layer and having a central axis extending in a second direction parallel to the surface of the first wiring layer and perpendicular to the first direction; Formed by the wiring formed in the second wiring layer and the via formed in the first insulating layer, A second coil disposed in a region immediately below the second portion and having a central axis extending in the second direction, and formed in one of the first wiring layer and the second wiring layer; A first wiring connecting an end of the coil on the second part side to an end of the second coil on the opposite side of the first part, and in the first wiring layer and the second wiring layer A second wiring formed on the other side, having one end connected to the end of the second coil on the first portion side and the other end drawn to the opposite side of the second portion as viewed from the first portion; The shape and winding direction of the first coil are equal to the shape and winding direction of the second coil, respectively, and viewed from the direction perpendicular to the surface of the first wiring layer, The first wiring intersects with the second wiring, and the first portion, the first wiring, and the first wiring Area of a region surrounded by the serial second wire, said second portion, said first wire and the integrated circuit device, characterized in that equal to the area of a region surrounded by the second wiring is provided.

  According to the present invention, it is possible to realize an integrated circuit device capable of measuring the magnitude of a current flowing through an internal wiring.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
First, a first embodiment of the present invention will be described.
FIG. 1 is a plan view illustrating an integrated circuit device according to this embodiment.
2 is a cross-sectional view taken along line AA ′ shown in FIG.
FIG. 3 is a perspective view illustrating the coil of this embodiment.

  As shown in FIGS. 1 to 3, in the integrated circuit device 1 according to the present embodiment, a substrate 11 is provided. The substrate 11 is a semiconductor substrate, for example, and is formed of, for example, single crystal silicon. On the substrate 11, an insulating layer 12, a wiring layer 13 (first wiring layer), an insulating layer 14 (first insulating layer), a wiring layer 15 (second wiring layer), an insulating layer 16 (second insulating layer), and A wiring layer 17 (third wiring layer) is laminated in this order. In each wiring layer, a wiring made of a metal or an alloy is formed, and this wiring is embedded with an insulating material. Each insulating layer is formed of an insulating material, and vias for connecting the wirings formed in the upper and lower wiring layers are embedded. These structures are produced by a semiconductor process.

  Hereinafter, the configuration of each layer will be described in detail. In this specification, for convenience of explanation, two directions orthogonal to each other among the directions parallel to the surface of the substrate 11 and each layer are referred to as an X direction (first direction) and a Y direction (second direction). The direction orthogonal to the surface of the substrate 11 and each layer, that is, the stacking direction of each layer is referred to as the Z direction.

  In the wiring layer 17, a main wiring 21 extending in the X direction is formed. In the wiring layer 15, a plurality of strip-shaped wirings 22 extending in the X direction are formed. The wirings 22 are periodically arranged along the Y direction. Further, in the wiring layer 13, a plurality of strip-shaped wirings 23 extending in the direction between the X direction and the Y direction are formed. The plurality of wirings 23 are parallel to each other and are periodically arranged along the Y direction. Each wiring 23 extends from a region directly below one end of one wiring 22 to a region directly below the other end of the wiring 22 adjacent to the one wiring 22. Furthermore, in the insulating layer 14, vias 24 are formed that connect the end portions of the respective wirings 22 to the end portions of the wirings 23 disposed immediately below the end portions. Thereby, one coil 25 is formed by the plurality of wirings 22, the plurality of wirings 23, and the plurality of vias 24.

  The coil 25 is wound around the central axis C located in the insulating layer 14 and extending in the Y direction in the right screw direction. The coil 25 is separated from the main wiring 21 by the insulating layer 16 and insulated. A wiring 26 formed in the wiring layer 15 is connected to the end of the coil 25 on the + Y direction side. The wiring 26 bypasses the region on the + X direction side when viewed from the coil 25 and is drawn to the −Y direction side. For convenience of illustration, in FIG. 1 and FIG. 3, the insulating material for forming each wiring layer and insulating layer is not shown.

Next, the operation of this embodiment will be described.
When a current flows through the main wiring 21, a magnetic field is generated around the main wiring 21 according to Ampere's law. The direction of the magnetic field is a direction that turns around the main wiring 21 in accordance with the so-called “right-handed screw law”. For example, when a current in the + X direction flows through the main wiring 21, a magnetic field in a substantially −Y direction is generated at the position of the coil 25. That is, a magnetic field is generated in a direction that penetrates the coil 25 along the central axis C of the coil 25. As a result, the magnetic field inside the coil 25 changes, and an induced current is generated in the coil 25. Then, by measuring this induced current, the magnitude of the current flowing through the main wiring 21 can be measured.

Next, the effect of this embodiment will be described.
According to the present embodiment, since the coil 25 is not in contact with the main wiring 21, the current can be measured without consuming the voltage applied to the main wiring 21. As a result, for example, the output current of the switching power supply IC having a low output voltage can be measured with high accuracy.

Further, as described above, in the conventional current measuring method, the annular Rogowski coil is arranged so as to surround the periphery of the wiring to be measured. This is to obtain a stable measurement value regardless of the position of the measured wiring in the Rogowski coil. Another reason is to eliminate the influence of an external magnetic field. On the other hand, in the present embodiment, the main wiring 21 and the coil 25 that are the wirings to be measured are integrated on the same substrate 11, and the relative positional relationship between them is fixed. . For this reason, there is no fluctuation of the induced current due to the fluctuation of the relative positional relationship between them. Further, the main wiring 21 and the coil 25 are only separated by the insulating layer 16, and since both are arranged very close to each other, a large induced current can be obtained, and the influence of external noise is relative. Becomes smaller. As a result, even if the coil 25 is provided only on one side of the main wiring 21, the magnitude of the current flowing through the main wiring 21 can be accurately measured. As a result, the coil 25 can be formed by two wiring layers, and even when combined with the main wiring 21, it can be integrated by three wiring layers. That is, the main wiring 21 and the coil 25 can be formed as long as the number of stacked layers is an integrated circuit device having three or more layers. For example, the main wiring 21 and the coil 25 can be integrated on an electric circuit board or a semiconductor integrated circuit board.
Thus, the integrated circuit device 1 according to the present embodiment can accurately measure the magnitude of the current flowing through the internal wiring with a simple configuration.

Next, a second embodiment of the present invention will be described.
FIG. 4 is a plan view illustrating an integrated circuit device according to this embodiment.
5A is a plan view illustrating the coil 32 shown in FIG. 4, and FIG. 5B is a side view thereof.
6A is a plan view illustrating the coil 33 shown in FIG. 4, and FIG. 6B is a side view thereof.
7 is a cross-sectional view taken along line BB ′ shown in FIG.

  The laminated structure of the integrated circuit device 2 according to this embodiment is the same as that of the first embodiment. That is, as shown in FIG. 7, the insulating layer 12, the wiring layer 13, the insulating layer 14, the wiring layer 15, the insulating layer 16, and the wiring layer 17 are laminated on the substrate 11 in this order. This laminated structure is formed by a semiconductor process.

  As shown in FIG. 4, a U-shaped main wiring 31 is formed in the wiring layer 17. That is, in the wiring 31, a portion 31a extending in the + X direction, a portion 31b extending in the + Y direction from the end portion on the + X direction side of the portion 31a, and a portion 31c extending in the −X direction from the end portion on the + Y direction side in the portion 31b. And are provided. The part 31a and the part 31c are separated from each other. Further, terminals T 1 and T 2 are connected to both ends of the main wiring 31. The terminal T1 is connected to the portion 31a, and the terminal T2 is connected to the portion 31c.

  The integrated circuit device 2 is provided with two coils 32 and 33. The coil 32 is disposed in the region directly below the portion 31a of the main wiring 31, and the coil 33 is disposed in the region directly below the portion 31c. The position of the coil 32 and the position of the coil 33 in the X direction are shifted by, for example, about one coil.

  As shown in FIGS. 5A and 5B and FIGS. 6A and 6B, the configurations of the coils 32 and 33 are the same as those of the coil 25 in the first embodiment. That is, each of the coils 32 and 33 includes the wiring 22, the wiring 23, and the via 24, and is wound around the central axis extending in the Y direction in the direction of the right screw.

  Further, as shown in FIG. 4, wiring 34 is formed in the wiring layer 15. When viewed from above, that is, from the + Z direction, the shape of the wiring 34 is substantially L-shaped. That is, the wiring 34 is linearly drawn in the + Y direction from the end portion on the + Y direction side of the coil 32, passes through the region on the + X direction side of the coil 33, is bent in the −X direction, and is on the + Y direction side in the coil 33. Has reached the end. Thereby, the wiring 34 has connected the edge part by the side of the part 31c in the coil 32 to the + Y direction side in the coil 33, ie, the edge part on the opposite side of the part 31a. The wiring 34 may be routed in a region on the + Y direction side of the coil 33, but is located in a region on the −Y direction side of the edge on the + Y direction side of the portion 31c.

  Furthermore, wirings 35 are formed in the wiring layer 13. When viewed from above, the shape of the wiring 35 is S-shaped. That is, the wiring 35 is drawn in the −Y direction from the end portion on the −Y direction side of the coil 33, bent at a right angle between the portion 31a and the portion 31c, proceeds in the + X direction, and reaches the portion 31b. It bends at a right angle again and proceeds in the −Y direction, passes through the region on the + X direction side of the coil 32, and reaches the terminal T3 disposed on the −Y direction side of the portion 31a. Thereby, one end of the wiring 35 is connected to the −Y direction side of the coil 33, that is, the end portion on the portion 31 a side, and the other end is pulled out to the opposite side (−Y direction side) of the portion 31 c when viewed from the portion 31 a. It is.

  Furthermore, a wiring 36 is formed in the wiring layer 15. The wiring 36 is led out in the −Y direction from the end portion on the −Y direction side of the coil 32 and reaches the terminal T4 provided on the −Y direction side. Accordingly, the wiring 36 connects the end portion of the coil 32 on the −Y direction side to the terminal T4.

  As shown in FIG. 4, when viewed from above, the wiring 34 and the wiring 35 intersect in a region between the portion 31 a and the portion 31 c of the main wiring 31 and form a twisted wiring. When viewed from above, the area R1 surrounded by the portion 31a, the wiring 34, and the wiring 35 of the main wiring 31 is equal to the area of the region R2 surrounded by the portion 31c, the wiring 34, and the wiring 35 of the main wiring 31. equal.

Next, the operation of this embodiment will be described.
FIG. 8 is a plan view illustrating the operation of this embodiment.
9 is a cross-sectional view taken along the line CC ′ shown in FIG.
10 is a cross-sectional view taken along the line DD ′ shown in FIG.
In FIGS. 8 to 10, members other than wiring, vias, and terminals are not shown for easy understanding of the drawings.

  As shown in FIG. 8, when the current I starts to flow through the main wiring 31 from the terminal T1 to the terminal T2, a magnetic field H is generated around the main wiring 31 according to Ampere's law and penetrates the coils 32 and 33. . At this time, since the direction of the magnetic field H follows the right-handed screw law, as shown in FIG. 9, the direction of the magnetic field H that penetrates the coil 32 is the -Y direction, that is, the direction from the front side to the back side in FIG. . On the other hand, as shown in FIG. 10, the direction of the magnetic field H passing through the coil 33 is the + Y direction, that is, the direction from the back of the page to the front in FIG.

  As a result, as shown in FIGS. 9 and 10, an electromotive force is generated in the coils 32 and 33, and this electromotive force is proportional to the differentiation of the current I. Therefore, the differential of the current I can be integrated from the electromotive force, and the magnitude of the current I flowing through the wiring 31 can be measured.

  As shown in FIG. 8, when a current I flows through the main wiring 31 from the terminal T1 to the terminal T2, the magnetic field H penetrates the regions R1 and R2 in the −Z direction, but the magnetic field H penetrates the region R1. The direction of the induced current generated in the wirings 34 and 35 by the above and the direction of the induced current generated in the wirings 34 and 35 by the magnetic field H penetrating the region R2 are opposite to each other. Further, since the area of the region R1 and the area of the region R2 are equal to each other, the magnitudes of the generated electromotive forces are also equal to each other. As a result, the electromotive force generated by the magnetic field H penetrating the region R1 and the electromotive force generated by the magnetic field H penetrating the region R2 are canceled out.

  Furthermore, even when the external magnetic field of the integrated circuit device 2 changes, the electromotive force generated by the magnetic field H penetrating the region R1 and the electromotive force generated by the magnetic field H penetrating the region R2 have the same magnitude and directions. The reverse is true. For this reason, the influence of these external magnetic fields is also canceled.

Next, the effect of this embodiment will be described.
In the present embodiment, as described above, the influence of the external magnetic field can be blocked by disposing the pair of coils 32 and 33 in the regions immediately below the portions 31a and 31c, respectively. As in the first embodiment, the main wiring 31 and the coils 32 and 33 are integrated on the same substrate 11, and the relative positional relationship between the two is fixed. The magnitude of the induced current does not fluctuate due to fluctuations in the relative positional relationship between the two. As a result, even if the coils 32 and 33 are provided only on the lower side of the main wiring 31, the same effect as when the Rogowski coil is provided around the entire circumference of the main wiring 31 can be obtained. As a result, the magnitude of the current flowing through the main wiring 31 can be accurately measured.

  Further, as described above, in the present embodiment, the main wiring 31 is formed in a U shape, and a pair of portions in which the current directions in the main wiring 31 are opposite to each other, that is, the region R1 and the region R2 are paired. Therefore, there is no need to provide a return line as in a normal Rogowski coil in order to cancel the external magnetic field. Based on these results, the coils 32 and 33 can be formed by two wiring layers, and even when combined with the main wiring 31, the configuration of this embodiment can be realized by three wiring layers. As a result, this embodiment can be applied to any integrated circuit device having three or more layers, and the magnitude of the current flowing through the internal wiring can be accurately measured with a simple configuration.

  Further, in the present embodiment as well, as in the first embodiment, the main wiring 31 and the coils 32 and 33 are only separated by the insulating layer 16, and both are arranged very close to each other. Therefore, a large induced current can be obtained. Further, since the current flowing through the main wiring 31 can be measured in a non-contact manner, the voltage applied to the main wiring 31 is not consumed, and the present invention can be applied to an integrated circuit device that is driven at a low voltage. Thus, the integrated circuit device 2 according to this embodiment can accurately measure the magnitude of the current flowing through the internal wiring with a simple configuration.

  In the first and second embodiments described above, an example is shown in which the coil is provided on the substrate and the main wiring is provided thereon, but the present invention is not limited to this, The main wiring is provided on the substrate, the coil may be provided thereon, and the coil may be provided on the side of the main wiring.

Next, a third embodiment of the present invention will be described.
FIG. 11 is a plan view illustrating an integrated circuit device according to this embodiment.
As shown in FIG. 11, the integrated circuit device 3 according to the present embodiment is a semiconductor IC chip. In the integrated circuit device 3, an integrating circuit 41 is provided on the substrate 11 in addition to the configuration of the integrated circuit device 2 (see FIG. 4) according to the second embodiment described above. The integration circuit 41 is formed on the substrate 11 by a multilayer wiring CMOS (Complementary Metal Oxide Semiconductor) process together with the main wiring 32 and the induced current path. The integrating circuit 41 is connected to the wirings 35 and 36, and integrates the differential value of the current I flowing through the main wiring 31 obtained from the electromotive force of the coils 32 and 33 described above. This integration result corresponds to the magnitude of the current I flowing through the main wiring 31.

  According to the present embodiment, the electromotive force of the coils 32 and 33 is input to the integrating circuit 41, and the integrating circuit 41 integrates the differential value of the current I flowing through the main wiring 31 obtained from the electromotive force, whereby the current I Can be measured. Further, the main wiring 31, the induced current path including the coils 32 and 33, and the integrating circuit 41 can be formed monolithically by a multilayer wiring CMOS process. Thus, a single semiconductor IC chip can output a current and measure the magnitude of this current. Configurations, operations, and effects other than those described above in the present embodiment are the same as those in the second embodiment described above.

  In the present embodiment, a correction circuit that corrects the operation of the integration circuit 41 may be provided on the substrate 11. In this correction circuit, for example, a fuse for adjusting a resistance value is provided. The fuse is a film made of, for example, polysilicon. After the integrated circuit device 3 is manufactured, the resistance value can be adjusted by partially burning the film with a laser beam.

Next, a fourth embodiment of the present invention will be described.
FIG. 12 is an exploded perspective view illustrating an integrated circuit device according to this embodiment.
FIG. 13 is a plan view illustrating the semiconductor IC chip shown in FIG.
As shown in FIG. 12, in the integrated circuit device 4 according to the present embodiment, a circuit board 51 and a semiconductor IC chip 52 are provided. The semiconductor IC chip 52 is mounted on the circuit board 51 by, for example, flip chip connection.

  The circuit board 51 is, for example, FR4 (Flame Retardant Type 4). On the surface of the circuit board 51, main wiring 31 constituting the main circuit of the circuit board 51 is formed. On the other hand, as shown in FIG. 13, the configuration of the semiconductor IC chip 52 is a configuration in which the main wiring 31 is removed from the configuration of the integrated circuit device 3 (see FIG. 11) according to the third embodiment. That is, the substrate 11 is provided on the semiconductor IC chip 52, and the dielectric current path including the coils 32 and 33 and the integration circuit 41 are provided on the surface of the substrate 11 facing the circuit board 51. . Since the circuit board 51 and the semiconductor IC chip 52 are flip-chip connected, the coils 32 and 33 are arranged on one side of the main wiring 31 and fixed to the main wiring 31. When viewed from the direction perpendicular to the surface of the circuit board 51, the positional relationship between the main wiring 31 formed on the circuit board 51 and the coils 32 and 33 formed on the semiconductor IC chip 52 is as described above. This is the same as the embodiment.

Next, the operation of this embodiment will be described.
When a current flows through the main wiring 31 of the circuit board 51, a magnetic field generated by this current passes through the coils 32 and 33 of the semiconductor IC chip 52 and generates an electromotive force. The integrating circuit 41 integrates this electromotive force (proportional to the differentiation of the current I). Thereby, the magnitude of the current flowing through the main wiring 31 can be measured without inserting a sense component into the main circuit of the circuit board 51. At this time, since the positions of the coils 32 and 33 are fixed with respect to the main wiring 31, even if the coils 32 and 33 are arranged only on one side of the main wiring 31, the current flowing through the main wiring 31 can be accurately measured. Can be measured. Configurations, operations, and effects other than those described above in the present embodiment are the same as those in the third embodiment described above.

Next, a fifth embodiment of the present invention will be described.
FIG. 14 is a plan view illustrating an integrated circuit device according to this embodiment.
As shown in FIG. 14, in the integrated circuit device 5 according to the present embodiment, the portion 31b of the main wiring 31 is removed from the configuration of the integrated circuit device 3 (see FIG. 11) according to the third embodiment described above. The semiconductor switch SW is connected between the portion 31a and the portion 31c of the main wiring 31. The semiconductor switch SW is not integrated on the substrate 11 and constitutes an independent element. The integrated circuit device 5 functions as a switching power supply. Thus, according to this embodiment, the magnitude of the current flowing through the semiconductor switch SW can be measured. Configurations, operations, and effects other than those described above in the present embodiment are the same as those in the third embodiment described above.

Next, a sixth embodiment of the present invention will be described.
FIG. 15 is a plan view illustrating an integrated circuit device according to this embodiment.
As shown in FIG. 15, in this embodiment, the semiconductor switch SW (see FIG. 14) is replaced with a high-side MOSFET (Metal Oxide Semiconductor Field Effect Transistor: metal oxide semiconductor) in the fifth embodiment (see FIG. 14). This is an example of a field effect transistor.

In the present embodiment, a DC-DC converter multichip module (MCM) 61 is provided. In this MCM 61, a high-side MOSFET chip 63, a low-side MOSFET chip 64, and a semiconductor IC chip 65 are mounted on a substrate 62 such as FR4. The high-side MOSFET chip 63 and the low-side MOSFET chip 64 are connected in series between the power supply potential Vin and the ground potential GND in this order, and the connection point Vx between them is connected to the output terminal Vout via the inductor R. Has been.

  In addition to the induction current path including the coils 32 and 33 and the integration circuit 41, the semiconductor IC chip 65 is formed with a driver circuit 66 that controls the high-side MOSFET chip 63 and the low-side MOSFET chip 64. The coils 32 and 33 are arranged in the vicinity of the source wiring and drain wiring of the high-side MOSFET chip 63, respectively. The direction of the current flowing through the source wiring and the direction of the current flowing through the drain wiring are opposite to each other, and are orthogonal to the direction in which the central axis of the coil 32 and the central axis of the coil 33 extend.

  Further, the MCM 61 is provided with a control IC 67 that receives the output signal of the integrating circuit 41 and controls the driver circuit 66 based on the output signal. Thereby, the control IC 67 controls the operation of the high side MOSFET chip 63 based on the result of the integration circuit 41 integrating the induced current generated in the coils 32 and 33. That is, the output current is controlled based on the measured value of the output current of the MCM 61.

  In this embodiment, by monitoring the current flowing through the high-side MOSFET chip 63, the output current of the MCM 61, that is, the magnitude of the current flowing from the connection point Vx to the output terminal Vout is detected in the high-side MOSFET chip 63. Can be measured without inserting. Based on the measured current magnitude, the control IC 67 can control the high-side MOSFET chip 63 via the driver circuit 66 to adjust the magnitude of the output current of the MCM 61. Thereby, feedback control of the output current of MCM61 is possible.

  Further, since the positions of the coils 32 and 33 formed on the semiconductor IC chip 65 are fixed with respect to the source wiring and drain wiring of the high-side MOSFET chip 63 to be measured, the current flowing through the high-side MOSFET chip 63 Can be accurately measured.

  Furthermore, according to the present embodiment, a high-side MOSFET chip 63 and a low-side MOSFET chip 64 are connected in series between the power supply potential Vin and the ground potential GND, thereby forming a switching power supply that quickly rises even with a small current. can do. Thereby, a sufficiently large electromotive force can be obtained in the coils 32 and 33, and the output current can be accurately measured. Such a switching power supply can be used as, for example, a low voltage switching power supply with an output voltage of about 1 V for personal computers.

Next, a seventh embodiment of the present invention will be described.
FIG. 16 is a plan view illustrating an integrated circuit device according to this embodiment.
As shown in FIG. 16, in this embodiment, a high side MOSFET 73, a low side MOSFET 74, an integration circuit 41, and a driver circuit 66 are integrated on one chip 72. Configurations, operations, and effects other than those described above in the present embodiment are the same as those in the above-described sixth embodiment.

Next, an eighth embodiment of the present invention will be described.
FIG. 17 is a plan view illustrating an integrated circuit device according to this embodiment.
As shown in FIG. 17, in this embodiment, a control circuit 77 is also integrated in the chip 72 in the seventh embodiment. The driver circuit is divided into a driver circuit 66 a that controls the high-side MOSFET 73 and a driver circuit 66 b that controls the low-side MOSFET 74. Configurations, operations, and effects other than those described above in the present embodiment are the same as those in the seventh embodiment described above.

  The present invention has been described above with reference to the embodiment. However, the present invention is not limited to this embodiment. For example, those in which those skilled in the art appropriately added, deleted, and changed the design of the above-described embodiments are also included in the scope of the present invention as long as they have the gist of the present invention.

1 is a plan view illustrating an integrated circuit device according to a first embodiment of the invention; It is sectional drawing by the A-A 'line | wire shown in FIG. It is a perspective view which illustrates a coil of a 1st embodiment. 6 is a plan view illustrating an integrated circuit device according to a second embodiment of the invention; FIG. (A) is a top view which illustrates the coil 32 shown in FIG. 4, (b) is the side view. (A) is a top view which illustrates the coil 33 shown in FIG. 4, (b) is the side view. It is sectional drawing by the B-B 'line shown in FIG. It is a top view which illustrates operation | movement of 2nd Embodiment. It is sectional drawing by the C-C 'line shown in FIG. It is sectional drawing by the D-D 'line | wire shown in FIG. FIG. 6 is a plan view illustrating an integrated circuit device according to a third embodiment of the invention. FIG. 6 is an exploded perspective view illustrating an integrated circuit device according to a fourth embodiment of the invention. FIG. 13 is a plan view illustrating the semiconductor IC chip illustrated in FIG. 12. 10 is a plan view illustrating an integrated circuit device according to a fifth embodiment of the invention; FIG. FIG. 10 is a plan view illustrating an integrated circuit device according to a sixth embodiment of the invention. 10 is a plan view illustrating an integrated circuit device according to a seventh embodiment of the invention; FIG. It is a top view which illustrates the integrated circuit device which concerns on the 8th Embodiment of this invention.

Explanation of symbols

1, 2, 3, 4, 5 integrated circuit device, 11 substrate, 12, 14, 16 insulating layer, 13, 15, 17 wiring layer, 21, 31 main wiring, 22, 23, 26, 34, 35, 36 wiring , 24 Via, 25, 32, 33 Coil, 31a, 31b, 31c part, 41 integration circuit, 51 circuit board, 52 semiconductor IC chip, SW semiconductor switch, 61 DC-DC converter multichip module (MCM), 62 board, 63 High-side MOSFET chip, 64 Low-side MOSFET chip, 65 Semiconductor IC chip, 66, 66a, 66b Driver circuit, 67 Control IC, 72 chip, 73 High-side MOSFET, 74 Low-side MOSFET, 77 Control circuit, C center axis, GND Ground potential, H field, I current, _{I H} induced current, R inductor, R1, R Region, T1, T2, T3, T4 terminal, Vin the power supply potential, Vout output terminal, Vx connection point

Claims (4)

An integrated circuit device in which a first wiring layer, a first insulating layer, a second wiring layer, a second insulating layer, and a third wiring layer are laminated in this order,
A main wiring formed in the third wiring layer and extending in a first direction parallel to the surface of the first wiring layer;
Formed by wiring formed in the first wiring layer, wiring formed in the second wiring layer, and via formed in the first insulating layer, the central axis is the surface of the first wiring layer Extending in a direction parallel to the first direction and intersecting the first direction;
An integrated circuit device comprising: An integrated circuit device in which a first wiring layer, a first insulating layer, a second wiring layer, a second insulating layer, and a third wiring layer are laminated in this order,
A first portion formed in the third wiring layer and extending in a first direction parallel to the surface of the first wiring layer; and a second portion extending in the opposite direction to the first direction. Main wiring,
Formed by a wiring formed in the first wiring layer, a wiring formed in the second wiring layer, and a via formed in the first insulating layer, disposed in a region immediately below the first portion. A first coil extending in a second direction having a central axis parallel to the surface of the first wiring layer and perpendicular to the first direction;
Formed by a wiring formed in the first wiring layer, a wiring formed in the second wiring layer, and a via formed in the first insulating layer, and disposed in a region immediately below the second portion. A second coil having a central axis extending in the second direction;
Formed in one of the first wiring layer and the second wiring layer, the end of the first coil on the second portion side is the end of the second coil on the opposite side of the first portion. A first wiring connected to the section;
It is formed in the other of the first wiring layer and the second wiring layer, one end is connected to the end of the second coil on the first portion side, and the other end is viewed from the first portion. A second wiring drawn to the opposite side of the second portion;
With
The shape and winding direction of the first coil are equal to the shape and winding direction of the second coil, respectively.
When viewed from a direction orthogonal to the surface of the first wiring layer, the first wiring intersects with the second wiring and is surrounded by the first portion, the first wiring, and the second wiring. The area of the region is equal to the area of the region surrounded by the second portion, the first wiring, and the second wiring. Before Symbol first wiring layer, said first insulating layer, said second wiring layer, the substrate having the second insulating layer and the third wiring layers are stacked,
An integration circuit that is provided on the substrate and integrates an induced current generated in the coil due to a current flowing through the main wiring;
Integrated circuit device according to claim 1 or 2, further comprising a. A switching element for switching whether to output the power supplied from the power supply wiring to the output terminal, and
A control circuit for controlling the switching element;
Further comprising
4. The integrated circuit device according to claim 3 , wherein the control circuit controls the switching element based on a result of the integration circuit integrating the induced current.

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