JP5153089B2 - 半導体集積回路の検査方法 - Google Patents
半導体集積回路の検査方法 Download PDFInfo
- Publication number
- JP5153089B2 JP5153089B2 JP2006151862A JP2006151862A JP5153089B2 JP 5153089 B2 JP5153089 B2 JP 5153089B2 JP 2006151862 A JP2006151862 A JP 2006151862A JP 2006151862 A JP2006151862 A JP 2006151862A JP 5153089 B2 JP5153089 B2 JP 5153089B2
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- wiring
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- test pad
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- 239000004065 semiconductor Substances 0.000 title claims description 61
- 238000000034 method Methods 0.000 title claims description 37
- 238000007689 inspection Methods 0.000 title claims description 10
- 238000012360 testing method Methods 0.000 claims description 271
- 238000005520 cutting process Methods 0.000 claims description 4
- 238000010998 test method Methods 0.000 claims 2
- 238000005259 measurement Methods 0.000 description 40
- 230000006870 function Effects 0.000 description 32
- 238000012937 correction Methods 0.000 description 12
- 230000002950 deficient Effects 0.000 description 11
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 7
- 229910052782 aluminium Inorganic materials 0.000 description 7
- 239000004020 conductor Substances 0.000 description 7
- 230000003071 parasitic effect Effects 0.000 description 6
- 238000010586 diagram Methods 0.000 description 4
- 238000000605 extraction Methods 0.000 description 3
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- 238000013461 design Methods 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
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- 238000012356 Product development Methods 0.000 description 1
- 241001422033 Thestylus Species 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000001934 delay Effects 0.000 description 1
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- 239000000284 extract Substances 0.000 description 1
- 230000020169 heat generation Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
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- 230000002093 peripheral effect Effects 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 230000002441 reversible effect Effects 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000012795 verification Methods 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
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- Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006151862A JP5153089B2 (ja) | 2006-05-31 | 2006-05-31 | 半導体集積回路の検査方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006151862A JP5153089B2 (ja) | 2006-05-31 | 2006-05-31 | 半導体集積回路の検査方法 |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2012237464A Division JP5470436B2 (ja) | 2012-10-29 | 2012-10-29 | 半導体集積回路 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2007324319A JP2007324319A (ja) | 2007-12-13 |
| JP2007324319A5 JP2007324319A5 (https=) | 2009-05-28 |
| JP5153089B2 true JP5153089B2 (ja) | 2013-02-27 |
Family
ID=38856851
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2006151862A Expired - Fee Related JP5153089B2 (ja) | 2006-05-31 | 2006-05-31 | 半導体集積回路の検査方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP5153089B2 (https=) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9704862B2 (en) | 2014-09-18 | 2017-07-11 | Samsung Electronics Co., Ltd. | Semiconductor devices and methods for manufacturing the same |
| US9767248B2 (en) | 2014-09-18 | 2017-09-19 | Samsung Electronics, Co., Ltd. | Semiconductor having cross coupled structure and layout verification method thereof |
| US9811626B2 (en) | 2014-09-18 | 2017-11-07 | Samsung Electronics Co., Ltd. | Method of designing layout of semiconductor device |
| US10095825B2 (en) | 2014-09-18 | 2018-10-09 | Samsung Electronics Co., Ltd. | Computer based system for verifying layout of semiconductor device and layout verify method thereof |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10026661B2 (en) | 2014-09-18 | 2018-07-17 | Samsung Electronics Co., Ltd. | Semiconductor device for testing large number of devices and composing method and test method thereof |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62224045A (ja) * | 1986-03-26 | 1987-10-02 | Toshiba Corp | モニタパツドセル |
| JP2954076B2 (ja) * | 1997-04-09 | 1999-09-27 | 広島日本電気株式会社 | 半導体集積回路ウェハ及びその試験方法 |
-
2006
- 2006-05-31 JP JP2006151862A patent/JP5153089B2/ja not_active Expired - Fee Related
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9704862B2 (en) | 2014-09-18 | 2017-07-11 | Samsung Electronics Co., Ltd. | Semiconductor devices and methods for manufacturing the same |
| US9767248B2 (en) | 2014-09-18 | 2017-09-19 | Samsung Electronics, Co., Ltd. | Semiconductor having cross coupled structure and layout verification method thereof |
| US9811626B2 (en) | 2014-09-18 | 2017-11-07 | Samsung Electronics Co., Ltd. | Method of designing layout of semiconductor device |
| US10002223B2 (en) | 2014-09-18 | 2018-06-19 | Samsung Electronics Co., Ltd. | Method of designing layout of semiconductor device |
| US10095825B2 (en) | 2014-09-18 | 2018-10-09 | Samsung Electronics Co., Ltd. | Computer based system for verifying layout of semiconductor device and layout verify method thereof |
| US10242984B2 (en) | 2014-09-18 | 2019-03-26 | Samsung Electronics Co., Ltd. | Semiconductor devices and methods for manufacturing the same |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2007324319A (ja) | 2007-12-13 |
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