JP5130712B2 - Plasma display panel - Google Patents

Description

  The present invention relates to a plasma display panel used as a display device of a plasma display apparatus.

  Panels used in this plasma display device are roughly classified into AC type and DC type in terms of driving, and there are two types of discharge types: surface discharge type and counter discharge type. Due to the simplicity of manufacturing, at present, the mainstream of plasma display panels is a surface discharge type of a three-electrode structure.

  In this surface discharge type plasma display panel, at least a pair of substrates transparent at least on the front side are arranged to face each other so that a discharge space is formed between the substrates, and partition walls for partitioning the discharge space are arranged on the substrate. In addition, a plurality of discharge cells are configured by arranging an electrode group on the substrate so that discharge is generated in a discharge space partitioned by the partition walls, and providing phosphors that emit red, green, and blue light emitted by discharge. Thus, the phosphor is excited by vacuum ultraviolet light having a short wavelength generated by discharge, and red, green, and blue visible light is emitted from the red, green, and blue discharge cells, respectively, to perform color display.

  Such a plasma display panel can display at a higher speed than a liquid crystal panel, has a wide viewing angle, is easy to increase in size, and is a self-luminous type because of its high display quality. Recently, the flat panel display has attracted particular attention and is used for various purposes as a display device in a place where many people gather and a display device for enjoying a large screen image at home.

In such a plasma display device, a circuit constituting a driving circuit for holding a panel made mainly of glass on the front side of a chassis member made of metal such as aluminum and causing the panel to emit light on the back side of the chassis member. A module is configured by arranging a substrate (see Patent Document 1).
JP 2003-131580 A

  By the way, in the plasma display device, since it is easy to realize a large screen, products having a size of 65 inches or more have been manufactured and sold in recent years. Further, as demand for higher-definition displays increases, products with higher definition of 1080 × 1920 have been manufactured from products with a definition of 768 × 1366, which has been the mainstream until now.

  As the plasma display panel increases in screen size and definition, it is necessary to review the parts that make up the product.

  The present invention has been made in view of such a current situation, and an object thereof is to provide a plasma display panel suitable for enlargement of screen and high definition.

The present invention in order to solve this problem, a front panel, a back panel forming a partition wall and a phosphor layer, multiple area shape is that Do different of the partition wall is present in the rear panel plane, The boundary of the plurality of regions is a substantially straight line dividing the long side direction or the short side direction of the back panel, the boundary is the top of the partition wall, and the phosphor layer has the same color in the longitudinal direction of the boundary. The phosphor layer disposed and adjacent to the boundary is a plasma display panel, which is a blue phosphor layer and a green phosphor layer.

  According to the present invention, it is possible to realize a large panel screen while maintaining a predetermined display quality.

  Hereinafter, although the plasma display panel by one Embodiment of this invention is demonstrated using FIGS. 1-10, the aspect of this invention is not limited to this.

  First, the structure of the plasma display panel will be described with reference to FIG. As shown in FIG. 1, the plasma display panel is composed of a front panel 1 and a back panel 2, and the front panel 1 and the back panel 2 are arranged to face each other with a discharge space therebetween, and a peripheral portion is formed. It is configured by sealing with a sealing material (not shown) made of glass frit and sealing a discharge gas, for example, a mixed gas of neon and xenon in the discharge space.

  The front panel 1 is formed by forming a scanning electrode 4 as a first electrode and a sustaining electrode 5 as a second electrode facing each other with a discharge gap formed on a glass front substrate 3 in parallel with each other. And a dielectric layer 6 made of a glass material so as to cover the scan electrodes 4 and the sustain electrodes 5, and a protective layer made of MgO on the dielectric layer 6 7 is formed. Further, the scanning electrode 4 and the sustain electrode 5 are respectively composed of transparent electrodes 4a and 5a made of ITO, and bus electrodes 4b and 5b made of a conductive material such as Ag formed on the transparent electrodes 4a and 5a. It is configured.

  The back panel 2 has a plurality of data electrodes 10 made of a conductive material such as Ag covered on an insulating layer 9 made of a glass material on a glass back substrate 8 disposed to face the front substrate 3. And a grid-shaped partition wall 11 for partitioning the discharge space between the front panel 1 and the insulator layer 9, and red, green and blue phosphor layers 12 are disposed between the partition walls 11. It is comprised by. The data electrode 10 of the back panel 2 is formed so as to intersect the scan electrode 4 and the sustain electrode 5 of the front panel 1 between the partition walls 11. Each discharge cell is formed at the intersection with the data electrode 10.

  Further, a black light shielding layer 13 is provided between the scanning electrode 4 and the sustaining electrode 5 of the front panel 1 in order to improve contrast.

  Note that the structure of the panel is not limited to the above-described structure, and for example, a structure having a stripe-shaped partition may be used. In the example shown in FIG. 1, the scan electrode 4 and the sustain electrode 5 are arranged like the scan electrode 4 -the sustain electrode 5 -the scan electrode 4 -the sustain electrode 5. Although an example in which these are alternately arranged is shown, an arrangement of electrodes arranged like scan electrode 4 -sustain electrode 5 -sustain electrode 5 -scan electrode 4.

  FIG. 2 is an electrode array diagram of the panel shown in FIG. N scan electrodes SC1 to SCn (scan electrode 4 in FIG. 1) and n sustain electrodes SU1 to SUn (sustain electrode 5 in FIG. 1) are arranged in the row direction, and m data electrodes D1 to D1 are arranged in the column direction. Dm (data electrode 10 in FIG. 1) is arranged. A discharge cell is formed at a portion where a pair of scan electrode SCi and sustain electrode SUi (i = 1 to n) and one data electrode Dj (j = 1 to m) intersect, and the discharge cell is in the discharge space. M × n are formed.

  FIG. 3 is a circuit block diagram of a plasma display device using this panel. The plasma display device includes a panel 21, an image signal processing circuit 22, a data electrode drive circuit 23, a scan electrode drive circuit 24, a sustain electrode drive circuit 25, a timing generation circuit 26, and a power supply circuit (not shown).

  The image signal processing circuit 22 converts the image signal sig into image data for each subfield. The data electrode drive circuit 23 converts the image data for each subfield into signals corresponding to the data electrodes D1 to Dm, and drives the data electrodes D1 to Dm. The timing generation circuit 26 generates various timing signals based on the horizontal synchronization signal H and the vertical synchronization signal V, and supplies them to each drive circuit block. Scan electrode drive circuit 24 supplies drive voltage waveforms to scan electrodes SC1 to SCn based on timing signals, and sustain electrode drive circuit 25 supplies drive voltage waveforms to sustain electrodes SU1 to SUn based on timing signals. Here, the scan electrode drive circuit 24 and the sustain electrode drive circuit 25 include a sustain pulse generator 27.

  Next, a driving voltage waveform for driving the panel and its operation will be described with reference to FIG. FIG. 4 is a diagram showing drive voltage waveforms applied to the respective electrodes of the panel.

  In the plasma display device according to the present embodiment, one field is divided into a plurality of subfields, and each subfield has an initialization period, an address period, and a sustain period.

  In the initializing period of the first subfield, the data electrodes D1 to Dm and the sustain electrodes SU1 to SUn are held at 0 (V), and from the voltage Vi1 (V) that is lower than the discharge start voltage with respect to the scan electrodes SC1 to SCn. A ramp voltage that gradually increases toward the voltage Vi2 (V) exceeding the discharge start voltage is applied. Then, the first weak initializing discharge is caused in all the discharge cells, negative wall voltages are stored on scan electrodes SC1 to SCn, and positive walls on sustain electrodes SU1 to SUn and data electrodes D1 to Dm. The voltage is stored. Here, the wall voltage on the electrode refers to a voltage generated by wall charges accumulated on the dielectric layer or the phosphor layer covering the electrode.

  Thereafter, sustain electrodes SU1 to SUn are maintained at positive voltage Vh (V), and a ramp voltage that gradually decreases from voltage Vi3 (V) to voltage Vi4 (V) is applied to scan electrodes SC1 to SCn. Then, the second weak initializing discharge is caused in all the discharge cells, the wall voltage between scan electrodes SC1 to SCn and sustain electrodes SU1 to SUn is weakened, and the wall voltage on data electrodes D1 to Dm is reduced. Is also adjusted to a value suitable for the write operation.

  In the subsequent address period, scan electrodes SC1 to SCn are temporarily held at Vr (V). Next, negative scan pulse voltage Va (V) is applied to scan electrode SC1 in the first row, and data electrode Dk (k = 1 to 1) of the discharge cell to be displayed in the first row among data electrodes D1 to Dm. A positive write pulse voltage Vd (V) is applied to m). At this time, the voltage at the intersection between the data electrode Dk and the scan electrode SC1 is obtained by adding the wall voltage on the data electrode Dk and the wall voltage on the scan electrode SC1 to the externally applied voltage (Vd−Va) (V). And the discharge start voltage is exceeded. Then, an address discharge occurs between data electrode Dk and scan electrode SC1 and between sustain electrode SU1 and scan electrode SC1, and a positive wall voltage is accumulated on scan electrode SC1 of this discharge cell, and on sustain electrode SU1. And a negative wall voltage is also accumulated on the data electrode Dk.

  In this manner, an address operation is performed in which address discharge is caused in the discharge cells to be displayed in the first row and wall voltage is accumulated on each electrode. On the other hand, the voltage at the intersection of the data electrodes D1 to Dm and the scan electrode SC1 to which the address pulse voltage Vd (V) is not applied does not exceed the discharge start voltage, so that address discharge does not occur. The above address operation is sequentially performed until the discharge cell in the nth row, and the address period ends.

  In the subsequent sustain period, positive sustain pulse voltage Vs (V) is applied to scan electrodes SC1 to SCn as a first voltage, and ground potential, that is, 0 (V) is applied to sustain electrodes SU1 to SUn as a second voltage. Apply. In the discharge cell in which the address discharge has occurred at this time, the voltage between scan electrode SCi and sustain electrode SUi is the sustain pulse voltage Vs (V), the wall voltage on scan electrode SCi and the wall voltage on sustain electrode SUi. Is added and exceeds the discharge start voltage. Then, a sustain discharge occurs between scan electrode SCi and sustain electrode SUi, and the phosphor layer emits light due to the ultraviolet rays generated at this time. Then, a negative wall voltage is accumulated on scan electrode SCi, and a positive wall voltage is accumulated on sustain electrode SUi. At this time, a positive wall voltage is also accumulated on the data electrode Dk.

  In the discharge cells in which no address discharge has occurred in the address period, no sustain discharge occurs, and the wall voltage at the end of the initialization period is maintained. Subsequently, 0 (V) that is the second voltage is applied to scan electrodes SC1 to SCn, and sustain pulse voltage Vs (V) that is the first voltage is applied to sustain electrodes SU1 to SUn. Then, in the discharge cell in which the sustain discharge has occurred, the voltage between the sustain electrode SUi and the scan electrode SCi exceeds the discharge start voltage, so that the sustain discharge occurs again between the sustain electrode SUi and the scan electrode SCi, Negative wall voltage is accumulated on sustain electrode SUi, and positive wall voltage is accumulated on scan electrode SCi.

  Thereafter, similarly, by applying sustain pulses of the number corresponding to the luminance weight alternately to scan electrodes SC1 to SCn and sustain electrodes SU1 to SUn, the sustain discharge continues in the discharge cells that have caused the address discharge in the address period. Done. Thus, the maintenance operation in the maintenance period is completed.

  The operations in the initialization period, address period, and sustain period in the subsequent subfield are substantially the same as those in the first subfield, and thus description thereof is omitted.

  FIG. 5 shows an example of the overall configuration of a plasma display device incorporating the panel having the structure described above.

  In the figure, reference numeral 31 denotes a chassis member as a holding plate that also serves as a heat sink made of metal such as aluminum. On the front side of the chassis member 31, a panel 21 is disposed between the chassis member 31 and a heat dissipation sheet (not shown). ) Is interposed and adhered by an adhesive or the like. A plurality of drive circuit blocks (not shown) for displaying and driving the panel 21 are arranged on the rear side of the chassis member 31, thereby constituting a module.

  Here, the heat-dissipating sheet is used for adhering and holding the panel 21 to the front side of the chassis member 31, efficiently transferring heat generated in the panel 21 to the chassis member 31, and performing heat dissipation. Is about 1 mm to 2 mm. As this heat radiating sheet, an insulating heat radiating sheet in which a synthetic resin material such as acrylic, urethane, silicon resin, or rubber contains a filler that enhances thermal conductivity, a graphite sheet, a metal sheet, or the like can be used. In addition, the heat radiation sheet itself has an adhesive force, and the panel 21 is bonded to the chassis member 31 with only the heat radiation sheet, or the heat radiation sheet has no adhesive force, and another double-sided adhesive tape is used for the panel 21. The structure etc. which adhere | attach to the chassis member 31 can be used.

  In addition, flexible wiring boards 32 serving as display electrode wiring members connected to the electrode lead portions of the scan electrodes 4 and the sustain electrodes 5 are provided on both side edge portions of the panel 21, and the rear side passes through the outer peripheral portion of the chassis member 31. And connected to the drive circuit block of the scan electrode drive circuit 24 and the drive circuit block of the sustain electrode drive circuit 25 via a connector.

  On the other hand, a plurality of flexible wiring boards 33 as data electrode wiring members connected to the electrode lead-out portions of the data electrodes 10 are provided at the lower and upper edge portions of the panel 21. Data that is electrically connected to each of the plurality of data drivers of the electrode drive circuit 23, is routed to the back side through the outer peripheral portion of the chassis member 31, and is arranged at the lower and upper positions on the back side of the chassis member 31. The drive circuit block of the electrode drive circuit 23 is electrically connected.

  Further, a cooling fan 34 is disposed in the vicinity of the drive circuit block while being held at an angle 35, and the drive circuit block is cooled by the wind sent from the cooling fan 34. Further, at the upper position of the chassis member 31, the drive circuit block of the data electrode drive circuit 23 arranged at the upper position is cooled, and on the back side of the chassis member 31, the air is moved from the lower part to the upper part inside the entire apparatus. Three cooling fans 36 that cool the inside of the apparatus by causing the flow are arranged.

  Further, reinforcing angles 37 and 38 are fixed to the chassis member 31 in the horizontal direction and the vertical direction, and the angle 37 arranged in the horizontal direction is a stand for holding the apparatus in an upright state. The pole 39 is fixed with a screw or the like.

  The module having the above structure is accommodated in a housing having a front protective cover 40 disposed on the front side of the panel 21 and a metal back cover 41 disposed on the rear side of the chassis member 31. This completes the plasma display device. Here, the front protective cover 40 is attached to the front frame 42 made of resin or metal having an opening 42a from which the image display area on the front side of the panel 21 is exposed, and the opening 42a of the front frame 42, and And a protective plate 43 made of glass or the like provided with an unnecessary radiation suppression film for suppressing unnecessary radiation of an optical filter or electromagnetic wave, and the protective plate 43 has a front frame around the periphery of the protective plate 43. It is attached to the front frame 42 by being sandwiched between a peripheral edge portion of the opening 42a of 42 and a protective plate pressing metal fitting (not shown). Further, the back cover 41 is provided with a plurality of ventilation holes (not shown) for releasing heat generated in the module to the outside.

  In FIG. 5, reference numeral 44 denotes a screw for attaching the back cover 41 to the chassis member 31, and 45 denotes a gripping part attached to the back cover 41 with a screw or the like.

  Next, a characteristic configuration of the present invention for realizing a large screen of the plasma display panel will be described.

  First, as a method of forming each component of the plasma display panel, when forming a pattern on the photosensitive material layer formed on the substrate, the photosensitive material on the substrate is passed through a photomask on which a predetermined pattern is drawn. An exposure process for exposing the conductive material layer is used. In addition, with the development of larger screens, it is necessary to expose a wide area that does not fit in the exposure area of the exposure apparatus in the exposure process. As a method for realizing such a large area exposure, the exposure area is divided into a plurality of small areas. An exposure method in which exposure is performed by dividing into regions is used.

  FIG. 6 is a diagram showing a divided exposure method used in the present invention. An exposure method in the case where the photosensitive material layer 52 applied and formed on the substrate 51 is exposed through a photomask 53 is shown.

  6A is a plan view when the left area of the substrate 51 is exposed, FIG. 6B is a cross-sectional view taken along the line HH in FIG. 6A, and FIG. HH line sectional drawing in the case of exposing the right area is shown. As shown in FIG. 6, a photosensitive material layer 52 such as a silver paste for forming the constituent parts of the plasma display panel is formed on the substrate 51, and a photomask 53 is exposed on the upper left area of the substrate 51. The conductive material layer 52 is spaced apart by a predetermined distance. The photomask 53 is provided with an opening 53a.

  As shown in FIG. 6, since the substrate 51 is larger than the photomask 53, the photomask 53 is moved in the direction of the arrow K, divided into two left and right areas, and divided into two times over the entire region of the substrate 51. Divide exposure. The photomask 53 is provided with, for example, an opening 53a for forming an electrode pattern of a plasma display panel. From an exposure light source (not shown) provided above the photomask 53 through the opening 53a, the photomask 53 is photosensitive. The material layer 52 is exposed. 52a and 52b are exposure parts in the left and right regions, and 52c is a joint part. In the present embodiment, the unexposed area of the photosensitive material layer 52 is removed in the next development step.

  FIGS. 7A and 7B are schematic plan views of the plasma display panel in which constituent parts are formed by such a divided exposure method, as viewed from the front panel 1 and the back panel 2 side. As shown in FIGS. 7A and 7B, cross-shaped alignment marks 1a and 2a are provided at the center of the upper and lower ends of the long side of the front panel 1 and the back panel 2, The alignment marks 1a and 2a are used so that the front mask 3 and the rear substrate 8 corresponding to the substrate 51 can be aligned with the photomask 53 when the divided exposure method shown in FIG. ing. The alignment mark 1a on the front panel 1 is formed simultaneously with ITO when the transparent electrodes 4a and 5a shown in FIG. 1 are formed on the front substrate 3, and the alignment mark 2a on the back panel 2 is formed on the data electrode 10 shown in FIG. Are formed simultaneously with a conductive material such as Ag.

  As described above, the alignment marks 1a and 2a are provided in the center portions of the upper and lower ends of the long side of the front panel 1 and the back panel 2, and the division exposure method shown in FIG. 6 is performed using the alignment marks 1a and 2a. By aligning the substrate and the photomask when they are used, the components constituting the plasma display panel can be divided into a plurality of regions as shown in FIG. The region formed in this manner can be formed in a state in which the display quality is maintained at a predetermined quality, and a large screen of the panel can be realized.

  By the way, when forming a constituent part of a plasma display panel using such a divided exposure method, depending on the shape of the boundary part that is a connecting part of a plurality of divided areas, it may be visually recognized by human eyes. In the present invention, the configuration shown in FIGS. 8 to 11 is adopted because the lighting and appearance of the lighting are impaired and the display quality is adversely affected.

  8 to 11 are views for explaining an example of the back panel according to the present invention, in which 12R is a red phosphor layer, 12G is a green phosphor layer, and 12B is a blue phosphor layer.

  The rear panel 2 according to the present invention is divided into a plurality of regions in a direction parallel to the data electrode 10 to form the partition wall 11, and the outer shape of the partition wall 11 formed by the division is different between the plurality of regions. It is a shape.

  That is, in the example shown in FIG. 8, the boundary portion 2b is provided at the substantially central portion of the back panel 2, and the partition walls 11 in the left and right regions with the boundary portion 2b as the boundary are outward from the substantially central portion of the boundary portion 2b. It is formed in a pattern shape as shown in FIG. FIG. 8B is an enlarged view showing a portion A that is substantially the center of the back panel 2 shown in FIG.

  Further, in the example shown in FIG. 9, a boundary 2b is provided at substantially the center of the back panel 2, and the widths of the tops 11a and 11b of the partition walls 11 in the left and right regions with the boundary 2b as a boundary are different pattern shapes. It is formed so that the width w2 of the top 11b is smaller than the width w1 of the top 11a.

  In the example shown in FIG. 10, a boundary portion 2b is provided in the substantially central portion of the rear panel 2, and one of the left and right regions with the boundary portion 2b as a boundary (the one in FIG. 10 is the right region). The partition wall 11 is formed in a pattern shape inclined with respect to the partition wall 11 in the other region.

  In the example shown in FIG. 11, the boundary region 2c on both sides of the boundary portion 2b is provided in the substantially central portion of the back panel 2, and the width of the horizontal partition 11c in the boundary region 2c is the horizontal partition in the other portion. The shape is wider than 11d. Here, the horizontal partition is a partition formed in a direction parallel to the long side of the back panel 2 and is formed in a direction intersecting the data electrode 10. The partition walls formed in parallel are vertical partition walls.

  In this way, when the rear panel 2 of the plasma display panel is formed using the divided exposure method, the partition wall 11 is formed by dividing into a plurality of regions in a direction parallel to the data electrode 10, and the divided panel is formed. Since the outer shape of the partition wall 11 is different among a plurality of regions, the partition wall 11 is difficult to be visually recognized by human eyes, and can be formed in a state in which display quality is maintained at a predetermined quality. Can be realized.

  FIG. 12 shows a back panel according to another embodiment of the present invention. In this embodiment, the partition 11 is formed by being divided into a plurality of regions in a direction parallel to the data electrode 10, and the reflectance of the partition 11 formed by the division is different between the plurality of regions. It is a thing.

  That is, in the example shown in FIG. 12, the boundary portion 2b is provided in the substantially central portion of the back panel 2, and the partition walls 11 of the left and right regions 14a and 14b with the boundary portion 2b as the boundary The color of the partition wall 11 is brighter than that of the partition wall 11 and the reflectance of the partition wall 11 is different between the left and right regions 14a and 14b. FIG. 12B is an enlarged view showing a portion A that is substantially the center of the back panel 2 shown in FIG.

  In this way, when the rear panel 2 of the plasma display panel is formed using the divided exposure method, the partition wall 11 is formed by dividing into a plurality of regions in a direction parallel to the data electrode 10, and the divided panel is formed. By adopting a configuration in which the reflectance of the partition walls is different between multiple areas, it is difficult to see with the human eye, and it can be formed with the display quality maintained at the specified quality, realizing a large panel screen can do.

  As described above, the present invention is useful for providing a large-screen, high-definition plasma display panel.

The perspective view which shows the principal part of the panel used for the plasma display panel by one embodiment of this invention. Electrode arrangement of the panel Circuit block diagram of the plasma display device Waveform diagram showing drive voltage waveform applied to each electrode of panel Exploded perspective view showing the entire configuration of the plasma display device Explanatory drawing which shows the division | segmentation exposure method used for this invention In the plasma display panel of the present invention in which the constituent parts are formed by the divided exposure method, a schematic plan view seen from the front panel and the back panel side Explanatory drawing for demonstrating an example of the back panel by this invention The top view for demonstrating the other example of the back panel by this invention The top view for demonstrating the other example of the back panel by this invention The top view for demonstrating the other example of the back panel by this invention The top view for demonstrating the other example of the back panel by this invention

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Front panel 1a, 2a Alignment mark 2 Rear panel 2b Boundary part 3 Front substrate 4 Scan electrode 4a, 5a Transparent electrode 4b, 5b Bus electrode 5 Sustain electrode 6 Dielectric layer 7 Protective layer 8 Back substrate 9 Insulator layer 10 Data electrode 11 Partition 12 Phosphor layer 12R Red phosphor layer 12G Green phosphor layer 12B Blue phosphor layer 13 Light shielding layer

Claims (1)

A front panel and a rear panel on which barrier ribs and phosphor layers are formed;
Multiple area shape of the partition wall that Do different exists in the rear panel plane,
The boundaries of the plurality of regions are substantially straight lines that divide the long side direction or the short side direction of the back panel,
The boundary is the top of the partition;
The same color is disposed in the phosphor layer in the longitudinal direction of the boundary,
The plasma display panel, wherein the phosphor layers adjacent to the boundary are a blue phosphor layer and a green phosphor layer.

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