JP5110068B2 - Multilayer electronic components - Google Patents

Description

  The present invention relates to a multilayer electronic component such as a multilayer inductor.

  As a conventional multilayer electronic component, for example, a multilayer inductor as described in Patent Document 1 is known. The multilayer inductor described in this document includes a coil-shaped inner conductor, lead conductors connected to both ends of the inner conductor, and external electrodes respectively connected to the lead conductors. A mark for indicating the position of each lead conductor is formed on the outer surface of the multilayer inductor.

Japanese Patent No. 3359802

  The multilayer inductor has a directionality in which the inductance characteristics change depending on the position of the lead conductor with respect to the mounting surface, for example. Therefore, such a multilayer inductor is mounted on the mounting surface by reflow soldering or the like after the direction on the mounting surface is determined with reference to the mark and is mounted on the mounting surface by a mounting apparatus.

  By the way, in recent years, the downsizing of multilayer inductors has progressed along with the downsizing of electronic devices to be mounted. For example, a size of length 0.4 mm × width 0.2 mm × thickness 0.2 mm exists. The present inventors have examined the substrate mounting of the multilayer inductor described in Patent Document 1, and as a result, the yield of the downsized multilayer inductor is deteriorated due to misalignment when mounted on the substrate by the mounting apparatus. I found out that there was something.

  Therefore, an object of the present invention is to provide a multilayer electronic component that can improve the yield when mounted on a substrate or the like.

  A laminate comprising: a substantially rectangular parallelepiped laminate in which an insulator layer and a conductor pattern are laminated and a coil is formed therein; and end electrodes formed on both end faces in a direction intersecting with the axial direction of the coil of the laminate. A type electronic component comprising a mark provided along a direction extending from one end electrode to the other of the end electrodes on one surface of the laminated body intersecting in the axial direction, and the mark forms a conductor pattern when viewed from the axial direction. It is provided so as to cover a portion having a small number of layers overlapping in the conductor pattern lamination direction in the region to be formed.

  In this multilayer electronic component, a mark provided on one surface of the multilayer body that intersects the axial direction of the coil is formed along a direction extending from one end electrode to the other. For this reason, the influence on the discriminating power of the mark is reduced due to variations in the formation range of the end electrodes, and the directionality of the multilayer electronic component can be reliably recognized even for a miniaturized multilayer electronic component. Can do. Furthermore, the mark is formed so as to cover a portion with a small number of layers overlapping in the conductor pattern stacking direction in a region where the conductor pattern is formed when viewed from the axial direction. For this reason, in order to compensate for the number of layers in the portion where the number of layers of the conductor pattern is small, the mark forming layer is formed on the surface of the laminate as compared with the case where the mark is provided so as to cover the portion where the number of layers of the conductor pattern is large. Unevenness is reduced. Therefore, there is no component adsorption failure by the mounting device, and the yield in mounting is improved.

  In the multilayer electronic component of the present invention, it is preferable that the mark is provided in one region divided in half along a direction extending from one of the end electrodes on one surface of the multilayer body to the other. In this multilayer electronic component, since the mark is formed at a position offset from the center line of one surface of the multilayer body, the directionality can be recognized more reliably.

  In the multilayer electronic component of the present invention, the mark is preferably provided so as to reach one side surface adjacent to one surface of the multilayer body. In this multilayer electronic component, the mark formation range reaches to one side surface adjacent to one surface of the multilayer body, so that the area of the mark can be widened without impairing the directionality discriminating power. The directionality can be identified.

  In the multilayer electronic component of the present invention, it is preferable that the mark is provided on one surface and the other surface facing the one surface. In this multilayer electronic component, the marks are provided on the two opposing surfaces, so the efficiency for aligning the direction is greatly improved in the taping process in which a large number of multilayer electronic components are aligned on the carrier tape. To do.

  In the multilayer electronic component of the present invention, it is preferable that a step-absorbing layer is provided in the multilayer body on which the mark is formed in order to absorb a step between the mark and the multilayer body. In this multilayer electronic component, since the step absorption layer that absorbs the step between the mark and the multilayer body is provided, even a slight level difference generated near the boundary between the mark and the multilayer body can be absorbed. Accordingly, it is possible to form a multilayer electronic component having no irregularities on the surface of the multilayer body.

  ADVANTAGE OF THE INVENTION According to this invention, the multilayer electronic component which can improve the yield at the time of mounting to a board | substrate etc. can be provided. In addition, it is possible to provide a multilayer electronic component that can easily identify the directionality.

1 is an external perspective view showing a first embodiment of a multilayer inductor as a multilayer electronic component according to the present invention. FIG. 2 is an exploded perspective view of the multilayer inductor shown in FIG. 1. FIG. 2 is a front view of the multilayer inductor shown in FIG. 1. It is sectional drawing of the multilayer inductor shown in FIG. It is an external appearance perspective view which shows 2nd Embodiment of a multilayer inductor as a multilayer electronic component which concerns on this invention. FIG. 6 is an exploded perspective view of the multilayer inductor shown in FIG. 5. FIG. 6 is a cross-sectional view of the multilayer inductor shown in FIG. 5. It is an external appearance perspective view which shows 3rd Embodiment of a multilayer inductor as a multilayer electronic component which concerns on this invention. FIG. 9 is an exploded perspective view of the multilayer inductor shown in FIG. 8. It is sectional drawing of the multilayer inductor shown in FIG. It is a figure for demonstrating shifting. It is a figure for demonstrating chip | tip standing. It is a figure which shows the evaluation result of the test regarding the pick-up of an Example and a comparative example, shifting, and chip | tip standing.

  Hereinafter, a multilayer inductor as a preferred embodiment of a multilayer electronic component according to the present invention will be described in detail with reference to the drawings.

(First embodiment)
FIG. 1 is an external perspective view showing a first embodiment of a multilayer inductor as a multilayer electronic component according to the present invention. FIG. 2 is an exploded perspective view of the multilayer inductor shown in FIG.

  As shown in FIG. 1, the multilayer inductor 1 includes a substantially rectangular parallelepiped multilayer body 2, a coil 3 formed inside the multilayer body 2, and both ends of the multilayer body 2 in a direction intersecting with the axial direction of the coil 3. A pair of end electrodes 4 and 5 respectively formed on the surface, that is, both end surfaces of the laminate 2 in the longitudinal direction, and a mark 6 formed on the upper surface of the laminate 2 along the longitudinal direction. The bottom surface of the multilayer body 2 is a surface facing the external substrate when the multilayer inductor 1 is mounted on the external substrate (not shown).

  As shown in FIG. 2, the laminated body 2 includes a plurality of insulator green sheets (insulator layers) A1 to A10 that become insulators after firing, and a conductor pattern B1 formed on the insulator green sheets A3 to A8. To B6 and through-hole electrodes C1 to C5 that electrically connect the conductor patterns B1 to B6, respectively. The fired actual multilayer inductor 1 is integrated to such an extent that the boundaries of the insulator green sheets A1 to A8 cannot be visually recognized. A pattern 6 is formed on the insulator green sheet A10.

  The insulator is made of a nonmagnetic material or a magnetic material. As the non-magnetic material, for example, glass-based ceramics composed of glass composed of strontium, calcium, alumina, and silicon oxide, and alumina can be used. In addition, for example, ferrite such as Ni—Cu—Zn ferrite, Ni—Cu—Zn—Mg ferrite, Cu—Zn ferrite, or Ni—Cu ferrite can be used as the magnetic body.

  The coil 3 is formed inside the multilayer body 2, and is wound approximately 3.5 turns by the conductor patterns B1 to B6 and the through-hole electrodes C1 to C5.

  Specifically, the conductor pattern B1 corresponds to approximately 5/8 turn of the coil 3, and is formed in a substantially C shape on the insulator green sheet A3. A lead-out portion B1a is integrally formed at one end of the conductor pattern B1. The lead-out part B1a of the conductor pattern B1 is drawn out to the edge of the insulator green sheet A3, and its end is exposed on the end surface of the insulator green sheet A3. For this reason, the lead-out portion B1a is electrically connected to the end electrode 4. The other end of the conductor pattern B1 is electrically connected to a through-hole electrode C1 formed through the insulator green sheet A4 in the thickness direction. For this reason, the conductor pattern B1 is electrically connected to one end of the corresponding conductor pattern B2 through the through-hole electrode C1 in a stacked state.

  Each of the conductor patterns B2 and B4 corresponds to approximately ½ turn of the coil 3, and is formed in an approximately L shape on each of the insulator green sheets A4 and A6. One end of each conductor pattern B2, B4 includes a region electrically connected to each through-hole electrode C1, C3 in a stacked state. The other ends of the conductor patterns B2 and B4 are electrically connected to the through-hole electrodes C2 and C4 formed through the insulator green sheets A5 and A7 in the thickness direction, respectively. Therefore, the conductor patterns B2 and B4 are electrically connected to the corresponding conductor patterns B3 and B5 via the through-hole electrodes C2 and C4 in a stacked state.

  Each of the conductor patterns B3 and B5 corresponds to approximately a half turn of the coil 3, and is formed in a substantially L shape on each of the insulator green sheets A5 and A7. One end of each conductor pattern B3, B5 includes a region electrically connected to each through-hole electrode C2, C4 in a stacked state. The other end of each conductor pattern B3, B5 is electrically connected to each through-hole electrode C3, C5 formed through each insulator green sheet A6, A8 in the thickness direction. Therefore, the conductor patterns B3 and B5 are electrically connected to the corresponding conductor patterns B4 and B6 via the through-hole electrodes C3 and C5 in a stacked state.

  The conductor pattern B6 corresponds to approximately 7/8 turns of the coil 3 on the insulator green sheet A8, and is formed in a spiral shape on the insulator green sheet A8. One end of the conductor pattern B6 includes a region electrically connected to the through-hole electrode C5 in a stacked state. A lead-out portion B6a is integrally formed at the other end of the conductor pattern B6. The lead-out part B6a of the conductor pattern B6 is drawn out to the edge of the insulator green sheet A8 and exposed at the end face of the insulator green sheet A8. For this reason, the lead-out portion B6a is electrically connected to the end electrode 5.

  In addition, the material which comprises the coil 3 can use material with high electroconductivity, such as silver, copper, or nickel.

Further, as shown in FIG. 1, the end electrodes 4 and 5 are formed so as to face the end faces 2 a and 2 b of the multilayer body 2. Each end electrode 4, 5 is formed so as to cover the entire end surface 2 a, 2 b of the multilayer body 2, and part of the end electrode 4, 5 wraps around the upper surface 2 c, the lower surface 2 d and the side surfaces 2 e, 2 f of the multilayer body 2. Yes. Further, each of the end electrodes 4 and 5 is formed by screen-printing, for example, a conductor paste mainly composed of any one of silver, copper, and nickel, or by using a printing and dipping method.

  Subsequently, with reference to FIG. 3 and FIG. 4, a mark indicating the directionality of the multilayer laminated component according to the present invention will be described. FIG. 3 is a front view of the multilayer inductor shown in FIG. 4 is a cross-sectional view of the multilayer inductor shown in FIG.

  As shown in FIGS. 3 and 4, the coil 3 is wound approximately 3.5 turns. Therefore, when the laminated electronic component is viewed from the axial direction of the coil 3, the formation region of the coil 3 includes coil formation portions 3 a that are laminated so that four layers of the conductor patterns B 1, B 3, B 5, and B 6 overlap each other, There is a coil forming portion 3b that is laminated so that three layers of conductor patterns B2, B4, and B6 overlap. The mark 6 is formed on the upper surface 2c of the multilayer body 2 so as to cover the coil forming portion 2b having a small number of conductor patterns and is offset toward the side surface 2f of the multilayer body 2.

  The thickness of the mark 6 is preferably about 5 μm to 8 μm. If this thickness is too thin, the color becomes thin and it is difficult to identify the mark. On the other hand, when this thickness is too thick, the level | step difference with a laminated body tends to become large.

  Further, the mark 6 is provided over the longitudinal direction of the upper surface 2 c of the stacked body 2. That is, both end portions of the mark 6 in the longitudinal direction are covered with the end electrodes 4 and 5. The mark 6 does not need to be provided over the longitudinal direction of the upper surface 2c of the multilayer body 2, and may be provided in a region between the end electrodes 4 and 5.

  Further, the mark 6 is formed on the upper surface 2c of the multilayer body 2 so as to be shifted to one side (side surface 2f) with respect to the center line L1 in the longitudinal direction. Thus, in this embodiment, since the mark 6 is formed at a position offset from the center line L1 on the upper surface of the multilayer body 2, the directionality can be recognized more reliably. Moreover, since it can prevent reliably forming so that the area | region with many lamination | stacking numbers of conductor patterns may be covered, it can prevent that the surface becomes uneven | corrugated further.

  Further, the mark 6 is formed on the upper surface 2c of the stacked body 3 up to a range reaching the side surface 2f. That is, when viewed from the side surface 2f, the cross section of the mark 6 is exposed on the side surface 2f. Thus, in this embodiment, since the formation range of the mark 6 reaches the side surface 2f adjacent to the upper surface 2c of the multilayer body 2, the area of the mark can be increased without impairing the directionality discrimination power. The directionality can be identified more reliably.

  Next, a manufacturing method of the multilayer electronic component having the above-described configuration will be described with reference to FIG.

First, a sheet is formed by a doctor blade method or the like to prepare insulator green sheets A1 to A10. Insulator green sheets A1 to A10 are adjusted to have a density of, for example, about 2.62 g / cm ³ by adding an acidic compound or the like or deionizing treatment when forming the sheet.

  Subsequently, through holes are formed by laser processing or the like at predetermined positions of the insulator green sheets A4 to A8, that is, positions where the through hole electrodes C1 to C5 are to be formed. Next, the conductor patterns B1 to B6 are formed on the insulator green sheets A3 to A8, respectively. Here, each of the conductor patterns B1 to B6 and each of the through hole electrodes C1 to C5 is formed by a screen printing method using a conductive paste containing silver or nickel.

  Further, the mark pattern 6a is formed at a predetermined position on the insulator green sheet A10 which is the outermost layer. The mark pattern 6a is prepared by preparing a film on which the mark pattern 6a is formed in advance, pressing the surface on which the mark pattern 6a is formed so as to face the upper surface of the insulator green sheet A10, and peeling off the film. Only 6a is obtained by being transferred onto the insulator green sheet A10. As a material constituting the mark pattern 6a, for example, when the insulator is a non-magnetic material, a non-magnetic material having the same composition mixed with a trace amount of chromium and cobalt is used. When the insulator is a magnetic material, a mixture of titanium and glass is used.

  Note that the thickness of the mark pattern 6a when transferred onto the insulator green sheet A10 is preferably about 10 μm to 15 μm. If the thickness is too thin, the mark 6a is unnecessarily polished and cannot function as a mark in the raw barrel process of barrel-polishing the green laminate before firing. On the other hand, when this thickness is too thick, the unevenness | corrugation of the surface will become large after baking.

  The mark pattern 6a formed on the insulator green sheet A10 may be directly formed on the green sheet by a screen printing method in addition to the transfer method as described above.

Then, each insulator green sheet A1-A10 is laminated | stacked in the order shown by FIG. 2, and pressure is applied to the lamination direction, and each insulator green sheet A1-A10 is crimped | bonded. For this case, the density (2.62 g / cm ³ or so) of the insulating green sheet A1~A10 is a low density compared to the density of conventional green sheet (3.0 g / cm ³ or so), the conductor pattern Each of the green sheets A1 to A10 at the positions sandwiching B1 to B6 is greatly recessed and deformed, and the thickness of the conductor patterns B1 to B6 can be absorbed.

  Subsequently, the laminated insulator green sheets A1 to A10 are fired at a predetermined temperature (for example, about 840 to 900 ° C.) to form the laminate 2. For example, the laminate 2 has a length in the longitudinal direction after firing of 0.4 mm, a width of 0.2 mm, and a height of 0.2 mm. Each of the conductor patterns B1 to B6 has a width of 30 μm and a thickness of 5 μm after firing, for example.

  Subsequently, end electrodes 4 and 5 are formed on the laminate 2. Thereby, the multilayer inductor 1 is formed. The end electrodes 4 and 5 are each baked at a predetermined temperature (for example, about 680 to 740 ° C.) by applying an electrode paste mainly composed of silver, nickel or copper to both end faces in the longitudinal direction of the laminate 2. It is formed by performing electroplating. For this electroplating, Cu, Ni, Sn, or the like can be used.

  As described above, in this multilayer inductor 1, the mark 6 provided on one surface of the multilayer body 2 that intersects the axial direction of the coil 3 is formed along the direction extending from one end electrode to the other. For this reason, the influence on the discriminating power of the mark 6 is reduced due to variations in the formation range of the end electrodes and the direction of the multilayer inductor 1 is surely recognized even with the miniaturized multilayer inductor 1. be able to. Furthermore, the mark 6 is formed so as to cover the portion 3b having a small number of layers overlapping in the conductor pattern lamination direction in the region where the conductor pattern is formed when viewed from the axial direction. For this reason, in order to make up the number of layers in the portion 3b where the number of layers of the conductor pattern is small in the mark 6 formation layer, the laminated body is compared with the case where the mark is provided to cover the portion 3a where the number of layers of the conductor pattern is large The unevenness of the surface 2c of 2 is reduced. Therefore, there is no component adsorption failure by the mounting device, and the yield in mounting is improved.

(Second Embodiment)
FIG. 5 is an external perspective view showing a second embodiment of the multilayer inductor as the multilayer electronic component according to the present invention. 6 is an exploded perspective view of the multilayer inductor shown in FIG. 7 is a cross-sectional view of the multilayer inductor shown in FIG. The multilayer inductor 10 of this embodiment is different from the multilayer inductor 1 according to the first embodiment in that the mark 7 is formed not only on the upper surface 2c of the multilayer body 2 but also on the lower surface 2d.

  That is, as shown in FIGS. 5 to 7, in this embodiment, the mark 6 is an overlapping conductor in a region where the conductor patterns B <b> 1 to B <b> 6 are formed on the upper surface of the multilayer body 2 when viewed from the axial direction. The pattern is formed so as to cover a portion having a small number of layers. And the mark 7 is formed in the lower surface 2d (lower surface of the insulator green sheet A1) which opposes the upper surface 2c of the laminated body 2, and the position which opposes the formation position of the mark 6. FIG.

  As described above, in the multilayer inductor 10 of the present embodiment, since the marks 6 and 7 are provided on the two opposing surfaces of the multilayer body 2, a large number of multilayer inductors are aligned on the carrier tape. In the taping process, the efficiency for aligning the direction is greatly improved.

(Third embodiment)
FIG. 8 is an external perspective view showing a third embodiment of a multilayer inductor as the multilayer electronic component according to the present invention. FIG. 9 is an exploded perspective view of the multilayer inductor shown in FIG. 10 is a cross-sectional view of the multilayer inductor shown in FIG. In the multilayer inductor 20 according to the present embodiment, the step absorption layer 8 is formed so as to cover the mark 6 provided in the multilayer body 2 and the upper surface 2c of the multilayer body 2 where the mark 6 is not formed. This is different from the multilayer inductor 1 according to the first embodiment.

  The step absorption layer 8 is light transmissive to such an extent that the mark 6 provided in the lower layer can be identified visually or with a camera. The step absorption layer 8 can be made of glass made of strontium, calcium, alumina and silicon oxide, glass-based ceramics made of alumina, or the like. In particular, when a nonmagnetic material is used as the insulator, the step absorption layer 8 is preferably made of the same material as the insulator from the viewpoint of manufacturing. The step absorption layer 8 is formed by a doctor blade method, a printing method, a thin film method, or the like. The thickness of the step absorption layer 8 is preferably 10 μm to 40 μm. If this thickness is too thin, the function of absorbing the step between the mark 6 and the laminate 2 cannot be exhibited. On the other hand, if this thickness is too thick, recognition as a mark becomes difficult.

  As described above, in the multilayer inductor 30 of the present embodiment, the step absorption layer 8 that absorbs the step between the mark 6 and the multilayer body 2 is provided, so that the multilayer inductor 30 is generated near the boundary between the mark 6 and the multilayer body 2. Even a slight level difference can be absorbed. Accordingly, it is possible to further form a multilayer inductor without irregularities on the surface of the multilayer body 2.

  In the multilayer electronic component according to the present invention, in order to confirm that the yield at the time of mounting on the substrate is improved, a test was performed with the multilayer electronic component according to the example and the multilayer electronic component according to the comparative example. . EXAMPLES Hereinafter, although an Example demonstrates this invention further in detail, this invention is not limited to these Examples.

Example 1
As shown in FIG. 1 to FIG. 4 as a laminated electronic component, a coil having approximately 3.5 turns (the number of laminated conductive patterns includes a 4-layer part and a 3-layer part) A multilayer inductor having a structure in which a mark was formed on the upper surface 2c of 2 and shifted toward the side surface 2f of the multilayer body 2 was manufactured. Therefore, the number of conductor patterns stacked immediately below the mark is three. Here, the shape of the multilayer inductor is 0603 (length 0.6 mm × width 0.3 mm × thickness 0.3 mm).

(Example 2)
Example 1 was the same as Example 1 except that the shape of the multilayer inductor was 0402 (length 0.4 mm × width 0.2 mm × thickness 0.2 mm).

(Comparative Example 1)
The mark was formed in the same manner as in Example 1 except that the mark was formed on the upper surface 2c of the laminated body 2 shown in FIG. Therefore, the number of laminated conductor patterns immediately below the mark is four.

(Comparative Example 2)
The multilayer inductor was the same as Comparative Example 2 except that the shape of the multilayer inductor was 0402 (length 0.4 mm × width 0.2 mm × thickness 0.2 mm).

(test)
In the test, a pickup test and a shifting / chip standing test were performed. The pickup test was performed according to the following procedure. First, a plurality of multilayer inductors (hereinafter referred to as each sample) according to Example 1, Example 2, Comparative Example 1 and Comparative Example 2 were prepared. The marks were aligned on the carrier tape prepared for each sample. Next, using a mounting device, each sample supplied from each carrier tape was continuously mounted on a substrate on which a solder electrode pad (Sn—Ag—Cu Pb-free solder was used) was printed. . Then, the suction nozzle of the mounting apparatus counted the number of each sample that could be picked up from each carrier tape, and calculated the pickup rate. In addition, 20 substrates were prepared for each sample, and 1200 samples were mounted on each substrate. Therefore, each sample is mounted with a total of 24,000 samples.

The shifting / chip standing test was performed according to the following procedure. First, a plurality of each sample was prepared. The carrier tape prepared for each sample was arranged on the carrier tape with the orientation of the marks aligned. Next, using the mounting device, each sample supplied from each carrier tape was continuously mounted on a substrate on which solder electrode pads were printed. Furthermore, a reflow process was performed under conditions of a peak temperature of 250 ° C. for 10 seconds and an N ₂ gas atmosphere, and each sample was mounted on a substrate. The presence or absence of shifting and chip standing was counted by appearance inspection. Each sample was mounted by performing a reflow process by mounting it at a position that was intentionally slightly deviated from the position where the solder electrode pad was formed so that mounting failure would easily occur. As for the number of mounted samples, as in the pickup test, 20 substrates were prepared for each sample, and 1200 substrates were mounted on each substrate. Therefore, each sample is mounted with a total of 24,000 samples.

  Here, shifting and chip standing will be described with reference to FIGS. FIG. 11 is a diagram for explaining the shifting. FIG. 12 is a diagram for explaining chip standing. As shown in FIG. 11, the shifting indicates a state in which the end electrodes 4 and 5 of the multilayer inductor are mounted at positions shifted from the solder electrode pads 12 on the substrate 11. In addition to the state where the position of one end electrode is shifted as shown in FIG. 11, the shifting includes a state where the positions of both end electrodes are shifted. As shown in FIG. 12, the chip standing means a state in which one end electrode 5 is completely separated from the solder electrode pad 12 and is fixed to the substrate 11 only by the other end electrode 4.

  The test results are shown in FIG. As shown in FIG. 13, the pickup rates of the multilayer inductors according to the first and second embodiments are 99.98% and 99.95%, respectively, which are considered to have no problem in product production. On the other hand, the pickup rates of the multilayer inductors according to Comparative Examples 1 and 2 were 99.82% and 99.79%, respectively. Further, the shifting and chip standing of the multilayer inductors according to Examples 1 and 2 were better than those of the multilayer inductors according to Comparative Examples 1 and 2. Therefore, it was confirmed that the multilayer inductor according to the example had a higher yield when mounted on the substrate than the multilayer inductor according to the comparative example.

  DESCRIPTION OF SYMBOLS 1,10,20 ... Multilayer type inductor, 2 ... Laminated body, 3 ... Coil, 4,5 ... End electrode, 6,7 ... Mark, 8 ... Step absorption layer, A1-A10 ... Insulator green sheet, B1- B6: Conductor pattern, C1-C5: Through-hole electrode.

Claims (2)

A substantially rectangular parallelepiped laminate in which an insulator layer and a conductor pattern are laminated and a coil is formed inside;
An end electrode formed on both end faces in the longitudinal direction intersecting with the axial direction of the coil of the laminate, and a multilayer electronic component comprising:
Provided on one surface of the laminate that intersects the axial direction in one region divided in half along the direction extending from one of the end electrodes to the other, and having a single layer with an exposed surface ,
In the region where the mark is provided in the region where the conductor pattern is formed when viewed from the axial direction, the number of layers overlapping in the stacking direction of the conductor pattern is the side where the mark is not provided. Less than the number of layers overlapping in the stacking direction of the conductor pattern in the region ,
Both end portions of the mark in the longitudinal direction of the laminate are covered with the end electrodes, respectively. The multilayer electronic component according to claim 1 , wherein the mark is provided so as to reach one side surface adjacent to the one surface.

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