JP5106202B2 - Semiconductor wafer appearance inspection method and apparatus equipped with the same - Google Patents

Description

The present invention provides a visual inspection performed whether or abnormality detection of the shape of the needle marks formed on its electrode pad by inspecting electrical characteristics of the semiconductor chip, by imaging only part where the electrode pads are present, high speed The present invention relates to a semiconductor wafer appearance inspection method and an apparatus including the same.
[Background]

In order to inspect the electrical characteristics of a semiconductor chip formed on a semiconductor wafer, the electrode pads in the semiconductor chip are usually energized by inserting a probe needle for inspection. Many, electrode pads are made, et al or aluminum, pressed against the order inspection probe is to ensure energization, at considerable force to the electrode pad. As a result, needle marks are formed on the electrode pads by the electrical characteristic inspection probe.

By the way, in addition to the inspection of pattern defects on the semiconductor chip, when the semiconductor wafer including the electrode pad formed with the needle marks by the inspection probe after the electrical characteristic inspection is completed is sent to the subsequent process, Inspect electrode pads. For example, it captures an image by the imaging device electrode pads of the semiconductor chip, performs image processing on the captured image, and detects the abnormality other foreign matter in the presence and shape of probe marks located on the electrode pad.

  In order to image the electrode pad, a stage or the like on which a semiconductor wafer is mounted is scanned in a certain direction in the same manner as in the inspection of a pattern defect on a semiconductor chip. For example, the image is scanned by scanning along an arrow described as shown in FIG. In this case, even if there is a portion where the electrode pad is not formed on the semiconductor chip, scanning is required. For example, in recent years, there are semiconductor chips in which electrode pads are formed only in the vicinity of the four sides on the periphery of the semiconductor chip and not in the central portion. With such a semiconductor chip, an image of the central portion is captured. Since it is not necessary, the scan becomes useless, and the inspection time is delayed.

The determination application relating to electrical characteristic inspection process described in "probe mark reading apparatus and probe mark reading method" of the electrode pad shown in patent document 1, the position of the probe mark on the above such electrode pads at high speed Application relating to the apparatus and method. On the other hand, the present invention relates to speeding up the inspection by performing scanning without waste by selecting and scanning only the portion where the electrode pad is formed, and is an application for a different invention.

JP 2005-045194 A

  As described above, in the present invention, in order to take an image of the electrode pad, the stage on which the semiconductor wafer is mounted is scanned in a certain direction in the same manner as the inspection of the pattern defect on the semiconductor chip and the image is taken. . In this case, even if there is a portion where the electrode pad is not formed on the semiconductor chip, scanning is necessary, resulting in a delay in inspection time. By scanning only the part where the electrode pad is formed on the semiconductor chip in the scanning direction of the stage, etc., and imaging the electrode pad part, it is possible to perform inspection at high speed without performing unnecessary scanning. The appearance inspection method and the appearance inspection apparatus were considered.

In the invention described in 請 Motomeko 1 and claim 2, after the needle was electrical property test against the electrode pad portions for the energization of the semiconductor chip, the presence or absence of the needle marks formed on the electrode pad Ya When detecting an abnormality in shape or other foreign matter, if the field of view in the imaging device is within a range where an image of an electrode pad of a semiconductor chip located in the vicinity can be imaged, the semiconductor chip located in the vicinity is covered and the electrode pad of a plurality of chips The present invention provides a method and an apparatus for performing an inspection at a high speed by simultaneously imaging a part .

  In the conventional inspection, since scanning is performed only in a specific direction, there is a problem in that scanning is performed up to a portion on the semiconductor chip where no electrode pad is formed. By scanning only the portion where the electrode pad is formed, scanning can be performed without waste, so that the inspection speed can be increased. Furthermore, by simultaneously imaging the electrode pad portions of two or more adjacent semiconductor chips, the number of scans can be reduced, and the speed can be increased.

  FIG. 14 shows the appearance of the appearance inspection apparatus 101. The configuration will be described with reference to FIG. 15 which is a view when the upper cover of FIG. 14 is removed. An inspection stage 102 is provided at the center of the appearance inspection apparatus 101, and an inspection camera 103 is provided on the inspection stage 102. The semiconductor wafer transfer robot 104 carries the semiconductor wafer 1 in and out of the inspection stage 102. The semiconductor wafer transfer robot 104 is set so as to sequentially replace the semiconductor wafer 1 as the inspection progresses with respect to the semiconductor wafer cassette 105 positioned at the end of the appearance inspection apparatus 101, thereby 1 is being carried in and out.

  FIG. 1 is an external view of a semiconductor wafer 1. Many semiconductor chips 2 are mounted on one semiconductor wafer 1. A plurality of electrode pads 3 for energizing the semiconductor chip 2 are arranged in the semiconductor chip 2 as shown in FIG. As shown in FIG. 2, the needle mark 4 by the electrical property inspection probe remains as a result of the electrical property test of the semiconductor chip 2 being performed. An outline of the needle marks 4 is shown in FIG.

In the appearance inspection apparatus 101 for anomalies detection of the presence or absence and shape of probe marks 4 formed thereon electrode pad 3 by the electrical characteristic test of the inspection stage 102 scans in the direction of the arrow shown in FIG. 4 When an image is picked up by the image pickup apparatus, the semiconductor chip 2 in which the electrode pads 3 as shown in FIG. 5 are formed only in the vicinity of the four sides on the semiconductor chip 2 and not in the central portion. Then, as shown in FIG. 6, since scanning is performed up to a portion where the electrode pad 3 is not formed, unnecessary scanning is performed, and the inspection time is delayed.

  In the present invention, only the portion where the electrode pad 3 is formed on the semiconductor chip 2 is scanned in the scanning directions L1 and L2 of the arrows shown in FIGS. A method and apparatus that can perform high-speed inspection without performing unnecessary scanning is proposed.

  As shown in FIG. 5, in the semiconductor chip 2 in which the electrode pads 3 are formed only in the vicinity of the four sides around the semiconductor chip 2 and are not formed in the central portion, the central portion where the electrode pads 3 are not located is formed. There is no need to scan and capture an image. Therefore, it is possible to image only the electrode pad 3 portion by scanning only the vicinity of the four sides around the semiconductor chip 2 as shown in FIG. In order to perform scanning only in the vicinity of the four sides around the semiconductor chip 2 in this way, first, only the portion where the electrode pad 3 is formed in the lateral direction of the semiconductor wafer 1 is scanned in the direction of the arrow shown in FIG. . Thereby, the image of the electrode pad 3 of the horizontal direction of the semiconductor chip 2 shown in FIG. 7 can be imaged. Next, only the portion where the electrode pad 3 is formed in the vertical direction of the semiconductor wafer 1 in the direction of the arrow shown in FIG. 9 is scanned. Thereby, an image of the electrode pad 3 in the vertical direction of the semiconductor chip 2 can be taken in the direction of the arrow shown in FIG. By performing scanning as described above, unnecessary scanning as in the direction of the arrow shown in FIG. 6 is not performed, so that inspection can be performed at high speed.

In the past, as described in the background art, as shown by the direction of the arrow in FIG. This is because the inspection of the pattern defect on the semiconductor chip 2 is performed for each semiconductor chip 2 individually. However, in the present invention, since the electrode pads 3 of the abnormal presence or absence and shape of probe marks 4 formed on the detection of an object, it is not necessary to perform capturing images at every semiconductor chip 2 individually. Therefore, as shown in FIGS. 10 and 11, when the electrode pad 3 of the adjacent semiconductor chip 2 is simultaneously shown in the field of view CM of the inspection camera of the inspection camera 103, the electrode pad 3 of the adjacent semiconductor chip 2. The images are collected at one time. Accordingly, as compared with the case where an image is taken for each semiconductor chip 2 as shown in FIG. 12, as shown in FIG. As a result, inspection can be performed at high speed.

  In the above embodiment, when the electrode pad 3 of the adjacent semiconductor chip 2 enters the field of view CM of the inspection camera at the same time with respect to the field of view CM of the inspection camera of the inspection camera 103, the electrode pad 3 of this adjacent semiconductor chip 2. However, depending on the arrangement of the semiconductor chips 2, depending on the arrangement of the semiconductor chips 2, as shown in FIG. There may be a case where the electrode pads 3 can be simultaneously imaged. In that case, since a wide area can be imaged collectively, inspection can be performed at a higher speed.

  Next, the difference in inspection time from the conventional example when an appearance inspection is actually performed using the method will be described with examples. As shown in FIG. 16, there will be described a case where there are approximately 37 semiconductor chips 2 in the semiconductor wafer 1 and each of the semiconductor chips 2 is divided into the field of view CM of the 5 × 5 inspection camera.

1) Normal inspection time: Number of semiconductor chips 537 times
Semiconductor chip imaging 13425 times
Semiconductor wafer scanning 110 times
Appearance inspection time Approx. 148 seconds 2) Inspection time when using the method invented this time:
Number of semiconductor chips 537
Semiconductor chip imaging 7458 times
Number of semiconductor wafer scans 61 times
Appearance inspection time: about 101 seconds As a result, the inspection time was reduced by about 32%.

  In the conventional inspection, as indicated by the arrows shown in FIG. 6, since the scanning is performed only in a specific direction, the scanning is performed up to the portion on the semiconductor chip 2 where the electrode pad 3 is not formed. In the present invention, since it is possible to scan only the portion of the semiconductor wafer where the electrode pad 3 is formed, the inspection stage 102 shown in FIG. 15 is biaxial as shown by the arrows in FIGS. When scanning using the inspection camera 103 in which the electrode pad 3 is configured to scan freely in the direction, improvements can be made so that only necessary parts can be scanned without waste, and the appearance inspection speed can be increased. It was. Further, the number of scans can be reduced by simultaneously imaging the electrode pads 3 of the semiconductor chips 2 in two or more adjacent rows on the semiconductor wafer 1 by the inspection camera 103, thereby increasing the speed. It was possible to plan.

The figure of a semiconductor wafer. The figure of the electrode pad with a needle mark. The figure explaining a needle mark. The figure which shows the scanning direction at the time of the conventional test | inspection. The figure of the semiconductor chip in which an electrode pad exists only in the vicinity of the four surrounding sides on the semiconductor chip. The figure explaining the imaging in the conventional scanning direction. The figure explaining the scanning method only about the part in which an electrode pad exists. The figure explaining the scanning of only a vertical direction. The figure explaining the scanning of only a horizontal direction. The figure in case the electrode pad of the semiconductor chip adjacent to the visual field of the inspection camera of an imaging device is reflected. The figure in case the electrode pad of the semiconductor chip adjacent to the visual field of the inspection camera of an imaging device is reflected. The figure at the time of imaging an electrode pad for every semiconductor chip. The figure at the time of imaging simultaneously the electrode pad of an adjacent semiconductor chip. External view of visual inspection equipment Interior view of visual inspection equipment The figure explaining the comparison with the conventional example The figure which shows the imaging range at the time of imaging the electrode pad of several semiconductor chips simultaneously

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor wafer 2 Semiconductor chip 3 Electrode pad 4 Needle mark 5 Protective film 6 Wiring pattern 7 Needle CM Field of view of inspection camera L1 Scanning direction 1
L2 Scanning direction 2
N1 Parallel scanning direction during inspection H1 Vertical scanning direction during inspection 101 Visual inspection apparatus 102 Inspection stage 103 Inspection camera 104 Semiconductor wafer transfer robot 105 Semiconductor wafer cassette

Claims (2)

After inspecting electrical characteristics against the needle electrode pads for the semiconductor chip energized, the wafer appearance inspection method for detecting an abnormality other foreign matter in the presence and shape of the needle marks formed on the electrode pad ,
When the field of view of the imaging device is within a range in which an electrode pad of a semiconductor chip located in the vicinity can be imaged, the semiconductor chip located in the vicinity is covered, and the electrode pad portions of a plurality of chips are simultaneously imaged and tested Characteristic wafer appearance inspection method. After inspecting electrical characteristics against the needle electrode pads for the semiconductor chip energized, the wafer inspection system for detecting an anomaly other foreign matter in the presence and shape of the needle marks formed on the electrode pad ,
When the field of view of the imaging device is within a range where the electrode pads of the semiconductor chip located in the vicinity can be imaged, the semiconductor chip located in the vicinity is covered, and the electrode pad portions of a plurality of chips are simultaneously imaged and inspected. A wafer visual inspection apparatus characterized in that

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