JP5097372B2 - High-current, high-efficiency surface-mount light-emitting diode lamp and method for manufacturing the same - Google Patents

High-current, high-efficiency surface-mount light-emitting diode lamp and method for manufacturing the same Download PDF

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JP5097372B2
JP5097372B2 JP2006232026A JP2006232026A JP5097372B2 JP 5097372 B2 JP5097372 B2 JP 5097372B2 JP 2006232026 A JP2006232026 A JP 2006232026A JP 2006232026 A JP2006232026 A JP 2006232026A JP 5097372 B2 JP5097372 B2 JP 5097372B2
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emitting diode
light
electrode layer
light emitting
diode lamp
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JP2008042149A (en
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ジェ・ユ スーン
スー・キム ドン
ギー・ジュン チュン
シク・キム デ
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Itswell Co ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors

Abstract

A surface-mounted light emitting diode lamp is provided to improve light use efficiency and obtain high directivity by enabling high current driving and by using an optical reflection structure. A plurality of sections are formed in a printed circuit board(117). An electrode layer is formed on the upper surface of the printed circuit board and includes first and second electrodes(111,112) that are electrically separated from each other. A light emitting diode chip(160) is mounted on the first electrode. The light emitting diode chip is covered with a molding member. The sections in the printed circuit board are formed by a dicing method and include a first section exposing the first electrode and a second section exposing the second electrode. The molding member includes a first molding member(120) covering the light emitting diode chip and a second molding member(140) formed on the first molding member wherein the second molding member includes a diffusing agent or a phosphor.

Description

本発明は、表面実装型(SMD)発光ダイオード(LED)ランプおよびその製造方法に関し、とくに、小型・薄型化の形状特性を維持しながら、大電流駆動時の性能の向上、即ち効率を画期的に改善した発光ダイオードランプの製造を可能にするとともに、生産収率の向上、コストの低減といった製造上の利点を有する新規な方法に関する。   The present invention relates to a surface mount type (SMD) light emitting diode (LED) lamp and a method for manufacturing the same, and in particular, to improve performance at the time of driving a large current, that is, to improve efficiency while maintaining a small and thin shape characteristic. The present invention relates to a novel method capable of manufacturing an improved light emitting diode lamp and having manufacturing advantages such as an increase in production yield and a reduction in cost.

大電流で駆動可能な表面実装型発光ダイオードランプに関する従来技術の第1の例を図1〜3に示す。第1の例では、図1に示すようにリードを構成して、支持台および反射板を射出成形してリードフレーム102を得る。さらにこのリードフレーム102に発光ダイオードチップ110を実装するとともに、アルミナセラミックスボディ108を形成し、その後各素子をディスペンス工法にてモールドしてトリム技法で素子を分離する。そして、分離した発光素子を、はんだ層104を介してプリント基板106および銅製の基板パッド116の上に配置して発光ダイオードランプ100を製作する。発光ダイオードランプ100の電極リード102は、熱放出の通路としても機能するが、断面積が小さく、その効果は微々たるものである。そのため、熱放出構造として貫通孔112および放熱パッド114を設ける必要がある。発光ダイオードチップ110から発生する熱の放出経路を矢印で示す。この構造は、数十〜数百ミリアンペア(mA)の電流下でも駆動しうるが、駆動電流が大きくなるにつれて、全体のサイズが大きくなり、生産コストが高いという欠点を有する。   A first example of the prior art relating to a surface-mounted light-emitting diode lamp that can be driven with a large current is shown in FIGS. In the first example, a lead is configured as shown in FIG. 1, and a lead frame 102 is obtained by injection molding a support base and a reflector. Further, a light emitting diode chip 110 is mounted on the lead frame 102 and an alumina ceramic body 108 is formed. Thereafter, each element is molded by a dispensing method, and the elements are separated by a trim technique. Then, the separated light emitting element is disposed on the printed circuit board 106 and the copper substrate pad 116 through the solder layer 104 to manufacture the light emitting diode lamp 100. The electrode lead 102 of the light-emitting diode lamp 100 also functions as a heat release passage, but has a small cross-sectional area and its effect is insignificant. Therefore, it is necessary to provide the through hole 112 and the heat dissipation pad 114 as a heat release structure. The release path of heat generated from the light emitting diode chip 110 is indicated by arrows. This structure can be driven even under a current of several tens to several hundred milliamperes (mA). However, as the drive current increases, the entire size increases and the production cost is high.

図2、図3は、リードフレームに発光ダイオードチップを実装した別の例を示す。図1の例と共通または対応する構成については適宜説明を省き、同じ符号を付すものとする。ポリマーからなるボディ122を有する図2の例の発光ダイオードランプ120では、金属(銅)スラグボディ124を利用して放熱を行う。この従来例でも、リード102による熱放出は、断面積が小さいためにほとんど機能しない。図3に示すセラミック(AIN)ボディ142を有する発光ダイオードランプ140は、リードフレーム144を熱伝導性の高い材料で形成しており、熱放出の通路として作用する。しかし、図1、図2のものと同様に、断面積が小さいためその機能は十分ではない。図1〜3を参照して説明した従来技術の第1の例の発光ダイオードランプは、少量生産する際に、不良品が発生する割合が高くなって収率管理が困難になるとともに、熱放出構造を設けるために材料費の増大など追加のコストが発生する。   2 and 3 show another example in which a light emitting diode chip is mounted on a lead frame. Descriptions of configurations common or corresponding to those in the example of FIG. 1 will be omitted as appropriate, and the same reference numerals will be given. In the light emitting diode lamp 120 of the example of FIG. 2 having a body 122 made of a polymer, heat is radiated using a metal (copper) slag body 124. Even in this conventional example, the heat release by the lead 102 hardly functions because the cross-sectional area is small. A light emitting diode lamp 140 having a ceramic (AIN) body 142 shown in FIG. 3 has a lead frame 144 made of a material having high thermal conductivity, and acts as a heat release path. However, as in the case of FIGS. 1 and 2, its function is not sufficient because the cross-sectional area is small. The light emitting diode lamp of the first example of the prior art described with reference to FIGS. 1 to 3 has a high rate of occurrence of defective products when it is produced in a small quantity, making it difficult to manage the yield and heat release. Additional costs such as increased material costs are incurred to provide the structure.

従来技術の第2の例を図4、図5に示す。図4、図5に示すように、この第2の例の発光ダイオードランプは、リード162に支持された回路基板164を利用してその上に発光ダイオードチップ170を実装した後、トランスファー成形によりモールド層166を形成し、最後にダイシングで各素子を分離して得られる。モールドする際には、蛍光体168を添加物として加える。図5に示す発光ダイオードランプ180の例では、トランスファー成形によりレンズ部182を形成する。この従来例の特徴は、反射板184およびガイド186を回路基板上に設置することによって、光が略一定の指向性を有するようになり、生産収率およびコスト低減が可能である点である。しかしながら、熱放出構造が設けられていないため、素子の発光効率の低下が生じ、大電流下での駆動が困難である。   A second example of the prior art is shown in FIGS. As shown in FIGS. 4 and 5, in the light emitting diode lamp of the second example, the light emitting diode chip 170 is mounted on the circuit board 164 supported by the leads 162, and then molded by transfer molding. The layer 166 is formed, and finally, each element is obtained by dicing. When molding, the phosphor 168 is added as an additive. In the example of the light emitting diode lamp 180 shown in FIG. 5, the lens portion 182 is formed by transfer molding. The feature of this conventional example is that light is provided with a substantially constant directivity by installing the reflector 184 and the guide 186 on the circuit board, and the production yield and cost can be reduced. However, since the heat dissipation structure is not provided, the light emission efficiency of the element is lowered, and driving under a large current is difficult.

上述した第1の例のように、リードフレーム102を使用して発光ダイオードチップ110をパッケージ化する場合、通常ディスペンス工法を用いるが、チップ110の中心波長エネルギー、スペクトラムおよび光束に応じて蛍光体の濃度および混合量を変えなければならないので、正常品の収率管理が困難である。また、ディスペンス工法においてディスペンス量の調節をする際に、非常に高い精度の吐出量の調節が必要となるため、同様に正常品の収率管理が困難である。   As in the first example described above, when the light emitting diode chip 110 is packaged using the lead frame 102, the normal dispensing method is used. However, the phosphor is changed depending on the center wavelength energy, spectrum and luminous flux of the chip 110. Since the concentration and mixing amount must be changed, it is difficult to control the yield of normal products. In addition, when adjusting the amount of dispensing in the dispensing method, it is necessary to adjust the amount of discharge with very high accuracy, and it is similarly difficult to manage the yield of normal products.

リードフレーム102を利用してトランスファー工法やキャスティング工法を用いてレンズ部(図示せず)を設けたり、またはレンズを接着して取り付けることでレンズ部(図示せず)を形成する方法もあるが、工程数が増加し、リードフレームおよび金型のコストの増大により生産収率が低下するなど、逆にコスト上昇の要因になる。   There is a method of forming a lens portion (not shown) by providing a lens portion (not shown) using the transfer method or casting method using the lead frame 102, or by attaching and attaching a lens. The number of processes increases, and the production yield decreases due to the increase in the cost of the lead frame and the mold.

また、上述した図5に示した第2の例のように発光ダイオードチップ170を回路基板164の平面上に実装する場合、チップ170から発生する光は、光反射板184で反射されて指向性を有するが、構造的に薄型であるため光反射効率、光の指向性、および他の光利用効率などの点でリードフレーム基板を利用する場合に比べて全般的に性能が低下するといった問題が生じる。   When the light emitting diode chip 170 is mounted on the plane of the circuit board 164 as in the second example shown in FIG. 5 described above, the light generated from the chip 170 is reflected by the light reflecting plate 184 and has directivity. However, since the structure is thin, there is a problem that the performance is generally lowered compared to the case of using a lead frame substrate in terms of light reflection efficiency, light directivity, and other light utilization efficiency. Arise.

本発明は、発光ダイオードチップを実装するための基板として回路基板を利用した場合に問題となる過度の発熱を防ぐとともに、大電流駆動を可能とし、かつ高いエネルギー効率を達成することを目的とする。   An object of the present invention is to prevent excessive heat generation, which becomes a problem when a circuit board is used as a substrate for mounting a light emitting diode chip, to enable a large current drive, and to achieve high energy efficiency. .

本発明は、従来技術の課題を解決し、上記目的を達成するために次のような特徴を有する。
すなわち、本発明は、回路基板と、該回路基板上の熱伝導性の金属製電極層に、集積して実装された発光ダイオードチップと、該発光ダイオードチップ上にモールド形成された光抽出部と、前記発光ダイオードチップが実装された前記電極層の底面の少なくとも一部を露出させた熱放出用露出構造、または該電極層を上下方向に略貫通する貫通孔を有してなる熱放出用柱構造の少なくとも一方からなる熱放出部を具備する、発光ダイオードランプに関する。
The present invention has the following features in order to solve the problems of the prior art and achieve the above object.
That is, the present invention relates to a circuit board, a light-emitting diode chip integrated and mounted on a thermally conductive metal electrode layer on the circuit board, and a light extraction unit molded on the light-emitting diode chip. An exposed structure for heat emission in which at least a part of the bottom surface of the electrode layer on which the light-emitting diode chip is mounted is exposed, or a heat emission column having a through-hole substantially penetrating the electrode layer in the vertical direction The present invention relates to a light-emitting diode lamp including a heat dissipation portion including at least one of structures.

また、本発明は、発光ダイオードチップを集積して実装可能な回路基板を用意する第一工程、前記回路基板上の熱伝導性の金属製電極層に発光ダイオードチップを集積して実装し、モールドして光抽出部を形成する第二工程、熱放出部として、前記発光ダイオードチップを実装させた前記電極の金属層の少なくとも一部を露出させて熱放出用露出構造を形成する第三工程、各発光ダイオード素子を分離する第四工程を含む、発光ダイオードランプの製造方法に関する。
さらに、本発明は、第三工程が、第二工程でモールドした後に、ラッピングまたはエッチングにより電極の金属層の底面全体を露出させることを含む、上記製造方法に関する。
さらに、本発明は、第三工程が、第二工程でモールドした後に、ダイシングにより直線状に延在する凹み部を形成して、電極の金属層の底面の一部を露出させることを含む、上記製造方法に関する。
The present invention also provides a first step of preparing a circuit board on which light emitting diode chips can be integrated and mounted, a light emitting diode chip integrated and mounted on a thermally conductive metal electrode layer on the circuit board, and molded. A second step of forming a light extraction portion, a third step of forming an exposed structure for heat emission by exposing at least part of the metal layer of the electrode on which the light emitting diode chip is mounted as a heat emission portion, The present invention relates to a method for manufacturing a light emitting diode lamp, including a fourth step of separating each light emitting diode element.
Furthermore, the present invention relates to the above manufacturing method, wherein the third step includes exposing the entire bottom surface of the metal layer of the electrode by lapping or etching after molding in the second step.
Further, the present invention includes a third step in which, after molding in the second step, forming a concave portion extending linearly by dicing to expose a part of the bottom surface of the metal layer of the electrode, It is related with the said manufacturing method.

さらにまた、本発明は、発光ダイオードチップを集積して実装可能な回路基板を用意する第一工程、熱放出部として、前記回路基板上の熱伝導性の金属製電極層を上下方向に略貫通する貫通孔を形成して熱放出用柱構造を形成する第二工程、前記金属製電極層に発光ダイオードチップを集積して実装し、モールドして光抽出部を形成する第三工程、各発光ダイオード素子を分離する第四工程を含む、発光ダイオードランプの製造方法に関する。
また、本発明は、電極層がモールド形成された光抽出部によって支持されるように、回路基板の絶縁体層を除去することを含む、上記製造方法に関する。
また、本発明は、第二工程が、貫通孔を設けた後、熱伝導性材料で該貫通孔の内面をメッキ加工することによって、または貫通孔に熱伝導性材料を充填することによって、熱放出用柱構造を形成する工程を含む、上記製造方法に関する。
さらに、本発明は、第一工程において、20μm〜800μmの厚さを有し、CuまたはAlを含む電極の第一の金属層を形成すること、該金属層の下に(FR−4)エポキシ樹脂からなる200μm〜800μmの厚さの絶縁体層を形成すること、および該絶縁体層の下に20μm〜3000μmの厚さの第二の金属層を形成することを含む、上記製造方法に関する。
Furthermore, the present invention provides a first step of preparing a circuit board on which light-emitting diode chips can be integrated and mounted. As a heat-dissipating part, the heat conductive metal electrode layer on the circuit board is substantially vertically penetrated. A second step of forming a heat-dissipating pillar structure by forming through-holes to be formed, a third step of integrating and mounting a light-emitting diode chip on the metal electrode layer, and molding to form a light extraction part, each light emission The present invention relates to a method for manufacturing a light-emitting diode lamp, including a fourth step of separating a diode element.
Moreover, this invention relates to the said manufacturing method including removing the insulator layer of a circuit board so that an electrode layer may be supported by the light extraction part by which the mold was formed.
Further, in the present invention, after the through hole is provided in the second step, the inner surface of the through hole is plated with a heat conductive material, or the through hole is filled with the heat conductive material. It is related with the said manufacturing method including the process of forming the column structure for discharge | release.
Furthermore, in the first step, the present invention forms a first metal layer of an electrode having a thickness of 20 μm to 800 μm and containing Cu or Al, and (FR-4) epoxy under the metal layer. It is related with the said manufacturing method including forming the 200-800-micrometer-thick insulator layer which consists of resin, and forming the 2nd metal layer of a 20-3000-micrometer thickness under this insulator layer.

また、本発明は、第一の金属層を形成する際に、エッチングによりP型領域とN型領域に分離すること、およびエッチングした後、Agで第一の金属層の表面をメッキ加工することにより反射構造を設けることを含む、上記製造方法に関する。
さらに、本発明は、反射構造が2種以上の曲率半径を有するように形成する、上記製造方法に関する。
さらに、本発明は、光抽出部をモールド形成する際に、屈折率が1.4〜2.5の範囲の材料でモールド形成することを含む、上記製造方法に関する。
さらにまた、本発明は、光抽出部をシリコーンまたはエポキシ材料から200μm〜1000μmの厚さに形成し、回路基板およびエッチングによりP型領域とN型領域に分離された電極の金属層を支持可能とすることを含む、上記製造方法に関する。
In the present invention, when the first metal layer is formed, the P-type region and the N-type region are separated by etching, and after etching, the surface of the first metal layer is plated with Ag. It is related with the said manufacturing method including providing a reflective structure by.
Furthermore, this invention relates to the said manufacturing method formed so that a reflective structure may have 2 or more types of curvature radii.
Furthermore, this invention relates to the said manufacturing method including forming a mold with the material of a refractive index in the range of 1.4-2.5, when forming a light extraction part.
Furthermore, according to the present invention, the light extraction portion is formed from a silicone or epoxy material to a thickness of 200 μm to 1000 μm, and can support the circuit board and the metal layer of the electrode separated into the P-type region and the N-type region by etching. It is related with the said manufacturing method including doing.

本発明は、従来のリードフレームとディスペンス工法を用いる一般的な方法に比べて、小型および薄型でありながらも熱放出特性に優れ、大電流で駆動が可能であるとともに、エネルギー効率を大きく改善する。とくに大量生産しな場合にも性能の均一さ、収率および量産性などの点において優れるため、コスト低減が可能である。その結果として、LEDの需要創出に寄与し、同産業の発展に大きく寄与することが期待される。また、大型のチップの実装および多数のチップの実装が可能になるとともに、モールド成形の際に使用される蛍光体および拡散剤などのタブレット管理が容易になるため、生産者にとって在庫負担が少なくなり、かつデジタル式の光出力増大も可能である。   Compared to a general method using a conventional lead frame and a dispensing method, the present invention is small and thin but has excellent heat release characteristics, can be driven with a large current, and greatly improves energy efficiency. . In particular, even in the case of mass production, cost is reduced because of excellent performance uniformity, yield and mass productivity. As a result, it is expected to contribute to the creation of demand for LEDs and greatly contribute to the development of the industry. In addition, it is possible to mount a large number of chips and a large number of chips, and it is easy to manage tablets such as phosphors and diffusing agents used in molding, which reduces the stock burden on producers. In addition, digital light output can be increased.

本発明の一態様として、発光ダイオードチップを集積して実装可能な回路基板を用意する第一工程、前記回路基板上の熱伝導性の金属製電極層に発光ダイオードチップを集積して実装し、モールドして光抽出部を形成する第二工程、熱放出部として、前記発光ダイオードチップを実装させた前記電極の金属層の少なくとも一部を露出させて熱放出用露出構造を形成する第三工程、各発光ダイオード素子を分離する第四工程を含む、発光ダイオードランプの製造方法を例にして、以下に説明する。   As one aspect of the present invention, a first step of preparing a circuit board on which light emitting diode chips can be integrated and mounted, the light emitting diode chips are integrated and mounted on a thermally conductive metal electrode layer on the circuit board, A second step of forming a light extraction part by molding, a third step of forming an exposed structure for heat emission by exposing at least a part of the metal layer of the electrode on which the light emitting diode chip is mounted as a heat emission part; A method for manufacturing a light-emitting diode lamp including the fourth step of separating each light-emitting diode element will be described below as an example.

第一工程において、Cu、Alなどを含む電極層、電極層の下方に位置するCu層、および電極層とCu層との間に挟まれたFR−4の絶縁層とからなる回路基板を用意する。この際、とくに限定されないが、電極層を20μm〜800μmの厚さに、絶縁層を200μm〜800μmの厚さに、Cu層を20μm〜3000μmの厚さにそれぞれ形成することが好ましい。さらに、基板上での反射効率を高めるために、Ag、Al、Auなどの反射率の高い材料で電極層表面をメッキ加工することができる。また、基板で反射される光の指向性を高めるために、ハーフエッチングにより電極層に凹部を設けることも可能である。   In the first step, a circuit board comprising an electrode layer containing Cu, Al, etc., a Cu layer positioned below the electrode layer, and an FR-4 insulating layer sandwiched between the electrode layer and the Cu layer is prepared. To do. At this time, the electrode layer is preferably formed to a thickness of 20 μm to 800 μm, the insulating layer is formed to a thickness of 200 μm to 800 μm, and the Cu layer is preferably formed to a thickness of 20 μm to 3000 μm. Furthermore, in order to increase the reflection efficiency on the substrate, the electrode layer surface can be plated with a material having high reflectivity such as Ag, Al, or Au. Moreover, in order to improve the directivity of the light reflected by the substrate, it is possible to provide a recess in the electrode layer by half etching.

第二工程において、第一工程で用意した回路基板の電極層にLEDチップを実装し、ワイヤボンディングを行って電極間を接続する。その後、透過性が高く、屈折率が低い樹脂系材料、たとえばシリコーンまたはエポキシ材料などを用いてモールド成形を行い、LEDチップの全体を覆うように光抽出部(一次樹脂層)を形成する。
さらに、レンズの光効率を向上させるために屈折率が異なる層を形成したり、光の反射や誘導などを目的として、光透過性樹脂に蛍光体などの各種添加剤を混合して、レンズ部(二次樹脂層)を形成してもよい。また、モールドの代わりにフィルムを接着させることも可能である。
In the second step, an LED chip is mounted on the electrode layer of the circuit board prepared in the first step, and wire bonding is performed to connect the electrodes. Thereafter, molding is performed using a resin-based material having high transparency and a low refractive index, for example, silicone or epoxy material, and a light extraction portion (primary resin layer) is formed so as to cover the entire LED chip.
Furthermore, in order to improve the light efficiency of the lens, a layer having a different refractive index is formed, or for the purpose of reflecting or guiding light, various additives such as a phosphor are mixed with a light-transmitting resin, and the lens portion (Secondary resin layer) may be formed. It is also possible to adhere a film instead of a mold.

第三工程において、ダイシング工法により回路基板の裏面から下面のCu層および絶縁層を除去し、電極層を露出させて、熱放出部を形成する。ここで、この熱放出用露出構造は、回路基板に形成する直線状に延在する凹部からなる溝状の熱放出通路として形成してもよく、また、ラッピング、エッチングなどの方法により電極層底面の全体を露出させるようにしてもよい。さらに本発明においては、電極として働く金属層の厚さを大きくして、金属層自体が放熱に寄与することができる。また、とくに上述した電極層の底面全体を露出させた場合には、電極層の下層にある絶縁層の略全体または大部分が除去されることになるので、除去した絶縁層に代わってLEDチップに対して十分な支持を与える必要がある。そこで、本発明においては、光抽出部がLEDチップを支持するように形成してもよい。   In the third step, the Cu layer and the insulating layer on the lower surface are removed from the back surface of the circuit board by a dicing method, and the electrode layer is exposed to form a heat release portion. Here, the exposed structure for heat release may be formed as a groove-like heat release passage formed of a linearly extending recess formed in the circuit board, and the bottom surface of the electrode layer may be formed by a method such as lapping or etching. You may make it expose the whole. Furthermore, in the present invention, the thickness of the metal layer serving as an electrode can be increased, and the metal layer itself can contribute to heat dissipation. In particular, when the entire bottom surface of the electrode layer described above is exposed, almost all or most of the insulating layer under the electrode layer is removed, so that the LED chip is used instead of the removed insulating layer. It is necessary to give sufficient support to. Therefore, in the present invention, the light extraction unit may be formed to support the LED chip.

第四工程において、上記手順によって作成したLEDチップを実装した発光素子を単位ごとにダイシングによって分離する。   In the fourth step, the light emitting element on which the LED chip created by the above procedure is mounted is separated for each unit by dicing.

以上説明した態様では、熱放出部として電極露出構造を設けたが、その代わりに電極層を略貫通する貫通孔を形成して熱放出部を形成してもよい。この場合、まず回路基板を用意し、基板裏面から貫通孔を形成してから光抽出部をモールド形成することが好ましい。さらに、形成した貫通孔の内面を導電性の高い金属、たとえばAgなどでメッキ加工することによって、熱が放出される通路を形成する。あるいは、貫通孔の空間を熱伝導性をもつ金属材料で充填することによって、熱放出通路を形成してもよい。   In the embodiment described above, the electrode exposure structure is provided as the heat release portion, but instead, the heat release portion may be formed by forming a through hole that substantially penetrates the electrode layer. In this case, it is preferable to first prepare a circuit board and form a through hole from the back side of the board before molding the light extraction portion. Further, the inner surface of the formed through hole is plated with a highly conductive metal such as Ag to form a passage through which heat is released. Alternatively, the heat release passage may be formed by filling the space of the through hole with a metal material having thermal conductivity.

また、上記従来技術の第2の例においても、LEDチップが回路基板の平面上に実装されるが、チップからの放出光が光反射板で反射されて指向性を有する必要があるにもかかわらず、構造的に薄型であるため、光反射効率、光指向性その他の光利用効率などの点でリードフレーム基板を用いる場合に比べて全般的に性能の低下が発生する。一方、リードフレーム基板を用いる場合には、チップからの放出光によって光反射板または光ガイド部の劣化が起こる。
これらの問題を解決するため、本発明では、反射効率、指向特性その他の光利用効率を向上させるため、すなわち、側面および下面に入射する光の反射を誘導して光の抽出効率を高めるために、抽出された光が再度チップに入射し、再吸収されないように反射板および反射構造を設けることができる。
In the second example of the prior art as well, the LED chip is mounted on the plane of the circuit board, but the emitted light from the chip is reflected by the light reflecting plate and needs to have directivity. However, since the structure is thin, the performance is generally reduced as compared with the case of using the lead frame substrate in terms of light reflection efficiency, light directivity and other light utilization efficiency. On the other hand, when the lead frame substrate is used, the light reflecting plate or the light guide portion is deteriorated by the light emitted from the chip.
In order to solve these problems, in the present invention, in order to improve reflection efficiency, directional characteristics, and other light use efficiency, that is, in order to increase the light extraction efficiency by inducing reflection of light incident on the side surface and the bottom surface. A reflector and a reflecting structure can be provided so that the extracted light is incident on the chip again and is not reabsorbed.

より具体的には、露光工程技術を利用して光反射板構造および指向構造を形成する。この場合、反射板の形状は複数の曲率半径を有するように、かつ下方向の光および側面に向かう光が指向特性を有するように形成することが好ましい。上記の反射構造にさらに反射率が高いAgなどの金属材料でコーティングしてもよい。この際、反射構造は、チップで放出された光の再吸収が起こらないように、その大きさを最適化設計する。   More specifically, the light reflection plate structure and the directivity structure are formed by using an exposure process technique. In this case, it is preferable that the shape of the reflecting plate is formed so as to have a plurality of radii of curvature, and the downward light and the light toward the side surface have directivity characteristics. The reflective structure may be coated with a metal material such as Ag having a higher reflectance. At this time, the size of the reflection structure is optimized so that re-absorption of light emitted from the chip does not occur.

図6を参照して本発明の一例である発光ダイオードランプ10を示す。銅製プレート(電極層)12、銅製パッド16およびその間に配される絶縁体層14からなる回路基板を、その背面からダイシング工法により切削して凹部30を形成して、電極層12の一部を露出させる。これを、プリント基板24上に銅製パッド22を介してはんだ(18)付けして発光ダイオード10を得る。。LEDチップ20の上方には、一次樹脂層(光抽出部)26、二次樹脂層(レンズ部)28を形成する。図中の矢印は、チップ20から発生する熱の放出経路を示す。図示した例では、4カ所の凹部30を設けたが、駆動電流などの設計仕様に応じてその個数および大きさは適宜変更することができる。   A light-emitting diode lamp 10 which is an example of the present invention is shown with reference to FIG. A circuit board comprising a copper plate (electrode layer) 12, a copper pad 16 and an insulator layer 14 disposed therebetween is cut from the back by a dicing method to form a recess 30, and a part of the electrode layer 12 is formed. Expose. This is soldered (18) on the printed circuit board 24 through the copper pad 22, and the light emitting diode 10 is obtained. . A primary resin layer (light extraction portion) 26 and a secondary resin layer (lens portion) 28 are formed above the LED chip 20. Arrows in the figure indicate a path for releasing heat generated from the chip 20. In the illustrated example, four recesses 30 are provided, but the number and size thereof can be changed as appropriate according to design specifications such as drive current.

なお、後述する本発明の各態様の説明において、図6に示す態様と共通または対応する構成については適宜説明を省き、図6と同じ符号を付すものとする。   In the description of each aspect of the present invention to be described later, the same or corresponding configuration as that shown in FIG. 6 will not be described as appropriate, and the same reference numerals as those in FIG.

図7に示す本発明の別態様の発光ダイオードランプ40では、電極層12の底面全体を露出させることによって熱放出部を形成する。この際、図示したように、電極層12下方の絶縁体層の略全体を除去する。この態様では、LEDチップ20の下層の電極層12が従来のものより厚く形成されており、本来の電極としての作用に加えて、高い放熱機能を有する。   In the light emitting diode lamp 40 according to another aspect of the present invention shown in FIG. 7, the heat emission part is formed by exposing the entire bottom surface of the electrode layer 12. At this time, as shown in the figure, substantially the entire insulator layer below the electrode layer 12 is removed. In this aspect, the lower electrode layer 12 of the LED chip 20 is formed thicker than the conventional one, and has a high heat dissipation function in addition to the function as an original electrode.

また、熱放出部として、回路基板に貫通孔52を形成した本発明の別の態様の発光ダイオードランプ50を図8に示す。図中に矢印で示したとおり、LEDチップ20から発生した熱は、貫通孔52を通じて外部に放出される。この放熱機能をより高めるために、貫通孔52の内面をAg、Auなどの電導性材料でメッキ処理したり、電導性の高い材料で貫通孔を充填してもよい。   Further, FIG. 8 shows a light-emitting diode lamp 50 according to another aspect of the present invention in which a through hole 52 is formed in a circuit board as a heat release portion. As indicated by arrows in the figure, the heat generated from the LED chip 20 is released to the outside through the through hole 52. In order to enhance the heat dissipation function, the inner surface of the through hole 52 may be plated with a conductive material such as Ag or Au, or the through hole may be filled with a highly conductive material.

本発明の幾つかの変形例
LEDチップ20からの放出光に指向特性を持たせるために、光ガイド62をチップ20の周辺に設置することができる。レンズ部28の内面、側面の周りにテーピングすることによって固定したり、反射率が高い樹脂材料を用いて型成形することができる。この場合、反射面が一定な傾斜面を持つように形成することもできる。図9、図10に上記態様を示す。
In order to give directional characteristics to the light emitted from the LED chip 20 according to some modified examples of the present invention , a light guide 62 can be installed around the chip 20. It can be fixed by taping around the inner and side surfaces of the lens portion 28, or can be molded using a resin material having a high reflectance. In this case, the reflecting surface can be formed to have a constant inclined surface. The said aspect is shown in FIG. 9, FIG.

LEDチップ20からの光の指向性および出力特性を向上させるために、回路基板の電極層12をハーフエッチングにより部分的に凹ませて、反射構造82を形成してもよい。反射構造82を具備する例を図11、図12に示す。この反射構造82は、単数または複数の曲率半径を有するように形成したり、テーパ状、皿状または椀状に形成することによって、側面および下面に向かう光を誘導することができ、光の指向性および出力を高めている。銅製の電極層12を一定厚さ(たとえば約100μm以上)ハーフエッチングして反射構造82を形成する場合、熱放出部84はエッチングした部分の真下ではなく、回路基板の端部に形成する(図12)ことが好ましい。また、必要に応じて、素子を分離する作業と同時に行うことができるように、適宜位置決めをすることができる。   In order to improve the directivity and output characteristics of light from the LED chip 20, the reflective structure 82 may be formed by partially denting the electrode layer 12 of the circuit board by half etching. An example including the reflecting structure 82 is shown in FIGS. The reflective structure 82 can be formed to have one or a plurality of radii of curvature, or can be tapered, dished, or bowl-shaped to induce light directed toward the side surface and the bottom surface. Increasing sex and output. When the reflective structure 82 is formed by half-etching the copper electrode layer 12 to a certain thickness (for example, about 100 μm or more), the heat-dissipating portion 84 is formed not at the etched portion but at the end of the circuit board (see FIG. 12) is preferred. Further, if necessary, positioning can be performed as appropriate so that it can be performed simultaneously with the work of separating the elements.

熱放出用の貫通構造を具備するアルミナ−セラミックスパッケージの従来技術を示す図である。It is a figure which shows the prior art of the alumina-ceramics package which comprises the penetration structure for heat dissipation. 金属スラグ構造の熱通路を具備するパッケージの従来技術を示す図である。It is a figure which shows the prior art of the package which comprises the heat path of a metal slag structure. 熱放出性のフレームで構成されたAINパッケージの従来技術を示す図である。It is a figure which shows the prior art of the AIN package comprised with the heat | fever discharge | release frame. 回路基板を用いた小型・薄型パッケージの従来技術を示す図である。It is a figure which shows the prior art of the small and thin package using a circuit board.

回路基板にガイド部およびトランスファーモールドレンズを取り付けたパッケージの従来技術を示す図である。It is a figure which shows the prior art of the package which attached the guide part and the transfer mold lens to the circuit board. ダイシング工法を用いて形成された熱放出用通路を具備する本発明の一例を示す図である。It is a figure which shows an example of this invention which comprises the channel | path for heat release formed using the dicing method. ラッピング工法を用いて電極底面全体を露出させて形成した熱放出部を具備する本発明の一例を示す図である。It is a figure which shows an example of this invention which comprises the heat-dissipating part formed by exposing the whole electrode bottom face using the lapping method. 電極層を略貫通して形成された熱放出部を具備する本発明の一例を示す図である。It is a figure which shows an example of this invention which comprises the heat-dissipation part formed substantially penetrating the electrode layer.

光のガイド構造を具備する本発明の別の例を示す図である。It is a figure which shows another example of this invention which comprises the light guide structure. 光のガイド構造を具備する本発明の別の例を示す図である。It is a figure which shows another example of this invention which comprises the light guide structure. 光の反射構造を具備する本発明の別の例を示す図である。It is a figure which shows another example of this invention which comprises the reflection structure of light. 光の反射構造を具備する本発明の別の例を示す図である。It is a figure which shows another example of this invention which comprises the reflection structure of light.

符号の説明Explanation of symbols

10、40、50、60、70、80、90 発光ダイオードチップ
12 電極層
14 絶縁体層
16 銅製パッド
18 はんだ層
20 LEDチップ
22 銅製パッド
24 プリント基板
26 一次樹脂層(光抽出部)
28 二次樹脂層(レンズ部)
30 凹部
52 貫通孔
62 光ガイド
82 反射構造
84 貫通孔
10, 40, 50, 60, 70, 80, 90 Light emitting diode chip 12 Electrode layer 14 Insulator layer 16 Copper pad 18 Solder layer 20 LED chip 22 Copper pad 24 Printed circuit board 26 Primary resin layer (light extraction part)
28 Secondary resin layer (lens part)
30 Recess 52 Through-hole 62 Light guide 82 Reflective structure 84 Through-hole

Claims (12)

発光ダイオードランプの製造方法であって、
銅製プレート電極層、該電極層の下方に位置するCu層、および該電極層とCu層との間に挟まれた絶縁体層とからなる回路基板を用意する第一工程、
前記回路基板上の電極層に、LEDチップを集積して実装し、モールドして光抽出部を形成する第二工程、
回路基板の裏面から下面のCu層および絶縁層を除去して、複数の直線溝状の熱放出通路を形成し、前記電極層の底面の少なくとも一部を露出させる第三工程、
LEDチップを実装した発光素子を単位ごとに分離する第四工程
を含み、
前記複数の直線溝状の熱放出通路は、分離された回路基板の端部と該端部以外に少なくとも1つの直線溝状の熱放出通路を含むものである、
前記発光ダイオードランプの製造方法。
A method of manufacturing a light emitting diode lamp,
A first step of preparing a circuit board comprising a copper plate electrode layer, a Cu layer located below the electrode layer, and an insulator layer sandwiched between the electrode layer and the Cu layer ;
A second step in which LED chips are integrated and mounted on the electrode layer on the circuit board and molded to form a light extraction unit;
Third step to remove the Cu layer and the insulating layer of the lower surface from the rear surface of the circuit board to form a plurality of linear grooves like heat discharge path, causing expose at least a portion of the bottom surface of the electrode layer,
Fourth step of separating the light emitting element mounted with the LED chip for each unit
Including
The plurality of straight groove-shaped heat release passages include an end portion of the separated circuit board and at least one straight groove-like heat discharge passage in addition to the end portions.
A method for manufacturing the light emitting diode lamp.
第三工程において、ダイシング工法により複数の直線溝状の熱放出通路を形成することを含む、請求項1に記載の発光ダイオードランプの製造方法。The method of manufacturing a light-emitting diode lamp according to claim 1, wherein in the third step, a plurality of linear groove-shaped heat release passages are formed by a dicing method. 第四工程において、ダイシングにより発光素子を単位ごとに分離することを含む、請求項1または2のいずれかに記載の発光ダイオードランプの製造方法。The method for manufacturing a light-emitting diode lamp according to claim 1, wherein in the fourth step, the light-emitting element is separated into units by dicing. 第一工程において、銅製プレート電極層をP型領域とN型領域に分離することを含む、請求項1〜3のいずれか一項に記載の発光ダイオードランプの製造方法。The manufacturing method of the light emitting diode lamp as described in any one of Claims 1-3 including isolate | separating a copper plate electrode layer into a P-type area | region and an N-type area | region in a 1st process. 第一工程において、電極層に凹部反射構造を形成することを含む、請求項1〜4のいずれか一項に記載の発光ダイオードランプの製造方法。The manufacturing method of the light emitting diode lamp as described in any one of Claims 1-4 including forming a recessed part reflective structure in an electrode layer in a 1st process. 第一工程において、Ag、AlまたはAuを含む反射率の高い材料で電極層表面をメッキ加工することを含む、請求項1〜5のいずれか一項に記載の発光ダイオードランプの製造方法。The method for manufacturing a light-emitting diode lamp according to any one of claims 1 to 5, wherein in the first step, the electrode layer surface is plated with a highly reflective material containing Ag, Al, or Au. 第三工程において、電極層底面の全体を露出させることを含む、請求項1〜6のいずれか一項に記載の発光ダイオードランプの製造方法。The method for manufacturing a light-emitting diode lamp according to any one of claims 1 to 6, comprising exposing the entire bottom surface of the electrode layer in the third step. 請求項1〜6のいずれか一項に記載の製造方法によって作成された発光ダイオードランプ。The light emitting diode lamp produced by the manufacturing method as described in any one of Claims 1-6. 発光ダイオードランプであって、
銅製プレート電極層、銅製パッド、およびその間に配される絶縁体層からなる回路基板と、
前記電極層に、集積して実装された発光ダイオードチップと、
前記発光ダイオードチップ上にモールド形成された光抽出部と、
前記銅製パッドおよび前記絶縁層を除去して形成された、前記電極層の底面の少なくとも一部を露出させるための複数の直線溝状の熱放出通路と
を具備し、
前記複数の直線溝状の熱放出通路は、前記回路基板の端部と該端部以外に少なくとも1つの直線溝状の熱放出通路を含む、
前記発光ダイオードランプ。
A light emitting diode lamp,
A circuit board composed of a copper plate electrode layer, a copper pad, and an insulator layer disposed therebetween ,
Said electrode layer, a light emitting diode chip mounted in an integrated,
A light extraction part molded on the light emitting diode chip;
A plurality of linear groove-shaped heat release passages formed by removing the copper pad and the insulating layer and exposing at least a part of the bottom surface of the electrode layer ;
Comprising
The plurality of linear groove-shaped heat release passages include an end portion of the circuit board and at least one straight groove-like heat discharge passage in addition to the end portion.
The light emitting diode lamp.
電極層が、P型領域とN型領域とに分離されている、請求項9に記載の発光ダイオードランプ。The light emitting diode lamp according to claim 9, wherein the electrode layer is separated into a P-type region and an N-type region. 電極層に、部分的に凹ませた反射構造を有する、請求項9または10に記載の発光ダイオードランプ。The light-emitting diode lamp according to claim 9 or 10, wherein the electrode layer has a partially concave reflecting structure. 反射構造が、単数または複数の曲率半径を有する、請求項11に記載の発光ダイオードランプ。The light emitting diode lamp of claim 11, wherein the reflective structure has one or more radii of curvature.
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JP2010512662A (en) 2006-12-11 2010-04-22 ザ リージェンツ オブ ザ ユニバーシティ オブ カリフォルニア Transparent light emitting diode
JP2009206383A (en) * 2008-02-29 2009-09-10 Sharp Corp Led module and led lighting device with the same
KR100986212B1 (en) * 2008-03-10 2010-10-07 주식회사 이츠웰 Metal substrate for side view led lamp, side view type led package using the substrate and method of making the led package
JP2009272363A (en) * 2008-05-01 2009-11-19 Rohm Co Ltd Led lamp
KR102487685B1 (en) * 2015-11-10 2023-01-16 쑤저우 레킨 세미컨덕터 컴퍼니 리미티드 Light emitting device and lighting apparatus having thereof
US10827629B2 (en) * 2018-01-19 2020-11-03 Ge Aviation Systems Llc Control boxes and system-on-module circuit boards for unmanned vehicles
US11592166B2 (en) 2020-05-12 2023-02-28 Feit Electric Company, Inc. Light emitting device having improved illumination and manufacturing flexibility
US11876042B2 (en) 2020-08-03 2024-01-16 Feit Electric Company, Inc. Omnidirectional flexible light emitting device

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* Cited by examiner, † Cited by third party
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JP3311914B2 (en) * 1995-12-27 2002-08-05 株式会社シチズン電子 Chip type light emitting diode
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JP2002162626A (en) * 2000-11-22 2002-06-07 Sony Corp Heat radiating device of light source for liquid crystal display and its manufacturing method
JP2002299513A (en) * 2001-03-30 2002-10-11 Fujitsu Ltd Surface mount part and manufacturing method thereof
US6531328B1 (en) * 2001-10-11 2003-03-11 Solidlite Corporation Packaging of light-emitting diode
JP2003124624A (en) * 2001-10-18 2003-04-25 Canon Inc Heat connector
US20030089522A1 (en) * 2001-11-15 2003-05-15 Xerox Corporation Low impedance / high density connectivity of surface mount components on a printed wiring board
JP4009097B2 (en) * 2001-12-07 2007-11-14 日立電線株式会社 LIGHT EMITTING DEVICE, ITS MANUFACTURING METHOD, AND LEAD FRAME USED FOR MANUFACTURING LIGHT EMITTING DEVICE
JP2005079329A (en) * 2003-08-29 2005-03-24 Stanley Electric Co Ltd Surface-mounting light emitting diode
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