JP5092621B2 - Wiring board and manufacturing method thereof - Google Patents

Description

  The present invention relates to a wiring board and a manufacturing method thereof.

A wiring board in which wiring including a Micro Electro Mechanical Systems (hereinafter referred to as MEMS) structure is arranged on a substrate is used (for example, see Patent Document 1).
JP 2003-121470 A

In a wiring board, in order to protect the wiring, an organic insulating layer is usually disposed on the wiring. By the way, it may be necessary to protect the wiring on the board more strongly for environmental resistance or the like. For example, when a MEMS structure is constructed on a wiring board in which wiring is protected by an organic insulating layer, the organic insulating layer may be damaged by powerful chemicals used in the MEMS production process.
In view of the above, an object of the present invention is to provide a wiring board in which wiring on the board is effectively protected and a method for manufacturing the wiring board.

  A wiring board according to an aspect of the present invention includes a laminate in which at least one wiring layer and an organic insulating layer are alternately stacked on the substrate, and the uppermost organic insulating layer is a polyimide resin. And an inorganic insulating layer made of silicon oxide disposed on the uppermost organic insulating layer of the laminate.

  A method of manufacturing a wiring board according to an aspect of the present invention includes a laminate in which at least one wiring layer and an organic insulating layer are alternately stacked on a substrate, and the uppermost organic insulating layer is formed of a polyimide resin. Forming a body, and forming an inorganic insulating layer made of silicon oxide on the uppermost organic insulating layer of the laminate.

  ADVANTAGE OF THE INVENTION According to this invention, the wiring board by which the wiring on a board | substrate is protected effectively, and its manufacturing method can be provided.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
FIG. 1 is a sectional view showing a wiring board 100 according to an embodiment of the present invention.
The wiring substrate 100 includes a substrate 110, wiring layers 121 to 124, organic insulating layers 131 to 134, interlayer connection portions 141 to 143, and an inorganic insulating layer 151. Among these, the board | substrate 110, the wiring layers 121-124, and the organic insulating layers 131-134 function as "the laminated body which laminates | stacks at least one wiring layer and an organic insulating layer on a board | substrate alternately."

The substrate 110 is made of a semiconductor such as silicon.
The wiring layers 121 to 124 are layers on which a wiring pattern made of a conductor such as metal is disposed, and are stacked on each other. That is, the wiring board 100 is a four-layer wiring board in which four wiring layers 121 to 124 are laminated.

  The organic insulating layers 131 to 134 are made of, for example, an organic insulator such as polyimide resin having a thickness of 8 to 10 μm or benzocyclobutene (BCB). Among these, the organic insulating layers 131 to 133 are interlayer insulating films that are disposed between the wiring layers 121 to 124 and electrically insulate them. The organic insulating layer 134 is disposed on the uppermost wiring layer 124 and protects the wiring layer 124 electrically and mechanically. An opening 135 is provided in the organic insulating layer 134 for electrical connection between the wiring layer 124 and the outside.

  The inorganic insulating layer 151 is made of, for example, an inorganic insulator such as silicon oxide (SiOx) or silicon nitride (SiNx) having a thickness of 0.1 to 2 μm, and protects the wiring layer 124 electrically and mechanically. . Each of the inorganic insulating layers 151 is provided with an opening 153 for electrical connection between the wiring layer 124 and the outside. When the thickness of the inorganic insulating layer 151 is less than 0.1 μm, there is a possibility that protection of the organic insulating layer 134, the wiring layer 124, and the like is lacking due to defects in the inorganic insulating layer 151 and the like. Further, when the thickness of the inorganic insulating layer 151 exceeds 2.0 μm, the internal stress may cause a crack and lack protection.

The wiring layer 124 is formed on the organic insulating layer 133. This is because it is preferable to interpose the organic insulating layer 134 in the middle rather than directly disposing the inorganic insulating layer 151 on the wiring layer 124 as shown below.
The inorganic insulating layer 151 is different in nature from the organic insulating layer 133. In general, inorganic insulating materials are harder (less flexible (higher Young's modulus)), better in insulation (higher resistivity), and larger in internal stress than organic insulating materials. By arranging the organic insulating layer 134 having high flexibility and the inorganic insulating layer 151 having high insulating property in this order on the wiring layer 124, the reliability of mechanical and electrical protection of the wiring layer 124 can be improved.

  If only the organic insulating layer 134 is disposed on the wiring layer 124, the electrical protection of the wiring layer 124 becomes insufficient, and sufficient insulation may not be obtained. Further, when the inorganic insulating layer 151 is directly disposed on the wiring layer 124, the wiring layer 124 may be bent due to internal stress of the inorganic insulating layer 151. This is because the wiring layer 124 is disposed on the flexible organic insulating layers 131 to 133.

(Comparative example)
FIG. 2 is a cross-sectional view showing a wiring board 100x according to a comparative example of the present invention.
The wiring board 100 x does not have the organic insulating layer 134 and the inorganic insulating layer 151 as compared with the wiring board 100.
Since the wiring board 100x does not have the organic insulating layer 134 and the inorganic insulating layer 151, there is a possibility that the protection of the wiring layer 124 from the outside is insufficient particularly when used in a severe environment. On the other hand, in the wiring substrate 100, the wiring layer 124 is protected by the organic insulating layer 134 and the inorganic insulating layer 151, so that the environmental resistance is improved.

(Manufacturing method of wiring board 100)
Hereinafter, a method for manufacturing the wiring substrate 100 will be described.
FIG. 3 is a flowchart showing a procedure for manufacturing the wiring board 100. 4A to 4F are cross-sectional views showing the wiring board 100 manufactured by the procedure of FIG.

(1) Formation of multilayer wiring layer on substrate 110 (steps S11 and S12, FIGS. 4A to 4D)
Wiring layers 121 to 124 are formed on the substrate 110.
1) Formation of the wiring layer 121 on the substrate 110 (FIG. 4A)
For example, the wiring layer 121 is formed on the substrate 110 by the following procedure.

  A substrate 110 such as silicon is prepared (Step S11). The thickness of the substrate 110 is, for example, 200 to 800 μm. Prior to the base layer, an inorganic insulating layer is formed on the substrate 110 as necessary. The inorganic insulating layer has a thickness of 50 to 2000 nm, for example.

Formation of base layer A base layer is formed on the substrate 110. In order to form the wiring layer 121 by electrolytic plating, conductivity is imparted to the substrate 110.
For the underlayer, for example, a thin film such as copper, silver, or gold formed by sputtering or the like can be used. The underlayer may have a laminated structure of such a thin film and an adhesion film such as chromium, titanium, titanium nitride, or nickel.

-Formation and patterning of resist A resist is apply | coated on the board | substrate 110, It patterns by exposing using a photomask. As a result, an opening is formed in the resist. This opening functions as a mold for forming the wiring layer 121.

Electrolytic Plating A wiring layer 121 is formed by supplying power to the base layer using a plating solution and depositing a conductive material such as metal in the opening of the resist (electrolytic plating method). The thickness of the wiring layer 121 is 2 to 6 μm, for example.

・ Removal of resist Dissolve the resist with a solvent.
As described above, the wiring layer 121 having the wiring pattern is formed on the substrate 110 (FIG. 4A).

2) Formation and patterning of organic insulating layer 131 on substrate 110 (FIG. 4B)
An organic insulating layer 131 is formed on the substrate 110. For example, an organic insulating layer 131 having an opening 141A is formed by applying a photosensitive organic insulating material to the substrate 110, exposing the substrate 110 in a predetermined pattern, and developing. As the photosensitive organic insulating material, for example, polyimide resin, benzocyclobutene (BCB), or the like can be used. The thickness of the organic insulating layer 131 is, for example, 8 to 10 μm.

3) Formation of interlayer connection 141 (FIG. 4C)
A base metal layer and a resist pattern are sequentially formed so as to cover the organic insulating layer 131. The base metal layer can be formed by, for example, a sputtering method. The thickness of such a base metal layer can be set in the range of 50 to 350 nm, for example.
The resist pattern has an opening corresponding to the opening of the organic insulating layer 131.

Using this resist pattern as a mask and using the underlying metal layer as a power feeding layer, deposit a conductive material by electrolytic plating, and then remove the resist pattern. As a result, the opening of the organic insulating layer 131 is filled with the conductive material, and the interlayer connection portion 141 is formed.
After that, the excess base metal layer existing on the interlayer connection 141 is removed. Thereby, the organic insulating layer 131 and the interlayer connection 141 are formed on the substrate 110 (FIG. 4C).

4) Formation of wiring layers 122 to 124 on the substrate 110 (FIG. 4D)
By repeating the above steps 1) to 3), the wiring layers 122 to 124, the interlayer connection portions 142 and 143, and the organic insulating layers 132 to 133 are generated.

(2) Formation and patterning of organic insulating layer 134 (step S13, FIG. 4E)
An organic insulating layer 134 is formed on the substrate 110. For example, an organic insulating layer 131 having an opening is formed by applying a photosensitive organic insulating material to the substrate 110, exposing and developing in a predetermined pattern. As the photosensitive organic insulating material, for example, polyimide resin, benzocyclobutene (BCB) can be used. The thickness of the organic insulating layer 134 is, for example, 2 to 20 μm.

(3) Formation / patterning of inorganic insulating layer 151 (step S14, FIG. 4F, FIG. 1)
Formation of the inorganic insulating layer 151 (FIG. 4F)
An inorganic insulating layer 151 is formed. For example, the inorganic insulating layer 151 made of silicon oxide (SiOx), silicon nitride (SiNx), or the like is formed by sputtering, CVD (Chemical Vapor Deposition), or the like. At this time, for example, the inorganic insulating layer 151 in which the composition ratio of elements is changed is formed as follows.
In the sputtering method, reactive gas O ₂ is introduced in addition to Ar as a sputtering gas, and the ratio of O ₂ gas (O ₂ / (Ar + O ₂ )) is changed.
In the CVD method, the mixing ratio of the reaction gas (for example, the mixing ratio of silane gas and oxygen gas) is changed.
• Use the plasma CVD method with a bias applied to the substrate side to change this bias. In plasma CVD, by applying a bias (voltage) to the substrate side, ions in the plasma can be drawn into the substrate. Depending on the magnitude of this bias, the amount of ions drawn (amount of supply) can be changed to control the film quality.

Formation of resist pattern A resist pattern is formed on the inorganic insulating layer 151. That is, a resist pattern having an opening is formed by applying a photosensitive resist, exposing and developing.

-Patterning of the inorganic insulating layer 151 The inorganic insulating layer 151 is etched using the resist pattern as a mask to form an opening. For this etching, either dry etching (RIE (Reactive Ion Etching) or the like) or wet etching (by an etching solution) may be used.
In this way, the wiring board 100 is formed (FIG. 1).

(Example)
Examples of the present invention will be described below. As a result of the experiment, it was found that the material of the inorganic insulating layer 151 greatly affects the adhesion between the organic insulating layer 134 and the inorganic insulating layer 151.
The organic insulating layer 134 includes a photosensitive polyimide material (specifically, HD7010 (samples 1 to 6) manufactured by DuPont Microsystems, PW1800 (sample 7) manufactured by Toray, Cyclotene-4024-40 (hereinafter referred to as BCB) manufactured by Dow Chemical Co., Ltd.) (Sample 8) HD7010 is a negative type, characterized by thick film and high resolution, PW1800 is a positive type, and has a good adhesion to metal.BCB is a negative type, high resolution It is an insulating material characterized by image quality and good electrical characteristics.
As the inorganic insulating layer 151, silicon oxide (SiOx) formed by CVD using silane gas (SiH ₄ ) and oxygen gas (O ₂ ) as gas species was used.
Here, the wiring substrate 100 in which the composition ratio of the silicon element and the oxygen element in the silicon oxide was changed by changing the mixing ratio of the silane gas and the oxygen gas at the time of film formation by CVD.

  Tables 1 and 2 show experimental results using HD7010 and PW1800 as polyimide, respectively. (O / Si) The composition ratio, the internal stress [MPa], the adhesion strength [mN], the adhesion strength, and the insulating properties are represented in a corresponding manner.

  When polyimide is BCB, when (O / Si) composition ratio: 1.69, internal stress [MPa]: 200, adhesion strength [mN]: 40.5, adhesion strength: ○, insulation: ○ Results were obtained.

  The (O / Si) composition ratio represents the composition ratio of oxygen atoms to silicon elements (x in SiOx) in the produced silicon oxide (SiOx), and the produced silicon oxide is expressed by ESCA (electron spectroscopy for chemical analysis). : X-ray electron spectroscopy). Here, ESCALAB 220i-XL manufactured by VG Scientific was used as an ESCA measuring device.

  The internal stress [MPa] represents the internal stress (here, compressive stress) of the prepared silicon oxide (SiOx), a silicon oxide film is formed on a dummy substrate for stress measurement, and the substrate is bent (curvature). ) Was measured by detecting the size of the substrate (substrate curvature measurement method).

  The adhesion strength was measured by the micro scratch method (conforming to JIS R 3255). In the micro scratch method, the load is continuously increased while the indenter needle (diamond indenter) is vibrated horizontally, and the adhesion (adhesion strength) of the thin film is determined from the load when the thin film is damaged (peeling, breaking, etc.). How to test.

The adhesion was tested by the following method (adhesion test).
An organic insulating layer 134 having a thickness of 1 μm and an inorganic insulating layer 151 are sequentially formed on the substrate and patterned into a 10 mm square grid pattern by photolithography. After that, a tape peeling test was performed using CT24 Nichiban Co., Ltd. tape.
Here, “◯” indicates that the adhesion is good, and as a result of the adhesion test, no peeling occurred. “X” and “Δ” both indicate that the adhesion was poor and peeling occurred during the adhesion test. Among these, “×” and “Δ” correspond to the amount of peeling (“×” means that peeling is large).

The insulation was tested by the following method.
After the inorganic insulating layer 151 is formed on the Si substrate, a pure-Al (hereinafter, p-Al) film having a thickness of 0.3 μm is formed. Next, the p-Al film is patterned into a 200 μm square pad shape by photolithography to form a large number of Al pads. At this time, the interval between the Al pads was set to 200 μm. A voltage of 10 V was applied between the Al pads, and the insulation resistance was measured.
“◯” and “×” indicate good and bad insulation, respectively. For the determination of insulation, the case of 100 GΩ or more was rated as “◯” and the case of less than “X” was evaluated as “X”. As the composition ratio R is decreased, the electrical property changes from an insulating material to a semiconductor material, and thus the resistance value decreases.

As can be seen from Table 1, it can be seen that the (O / Si) composition ratio R affects internal stress, adhesion strength, adhesion strength, and insulation.
When the composition ratio R was in the following range, both adhesion and insulation were good.
0.5 <R ≦ 1.71
When the composition ratio R was 1.72 or more, the adhesion was insufficient and peeling occurred during the test. When the composition ratio R was 0.5 or less, the insulation was insufficient.

The adhesion strength corresponds to the adhesion strength, and the adhesion strength test was passed when the adhesion strength was 40 mN or more.
The internal stress also corresponds to the adhesion force, and passed the adhesion test when the compressive stress was 170 MPa or more.

(Other embodiments)
Embodiments of the present invention are not limited to the above-described embodiments, and can be expanded and modified. The expanded and modified embodiments are also included in the technical scope of the present invention.

It is sectional drawing of the wiring board which concerns on one Embodiment of this invention. It is sectional drawing of the wiring board which concerns on the comparative example of this invention. It is a flowchart showing the procedure which manufactures the wiring board of FIG. It is sectional drawing showing the wiring board manufactured by the procedure of FIG. It is sectional drawing showing the wiring board manufactured by the procedure of FIG. It is sectional drawing showing the wiring board manufactured by the procedure of FIG. It is sectional drawing showing the wiring board manufactured by the procedure of FIG. It is sectional drawing showing the wiring board manufactured by the procedure of FIG. It is sectional drawing showing the wiring board manufactured by the procedure of FIG.

Explanation of symbols

100 Wiring substrate 110 Substrate 121-124 Wiring layer 131-134 Organic insulating layer 135 Opening 141-143 Interlayer connection 151 Inorganic insulating layer 153 Opening

Claims (6)

A wiring layer on a substrate, formed by laminating an organic insulating layer are alternately one by at least one layer, and the uppermost layer of the organic insulating layer having an opening exposing the wiring layer immediately below consists of polyimide resin, and laminates ,
Arranged so as to continuously cover the uppermost organic insulating layer , the side surface of the opening of the uppermost layer, and at least part of the wiring layer exposed from the opening. An inorganic insulating layer made of silicon oxide in which the ratio of the number of oxygen atoms to is greater than 0.5 and less than or equal to 1.71,
A wiring board comprising: The wiring board according to claim 1, wherein the inorganic insulating layer and the uppermost organic insulating layer are in close contact with each other with an adhesive strength of 40 mN or more. The wiring board according to claim 1, wherein the inorganic insulating layer has a compressive stress of 130 MPa or more. Form a laminate in which at least one wiring layer and one organic insulating layer are alternately stacked on a substrate, and the uppermost organic insulating layer having an opening exposing the wiring layer directly below is made of a polyimide resin. Steps,
Arranged so as to continuously cover the uppermost organic insulating layer , the side surface of the opening of the uppermost layer, and at least part of the wiring layer exposed from the opening. An inorganic insulating layer made of silicon oxide having a ratio of the number of oxygen atoms to 0.5 to 1.71 is formed by CVD using silane gas (SiH ₄ ) and oxygen gas (O ₂ ) as gas species Steps to do,
A method for manufacturing a wiring board, comprising: The method for manufacturing a wiring board according to claim 4, wherein the polyimide resin is a photosensitive polyimide material. The method for manufacturing a wiring board according to claim 4, wherein the formed inorganic insulating layer and the uppermost organic insulating layer are adhered with an adhesion strength of 40 mN or more.

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