JP5070247B2 - Semiconductor device manufacturing method and semiconductor device - Google Patents

Description

The present invention relates to a method of manufacturing a semi-conductor device, and a semiconductor device.

Conventionally, as a technique related to a semiconductor manufacturing apparatus, there is one disclosed in Patent Document 1, for example. The technology of Patent Document 1 relates to a semiconductor wafer in which a buffer layer, an n-type nitride semiconductor layer, an active layer, a p-type nitride semiconductor layer, and an n-type contact layer are sequentially grown on a sapphire substrate in this order. In this technology, a semiconductor wafer is etched from the side on which a nitride semiconductor laminate is formed, and the n-type contact layer, the p-type nitride semiconductor layer, and a part of the active layer are removed, and the n-type nitride semiconductor layer It is exposed. An Al electrode is formed on the surface of the n-type nitride semiconductor layer exposed by the vapor deposition method and the surface of the n-type contact layer, and a heat treatment for good contact formation is performed.
The crystal growth of the LED semiconductor epitaxial layer is performed by metal organic chemical vapor deposition (MOCVD). According to this crystal growth method, a nitride LED (Light Emitting Diode) excellent in high luminous efficiency can be manufactured.

On the other hand, from the viewpoint of integrating LEDs of different materials and semiconductor devices of different functions, the semiconductor layer that forms crystals on the substrate is separated from the base material substrate and bonded to another substrate. Is desirable.
Conventionally, for example, a laser lift-off method has been proposed in which laser light is irradiated from the back surface of a sapphire substrate, which is a growth substrate, and a nitride layer in contact with the sapphire substrate is decomposed to separate the semiconductor epitaxial layer from the sapphire substrate. Yes. This is because gallium nitride GaN is decomposed into gallium Ga and nitrogen N at the interface between the base material substrate and the nitride semiconductor epitaxial layer by laser light irradiated from the back surface of the sapphire substrate, and the melting point of gallium Ga is near room temperature. Thus, the nitride semiconductor epitaxial layer can be peeled from the sapphire substrate.

JP 2006-135311 A

However, in the peeling method in which the nitride semiconductor layer is peeled from the epitaxial sapphire substrate by this laser lift-off method, flatness on the nanometer order cannot be obtained on the surface of the peeled semiconductor epitaxial layer.
By the way, in order to bond the peeled semiconductor epitaxial layer to the surface of another substrate different from the base material substrate by using intermolecular force, the surface of the peeled semiconductor epitaxial semiconductor layer (nitride semiconductor layer) is on the order of nanometers. It should be flat. That is, when flatness on the nanometer order cannot be obtained on the surface of the peeled semiconductor epitaxial semiconductor layer, a practically sufficient bonding force due to intermolecular force cannot be obtained.
Therefore, in the laser lift-off method in which the flatness of the nanometer order is not obtained, there is a problem that it is necessary to perform a surface treatment for further improving the flatness of the peeled surface after peeling.

The present invention has been made to solve the above problems, it aims to provide a method of manufacturing a semi-conductor device in which Ru can be easily peeled off the nitride semiconductor layer from the first substrate, and a semiconductor device And

Method of manufacturing a semi-conductor device of the present invention includes the steps of first substrate graphene layer of a plurality of layers at the surface of (SiC substrate 101) (111) is grown, at the interface between the graphene layer, having a covalent And the step of forming the nitride semiconductor layer (114) with a bonding force using only the atomic level potential regularity, and between the nitride semiconductor layer and the graphene layer, or between the graphene layers. A step of peeling a part of the nitride semiconductor layer and the graphene layer from the first substrate with a force higher than a bonding force due to a potential between the first substrate and the peeled nitride semiconductor layer being a second substrate (130); And the surface of the graphene layer bonded to the second substrate has a surface roughness measured by an intermolecular force microscope of 3 nm or less. . Note that the characters and symbols in parentheses are examples.

A method of manufacturing a semi-conductor device comprising the steps of graphene layers of the single layer is grown on the surface of the first substrate, at the interface between the graphene layer, without having a covalent, regularity of potential at the atomic level The nitride semiconductor layer is formed with a force greater than the bonding force due to the potential between the nitride semiconductor layer and the graphene layer, and the step of forming the nitride semiconductor layer with a bonding force using only A step of peeling from the one substrate and a step of bonding the peeled nitride semiconductor layer to the surface of the second substrate by an intermolecular force, the nitride semiconductor layer being bonded to the second substrate surface, surface roughness measured by intermolecular force microscope may be characterized in that it is 3nm or less.

Semi conductor arrangement of the present invention, at the interface between the plurality of layers graphene layer formed on the first substrate, without having covalent, with a binding force using only regularity of potential at the atomic level A nitride semiconductor layer is grown, and the nitride semiconductor layer and a part of the graphene layer are separated from the first substrate with a force greater than a bonding force due to the potential between the graphene layers, and the exfoliated graphene layer Is bonded to the surface of the second substrate by intermolecular force, and the surface of the graphene layer bonded to the second substrate has a surface roughness measured by an intermolecular force microscope of 3 nm or less.

Further, the semi-conductor device, at the interface between the graphene layer of a single layer, shared without having binding properties, with a binding force using only regularity of potential at the atomic level by growing a nitride semiconductor layer, wherein The nitride semiconductor layer is peeled off from the first substrate with a force greater than the bonding force due to the potential between the nitride semiconductor layer and the graphene layer, and the peeled nitride semiconductor layer is formed on the surface of the second substrate. joined by intermolecular forces, the surface of the nitride semiconductor layer is bonded to the second substrate, the surface roughness measured by intermolecular force microscope may be characterized in that it is 3nm or less.

  According to these, a semiconductor single crystal thin film (nitride semiconductor layer) similar in symmetry to graphene such as GaN is shared at the first substrate / growth layer interface by using only the regularity of the surface potential by the graphene layer. Epitaxial growth without bonding is performed. In addition, a nitride semiconductor layer crystal-grown using the fact that the bond at the first substrate / graphene layer interface or the graphene layer stack interface that does not form the covalent bond is weaker than the covalent bond is formed from the first substrate. Easy to peel. Since the surface of the peeled nitride semiconductor layer has no crystal defects and has a flatness on the order of nanometers, it can be intermolecularly bonded to the second substrate.

According to the method of manufacturing a semi-conductor device of the present invention, it can be easily peeled off the nitride semiconductor layer from the first substrate. Further, according to the semiconductor device of the present invention, the flatness between the nitride semiconductor layer and another substrate, or between the graphene layer and the second substrate is good, and the bonding can be performed by intermolecular force.

1 is a structural view of an epitaxial graphene substrate according to an embodiment of the present invention, and a perspective view showing a structure of an epitaxial graphene layer. It is a flowchart which shows the manufacturing method which manufactures the nitride semiconductor substrate of this invention. It is a structural diagram of a nitride semiconductor layer / graphene layer growth substrate. 2 is a structural diagram of an example of a nitride semiconductor layer. FIG. FIG. 6 is a structural diagram of another example of a nitride semiconductor layer. FIG. 6 is a structural diagram of still another example of a nitride semiconductor layer. FIG. 4 is a structural diagram in which a support adhesive layer is provided on a nitride semiconductor layer / graphene layer growth substrate, and a structural diagram in which a support adhesive layer and a support are provided. It is a figure for demonstrating the process peeled by the joint surface of a some graphene layer, or the joint surface of a nitride semiconductor layer and a graphene layer by pulling a support body. It is a figure for demonstrating the mode of the interface of a nitride semiconductor layer and a graphene layer. It is a figure for demonstrating the process of vacuum-sucking and peeling. It is a figure for demonstrating the process of joining a nitride semiconductor layer to another board | substrate. It is a structural diagram of another substrate on which a bonding layer is laminated. FIG. 6 is a structural diagram of another substrate on which a nitride semiconductor layer is stacked. It is a structural diagram of a nitride semiconductor substrate provided with a bonding layer. It is a top view of the nitride semiconductor layer which formed the some isolation island. It is the top view of the nitride semiconductor layer in which the some isolation island was formed, and its AA sectional drawing. FIG. 3 is a structural diagram of a nitride semiconductor substrate in which an isolation island is formed. It is the figure which showed a mode that the laminated body of a SiC substrate / epitaxial graphene layer / nitride semiconductor layer was joined to another substrate. It is the figure which showed a mode that the SiC substrate was pulled up and the nitride semiconductor layer and the SiC substrate were peeled.

(First embodiment)
1 to 13 are views for explaining a semiconductor thin film peeling method and a nitride semiconductor device manufacturing method according to the first embodiment of the present invention.
FIG. 1A is a configuration diagram of an epitaxial graphene substrate on which an epitaxial graphene layer 110 is formed. Epitaxial graphene substrate 200 is a substrate in which epitaxial graphene layer 110 is formed on the surface of SiC substrate 101 that is a first substrate (semiconductor substrate). FIG. 1B is a structural diagram of the epitaxial graphene layer 110, which is formed by stacking three graphene layers 111 a, 111 b, and 111 c, and has weak force such as van der Waals force without covalent bonding between the layers. Are physically connected. Each of the graphene layers 111a, 111b, and 111c forms a two-dimensional sheet by forming a hexagonal network of carbon atoms C in a honeycomb shape. For example, the graphene layer 111a is composed of black circle carbon atoms C, and graphene The layer 111b is composed of a stipple round carbon atom C, and the graphene layer 111c is composed of a white circle carbon atom C.

  Graphene is a new material with a unique band structure as a massless fermion system. Ballistic conduction and other interesting electrical properties of carbon nanotubes (CNT) are It has almost everything. Further, since graphene has a sheet-like structure unlike carbon nanotubes, it has a feature that it can be applied with conventional LSI microfabrication technology and can be easily integrated.

Next, an outline of a method of peeling the nitride semiconductor layer from the SiC substrate and bonding the peeled nitride semiconductor layer to another substrate will be described using the flowchart of FIG.
First, a graphene layer is grown on a SiC substrate (S1), a nitride semiconductor layer is formed on the surface of the grown graphene layer (S2), the nitride semiconductor layer is divided into a plurality of regions (S3), and divided nitride The physical semiconductor layer is peeled from the SiC substrate (S4), and the peeled nitride semiconductor layer is bonded to another substrate (S5). Here, a nitride semiconductor layer, particularly GaN, has a hexagonal crystal structure, and the surface has a structure similar in symmetry to the graphene layer. Separation can be performed with a nanometer-order flatness without causing defects. For this reason, the peeled nitride semiconductor layer can be bonded to another substrate by intermolecular force.

  First, the epitaxial graphene layer 110 is grown on the surface of the SiC substrate to produce the epitaxial graphene substrate 200 (FIG. 1A). Epitaxial graphene layer 110 is formed by subjecting the surface of SiC substrate 101 to a high-temperature hydrogen etching process and high-temperature heating in vacuum (see JP 2009-62247 A).

  Next, a step (S2 (FIG. 2)) of growing a nitride semiconductor thin film on the surface of the epitaxial graphene substrate 200 (FIG. 1A) will be described with reference to FIG. Here, the crystal growth of the GaN thin film will be specifically described. The epitaxial graphene substrate 200 is installed in a crystal growth apparatus such as an MBE apparatus or an MOCVD apparatus, and the substrate is heated to supply gallium Ga and active nitrogen. The active nitrogen is supplied by an electron cyclone resonance (ECR) or a radical source for high frequency excitation.

  Thereby, gallium Ga is adsorbed at the center of the graphene honeycomb structure, and a six-fold symmetric first layer is formed. By binding active nitrogen there, a first layer of hexagonal GaN (h-GaN) is formed. Since gallium Ga does not have a covalent bond with the graphene layer 111 (111a, 111b, 111c), crystal defects due to lattice mismatch do not occur. For this reason, the nitride semiconductor layer 114 can be easily peeled off without causing crystal defects, and the peeled nitride semiconductor layer has a flatness on the order of nanometers. It can be carried out.

  A predetermined single crystal GaN layer can be formed by growing the second layer, the third layer,..., And the GaN layer on the first GaN layer. Since crystal defects associated with lattice mismatch do not occur in the first GaN layer, the formed nitride semiconductor layer 114 is an extremely high quality single crystal semiconductor layer with few crystal defects. Through the above process, as shown in FIG. 3, a nitride semiconductor layer 114 having a predetermined structure is formed on the surface of the epitaxial graphene layer 110. Thereby, a nitride semiconductor layer / graphene layer growth substrate 150 is formed.

4 to 6 are diagrams illustrating specific examples of the nitride semiconductor layer 114. FIG.
4A and 4B are examples of the nitride semiconductor layer 114 constituting the light emitting element.
4A includes an n-type GaN layer 502, an n-type Al _s Ga _1-s N layer (1 ≧ s ≧ 0) 503, a multiple quantum well layer 504, and a p-type Al _t Ga _{1. A −t} N layer (1 ≧ t ≧ 0) 505 and a p-type GaN layer 506 are stacked in this order. Here, the multiple quantum well layer 504, for example, _{Ga y In 1-y N /} Ga x In 1 _{one x N / ··· / Ga x In} 1-x N / Ga y In l-y N / Ga x In _1-xN (1 ≧ y> x ≧ 0).

The nitride semiconductor layer 114B of FIG. 4B further includes at least gallium Ga between the n-type GaN layer 502 of the nitride semiconductor layer 114A (FIG. 4A) and the epitaxial graphene layer 110 (FIG. 3). The AlN buffer layer 501 is stacked. For example, Ga _i In _1-i N (1 ≧ i ≧ 0) or Al _j Ga _1-j N (1 ≧ j ≧ 0) is used for the buffer layer 501.

The nitride semiconductor layer 114C in FIG. 4C includes an AlN buffer layer (for example, Ga _i In _i-1 N (1 ≧ i ≧ 0) or Al _j Ga _1-j N (1 ≧ j ≧ 0)) 601. N-type GaN layer 602, Ga _x In _1-x N (1 ≧ x ≧ 0) layer 603, p-type Al _y Ga _l- N (1 ≧ y ≧ 0) layer 604, and p-type GaN layer 605 They are stacked in order. The AlN buffer layer 601 can be omitted as appropriate.

5 and 6 are configuration examples of a semiconductor layer for forming another element which is not a light emitting element.
The nitride semiconductor layer 114D in FIG. 5A is used as, for example, a photodiode, and is a buffer layer (for example, Ga _i In _1-i N (1 ≧ i ≧ 0) or Al _j Ga _{1. −j} N (1 ≧ j ≧ 0)) 701, n-type Al _x Ga _1-x N (1 ≧ x ≧ 0) layer 702, i-type Al _y Ga _1-y N (1 ≧ y ≧ 0) layer 703 P-type Al _x Ga _1-x N (1 ≧ x ≧ 0) layers 704 are stacked in this order. The buffer layer 701 can be omitted as appropriate.

The nitride semiconductor layer 114E in FIG. 5B is used as, for example, an HB type phototransistor, and includes a buffer layer 801 (eg, Ga _i In _1-i N (1 ≧ i ≧ 0) or Al _{j Ga i-j n (1} ≧ j ≧ 0)), n + -type _{Al x Ga 1-x n (} 1 ≧ x ≧ 0) layer 802, n ^first die _{Al y Ga 1-y n (} 1 ≧ y ≧ 0) layer 803, p-type GaN layer 804, and p ⁺ -type GaN layer 805 are laminated in this order. The buffer layer 801 can be omitted as appropriate.

The nitride semiconductor layer 114F in FIG. 6A is used for, for example, a HEMT (High Electron Mobility Transistor), and includes an undoped GaN layer 902, an undoped Al _x Ga _l-x N (1 ≧ x ≧ 0) layer 903 and n-type GaN layer 904 are laminated in this order.

The nitride semiconductor layer 114G in FIG. 6B is used for, for example, a MESFET (Meta1 Semiconductor Field Effect Transistor), and an undoped GaN layer 1002 and an n-type GaN layer 1003 are stacked in this order. In FIGS. 6A and 6B, a buffer layer (for example, Ga _i In _1-i N (1 ≧ i ≧ 0) or the like is appropriately provided below the undoped GaN layer 902 and the undoped GaN layer 1002. Al _j Ga _1-j N (1 ≧ j ≧ 0)) can also be provided.

Next, a process (S4 (FIG. 2)) of peeling the laminated region of nitride semiconductor layer 114 / epitaxial graphene layer 110 from SiC substrate 101 will be described.
First, as shown in FIG. 7A, a support body that ensures high adhesion to the nitride semiconductor layer 114 on the nitride semiconductor layer 114 / epitaxial graphene layer 110 stacked structure formed on the surface of the SiC substrate 101. An adhesive layer 122 is formed.
It is desirable that the adhesive force (adhesive strength) between the surface of the support adhesive layer 122 and the surface of the nitride semiconductor layer 114 is at least greater than the intermolecular force between the graphene layer 111. The support adhesive layer 122 is preferably an organic coating material that can be peeled off by a peeling solution, or an adhesive material such as an adhesive that exhibits peelability by heat or UV.

  Further, as shown in FIG. 7B, on the surface of the support adhesive layer 122, a single layer of the nitride semiconductor layer 114 from the SiC substrate 101 or a stacked layer of the nitride semiconductor layer 114 / epitaxial graphene layer 110 is formed. A support 124 for peeling and supporting is adhered. The support 124 has a function of supporting the separated nitride semiconductor layer 114 / epitaxial graphene layer 110, and has an adhesive force with the support adhesive layer 122 that is at least greater than the intermolecular force between the graphene layers 111a, 111b, and 111c. What is necessary is just to provide the adhesive surface which can be enlarged. The support 124 is preferably a glass substrate, a ceramic substrate, a quartz substrate, a semiconductor substrate such as Si.

FIG. 8 is a view showing a state where the support 124 is pulled up and the nitride semiconductor layer 114 and the SiC substrate 101 are peeled off (S4 (FIG. 2)).
As described above, after configuring the support 124 / support adhesion layer 122 / nitride semiconductor layer 114 / epitaxial graphene layer 110, as shown in FIG. 8, at least between the support 124 and the SiC substrate 101, The film is pulled with a tension F larger than the intermolecular force between the graphene layers 111, and is separated between the graphene layer 111a and the graphene layer 111b (FIG. 8A). Alternatively, the film is pulled with a tension F larger than the intermolecular force between the nitride semiconductor layer 114 and the epitaxial graphene layer 110, and is separated between the nitride semiconductor layer 114 and the graphene layer 111a (FIG. 8B). .
Note that. In FIG. 8A, the nitride semiconductor 114 is peeled off with a single graphene layer 111a attached thereto, but a plurality of graphene layers, for example, graphene layers 111a and 111b are attached to the nitride semiconductor 114. It is good also as what is peeled by.

FIG. 9 is an explanatory diagram for explaining the intermolecular force between the nitride semiconductor layer 114 and the graphene layer 111a. FIG. 9A is a structural diagram showing the state of the interface between the nitride semiconductor layer 114 and the graphene layer 111a, and FIG. 9B shows, for example, a direct bonding between the SiC substrate 101 and the graphene layer 111c. FIG.
Nitride semiconductor layer 114, in particular, gallium nitride GaN, has a hexagonal columnar crystal structure, and nitrogen N atoms on the end face are planarly bonded in a hexagonal shape. In the graphene layer 111a, carbon C is planarly bonded in a hexagonal shape (FIG. 1B). For this reason, as shown in FIG. 9A, a hexagon of nitrogen N is arranged between carbon C atoms, and the nitride semiconductor layer 114 and the graphene layer 111a are not covalently bonded to each other on the surface. Physically connect using only the regularity of the potential.

  FIG. 9B shows, for example, the bonding state of the SiC substrate 101 and the graphene layer 111c. The SiC substrate 101 has a tetrahedral crystal structure, but hexagonal crystals are formed by stacking two layers as one period. There are planes with system symmetry. For this reason, the SiC substrate 101 is similar to the graphene layer 111c in that it has hexagonal symmetry, but it does not have hexagonal symmetry in the single-layer bonding surface. Therefore, the SiC substrate 101 and the graphene layer 111c are covalently bonded, and have a strong bonding force due to a bond as well as a weak bond due to the regularity of the potential.

  That is, the bond between the nitride semiconductor layer 114 and the graphene layer 111a and between the graphene layers 11a and 111b is weak, and the bond between the SiC substrate 101 and the graphene layer 111c is strong. Note that since a metamorphic layer is formed between the nitride semiconductor layer 114 and the graphene layer 111a, the amount of coupling between the nitride semiconductor layer 114 and the graphene layer 111a is stronger than between the graphene layers 11a and 111b. .

  Therefore, for example, as shown in FIG. 10, the support substrate 124 is attracted by vacuum to pull up the crystal defect between the boundary between the graphene layers 111a and 111b, which are weakly bonded, or between the nitride semiconductor layer 114 and the graphene layer 111a. Can be peeled off with a flatness of the order of nanometers.

After the nitride semiconductor layer 114 / graphene layer 110 or the nitride semiconductor layer 114 is peeled off from the SiC substrate 101, as shown in FIG. 11 (FIGS. 11A and 11B), another substrate ( The second substrate 130 is directly brought into close contact with the surface and bonded and fixed. As a result, the surface of the second substrate 130 and the nitride semiconductor layer 114 / graphene layer 111a or the surface of the nitride semiconductor layer 114 are joined by intermolecular force (S5 (FIG. 2)). ).
The nitride semiconductor layer 114 / graphene layer 111a or the nitride semiconductor layer 114 is directly adhered to the surface of the bonding layer 132 formed on the surface of another substrate (second substrate) 130 as shown in FIG. You may join by force.

  In the case of bonding by intermolecular force, it is preferable that the surface of the nitride semiconductor layer 114 or the graphene layer 111a has at least nanometer order flatness. Here, the flatness of the nanometer order is a nanometer whose surface roughness (maximum height difference between peaks and valleys: Rrv) measured with an atomic force microscope (AFM) is a single digit. That is, it means that Rrv is a value smaller than 10 nm. More preferably, the Rrv on the surface of the bonding layer formed on the surface of another substrate 130 is preferably 3 nm or less.

The other substrate 130 is preferably a ceramic substrate such as a Si substrate or an AIN substrate, a glass substrate, a quartz substrate, a plastic substrate, or a metal substrate. The bonding layer 132 formed on the surface of another substrate 130 is a material selected from, for example, SiO ₂ , SiN, SiON, PSG, BSG, SOG, metal, and organic matter. The bonding layer 132 can be formed by a plasma CVD method, a CVD method, a sputtering method, or the like.
The bonding may be bonding by intermolecular force, atom diffusion through a bonding interface, compound formation, or the like.

  After bonding the nitride semiconductor layer 114 / graphene layer 110 or the nitride semiconductor layer 114 to the surface of another substrate 130 as described above, or after bonding to the surface of the bonding layer 132 formed on another substrate 130 As shown in FIG. 13, the support adhesive layer 122 / support 124 is removed from the surface of the nitride semiconductor layer 114. When the support adhesive layer 122 / support 124 is removed by etching, the support 124 can be reused by using a material having corrosion resistance to the etching solution.

FIG. 13 is a diagram illustrating a case where the nitride semiconductor layer 114 / graphene layer 110 or the nitride semiconductor layer 114 is bonded to the surface of another substrate 130, and FIG. 14 is a diagram illustrating the nitride semiconductor layer 114 / graphene layer The case where the layer 110 or the nitride semiconductor layer 114 is bonded to the surface of the bonding layer 132 formed on another substrate 130 is shown.
The support adhesive layer 122 / support 124 is removed by peeling the support adhesive layer 122 with a peeling solution, peeling with heat, peeling with UV, or the like.

  A nitride semiconductor substrate 160A shown in FIG. 13A is obtained by bonding a nitride semiconductor layer 114 and another substrate 130 with an intermolecular force, and a nitride semiconductor substrate 160B shown in FIG. The nitride semiconductor layer 114 on which the graphene layer 114a is stacked and another substrate 130 are joined by intermolecular force. Further, the nitride semiconductor substrate 160C of FIG. 14A is obtained by bonding the graphene layer 111a stacked on the stacked nitride semiconductor layer 114 and another substrate 130 via the bonding layer 132. FIG. The nitride semiconductor substrate 160D of (b) is obtained by bonding the nitride semiconductor layer 114 and another substrate 130 via the bonding layer 132. 13B and 14A in which the nitride semiconductor layer 114 in which the graphene layer 111a is stacked is bonded to another substrate 130, a functional device such as a graphene transistor can be manufactured.

  In this embodiment, the nitride semiconductor layer 114 is crystal-grown on the epitaxial graphene layer 110 grown on the SiC substrate 101 (first substrate), and the force is larger than the intermolecular force between the graphene layers 111a, 111b, and 111c. Since the nitride semiconductor layer 114 is separated from the SiC substrate 101 by pulling up or pulling up with a force larger than the intermolecular force between the graphene layers 111a, 111b, and 111c and the nitride semiconductor layer 114, The nitride semiconductor layer 114 can be easily peeled from the SiC substrate 101.

  Furthermore, since the peeled surface of the nitride semiconductor layer / graphene layer (that is, the surface of the graphene layer 111a) or the surface of the nitride semiconductor layer 114 has a maximum surface roughness of 1 nanometer or less, the nitride semiconductor The thin film can be easily bonded onto the second substrate using intermolecular force or the like.

(Modification of the first embodiment)
The support adhesive layer 122 is not necessarily separated and may have a structure integrated with the support 124.

(Second Embodiment)
The second embodiment is different from the first embodiment in that at least the nitride semiconductor layer 114 is previously separated into a plurality of regions having a predetermined shape. Hereinafter, the second embodiment will be described with reference to the drawings focusing on differences from the first embodiment.
Similar to the first embodiment, the epitaxial graphene layer 110 is grown on the SiC substrate 101 which is the first substrate, and the nitride semiconductor layer 114 is formed on the epitaxial graphene layer 110. The nitride semiconductor layer 114 includes the nitride semiconductor layers 114A,..., 114G having the configuration example described in FIGS.
The nitride semiconductor layer 114 is processed into a predetermined element shape to form a plurality of elements in the nitride semiconductor layer 114.

  In FIG. 15, the nitride semiconductor layer 114 is divided into a plurality of element formation regions 214 and a non-element formation region 216 in which no elements are formed, and each of the plurality of element formation regions 214 has an isolation island 314 formed therein. In the non-element formation region 216, an isolation groove 316 that separates each element formation region 214 is formed. Here, each separation island 314 is formed in a rectangular shape and arranged in two rows and six rows.

The separation groove 316 can be formed by a photolithography process and a dry etching process. FIG. 16A is a view showing a plurality of separation islands 314 and separation grooves 316 similarly to FIG. 15, and FIG. 16B is a cross-sectional view taken along line AA of FIG.
In FIG. 16B, the separation groove 316 is depicted as a groove reaching the upper surface of the epitaxial graphene layer 110, but the separation groove 316 may be a separation groove reaching the SiC substrate 101, for example. It may be a groove leading to the inside. Further, the shape of the separation groove is not limited to the vertical shape.

  After forming the isolation island 314 of the nitride semiconductor layer, the support adhesion layer 122 and the support 124 are formed as in the first embodiment, and the isolation island 314 including the nitride semiconductor layer 114 is converted into the graphene layer 111a, It peels from the SiC substrate 101 with a force exceeding the intermolecular force between 111b (FIG. 8A). Alternatively, the peeling is performed from the SiC substrate 101 with a force exceeding the intermolecular force between the graphene layer 111a and the nitride semiconductor layer 114. That is, the isolation island 314 is mechanically peeled from the SiC substrate 101 (FIG. 8B).

  As shown in the nitride semiconductor substrate 160E of FIG. 17, the isolation island 314 including the separated nitride semiconductor layer 114 is bonded to a predetermined bonding position on the surface of another substrate 130 as in the first embodiment. Alternatively, the isolation island 314 is bonded to a predetermined bonding position on the surface of the bonding layer 132 formed on another substrate 130. FIG. 17 shows a form in which a plurality of isolation islands 314 are bonded to the surface of a bonding layer 132 formed on another substrate 130. As in the first embodiment, the flatness of the surface of the separation island 314 peeled from the SiC substrate 101 and the maximum surface roughness (peak-valley difference) measured by an atomic force microscope (AFM) are at least one. A flat surface showing a value on the order of nanometers or less can be obtained, and a good bonding state can be realized.

  The form in which the isolation island 314 of each nitride semiconductor layer formed into the plurality of isolation islands by forming the isolation groove 316 forms an element such as a light emitting element or an electronic element can be operated as an element in that form. Means form. Moreover, the form in the middle of forming elements, such as a light emitting element and an electronic element, means the form in the middle of completing as an element, and the form before starting processing of an element form is also included.

  In the second embodiment of the present invention, in addition to the process of the first embodiment, the step of forming the isolation groove 316 in the nitride semiconductor layer 114 and processing into a predetermined isolation island shape is added. A form in the middle of forming the nitride semiconductor element form can be mechanically easily separated from the SiC substrate 101.

(Third embodiment)
The method of manufacturing a semiconductor device according to the third embodiment of the present invention includes a nitride semiconductor layer / graphene layer in which a nitride semiconductor layer 114 is formed on the surface of an epitaxial graphene layer 110 grown on the surface of a SiC substrate 101 as a first substrate. The surface of the growth substrate 400, that is, the surface of the nitride semiconductor layer 114 opposite to the graphene layer 111a side is the surface of another substrate 130 (or the surface of the bonding layer 432 formed on the surface of the other substrate 130). The second embodiment is different from the first and second embodiments in that it includes a step of peeling the nitride semiconductor layer 114 from the SiC substrate 101 which is the first substrate after bonding to the first substrate. Hereinafter, the third embodiment will be described with reference to FIG.

  18A, a nitride semiconductor layer / graphene layer growth substrate 400 in which a graphene layer and a nitride semiconductor layer are formed on a first substrate is bonded to another substrate 130 in which a bonding layer 432 is formed. It is a figure for demonstrating a mode. The bonding layer 432 has a function of bonding another substrate 130 and the nitride semiconductor layer 114 with a force larger than a force for peeling the other substrate 130.

FIG. 18B shows a state after the nitride semiconductor layer surface and the bonding layer 432 are bonded.
That is, the SiC substrate 101, the epitaxial graphene layer 110, the nitride semiconductor layer 114, the bonding layer 432, and another substrate 130 are stacked in this order.

As shown in FIG. 19A, the SiC substrate 101 is applied with a force F stronger than the intermolecular force between the graphene layers 111a and 111b or the intermolecular force between the graphene layer 111a and the nitride semiconductor layer 114. Pull and peel off another substrate 130.
It is assumed that this force F is smaller than the bonding force between SiC substrate 101 and graphene layer 111c.

FIG. 19B shows a state after another substrate 130 is peeled off.
In the nitride semiconductor substrate 160F, another substrate 130, a bonding layer 432, and a nitride semiconductor layer 114 are stacked in this order. The nitride semiconductor layer 114 may be divided into a plurality of regions as described in the second embodiment. The nitride semiconductor layer 114 may have a form of a light emitting element or an electronic element.

  The surface of the nitride semiconductor layer / graphene layer growth substrate in which the nitride semiconductor layer 114 is formed on the surface of the epitaxial graphene layer 110 grown on the surface of the SiC substrate 101 as the first substrate, that is, the nitridation on the side opposite to the graphene layer side A step of peeling nitride semiconductor layer 114 from SiC substrate 101 after bonding the surface of physical semiconductor layer 114 to the surface of another substrate 130 or the surface of a bonding layer formed on the surface of another substrate 130. Therefore, in addition to the effects of the first embodiment and the second embodiment, there is an effect that a process of forming a support for peeling off the nitride semiconductor layer can be newly omitted.

101 SiC substrate (first substrate)
110 Epitaxial Graphene Layer 111a, 111b, 111c Graphene Layer 114, 114A, 114B, 114C, 114D, 114E, 114F, 114G Nitride Semiconductor Layer 122 Support Adhesive Layer 124 Support 130 Another Substrate (Second Substrate)
132,432 Junction layer 150 Nitride semiconductor layer / graphene layer growth substrate 160, 160A, 160B, 160C, 160D, 160E, 160F Nitride semiconductor substrate 200 Epitaxial graphene substrate 214 Element formation region 216 Non-element formation region 314 Isolation island 316 Isolation Groove 400 Nitride semiconductor / graphene layer growth substrate 432 Junction layer 501, 601, 701, 801 AlN buffer layer 502, 602, 904, 1003 n-GaN layer 503 n-AlGaN (Si) layer 504 Multiple quantum well layer (InGaN / GaN /.../ InGaN / GaN / InGaN layer)
505,604 p-AlGaN (Mg) layer 506,605 p-GaN (Mg) layer 603 InGaN layer _{702 n-Al x Ga 1-} x N layer _{703 i-Al y Ga 1-} y N layer 704 p-Al _x Ga _1-x N layer 801 n ⁺ -AlGaN layer 802 n ⁺ -AlGaN layer 803 n ^-- AlGaN layer 804 p-GaN layer 805 n ⁺ -GaN layer 902, 1002 Undoped GaN layer 903 Undoped AlGaN layer

Claims (5)

A step of growing a plurality of graphene layers on the surface of the first substrate;
A step of forming a nitride semiconductor layer at the interface with the graphene layer with a bonding force using only the regularity of atomic level potential without having a covalent bond; and
A step of peeling a part of the nitride semiconductor layer and the graphene layer from the first substrate with a force equal to or higher than a bonding force due to a potential between the graphene layers;
The exfoliated graphene layer is bonded to the surface of the second substrate by intermolecular force;
With
The surface of the graphene layer bonded to the second substrate has a surface roughness measured by an intermolecular force microscope of 3 nm or less. The first substrate is a SiC substrate;
The method for manufacturing a semiconductor device according to claim 1, wherein the nitride semiconductor layer is a composite layer in which at least a layer bonded to the graphene layer is a nitride layer.   The method for manufacturing a semiconductor device according to claim 1, further comprising a step of dividing the nitride semiconductor layer into a plurality of regions.   4. The method of manufacturing a semiconductor device according to claim 1, wherein the nitride semiconductor layer has a structure of a part or all of a light emitting element or an electronic element. 5. Growing a nitride semiconductor layer with a bonding force using only the regularity of atomic level potential without having a covalent bond at an interface with a plurality of graphene layers formed on the first substrate , The nitride semiconductor layer and a part of the graphene layer are separated from the first substrate with a force equal to or higher than the bonding force due to the potential between the graphene layers,
The exfoliated graphene layer is bonded to the surface of the second substrate by intermolecular force,
The surface of the graphene layer bonded to the second substrate has a surface roughness measured by an intermolecular force microscope of 3 nm or less.

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