JP5058478B2 - Semiconductor device manufacturing method, plasma processing method, semiconductor device manufacturing apparatus, control program, and computer storage medium - Google Patents

Description

The present invention plasma-etches a substrate to be processed in which at least a silicon nitride film, an antireflection film, and a photoresist having a predetermined opening are formed in this order from the lower side on a silicon substrate, The present invention relates to a semiconductor device manufacturing method, a plasma processing method, a semiconductor device manufacturing apparatus, a control program, and a computer storage medium having a plasma etching process for forming a trench for element isolation corresponding to an opening.

  In the technical field of semiconductor devices, a shallow trench isolation (STI) structure is known as a structure for element isolation. In the manufacturing process of the semiconductor device adopting this STI structure, a trench is formed in the silicon substrate by plasma etching in order to form the STI structure.

In the above-described plasma etching process for forming the trench, for example, after performing the main etching process using the silicon oxide film and silicon nitride film formed on the silicon substrate as a mask with CF ₄ as an etching gas. The overetching process is performed using an etching gas in which NH ₃ is mixed with NF ₃ . Then, a method of performing a step of etching a silicon substrate using a mixed gas of HBr and oxygen is known (for example, refer to Patent Document 1).

Further, a technique for forming an antireflection film between the photoresist and the silicon nitride film is also known, and when such an antireflection film is used, prior to plasma etching of the silicon nitride film or the like. Then, a step of plasma etching the antireflection film is performed. For the etching of the antireflection film, for example, plasma etching using a mixed gas of CF ₄ , CH ₂ F ₂ and oxygen as an etching gas is performed.
JP 2000-299374 A

  As described above, in the prior art, when a trench for isolation of an STI structure element is formed in a silicon substrate, a step of etching an upper antireflection film using a photoresist as a mask, a main etching for etching a silicon nitride film, etc. The process, the over-etching process, and finally, the process of etching the silicon substrate are performed using an etching gas corresponding to each process. For this reason, the etching gas is changed for each process, and each etching process is performed, and there is a problem that the process takes time and the throughput is reduced.

The present invention has been made in response to the above-described conventional circumstances, and the time required for the plasma etching process for forming the trench for element isolation can be shortened compared to the conventional case, and the productivity is improved by improving the throughput. An object is to provide a semiconductor device manufacturing method, a plasma processing method, a semiconductor device manufacturing apparatus, a control program, and a computer storage medium that can be improved.

According to a first aspect of the present invention, there is provided a method for manufacturing a semiconductor device, comprising: forming a plasma on a substrate to be processed in which at least a silicon nitride film, an antireflection film, and a photoresist having a predetermined opening are formed in this order from the lower side; A method of manufacturing a semiconductor device, comprising: a plasma etching step of etching and forming a trench for element isolation corresponding to the opening in the silicon substrate, wherein at least NF ₃ gas, SF ₆ gas, or NF ₃ look-containing gas and SF ₆ gas, further includes an additive gas consisting of either a mixed gas of CF ₄ gas or noble gas or CF ₄ gas and a rare gas, and the NF ₃ gas or SF ₆ gas or NF Etch in which the flow rate ratio of additive gas to ₃ gas and SF ₆ gas (flow rate of additive gas / flow rate of NF ₃ gas or SF ₆ gas or NF ₃ gas and SF ₆ gas) is 1 or more Etching of the antireflection film, the silicon nitride film, and the silicon substrate is performed continuously and collectively without changing the etching gas in the middle using a polishing gas.

A method for manufacturing a semiconductor device according to a second aspect is the method for manufacturing a semiconductor device according to the first aspect , wherein the additive gas further contains an oxygen gas.

A method for manufacturing a semiconductor device according to claim 3 is the method for manufacturing a semiconductor device according to claim 1 or 2 , wherein a silicon oxide film is further formed between the silicon substrate and the silicon nitride film, The oxide film is also etched at a time.

According to a fourth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: forming a plasma on a substrate to be processed in which at least a silicon nitride film, an antireflection film, and a photoresist having a predetermined opening are formed in this order from the lower side; etching, the silicon substrate, a manufacturing method of a semiconductor device having a plasma etching process for forming a trench for device isolation corresponding to the opening, viewed it contains at least NF ₃ gas, further, CF ₄ gas in or include noble gas or CF ₄ gas and additive gas consisting of either a mixed gas of a rare gas, the (flow rate of additive gas flow rate / NF ₃ gas) NF ₃ flow rate ratio of the additional gas to the gas is one or more Using an etching gas, the antireflection film, the silicon nitride film, and the silicon substrate are continuously etched without changing the etching gas in the middle. It is characterized by performing all at once.

A method for manufacturing a semiconductor device according to a fifth aspect is the method for manufacturing a semiconductor device according to the fourth aspect , wherein the additive gas further contains an oxygen gas.

A method for manufacturing a semiconductor device according to claim 6 is the method for manufacturing a semiconductor device according to claim 4 or 5 , wherein a silicon oxide film is further formed between the silicon substrate and the silicon nitride film, and the silicon The oxide film is also etched at a time.

8. The semiconductor device manufacturing apparatus according to claim 7 , wherein a processing chamber for accommodating a substrate to be processed, an etching gas supply means for supplying the etching gas into the processing chamber, and the etching gas supplied from the etching gas supply means. A plasma generating means for plasma-etching the substrate to be processed, and a control section for controlling the semiconductor device manufacturing method according to any one of claims 1 to 6 to be performed in the processing chamber; It is provided with.

A control program according to an eighth aspect operates on a computer, and controls a semiconductor device manufacturing apparatus so that the semiconductor device manufacturing method according to any one of the first to sixth aspects is performed at the time of execution. Features.

The computer storage medium according to claim 9 is a computer storage medium storing a control program that operates on a computer, and the control program is executed when the semiconductor device according to any one of claims 1 to 6 is executed. The semiconductor device manufacturing apparatus is controlled so that the manufacturing method is performed.
The plasma processing method according to claim 10 plasma-etches a substrate to be processed in which at least a silicon nitride film, an antireflection film, and a photoresist having a predetermined opening are formed in this order from below on a silicon substrate. a plasma processing method comprising the steps of loading the substrate to be processed the processing chamber, at least within the processing chamber, NF ₃ gas, or SF ₆ gas, or viewing including the NF ₃ gas and SF ₆ gas, further includes an additive gas consisting of either a mixed gas of CF ₄ gas or noble gas or CF ₄ gas and a rare gas, and the additive gas to the NF ₃ gas or SF ₆ gas or NF ₃ gas and SF ₆ gas An etching gas having a flow rate ratio (flow rate of additive gas / NF ₃ gas or SF ₆ gas or NF ₃ gas and SF ₆ gas) of 1 or more is supplied to generate plasma. A step of etching the antireflection film, the silicon nitride film, and the silicon substrate with the photoresist as a mask by using the plasma without changing the etching gas, and forming an element corresponding to the opening in the silicon substrate. And a plasma etching process for forming a trench for isolation.
The plasma processing method of claim 11 is the plasma processing method of claim 10 , wherein the additive gas further contains an oxygen gas.
The plasma processing method according to claim 12 is the plasma processing method according to claim 10 or 11 , wherein the plasma etching step includes a lower electrode on which the substrate to be processed is placed, and an upper electrode facing the lower electrode. Is performed by applying high-frequency power between the upper electrode and the lower electrode.
The plasma processing method according to claim 13 is the plasma processing method according to claim 12 , wherein the high-frequency power is lower in frequency than the first high-frequency power applied to the upper electrode and the first high-frequency power. And a second high-frequency power applied to the lower electrode.

  According to the present invention, the time required for the plasma etching process for forming a trench for element isolation can be shortened as compared with the prior art, and the productivity can be improved by improving the throughput.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 shows an enlarged cross-sectional configuration of a semiconductor wafer W as a substrate to be processed in the method for manufacturing a semiconductor device according to this embodiment, and FIG. 2 shows plasma as a semiconductor manufacturing device according to this embodiment. The cross-sectional structure of a processing apparatus is shown. First, the configuration of the plasma processing apparatus will be described with reference to FIG.

  The plasma processing apparatus 1 is configured as a capacitively coupled parallel plate etching apparatus in which electrode plates face each other vertically and are connected to a plasma forming power source.

  The plasma processing apparatus 1 has a processing chamber (processing container) 2 formed of, for example, aluminum whose surface is anodized and formed into a cylindrical shape, and the processing chamber 2 is grounded.

  A substantially cylindrical susceptor support 4 for placing a substrate to be processed, for example, a semiconductor wafer W, is provided on the bottom of the processing chamber 2 via an insulating plate 3 such as ceramic. Further, a susceptor 5 constituting a lower electrode is provided on the susceptor support 4. A high pass filter (HPF) 6 is connected to the susceptor 5.

  A refrigerant chamber 7 is provided inside the susceptor support 4, and a refrigerant is introduced into the refrigerant chamber 7 through a refrigerant introduction pipe 8 and circulated, and the cold heat is transmitted through the susceptor 5 to the semiconductor wafer. Heat is transferred to W, whereby the semiconductor wafer W is controlled to a desired temperature.

  The upper center portion of the susceptor 5 is formed in a convex disk shape, and an electrostatic chuck 11 having substantially the same shape as the semiconductor wafer W is provided thereon. The electrostatic chuck 11 is configured by disposing an electrode 12 between insulating materials. Then, when a DC voltage of, for example, 1.5 kV is applied from the DC power source 13 connected to the electrode 12, the semiconductor wafer W is electrostatically attracted by, for example, Coulomb force.

  The insulating plate 3, the susceptor support 4, the susceptor 5, and the electrostatic chuck 11 are formed with a gas passage 14 for supplying a heat transfer medium (for example, He gas) on the back surface of the semiconductor wafer W. The cold heat of the susceptor 5 is transmitted to the semiconductor wafer W via the heat transfer medium so that the semiconductor wafer W is maintained at a predetermined temperature.

  An annular focus ring 15 is disposed at the upper peripheral edge of the susceptor 5 so as to surround the semiconductor wafer W placed on the electrostatic chuck 11. The focus ring 15 is made of, for example, a conductive material such as silicon, and has an effect of improving etching uniformity.

  An upper electrode 21 is provided above the susceptor 5 so as to face the susceptor 5 in parallel. The upper electrode 21 is supported on the upper portion of the processing chamber 2 via an insulating material 22, forms a surface facing the susceptor 5, and has a large number of discharge holes 23. For example, the surface is anodized ( The electrode plate 24 is configured by providing a quartz cover on anodized aluminum and an electrode support 25 made of a conductive material that supports the electrode plate 24.

  A gas inlet 26 is provided in the center of the electrode support 25 in the upper electrode 21, and a gas supply pipe 27 is connected to the gas inlet 26. Further, a processing gas supply source 30 for supplying an etching gas as a processing gas is connected to the gas supply pipe 27 via a valve 28 and a mass flow controller 29.

  An exhaust pipe 31 is connected to the bottom of the processing chamber 2, and an exhaust device 35 is connected to the exhaust pipe 31. The exhaust device 35 includes a vacuum pump such as a turbo molecular pump, and is configured to be able to evacuate the processing chamber 2 to a predetermined reduced pressure atmosphere, for example, a predetermined pressure of 1 Pa or less. Further, a gate valve 32 is provided on the side wall of the processing chamber 2 so that the semiconductor wafer W is transferred to and from an adjacent load lock chamber (not shown) with the gate valve 32 opened. It has become.

  A first high frequency power supply 40 is connected to the upper electrode 21, and a matching device 41 is inserted in the feeder line. Further, a low pass filter (LPF) 42 is connected to the upper electrode 21. The first high frequency power supply 40 has a frequency in the range of 50 to 150 MHz. By applying such a high frequency, it is possible to form a high-density plasma in a preferable dissociated state in the processing chamber 2.

  A second high-frequency power source 50 is connected to the susceptor 5 serving as a lower electrode, and a matching unit 51 is interposed in the power supply line. The second high-frequency power supply 50 has a lower frequency range than the first high-frequency power supply 40. By applying a frequency in such a range, the semiconductor wafer W that is the object to be processed is damaged. Appropriate ion action can be given without giving. The frequency of the second high frequency power supply 50 is preferably in the range of 1 to 20 MHz.

  The operation of the plasma processing apparatus 1 having the above configuration is comprehensively controlled by the control unit 60. The control unit 60 includes a process controller 61 that includes a CPU and controls each unit of the plasma processing apparatus 1, a user interface 62, and a storage unit 63.

  The user interface 62 includes a keyboard that allows a process manager to input commands to manage the plasma processing apparatus 1, a display that visualizes and displays the operating status of the plasma processing apparatus 1, and the like.

  The storage unit 63 stores a recipe that stores a control program (software), processing condition data, and the like for realizing various processes executed by the plasma processing apparatus 1 under the control of the process controller 61. Then, if desired, an arbitrary recipe is called from the storage unit 63 by an instruction from the user interface 62 and is executed by the process controller 61, so that a desired process in the plasma processing apparatus 1 is performed under the control of the process controller 61. Is performed. In addition, recipes such as control programs and processing condition data may be stored in a computer-readable computer storage medium (eg, hard disk, CD, flexible disk, semiconductor memory, etc.), or It is also possible to transmit the data from other devices as needed via a dedicated line and use it online.

  The plasma processing apparatus 1 configured as described above performs plasma etching on the semiconductor wafer W in which at least a silicon nitride film, an antireflection film, and a photoresist having a predetermined opening are formed in this order from the lower side on the silicon substrate. When performing a plasma etching process for forming a trench for element isolation corresponding to the opening in a silicon substrate, first, after the gate valve 32 is opened, the semiconductor wafer W is moved from a load lock chamber (not shown) to a processing chamber. 2 is carried in and placed on the electrostatic chuck 11. The semiconductor wafer W is electrostatically attracted onto the electrostatic chuck 11 by applying a DC voltage from the DC power source 13. Next, the gate valve 32 is closed, and the processing chamber 2 is evacuated to a predetermined degree of vacuum by the exhaust device 35.

  Thereafter, the valve 28 is opened, and a predetermined etching gas from the processing gas supply source 30 is adjusted in flow rate by the mass flow controller 29, and the hollow portion of the upper electrode 21 is passed through the gas supply pipe 27 and the gas inlet 26. 2 and then uniformly discharged onto the semiconductor wafer W through the discharge holes 23 of the electrode plate 24 as indicated by arrows in FIG.

  Then, the pressure in the processing chamber 2 is maintained at a predetermined pressure. Thereafter, high frequency power having a predetermined frequency is applied to the upper electrode 21 from the first high frequency power supply 40. As a result, a high-frequency electric field is generated between the upper electrode 21 and the susceptor 5 as the lower electrode, and the processing gas is dissociated into plasma.

  On the other hand, high frequency power having a frequency lower than that of the first high frequency power supply 40 is applied from the second high frequency power supply 50 to the susceptor 5 serving as the lower electrode. Thereby, ions in the plasma are drawn to the susceptor 5 side, and the anisotropy of etching is enhanced by ion assist.

  When the plasma etching is completed, the supply of high-frequency power and the supply of etching gas are stopped, and the semiconductor wafer W is unloaded from the processing chamber 2 by a procedure reverse to the above procedure.

  Next, a method for manufacturing the semiconductor device according to the present embodiment will be described. FIG. 1 is an enlarged view showing a main configuration of a semiconductor wafer W as a substrate to be processed according to the present embodiment. As shown in FIG. 1A, on the surface of the silicon substrate 101 constituting the semiconductor wafer W, a silicon nitride film 102, an antireflection film (ARC) 103, and a photoresist 104 are arranged in this order from the lower side. It is formed with. A predetermined pattern is transferred to the photoresist 104 by an exposure process, a development process, and the like, and the mask has a predetermined pattern opening 105. The semiconductor wafer W is carried into the processing chamber 2 of the plasma processing apparatus 1 in this state.

In the processing chamber 2, at the initial stage of the process, the antireflection film (ARC) 103 and the silicon nitride film 102 in the opening 105 are etched using the photoresist 104 as a mask. After the photoresist 104 has been etched, the entire antireflection film (ARC) 103 and the silicon nitride film 102 are etched, and the silicon substrate in the portion of the opening 105 where the etching has progressed first. 101 is etched to form trenches 106 for element isolation (STI) as shown in FIG. This plasma etching uses an etching gas containing at least NF ₃ gas, SF ₆ gas, or NF ₃ gas and SF ₆ gas, and uses an antireflection film (ARC) 103, a silicon nitride film 102, and a silicon substrate 101. Etching is performed continuously and collectively without changing the etching gas.

Etching gas containing NF ₃ gas or SF ₆ gas or NF ₃ gas and SF ₆ gas includes an additive gas composed of either CF ₄ gas or rare gas or mixed gas of CF ₄ gas and rare gas Is preferably used. In addition, a gas containing oxygen gas can be preferably used as the additive gas. Moreover, (the flow rate of the additive gas flow rate / NF ₃ gas or SF ₆ gas or NF ₃ gas and SF ₆ gas) NF ₃ gas or SF ₆ gas or NF ₃ gas and the flow rate ratio of the added gas to SF ₆ gas, It is preferable to set it to 1 or more. The etching rate of the silicon nitride film 104 serving as a mask when the silicon substrate 101 is etched can be adjusted by the amount of the additive gas, and the etching rate of the silicon nitride film 104 is decreased by increasing the flow rate of the additive gas. Can be made. Therefore, by setting the flow rate ratio to 1 or more, the etching rate of the portion serving as a mask can be reduced, and a trench having a required depth can be formed. Specifically, as the etching gas, for example, a mixed gas of CF ₄ gas, NF ₃ gas, and oxygen gas can be suitably used.

  As an example, the plasma processing apparatus 1 shown in FIG. 2 is used, and the above-described plasma etching process is performed on the semiconductor wafer W having the structure shown in FIG. did.

  In addition, the process recipe of the Example shown below is read from the memory | storage part 63 of the control part 60, is taken in into the process controller 61, and the process controller 61 controls each part of the plasma processing apparatus 1 based on a control program. By doing so, the etching process according to the read processing recipe is executed.

Etching gas: CF ₄ / NF ₃ / O ₂ = 250/70/6 sccm
Pressure: 8.0Pa (60mTorr)
Power (upper / lower): 550W (60MHz) / 500W (13.56MHz)
Etching time: 1 minute

  After the plasma etching step, the semiconductor wafer W was observed with an electron microscope, and as shown in FIG. 1B, a trench 106 for element isolation having a desired shape was formed on the silicon substrate 101. I was able to. At this time, the width of the mask portion between the trenches 106 was reduced by about 30 nm compared to the initial width (the state shown in FIG. 1A). For this reason, the width of the opening 105 at the initial stage needs to be narrowed by about 30 nm as compared with the required width of the trench 106. Conventionally, plasma etching is performed by the following recipe, for example.

(Antireflection coating etching)
Etching gas: CF ₄ / CH ₂ F ₂ / O ₂ = 160/20/30 sccm
Pressure: 4.7 Pa (35 mTorr)
Electric power (upper / lower): 600W (60MHz) / 75W (13.56MHz)
Etching time: about 1 minute (etching of silicon nitride film)
Main etching Etching gas: CF ₄ / CHF ₃ / O ₂ = 250/70/6 sccm
Pressure: 8.0Pa (60mTorr)
Power (upper / lower): 550W (60MHz) / 500W (13.56MHz)
Over-etching Etching gas: CHF ₃ / CH ₃ F / Ar / O ₂
= 30/100/500/50 sccm
Pressure: 6.7 Pa (50 mTorr)
Power (upper / lower): 300W (60MHz) / 150W (13.56MHz)
Etching time (main etching + over etching): about 1.5 minutes (silicon substrate etching)
Etching gas: Cl ₂ / HBr / O ₂ = 200/200/20 sccm
Pressure: 6.7 Pa (50 mTorr)
Electric power (upper / lower): 500W (60MHz) / 250W (13.56MHz)
Etching time: about 0.5 minutes

  As shown in the recipe above, the etching of the antireflection film 103, the main etching of the silicon nitride film 102, the overetching, and the etching of the silicon substrate 101 are each performed by changing the etching gas and performing plasma etching for each layer. In the conventional method that has been performed, a process that requires about 3 minutes in total can be performed in 1 minute in this embodiment, and the process time can be shortened by at least about 2 minutes. did it. When plasma etching is performed by changing the etching gas for each layer, it actually takes time to change the etching gas, and more time is required to complete all the steps.

In the above-described embodiment, the case where a gas containing NF ₃ gas is used as the etching gas has been described. However, as with NF ₃ gas, gas containing SF ₆ gas from which fluorine is dissociated or NF ₃ gas and SF ₆ gas are used. A gas containing can also be used in the same manner as described above. In addition to the semiconductor wafer W having the structure shown in FIG. 1, for example, as shown in FIG. 3A, a structure in which a silicon oxide film 110 is formed between the silicon substrate 101 and the silicon nitride film 102. The present invention can be similarly applied to the case where the trench 106 is formed in the semiconductor wafer W as shown in FIG.

  As described above, according to the present embodiment, the time required for the plasma etching process for forming the trench for element isolation of the STI structure can be shortened compared to the conventional case, and the productivity can be improved by improving the throughput. You can plan. In addition, this invention is not limited to said embodiment, Various deformation | transformation are possible. For example, the plasma processing apparatus is not limited to the parallel plate type upper and lower high-frequency application type shown in FIG. 2, and other types of plasma processing apparatuses that apply a high frequency of two frequencies to the lower electrode can be used. .

The figure which shows the cross-sectional structure of the semiconductor wafer which concerns on embodiment of the manufacturing method of the semiconductor device of this invention. The figure which shows schematic structure of the manufacturing apparatus of the semiconductor device which concerns on embodiment of this invention. The figure which shows the cross-sectional structure of the semiconductor wafer which concerns on other embodiment of the manufacturing method of the semiconductor device of this invention.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 101 ... Silicon substrate, 102 ... Silicon nitride film, 103 ... Antireflection film, 104 ... Photoresist, 105 ... Opening, 106 ... Trench, W ... Semiconductor wafer.

Claims (13)

A substrate to be processed, in which at least a silicon nitride film, an antireflection film, and a photoresist having a predetermined opening are formed in this order from the lower side on the silicon substrate, is plasma-etched, and the opening is formed in the silicon substrate. A method of manufacturing a semiconductor device having a plasma etching step of forming a trench for element isolation corresponding to
At least, NF ₃ gas, or SF ₆ gas, or viewing including the NF ₃ gas and SF ₆ gas, further includes an additive gas consisting of either a mixed gas of CF ₄ gas or noble gas or CF ₄ gas and a rare gas and, (flow rate of the additive gas flow rate / NF ₃ gas or SF ₆ gas or NF ₃ gas and SF ₆ gas) the NF ₃ gas or SF ₆ gas or NF ₃ gas and SF ₆ flow rate ratio of the additional gas to the gas Is an etching gas having a value of 1 or more ,
Etching of the antireflection film, the silicon nitride film, and the silicon substrate is performed continuously and collectively without changing the etching gas in the middle. A method of manufacturing a semiconductor device according to claim 1 ,
The method for manufacturing a semiconductor device, wherein the additive gas further contains oxygen gas. A method of manufacturing a semiconductor device according to claim 1 or 2 ,
A method of manufacturing a semiconductor device, wherein a silicon oxide film is further formed between the silicon substrate and the silicon nitride film, and the silicon oxide film is also collectively etched. A substrate to be processed, in which at least a silicon nitride film, an antireflection film, and a photoresist having a predetermined opening are formed in this order from the lower side on the silicon substrate, is plasma-etched, and the opening is formed in the silicon substrate. A method of manufacturing a semiconductor device having a plasma etching step of forming a trench for element isolation corresponding to
See contains at least NF ₃ gas, further includes an additive gas consisting of either a mixed gas of CF ₄ gas or noble gas or CF ₄ gas and a rare gas, the flow ratio of the additive gas to the NF ₃ gas (additive gas Etching of the antireflective film, the silicon nitride film, and the silicon substrate is performed continuously in a batch without changing the etching gas in the middle using an etching gas having a flow rate of NF ₃ / flow rate of NF ₃ gas). A method for manufacturing a semiconductor device, comprising: A method of manufacturing a semiconductor device according to claim 4 ,
The method for manufacturing a semiconductor device, wherein the additive gas further contains oxygen gas. A method of manufacturing a semiconductor device according to claim 4 or 5 ,
A method of manufacturing a semiconductor device, wherein a silicon oxide film is further formed between the silicon substrate and the silicon nitride film, and the silicon oxide film is also collectively etched. A processing chamber for accommodating a substrate to be processed;
Etching gas supply means for supplying the etching gas into the processing chamber;
Plasma generating means for converting the etching gas supplied from the etching gas supply means into plasma and plasma etching the substrate to be processed;
Apparatus for manufacturing a semiconductor device characterized by comprising a control unit for controlling the method of manufacturing a semiconductor device according any one claims 1 to 6 in the processing chamber is performed. A control program which operates on a computer and controls a semiconductor device manufacturing apparatus so that the method of manufacturing a semiconductor device according to any one of claims 1 to 6 is performed at the time of execution. A computer storage medium storing a control program that runs on a computer,
The control program, a computer storage medium characterized by controlling the apparatus for manufacturing a semiconductor device as a method of manufacturing a semiconductor device according to claim 6 any of the preceding claims 1 during execution is performed. A plasma processing method for plasma etching a substrate to be processed in which at least a silicon nitride film, an antireflection film, and a photoresist having a predetermined opening are formed in this order from the bottom on a silicon substrate,
Carrying the substrate to be processed into a processing chamber;
At least in the processing chamber, NF ₃ gas, or SF ₆ gas, or viewing including the NF ₃ gas and SF ₆ gas, further, from one of the mixed gas of CF ₄ gas or noble gas or CF ₄ gas and a rare gas comprising adding includes gas and the NF ₃ gas or SF ₆ gas or NF ₃ flow rate of the additive gas to the gas and SF ₆ gas (additive gas flow rate / NF ₃ gas or SF ₆ gas or NF ₃ gas and SF flow rate of ₆ gas) by supplying etching gas is 1 or more, and generating a plasma,
The plasma is used to etch the antireflection film, the silicon nitride film, and the silicon substrate with the photoresist as a mask without changing the etching gas, and to isolate the element corresponding to the opening in the silicon substrate. And a plasma etching process for forming a trench. The plasma processing method according to claim 10 , comprising:
The plasma processing method, wherein the additive gas further contains oxygen gas. The plasma processing method according to claim 10 or 11 ,
In the plasma etching process, high-frequency power is applied between the upper electrode and the lower electrode in a processing chamber in which a lower electrode on which the substrate to be processed is placed and an upper electrode facing the lower electrode are disposed. A plasma processing method, which is performed by applying A plasma processing method according to claim 12 , comprising:
The high-frequency power includes a first high-frequency power applied to the upper electrode and a second high-frequency power applied to the lower electrode having a frequency lower than that of the first high-frequency power. Plasma processing method.

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