JP5042318B2 - 協定タイミング・ネットワーク内の階層１構成を定義する方法、システム、およびコンピュータ・プログラム - Google Patents

協定タイミング・ネットワーク内の階層１構成を定義する方法、システム、およびコンピュータ・プログラム Download PDF

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Publication number
JP5042318B2
JP5042318B2 JP2009547641A JP2009547641A JP5042318B2 JP 5042318 B2 JP5042318 B2 JP 5042318B2 JP 2009547641 A JP2009547641 A JP 2009547641A JP 2009547641 A JP2009547641 A JP 2009547641A JP 5042318 B2 JP5042318 B2 JP 5042318B2
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Prior art keywords
server
tier
configuration
ctn
command
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Expired - Fee Related
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JP2009547641A
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Japanese (ja)
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JP2010528345A (ja
JP2010528345A5 (OSRAM
Inventor
カールソン、スコット
クラブツリー、ドナルド
ダーレン、デニス
セヴィニー、デニス
ウィアボウスキー、ジュディス
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International Business Machines Corp
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International Business Machines Corp
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
    • H04J3/0644—External master-clock
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/14—Time supervision arrangements, e.g. real time clock
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/28—Timers or timing mechanisms used in protocols
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
    • H04J3/0641—Change of the master or reference, e.g. take-over or failure of the master

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Hardware Redundancy (AREA)
  • Computer And Data Communications (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Electric Clocks (AREA)
JP2009547641A 2007-01-31 2008-01-23 協定タイミング・ネットワーク内の階層１構成を定義する方法、システム、およびコンピュータ・プログラム Expired - Fee Related JP5042318B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US88756207P 2007-01-31 2007-01-31
US60/887,562 2007-01-31
PCT/EP2008/050739 WO2008092781A2 (en) 2007-01-31 2008-01-23 Defining a stratum-1 configuration in a coordinated timing network

Publications (3)

Publication Number Publication Date
JP2010528345A JP2010528345A (ja) 2010-08-19
JP2010528345A5 JP2010528345A5 (OSRAM) 2010-09-30
JP5042318B2 true JP5042318B2 (ja) 2012-10-03

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Family Applications (1)

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JP2009547641A Expired - Fee Related JP5042318B2 (ja) 2007-01-31 2008-01-23 協定タイミング・ネットワーク内の階層１構成を定義する方法、システム、およびコンピュータ・プログラム

Country Status (4)

Country Link
US (1) US9112626B2 (OSRAM)
JP (1) JP5042318B2 (OSRAM)
CA (1) CA2675637A1 (OSRAM)
WO (1) WO2008092781A2 (OSRAM)

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Also Published As

Publication number Publication date
WO2008092781A2 (en) 2008-08-07
WO2008092781B1 (en) 2008-12-11
CA2675637A1 (en) 2008-08-07
US20080183897A1 (en) 2008-07-31
WO2008092781A3 (en) 2008-10-30
US9112626B2 (en) 2015-08-18
JP2010528345A (ja) 2010-08-19

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