JP5015141B2 - Organic thin film transistor and manufacturing method thereof - Google Patents

Description

  The present invention relates to an organic thin film transistor and a method for manufacturing the same.

  In recent years, research and development of organic thin-film transistors has been actively conducted, and application to flexible displays is expected as an example of the application. Among them, research has been conducted to drive an organic electroluminescence (EL) element in an active matrix with an organic thin film transistor.

  In one of the MOS structures of organic thin film transistors, a gate electrode is provided on a substrate, a gate insulating film is formed thereon so as to cover the gate electrode, and a source electrode and a drain electrode are separated from each other on the gate insulating film. A bottom contact type is known which is formed by stacking an organic semiconductor film on a gate insulating film between a source electrode and a drain electrode.

  In order to make the most of the merits of organic substances, formation of an organic thin film transistor by a printing technique has been attempted. Therefore, a material that is soluble in a solvent such as a polymer has been studied as a gate insulating film material. However, a relatively large current is required to drive an organic EL element that is a self-luminous element. Therefore, a high dielectric constant polymer gate insulating film is necessary.

  In order to form it, a high dielectric constant polymer containing cyano group such as cyanoethyl pullulan or a gate insulating film in which metal oxide nanoparticles are simply dispersed in a high dielectric constant is formed by a coating method. (See Patent Document 1). Nanoparticles include particles having a length in at least one direction of less than 500 nm.

According to the coating method, after applying a dispersion liquid in which a high dielectric constant inorganic compound is dispersed in a solvent on a predetermined substrate, the gate insulating film is formed by volatilizing the solvent component, or a solution of a silica precursor or the like A gate insulating film can be obtained by applying a dispersion liquid in which high dielectric constant inorganic compound particles are dispersed therein and baking the dispersion.
JP 2002-110999 A

  There are not many types of high dielectric constant polymer materials that should be used for gate insulating films in organic thin film transistors, and polymers are inferior in voltage resistance, resulting in thicker gate insulating films, resulting in higher dielectric constants. And the withstand voltage are offset. Furthermore, a high dielectric constant polymer is difficult to dissolve in a solvent and is difficult to form by printing. In addition, in the conventional technology in which a gate insulating film is formed by simply applying a solution in which metal oxide nanoparticles having a high dielectric constant are dispersed, the surface of the gate insulating film is roughened by nanoparticles protruding on the surface after the film formation. As a result, there arises a problem that the performance of the organic thin film transistor is deteriorated.

  In view of this, the present invention provides an organic thin film transistor with improved performance including the smoothness of the interface between the organic semiconductor layer and the gate insulating film and a method for manufacturing the same.

  The organic thin film transistor of the present invention includes a source electrode and a drain electrode provided separately from each other, an organic semiconductor layer interposed between the source electrode and the drain electrode, and the organic semiconductor layer between the source electrode and the drain electrode. An organic thin film transistor having a height that defines a thickness of the gate insulating film between the organic semiconductor layer and the gate electrode It has a spacer.

The organic thin film transistor manufacturing method according to the present invention includes a source electrode and a drain electrode provided separately from each other, an organic semiconductor layer interposed between the source electrode and the drain electrode, and the gap between the source electrode and the drain electrode. A method of manufacturing an organic thin film transistor having a gate electrode disposed opposite to an organic semiconductor layer via a gate insulating film,
Forming a gate electrode on the substrate;
Forming a gate insulating film on the gate electrode;
Forming a source electrode and a drain electrode separated from each other on the gate insulating film;
Forming the organic semiconductor layer on opposite ends of the source electrode and the drain electrode and on the vicinity thereof, and
In the step of forming the gate insulating film, a spacer having a height that defines the thickness of the gate insulating film between the organic semiconductor layer and the gate electrode is provided, and at least the source electrode and the source electrode are formed by an imprinting method. The gate insulating film is formed by defining a surface of a portion where a channel on the organic semiconductor layer between the drain electrodes is generated at a height of the spacer.

  According to the above configuration, since the spacer having a height that defines the thickness of the gate insulating film is provided, the thickness control accuracy of the gate insulating film by the imprinting method is improved. Furthermore, by using a polymer composition in which second nanoparticles having an average particle size larger than the average particle size of the first nanoparticles are dispersed as the spacer, the gate insulating film can be made to have a smooth surface by an imprinting method. And the film thickness can be easily controlled. That is, the polymer gate insulating film manufactured by the imprinting method has the same relative dielectric constant as the gate insulating film GIF formed by spin coating, but the surface roughness is improved. In addition, the mobility of the organic thin film transistor is improved, and the process temperature is 200 ° C. or lower, which can be applied to a plastic film substrate.

It is a schematic sectional drawing of the organic TFT of embodiment by this invention. It is a partial expanded sectional view which shows the organic TFT structure of embodiment by this invention. It is a fragmentary sectional view of a substrate in a process of an organic TFT manufacturing method of an embodiment by the present invention. It is a fragmentary sectional view of a substrate in a process of an organic TFT manufacturing method of an embodiment by the present invention. It is a fragmentary sectional view of a substrate in a process of an organic TFT manufacturing method of an embodiment by the present invention. It is a fragmentary sectional view of a substrate in a process of an organic TFT manufacturing method of an embodiment by the present invention. It is a fragmentary sectional view of a substrate in a process of an organic TFT manufacturing method of an embodiment by the present invention. It is a fragmentary sectional view of a substrate in a process of an organic TFT manufacturing method of an embodiment by the present invention. It is a fragmentary sectional view of a substrate in a process of an organic TFT manufacturing method of an embodiment by the present invention. It is a fragmentary sectional view of a substrate in a process of an organic TFT manufacturing method of an embodiment by the present invention. It is a fragmentary sectional view of a substrate in a process of an organic TFT manufacturing method of an embodiment by the present invention. It is a fragmentary sectional view of a mold in a process of an organic TFT manufacturing method of an embodiment by the present invention. It is a fragmentary sectional view of a mold in a process of an organic TFT manufacturing method of an embodiment by the present invention. It is a schematic sectional drawing of the organic TFT of other embodiment by this invention. It is a schematic sectional drawing of the organic TFT of other embodiment by this invention. It is a schematic sectional drawing of the organic TFT of other embodiment by this invention.

Explanation of symbols

10 substrate S source electrode D drain electrode OSF organic semiconductor film G gate electrode GIF gate insulating film FF partition wall SLS inclined surface

BEST MODE FOR CARRYING OUT THE INVENTION

  Hereinafter, an organic thin film transistor (organic TFT) and a manufacturing method thereof according to an embodiment of the present invention will be described with reference to the drawings.

  FIG. 1 shows a cross-sectional view of an organic TFT.

  FIG. 1 shows an example of the structure of a bottom contact type organic TFT. The organic TFT includes an opposing source electrode S and drain electrode D provided separately from each other, an organic semiconductor film OSF made of an organic semiconductor laminated so that a channel can be formed between the source electrode and the drain electrode, and a source A gate electrode G that applies an electric field to the organic semiconductor film OSF between the electrode S and the drain electrode D, and has a gate insulating film GIF that covers the gate electrode G and is insulated from the source electrode S and the drain electrode D. .

  As shown in FIGS. 1 and 2, the gate insulating film GIF includes dielectric nanoparticles NP having a high dielectric constant and a base material polymer PM for dispersing them, and further includes a spacer SP. In the present embodiment, the spacer SP is a second dielectric nanoparticle or nanoparticle aggregate having an average particle size larger than the average particle size of the small particle NP. The density of the spacers SP (second dielectric nanoparticles or nanoparticle aggregates) in the gate insulating film is 1 / 1,000,000 or less and 1/10 or less compared to the density of the small-particle nanoparticles NP. . The material of the spacer SP and the nanoparticle NP can be composed of, for example, the same material, but may be composed of different materials.

  Regarding the spacer SP, since the thickness of the gate insulating film GIF is usually 50 to 1000 nm, its height (particle diameter) is 50 to 1000 nm. Since the density of the spacer is relatively low, a material having a relative dielectric constant of 2 or more is effective for the spacer.

  The height (particle diameter) of the spacer that defines the thickness of the gate insulating film GIF is at least twice, preferably at least 10 times the average particle diameter of the small-sized nanoparticles NP. The nanoparticle NP having a small particle size has an average particle size smaller than the height (particle size) of the spacer SP, and the relative dielectric constant thereof is preferably 3 or more, and preferably 10 or more.

  The shape of the large-sized nanoparticle serving as the small-sized nanoparticle NP and the spacer SP is not particularly limited, and may be any of a flat plate shape, a needle shape, an indeterminate shape, etc. in addition to a spherical shape. In general, the nanoparticle NP having a small particle size may have non-uniform dispersion (dielectric constant) in the gate insulating film GIF when the average particle size is larger than 500 nm, but there is no problem when the particle size is 100 nm or less. It is desirable to use nano-particles NP having an average particle diameter in a range where the dielectric constant does not decrease, for example, a small particle diameter of 5 nm or more.

  The polymer PM that disperses the nanoparticles NP of the gate insulating film is a cured or thermoplastic resin that is modified by heat or light irradiation.

  In the formation of the gate insulating film GIF in which the nanoparticles NP are dispersed in the polymer PM, the impregnation method is used to prevent deterioration of the performance of the organic TFT due to the increase in roughness due to the nanoparticles on the surface of the gate insulating film GIF. be able to. That is, in the implementation process, the spacer SP having a height that defines the thickness of the gate insulating film between the organic semiconductor layer and the gate electrode (the thickness of the portion where the channel of the organic semiconductor layer is generated) is provided. Then, a gate insulating film is formed. In the present embodiment, the spacer (the nano particle having the maximum particle diameter) functions by the pressing force in the imprinting process. Furthermore, the surface of the part where the channel on the organic semiconductor layer is generated by the implementation method (later interface) can be smoothed and patterned simultaneously. In the organic TFT, a release agent may be provided between the source electrode S and drain electrode D and the gate insulating film GIF.

  Here, the imprinting method is a method of transferring the concavo-convex shape of a mold by pressing a concavo-convex dimension of several tens to several hundreds of nanometers in a mold (mold) against a substrate to be processed such as a thermoplastic or thermosetting resin. This is a nano-order three-dimensional structure forming technique. The imprinting method includes a thermal method and a photocuring (UV) method. The transfer process can be completed in a few minutes, and many parts with the same shape can be produced in a short time. Molds used in imprint technology are usually manufactured using electron beam exposure technology such as semiconductor micromachining technology and etching technology.

  As the mold material, semiconductors such as Si, metals, metal oxides, and diamond are effective. In imprinting, a gate insulating film can be patterned by heating and cooling with a thermosetting resin or a thermoplastic resin, but an imprinting method using a photosensitive polymer or a photosensitive composition such as ultraviolet rays is also effective. . As the mold at that time, a material that transmits ultraviolet rays, such as quartz and sapphire, is effective. A substrate that transmits ultraviolet rays is also effective.

  An example of an organic thin film TFT manufacturing method using the imprinting method of this embodiment will be described.

  As shown in FIG. 3, a gate electrode G is formed on the cleaned substrate 10 (step 1).

  Next, as shown in FIG. 4, a polymer solution of the gate insulating film GIF is applied on the substrate 10 and the gate electrode G and dried (step 2). In this step of applying the gate insulating film, a spin coating method or the like can be used, and a polymer solution containing predetermined nanoparticles and spacers is prepared in advance, and its viscosity is adjusted to, for example, 1 mPa · s to 100 Pa · s. The The amount of the gate insulating film GIF applied to the polymer solution substrate is such that the thickness of the gate insulating film GIF after drying exceeds the height (particle size) of the spacer.

  Next, as shown in FIG. 5, a mold MD in which minute irregularities are formed is prepared (step 3). In a reduced pressure atmosphere, the mold MD is pressed against the surface of the gate insulating film GIF as shown in FIG. The surface of the site where the layer channels are generated is smoothed (step 4).

  Next, as shown in FIG. 7, in a state where the mold MD is pressure-bonded to the surface of the gate insulating film GIF, a radiation RAD such as heat (or light) is supplied to the substrate 10 and the mold MD and is held for a certain period of time. The solution is denatured and copied to the gate insulating film GIF (step 5).

  Then, after cooling, the mold MD is removed from the substrate 10 as shown in FIG. 8 (step 6).

  Next, as shown in FIG. 9, unnecessary portions of the gate insulating film GIF other than the portion including the portion where the channel of the organic semiconductor layer is generated are removed from the substrate 10 (step 7). In this way, the gate insulating film GIF is formed.

  Next, as shown in FIG. 10, the source electrode S and the drain electrode D separated from each other are deposited on the smoothed surface of the copied gate insulating film GIF (step 8).

  Next, droplets of the liquefied material of the organic semiconductor layer are supplied to the recesses between the source electrode S and the drain electrode D and dried to form the organic semiconductor film OSF, as shown in FIG. Then, an organic TFT having a MOS structure is formed (step 9). In addition, the organic semiconductor layer OSF can be formed by a self-assembly method.

  In the above-mentioned organic TFT manufacturing method, as shown in FIG. 5, only the surface of the part where the channel is generated (between the opposed ends of the source electrode and the drain electrode, that is, the concave portion) is a flat part protruding from the periphery. CFS is provided in the mold MD, and smoothing is achieved by pressure bonding of the channel molding surface CFS by using the implementation method. In addition, as shown in FIG. 12, the channel molding surface CFS is flat so as not to protrude. A mold MD can be used. In this embodiment, since the gate electrode G having a predetermined thickness is formed on the substrate 10, the surface on the gate electrode G even if the flat mold MD is pressed on the entire surface of the gate insulating film GIF by the imprinting method. It is possible to smooth and pattern the (site where the channel is generated).

  In addition, the gate insulating film GIF is pressed deeper by pressing the mold MD more deeply by providing the inclined surface SLS around the protruding channel forming surface CFS as in the mold MD shown in FIG. It is also possible to form the concave portion and the partition wall portion FF.

  In this embodiment, that is, by providing the mold MD with the inclined surface SLS of the projecting portion, the inclined surface SLS heading from the partition wall FF to the site where the channel is generated can also be formed. The inclined surface SLS of the mold MD has the following effects.

  In the obtained organic TFT having the MOS structure, as shown in FIG. 14, the overlapping portion OL between the gate electrode and the source and drain electrodes through the gate insulating film becomes a parasitic capacitance, which can be a factor to hinder circuit characteristics. In order to reduce the parasitic capacitance, it is necessary to match the position of the source and drain electrodes with respect to the gate electrode width (OL≈0) (see FIG. 1) (see FIG. 1). The distance between the opposed end portions OPE of the source electrode S and the drain electrode D must be substantially the same. For this reason, if the channel length is shortened to several μm in order to cause the source-drain current to flow, there is a problem that the wiring resistance of the gate electrode G also increases. In addition, in order to form the organic semiconductor film OSF on the gate insulating film GIF between the source electrode S and the drain electrode D, an inkjet capable of dispensing a small amount of an organic semiconductor solution and discharging a droplet to an accurate position. Although the technology can be applied, there is a problem that high droplet landing accuracy is required for a channel length with a narrow line width.

  Due to the presence of the partition walls FF caused by the inclined surface of the mold shown in FIG. 14, the inclined surface of the concave portion rcs functions as a droplet landing site, and the effect of improving the landing accuracy is achieved. Furthermore, since the thickness of the partition wall portion FF can be made thicker than the channel thickness of the gate insulating film formed by the conventional coating, the parasitic capacitance caused by the overlap between the gate electrode and the source and drain electrodes of the organic TFT can be suppressed. Therefore, a wide line width of the gate electrode G can be secured, and an effect of promoting a reduction in wiring resistance can be achieved. As described above, according to this embodiment, the interface smoothing of the portion where the channel of the gate insulating film and the organic semiconductor layer is generated is achieved, and the bank function that reduces the parasitic capacitance and is effective for ink jet droplet landing is achieved. To contribute. Therefore, the organic TFT of this embodiment is suitable for an active matrix driving element. For example, it is suitable for technologies using organic TFTs, organic EL displays, liquid crystal displays, IC tags, and the like.

  In the above embodiment, two or more kinds of nanoparticles having different particle diameters are used in the polymer gate insulating film including nanoparticles that are smoothed and patterned by the imprinting method. However, the spacer may be fixed to the substrate or the gate electrode in advance. For example, as shown in FIG. 15, conical spacers SP having the predetermined height are provided in advance on the gate electrode G on the substrate 10, and the organic thin film TFT can be manufactured through the steps shown in FIG. As shown in FIG. 16, the organic thin film TFT can be manufactured through the steps shown in FIG. 4 and subsequent steps by previously providing the substrate 10 near the gate electrode G with the cone-shaped spacer SP having the predetermined height. The inclined surfaces SLS of the conical spacers SP that taper away from the substrate 10 as shown in the figure have the effect of promoting the escape of the small-sized nanoparticles NP when the channel molding surface CFS of the mold MD is pressed.

(substrate)
In addition to glass, the substrate 10 may be a plastic substrate such as PES or PC, or a bonded substrate of glass and plastic, and the substrate surface may be coated with an alkali barrier film or a gas barrier film. As the plastic substrate, for example, a film of polyethylene terephthalate, polyethylene-2, 6-naphthalate, polysulfone, polyethersulfone, polyetheretherketone, polyphenoxyether, polyarylate, fluororesin, polypropylene, or the like can be applied.

(Organic TFT)
As a polymer for the base material of the gate insulating film GIF, a mixture of polyvinylphenol and methylated melamine formaldehyde copolymer or polymethyl methacrylate was used, but the present invention is not limited to this. Good. Other examples include polyethylene, polyvinyl chloride, polyvinylidene fluoride, polycarbonate, polyphenylene sulfide, polyether ether ketone, polyether sulfone, polyimide, phenol novolac, polyamide, benzocyclobutene, polychloropyrene, polyester, polyoxymethylene, Polysulfone, epoxy resin, polyvinyl alcohol, and other resins such as polyacrylate can be used. In addition, a resin curable by heat or light is also effective.

As the nanoparticle NP having a small particle diameter and having a high dielectric constant dispersed in the gate insulating film GIF, for example, a high dielectric constant having a relative dielectric constant of 3 or more, preferably 10 or more, such as Ta ₂ O ₅ is used. That _is, like _{TiO 2, ZrO 2, BaTiO 3} , PbTiO 3, CaTiO 3, MgTiO 3, BaZrO 3, PbZrO 3, SrZrO 3, CaZrO 3, LaTiO 3, LaZrO 3, BiTiO 3, LaPbTiO 3, Y 2 O 3 is Suitable for nanoparticles. Two or more of these may be mixed.

  As the gate electrode G or the source / drain electrodes S and D, for example, Cr alone or Cr / Au is used. However, the material is not particularly limited and it is sufficient that the material has sufficient conductivity. That is, Pt, Au, W, Ru, Ir, Al, Sc, Ti, V, Mn, Fe, Co, Ni, Zn, Ga, Y, Zr, Nb, Mo, Tc, Rh, Pd, Ag, Cd, Ln, Sn, Ta, Re, Os, Tl, Pb, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu, etc. The compound may be used. In addition, organic conductive materials including conjugated polymer compounds such as metal oxides such as ITO and IZO, polyanilines, polythiophenes, and polypyrroles may be used.

  The organic semiconductor of the organic semiconductor film OSF may be any organic material that exhibits semiconductor characteristics, such as pentacene, phthalocyanine derivatives, naphthalocyanine derivatives, azo compound derivatives, perylene derivatives, indigo derivatives for low molecular weight materials. , Quinacridone derivatives, polycyclic quinone derivatives such as anthraquinones, cyanine derivatives, fullerene derivatives, or indole, carbazole, oxazole, inoxazole, thiazole, imidazole, pyrazole, oxadiazole, pyrazoline, thiathiazole, triazole, etc. Nitrogen-containing cyclic compound derivatives, hydrazine derivatives, triphenylamine derivatives, triphenylmethane derivatives, stilbenes, quinone compound derivatives such as anthraquinone and diphenoquinone, anthracene Pyrene, phenanthrene, polycyclic aromatic compound derivative such as coronene, and the like. Polymer materials include aromatic conjugated polymers such as polyparaphenylene, aliphatic conjugated polymers such as polyacetylene, heterocyclic conjugated polymers with polypinol and polythiophene ratios, polyanilines and polyphenylene sulfide. Heteroatom conjugated polymers, complex conjugated polymers having a structure in which structural units of conjugated polymers such as poly (phenylene vinylene), poly (annelen vinylene) and poly (chenylene vinylene) are alternately bonded These carbon-based conjugated polymers are used. Also, oligosilanes and carbon-based conjugated structures such as polysilanes, disilanylene arylene polymers, (disilanylene) ethenylene polymers, and (disilanylene) ethynylene polymers such as disilanylene carbon-based conjugated polymer structures Polymers in which are alternately linked are used. In addition, polymer chains made of inorganic elements such as phosphorus and nitrogen may be used, and polymers having aromatic chain ligands such as phthalocyanate polysiloxane coordinated, perylenetetracarboxylic Polymers in which perylenes such as acids are subjected to heat treatment and condensed, ladder-type polymers obtained by heat-treating polyethylene derivatives having a cyano group such as polyacrylonitrile, and organic compounds intercalated in perovskites The composite material may be used.

Furthermore, the surface of the gate insulating film between the source / drain electrodes can be covered with a self-assembled monomolecular film. For example, it is preferable to treat with HMDS (: hexmethyldisilazane, (CH ₃ ) ₃ SiNHSi (CH ₃ ) ₃ ) to form a monomolecular film thereof. In addition, a configuration in which a hydrophobic film is provided other than the surface of the gate insulating film between the source / drain electrodes by an OTS (: octadecyltrichlorosilane CH ₃ (CH ₂ ) ₁₇ SiCl ₃ ) film treatment is also effective.

  Film sealing with an inorganic or high-molecular nitride such as silicon nitride is performed so as to cover the formed circuit and the organic TFT. Sealing with an inorganic sealing film made of a nitrided oxide such as silicon nitride oxide, an oxide such as silicon oxide or aluminum oxide, or a carbide such as silicon carbide, or multilayer sealing of a polymer and an inorganic film may also be used.

  An organic EL panel that is actively driven by an organic TFT was fabricated and its characteristics were evaluated.

Example 1
Cr was formed as a gate electrode on a gate insulating film on a glass substrate and patterned by etching. Furthermore, a _second particle having a second particle size (average particle size of 300 nm) larger than the first particle size (average particle size of 50 nm) of the first nanoparticles of Ta ₂ O ₅ that is a high dielectric constant compound is used. A solution in which nanoparticles (spacer), 7 wt% polyvinylphenol (Mw = 20000) 8 wt% and methylated polymelamine-formaldehyde copolymer (Mn = 511) 4 wt% were applied by spin coating at 2000 rpm, and 100 ° C. 2 Dried in minutes. Next, a Si mold having a gate insulating film pattern applied to this film was pressed at a pressure of 0.5 MPa, heated to 200 ° C. and cured in 5 minutes. After curing, the uncured portion was removed by ultrasonic cleaning with ethanol to obtain a gate insulating film pattern. When the film thickness of this gate insulating film was confirmed with a step gauge, it was 300 nm. Subsequently, a source electrode and a drain electrode made of Au patterned by photolithography were formed. Finally, pentacene was formed as an organic semiconductor layer by vacuum deposition to produce an organic TFT.

(Example 2)
On the glass substrate, Cr was formed as a gate electrode on the gate insulating film and patterned by etching. Furthermore, a _second particle having a second particle size (average particle size of 300 nm) larger than the first particle size (average particle size of 50 nm) of the first nanoparticles of Ta ₂ O ₅ that is a high dielectric constant compound is used. A solution in which nanoparticles (spacers) and 5 wt% polymethyl methacrylate (PMMA) (Mw = 93000) were mixed was applied by spin coating 2000 rpm and dried at 100 ° C. for 2 minutes. Next, the substrate was heated to 200 ° C., and a Si mold having a gate insulating film pattern applied thereto was pressed at a pressure of 0.5 MPa to obtain a gate insulating film pattern. When the film thickness of this gate insulating film was confirmed with a step gauge, it was 300 nm. Next, the remaining PMMA is removed by oxygen reactive ion etching. Subsequently, a source electrode and a drain electrode made of Au patterned by photolithography were formed. Finally, pentacene was formed as an organic semiconductor layer by vacuum deposition to produce an organic TFT.

  As described above, according to the present embodiment, in the organic TFT structure, it is possible to accurately control the thickness of the gate insulating film, which is an important factor in determining transistor characteristics. As in the configuration of the present invention, since the film thickness of the gate insulating film can be easily controlled at the time of imprinting by inserting nanoparticles for controlling the film thickness, an organic TFT using a polymer as the gate insulating film Thus, a high dielectric constant gate insulating film can be achieved without degrading the performance of the organic TFT.

Claims (6)

A source electrode and a drain electrode provided separately from each other, an organic semiconductor layer interposed between the source electrode and the drain electrode, and a gate insulating film facing the organic semiconductor layer between the source electrode and the drain electrode A method of manufacturing an organic thin film transistor having a gate electrode disposed through
Forming a gate electrode on the substrate;
Forming a gate insulating film on the gate electrode;
Forming a source electrode and a drain electrode separated from each other on the gate insulating film;
Forming the organic semiconductor layer on opposite ends of the source electrode and the drain electrode and on the vicinity thereof, and
In the step of forming the gate insulating film, a spacer having a height that defines the thickness of the gate insulating film between the organic semiconductor layer and the gate electrode, together with the material of the gate insulating film, is applied to the imprinting method. the Ru good mold, the pressing between the mold and the substrate, a manufacturing method of an organic thin film transistor wherein the spacer is characterized by defining the film thickness of the gate insulating film to the height of the spacer. Method of manufacturing an organic thin film transistor of claim 1 wherein the material of the gate insulating film which comprises nanoparticles of a dielectric having an average particle size smaller becomes than the height of the spacer. The material of the gate insulating film comprises a polymer dispersing nanoparticles of the dielectric, the polymer according to claim 2, wherein it is cured or a thermoplastic resin modified by at least heat or light irradiation Manufacturing method of organic thin-film transistor. The height of the spacer is, the manufacturing method of the organic thin film transistor according to claim 2 or 3, wherein the said at least twice the diameter of the nano particles in the dielectric. Any The spacer of claim 2 to 4, characterized in that a second dielectric nanoparticles or nanoparticle aggregates having an average particle size larger becomes than the mean particle size of the nanoparticles of the dielectric The manufacturing method of the organic thin-film transistor of description. The density of the second dielectric nanoparticles or nanoparticle aggregates in the gate insulating film is 1 / 1,000,000 or less and 1/10 or less compared to the density of the dielectric nanoparticles. A method for producing an organic thin film transistor according to claim 5 .

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