JP5012271B2 - Wireless communication device - Google Patents

Description

  The present invention relates to a wireless communication device, and more particularly to a wireless communication device including a local oscillation frequency correction unit suitable for use in a digital wireless communication system.

  In recent years, land mobile radio (LMR) for commercial use has been reduced in frequency band per channel and digitized from the viewpoint of frequency utilization efficiency. When digitizing, frequency division multiplexing using frequency modulation keying (FSK) of FM modulation because of coexistence with existing analog wireless communication devices, diversion of existing equipment, ease of control, etc. (Frequency Division Multiple Access: FDMA) is often employed. In addition, as a high-frequency signal source such as a wireless communication device, a voltage controlled oscillator (VCO) having a temperature compensation function or a temperature compensated crystal oscillator (TCXO) using a crystal resonator as a frequency oscillation source. ) Is generally used.

On the other hand, in a communication method in which information transmission is performed by the amount of phase shift or frequency shift of a carrier wave such as PSK or FSK, if the received signal frequency is shifted from the local oscillation frequency of the receiver, a DC offset component ( DC offset) is included, and normal synchronization detection and data detection become difficult. In particular, when the frequency band per channel is narrowed as in recent years, the allowable amount of phase shift and frequency shift are reduced, so even the same amount of DC offset component has a greater effect, and synchronization detection. It becomes difficult.
Causes of such frequency deviation (or expressed as frequency error) include the secular change of the local oscillation circuit element on the receiver side and the circuit element of the detector (detection means in frequency modulation is a frequency discriminator). It is considered that the shift of the center frequency and the like due to the change of the circuit element value accompanying the secular change and the temperature change are the main.

  FIG. 14 is a detection waveform diagram showing the influence of the DC offset when detecting a quaternary FSK modulation signal. FIG. 14A shows a state where there is no frequency shift, that is, when there is no DC offset. As shown in FIG. 14B, when each symbol value is located at a value (± 1, ± 3) corresponding to each symbol value centered on the midpoint 0, a DC offset is included. In addition, since the whole is shifted in either the upper or lower direction, a value different from the correct symbol value is detected. In the example shown in FIG. 14B, the DC offset amount at this time is an amount ΔDC shifted from the midpoint 0 in the plus direction.

Therefore, conventionally, such a wireless communication apparatus is generally provided with an automatic frequency control (AFC) circuit that automatically controls the local oscillation frequency of the transceiver to a desired value. As a basic means of AFC, a method of synchronizing a VCO or TCXO in a phase lock loop (PLL) circuit with a radio signal frequency transmitted from a base station or a radio relay station whose frequency is accurately adjusted. Is used. In addition, in a radio communication device equipped with a received signal strength detection means (Receive Signal Strength Indicator: RSSI), a method of controlling the oscillation frequency of the local oscillator so that the RSSI value is the best, or an FSK digital modulation method, The one disclosed in Patent Document 1 (Japanese Patent Laid-Open No. 6-177931) is known. This is because when a synchronization is established by detecting a frame sync word (FSW), a frequency shift (frequency error amount) is also detected from the DC offset, and the local oscillation is performed so that the DC offset becomes small. It directly controls the frequency.
It should be noted that the frame synchronization word detection means and the synchronization timing control are disclosed in Patent Documents 2 to 4, and can be referred to.
JP-A-6-177931 JP-A-9-289485 Japanese Patent Laid-Open No. 3-70226 JP 2001-326699 A

  However, as described in Patent Document 1, the method of detecting the DC offset amount based on the output of the FSW synchronization detection circuit and adjusting the output signal frequency of the local oscillator so as to reduce the value is as follows. Since it is assumed that it can be detected, the object cannot be achieved if the frequency error becomes large and FSW synchronization cannot be obtained. That is, the frequency shift becomes large, and a part of the band of the received signal is removed by the attenuation band of the band limiting filter such as an intermediate frequency amplifier circuit, or the frequency shift is completely positioned outside the pass band of the filter. If it becomes larger, the reception signal is not supplied to the FM detector, so that the DC offset amount itself cannot be detected, and the frequency cannot be corrected.

  FIG. 15 shows a digital demodulated waveform in the case where FSW is detected by detecting a received signal whose frequency is greatly shifted, according to FIG. 14, and the difference between the FSW waveform center position of the detected waveform and the correct position is displayed. Becomes larger. The relationship between the carrier (carrier wave) signal and the pass band of the band limiting filter in this state is, for example, as shown in FIG. That is, there is no problem when the center frequency f0 of the carrier is at the center of the band limiting filter, but it is greatly deviated from the center of the pass band as in the case where a part of the carrier signal is in the band limiting area as in f1. Then, FSW detection becomes difficult.

  The same applicant has applied for a means shown in FIG. 17 as a means for solving such a problem (referred to as “prior application invention”). This prior invention is provided with a frequency shift detection block 68 for calculating the frequency shift based on the output signal of the FM detector 58 of the receiver. In this block, the level of the DC offset signal corresponding to the frequency shift is monitored, and the frequency exceeds a certain level. In this case, the frequency correction is performed so that the frequency of the local oscillator 52 is pulled back into the pass band of the band filter in the case of deviation. That is, the frequency deviation detection block 68 includes an LPF 62 having a cutoff frequency of about several Hz and a frequency deviation detection circuit 63, and detects a DC offset component that increases in accordance with the deviation of the center frequency of the carrier signal. The frequency correction is performed by controlling the AFC control unit 64 based on the amount.

  FIG. 18 is a timing chart showing an example of the processing procedure. The block configuration and processing method shown in FIGS. 17 and 18 can also be used in the present invention, and will be described in detail later. However, even if the FSW cannot be detected, a DC signal (DC) corresponding to the frequency deviation from the detected signal is used. If the offset) can be detected, the frequency shift can be canceled by correcting the local oscillation signal frequency for frequency conversion based on the frequency shift information. Therefore, even when the frequency of the received signal greatly deviates so as to extend beyond the pass band of the band limiting filter, the deviation is corrected to detect the FSW, and further, the FSW synchronization is accurately maintained by the automatic frequency correction function based on the FSW detection. Can be continued and data can be demodulated.

However, since a filter means having a large time constant is used to extract the DC component, it takes some time to correct the frequency correctly. Therefore, when applied to a receiver that performs high-speed scanning reception, it may be an obstacle to increase the scanning speed. If this problem can be solved, the range of use of the above-mentioned prior invention will be widened.
The present invention has been made in view of various circumstances in a conventional wireless communication apparatus having a frequency correction function, and an object thereof is to provide a wireless communication apparatus having a frequency correction function that can be applied to high-speed scanning reception. It is said.

In order to solve such a problem, the present invention provides a frequency converting means for generating an intermediate frequency signal by mixing a local oscillation signal with a received signal, and a band for removing the adjacent channel frequency signal from the intermediate frequency signal and extracting the own channel signal. A radio comprising: a filter; a detection means for detecting the band filter output signal; a known frame synchronization word detection means for detecting a known frame synchronization word signal from the detection signal; and a frequency deviation correction means for correcting a frequency deviation. In the communication device, a filter switching means for switching a pass band of the band filter to a first pass band or a second pass band wider than the first pass band, and the frequency shift in a state where the band filter is switched to the second pass band. after corrected by the correction means, and the posterior frame sync word detection means for detecting the frame synchronization word signal, Frequency correction amount to calculate a frequency correction value of the serial frame and frequency deviation signal obtaining means for obtaining a signal corresponding to the frequency deviation from the synchronization word signal received signal frequency, said local oscillation signal based on the previous SL frequency shift signal acquisition means output Frequency control for controlling the oscillation frequency correction timing and the frequency correction amount of the local oscillation signal based on the setting means, a symbol counter for determining the data position from the frame synchronization word signal, and the symbol counter and the frequency correction amount setting means And the filter switching means switches the band filter to the first pass band after frequency control.

The front Symbol known frame sync word detection means, a synchronization word candidate acquisition means for acquiring a synchronization word candidate symbol data from a received signal waveform, each symbol of the stored with each symbol value of the acquired frame synchronization word candidate frame synchronization words Symbol error calculation means for obtaining a symbol error with the corresponding value, symbol error average calculation means for obtaining a symbol error average value for all symbols obtained by the symbol error calculation means, and frame synchronization word candidate obtained by the symbol error calculation means Symbol error average subtracting means for subtracting the symbol error average value from each symbol error to obtain an offset correction value, and correction for squaring the offset correction value obtained by the symbol error average subtracting means for each symbol of the frame synchronization word candidate Value square calculation means; The symbol error summing means for adding the results obtained by the correction value square computing means for all the frame synchronization word candidate symbols to obtain the synchronization word symbol error, the synchronization word symbol error obtained by the symbol error summing means, and a preset threshold value And a synchronization word determination means for comparing and determining whether or not the frame synchronization word candidate is a frame synchronization word.

Also, further, based on an output of the symbol counter may comprise means for switching said bandpass filter in the first pass band.

The front Symbol band filter is the FIR filter, DSP, an ASIC or the like, may be configured by software means to switch a pass band by switching the operation coefficient.

Since the present invention is configured as described above, the following effects can be obtained. That is, in the wireless communication device of the scan over par heterodyne system has a band-limiting filter (band filter) first pass band, it wider second passband and switchable functions, wider the band filter pass A frame synchronization word (hereinafter referred to as “FSW”) is detected in a state of switching to a second passband having a band, and a frequency shift for determining a frequency shift of a received signal is detected based on the detected FSW, and detected frequency shift information Based on the above, the local oscillation frequency is corrected. Therefore, even when the frequency is shifted to such a degree that it exceeds the normal passband, the frequency shift can be corrected without using an LPF having a large time constant as in the prior art. The frequency correction associated therewith is possible, high-speed scanning reception is possible, and the effect of speeding up the synchronization processing in the FSW undetected state is great.
Further, a signal corresponding to the frequency shift between the reception signal frequency and the oscillation frequency of the local oscillation means is obtained from the FSW signal, and this frequency shift component is subtracted from the reception signal or the detected FSW signal to detect the FSW, and the frequency Based on the deviation, the frequency correction amount of the local oscillation means is calculated. Further, a symbol counter for determining the data position in the received and detected FSW signal is provided, and the oscillation frequency correction timing and the frequency correction amount of the local oscillating means are controlled based on this symbol counter. In the present invention, if frequency correction is performed on a dark cloud while data is being received, the symbol value being detected is likely to change, so that there is a high possibility of causing a data error in the middle of processing, and this tendency is particularly noticeable when the frequency correction amount is large. . Thus, by controlling the frequency correction timing as in the prior invention, it is possible to prevent a data error during the processing, which is effective in speeding up the processing.

Further , FSW candidate symbol data is obtained from the received signal waveform, symbol errors between these values and the stored normal FSW symbol values are obtained, further, their symbol error average values are obtained, and each symbol error of the FSW candidates is obtained. An offset correction value is obtained by subtracting the symbol error average value, the offset correction value obtained by the symbol error average subtraction means is squared for each symbol of the FSW candidate, and the result obtained by the correction value square operation means is obtained as the FSW candidate. It is determined whether the FSW candidate is an FSW by adding all symbols to obtain a synchronized word symbol error and comparing the synchronized word symbol error obtained by the symbol error summing unit with a preset threshold value. Even if the reception quality deteriorates, the FSW There is an effect that out is possible. If this merit is used, the FSW can be detected reliably by compensating for the S / N deterioration in the state where the band filter is switched to a band wider than the normal band in the present invention, that is, the substantial decrease in reception sensitivity. Is possible.

Also, further, based on an output of said symbol counter, because with a means for switching said bandpass filter in a first pass band, the effect of preventing the occurrence of data errors due to switching of the band-pass filter.

The upper SL bandpass filter is an FIR filter, DSP, are realized by software means an ASIC or the like, since it is configured to switch the bandpass by switching the calculation coefficient, a software manner band switching function This is effective in realizing a filter having the above and facilitating the configuration of the present invention.

Hereinafter, the present invention will be described in detail with reference to embodiments shown in the drawings. However, the components, types, combinations, shapes, relative arrangements, and the like described in this embodiment are merely illustrative examples and not intended to limit the scope of the present invention only unless otherwise specified. .
FIG. 1 is a block diagram showing a configuration example of a main part of a wireless communication device according to the present invention. The wireless communication device shown in this example includes an antenna 1, a first mixer (MIX) 3 that generates a first intermediate frequency by mixing a high-frequency signal received by the antenna 1 with an output of a first local oscillator 2, and A first band filter 4 and a second mixer (MIX) 6 and a second band filter 7 (for mixing with the output of the second local oscillator 5 for frequency conversion to generate a second intermediate frequency signal) Hereinafter, the term “band filter” and “band limiting filter” indicate this), the FM detector 8 for detecting the second intermediate frequency signal, and the frame synchronization word from the output signal of this FM detector. A frame synchronization word detector (FSW synchronization detector) 9 for generating a synchronization signal, a DC offset adjuster 10 for subtracting a DC offset component from the output of the FM detector 8, and a DC offset component The symbol detector 11 that detects a target symbol from the left signal, the LPF 12 that extracts a DC component including a DC offset component from the signal of the FM detector 8, and the DC offset amount are compared with a preset threshold value. A frequency shift detection circuit 13 that outputs a frequency shift signal when the threshold value is exceeded, an AFC control circuit 14 that generates frequency adjustment data based on the frequency shift signal, and a function that corrects the frequency using the frequency adjustment data. The TCXO control circuit 15 having the above-described configuration is configured to control the frequency of the first local oscillator 2 by a signal from the TCXO control circuit 15. In the case where the transmission unit (TX) 16 is provided as a wireless communication device, the oscillation frequency of the transmission oscillator 17 that controls the transmission frequency may be generated by the output of the TCXO control circuit 15.

The above configuration relates to the invention already filed by the same applicant as described above. The frequency shift detection block 18 including the LPF 12 and the frequency shift detection circuit 13 is provided, and the LPF 12 detects the amount of frequency shift. Although AFC control is performed, as described above, since some processing time is required, it is not suitable for scanning reception.
Therefore, in the present invention, the band-pass filter 7 has a function capable of switching between the first pass band and a wider second pass band, so that a wide pass band can be obtained when the frequency deviation is large. The received signal deviating from the normal pass band is also guided to the FM detector 8 by the above filter, so that the FSW synchronous detection can be performed, and the AFC is performed by the FSW / DC offset component calculated using the detected FSW. The frequency correction control is performed so that the frequency is included in the normal narrow first pass band of the band filter 7.
Further, in the configuration shown in FIG. 1, a BPF control unit 19 using the frequency correction timing control means according to the invention already filed by the same applicant (Japanese Patent Application No. 2006-019851: second prior invention) is added. Yes. The BPF control unit 19 includes a symbol counter 20 and a BPF switching control unit 21 controlled by its output signal, and affects the data demodulation of the received signal from the signal of the FSW synchronization detector 9 by a method described later. The band filter (BPF) 7 is configured to perform band switching at a timing not given.

  FIG. 2 is a flowchart of a basic part of the control processing of the wireless communication apparatus configured as described above. In FIG. 2, when the process is started, it is determined whether or not the scanning reception mode is set. If the scanning reception mode requires FSW detection at high speed (S1, Yes), the bandpass filter is set to a wide passband ( Switch to the second passband (S2). In this state, the FSW detection is performed as described above (S3), and if the detection is confirmed (S3, Yes), the AFC control is performed based on the DC offset calculated with the FSW detection (S4), After the symbol counter is operated and frequency correction is performed at a timing that does not affect data demodulation by the TCXO control timing adjustment processing (S5), the pass band of the band filter 7 is set to a normal narrow band (first pass). (S6), and normal AFC control is started by the frequency shift detection block that detects the DC offset by the LPF (S7). Since this flow is complicated, a description of the control of the BPF control unit 19, the frequency shift detection block 18, and peripheral parts related to them will be omitted.

FIGS. 3 and 4 are diagrams showing the state of the processing shown in FIG. 2, and the bandpass filter 7 can pass a frequency carrier within a certain range even when a large frequency deviation occurs as shown in FIG. Thus, it is possible to switch between a wide second pass band and a normal pass band width (first pass band) that can eliminate the influence of the adjacent channel signal as shown in FIG.
Therefore, according to the wide pass band, since the carrier signal is supplied to the FM detector 9 even when the frequency is shifted to some extent, the FSW can be detected although the sensitivity is substantially lowered. Thus, by comparing the FSW symbol position detected with the passband expanded in this way and the normal position of each symbol, a DC offset component accompanying the frequency shift is calculated, and the frequency is determined based on the amount. If the correction is performed, a quick frequency correction process is possible. After the frequency correction, the data can be received by returning to the normal pass band (first pass band).

  Note that such control is not limited to the scanning reception mode, and even in the normal reception mode, as in the case of receiving the first frame signal when the communication device is turned on or after changing the channel. It is also useful when FSW detection is not performed. Therefore, the process of S1 in the above-described flowchart is performed to determine whether the first frame is received or whether the FSW has not been detected. If it is determined that the FSW has not been detected, the same process is performed. Usage is also possible. Once FSW detection can be performed, even if AFC adjustment is performed using normal LPF from the second frame, the amount of frequency deviation is small, so that it does not require much processing time. However, in scanning reception, the FSW is not detected each time scanning is performed, so the above processing is repeated every time the channel is switched. However, if the FSW detection state can be maintained, the frequency shift caused by the LPF Correction (AFC) can also be performed.

FIG. 5 is a diagram illustrating an example of the band switching timing of the band filter (BPF) 7. In FIG. 5, the upper diagram is a frame signal detected from the received signal, and reception is started at timing T1 and detected by receiving the FSW at the beginning of the frame. As described above, the FSW detection becomes difficult.
Therefore, as shown in FIG. 3, the FSW detection is enabled by switching the band of the band-pass filter (BPF) 7 to the wide second pass band, and the FSW detection is performed at T2, and the frequency deviation is dealt with based on the detection. The DC offset component to be calculated is calculated. Since the frequency can be corrected at this time, the frequency may be corrected immediately. However, if the frequency is changed during the data reception of the frame, a data error may occur. A frequency correction process is performed in accordance with the timing T3, and the bandpass filter is switched to the normal passband which is the first passband. The frequency correction process and its timing control will be described later.

FIG. 6A is a block diagram illustrating a configuration example when the present invention is applied to a wireless relay device or a repeater. In the case of using, for example, an oscillator (OCXO) 22 having a high temperature stability as a signal oscillation source such as a radio relay device or a repeater, the necessity for frequency correction of the transmission frequency is low. In such a case, it suffices to cope with the deviation of the received signal frequency. Therefore, instead of the frequency correction of the OCXO 22, a carrier shift unit 23 as shown in FIG. Similarly to the above, the carrier shift unit may be controlled.
In the above description, as a filter capable of switching the band, there are two filters having different bands, or a method of sequentially switching a plurality of filters having different bands in stages, and sequentially switching them. However, the FIR filter can be switched by DSP, ASIC, etc. It can also be realized by a digital filter controlled by software processing or means. In that case, the processing speed can be increased by changing the band by switching the filter count (common to the number of taps).
In addition, although the implementation method of each block in the present invention can be sufficiently implemented by using an existing technology, the same applicant can use the FSW detection method when the reception frequency greatly deviates, and the frequency correction in that case. Various useful inventions have been filed for the method and further the frequency correction timing method. If they are used, the function of the present invention can be further improved.

<Frequency shift detection block>
FIG. 17 shown in the prior art is a block diagram of a wireless communication device using a plurality of prior inventions related to the same applicant, and will be described using this drawing.
Although this prior invention is not necessarily indispensable to the present invention, FSW detection is performed even in a situation where a large frequency shift occurs and a part of the reception band protrudes outside the reception band of the band limiting filter (BPF 7). Since it was made possible, it can be used together as necessary.
That is, in the prior invention, as shown in FIG. 1 or FIG. 17, the FM detector 8 (58), the LPF 12 (62), the frequency deviation detection circuit 13 (63), and the AFC control circuit 14 (64) detect the wave. The DC component included in the output of the detector is monitored, and when the amount exceeds a certain value, the oscillation frequency is corrected so as to cancel it.

FIG. 18 is a schematic signal waveform diagram illustrating a control example of this means. As shown in the received signal sequence diagram of FIG. 18A, in the digital radio system, an FSW unit is arranged at the head at a predetermined interval (predetermined period), and then a frame data unit is transmitted. FIG. 18B is an output waveform diagram of the LPF 12, and FIG. 18C is a TCXO adjustment data signal diagram. At time t0, the FSW synchronization is not yet established. For some reason, the difference between the reception frequency and the local oscillation frequency gradually increases. At time t1, the positive threshold is exceeded, and further, the frequency deviation The situation is expanding. Although depending on the set value of the threshold value, it is difficult to detect the FSW in this state, and the conventional means for correcting the DC offset amount based on the FSW detection does not function effectively.
Therefore, in the present invention, when it is detected that the frequency deviation exceeds a preset threshold (time t1), the local oscillation frequency is corrected in a direction to cancel the frequency deviation. When this correction amount is α, the channel signal is not partially deleted by the BPF at the time of frequency correction, and the detection signal includes all band signals of the reception channel signal, so that the detection signal is not deteriorated.

  In this state, as in the conventional DC offset correction method described above, the FSW detection function of the FSW synchronization detection circuit 9 (59) performed based on the output of the FM detector 8 (58), and the detected FSW The AFC control circuit 14 (64) reduces the DC offset amount by the function of the DC offset adjustment circuit 10 (60) having processing for obtaining the DC offset amount and adding or subtracting the DC offset amount from the next symbol of the FSW detection timing. ) And the TCXO control circuit 15 (65) functions based on the result, so that the DC offset amount is automatically reduced to ideally zero, and the FSW synchronization detection is performed stably. Data symbols are detected accurately.

  As described above, when the DC offset amount exceeds the threshold value, the frequency shift method is a method of shifting the frequency corresponding to the same amount as the threshold value, and the frequency shift amount is set in advance. A method of shifting the frequency in several steps, or a method of performing a relatively large amount of frequency shift when the threshold value is exceeded, and then performing a frequency shift several times while gradually decreasing the shift amount, etc. However, in order not to perform misadjustment to the adjacent channel, it is preferable to perform the frequency shift in several steps while confirming the decrease in the DC offset amount. Further, the number of frequency shifts may be managed by the AFC control circuit 14 (64), but the number of frequency shifts and the maximum number of shifts are based on the relationship with the secular change of the oscillator of the oscillation circuit and the adjacent channel frequency. It may be useful to prevent erroneous control such as shifting to an adjacent channel by limiting the number of shifts in advance when the maximum number of times is exceeded.

  Also, the timing for performing the TCXO control is different when the data is received depending on the frequency change. Therefore, the timing is detected using a symbol counter using another prior invention of the same applicant described later. It is useful to adjust (correct) the TCXO oscillation frequency at a timing that does not affect the data processing after a lapse of a predetermined time considering the delay time of the LPF and other circuits from the head of the FSW.

<FSW detection means>
The same applicant has already filed a means for quickly detecting FSW as Japanese Patent Application No. 2005-339435 “Synchronized Word Detection Device, Synchronized Word Detection Method, Program and Recording Medium”. This is because even when the S / N is poor, even when there are few frame synchronization words, there are few false detections, and even when the received signal contains a direct current component (DC offset component) due to a frequency shift or the like. A frame synchronization word detection apparatus and a frame synchronization word detection method that can maintain synchronization acquisition performance. When used in combination with the present invention, FSW synchronization detection processing can be performed more quickly and accurately.
In the following description, following the description in the specification of the application, for example, “frame synchronization word” is simply expressed as “synchronization word”, “FSW”, etc. Although it may not necessarily match the term notation, even different notations may be technically the same.

  In the frame synchronization word detection device of the prior invention, in the synchronization word detection device for detecting a synchronization word inserted at a predetermined position of a received and detected signal, a synchronization word storage means for storing a known synchronization word in advance, and reception A synchronization word candidate acquisition unit that acquires synchronization word candidate symbol data from the signal waveform, and a symbol error between each symbol value of the synchronization word candidate obtained by the synchronization word candidate acquisition unit and each symbol corresponding value of the stored synchronization word Symbol error calculation means, symbol error average calculation means for obtaining a symbol error average value for all symbols obtained by the symbol error calculation means, and the symbol error average value obtained from each symbol error of the synchronization word candidate obtained by the symbol error calculation means The symbol error level to obtain the offset correction value by subtracting Subtraction means, correction value square calculation means for squaring the offset correction value obtained by the symbol error average subtraction means for each symbol of the synchronization word candidate, and the result obtained by the correction value square calculation means for all symbols of the synchronization word candidate Symbol error summing means for adding and obtaining a sync word symbol error, and comparing the sync word symbol error obtained by the sync symbol error summing means with a preset threshold value to determine whether or not the sync word candidate is a sync word Synchronization word judgment means is provided.

The first synchronous word detection device includes a clock recovery unit that recovers a clock signal based on a clock signal extracted from a received signal, and a frequency adjustment unit that adjusts an oscillation frequency of the clock recovery unit, Means for controlling the frequency adjusting unit with the symbol error average value is considered with the symbol error average value for all symbols of the synchronization word candidate obtained by the symbol error average calculating means as the frequency offset amount of the received signal.
According to these synchronization word detection devices / methods, while detecting the DC offset amount corresponding to the frequency shift and removing the influence, an error in a range that can be regarded as an intrinsic frame synchronization word is allowed, and frame synchronization is performed. Since word detection is performed, a substantially correct frame synchronization word can be detected efficiently. Therefore, if used in the present invention, even in a state where the band noise in the case of a wide passband in the bandpass filter is increased, it is possible to reduce the time until the synchronization word is detected and synchronized by a simple calculation, Also, DC offset amount detection means can be used.
Further, in the frame synchronization word detection device / method, the symbol error average value for all symbols of the synchronization word candidate obtained by the average calculation means is regarded as the frequency offset amount of the received signal, and the frequency adjustment unit is controlled by the symbol error average value. Since the means is provided, even when the frequency of the received signal is deviated, the frequency can be automatically corrected, and the effect of further shortening the time to the synchronization probability can be obtained.

The prior invention will be briefly described below with reference to FIGS.
This prior invention basically performs synchronous word detection based on the calculation shown in Equation (1) in order to eliminate the influence of the DC offset superimposed on the received signal obtained by reception detection. .
D = Σ [(a _i −S _i ) − {Σ (a _j −S _j ) / n}] ²
However, i and j take values from 1 to n. Equation (1)
Σ (a _i −S _i ) on the right side of this equation is {Σ (a _j −S _j ) / n} on the right side, and all symbol values of frame synchronization word candidates correspond to symbols of normal synchronization words. The difference (error) of each value is added for all symbols and divided by the number of samples n, which means the average value of errors, and this value becomes the offset amount included in the symbol of the synchronization word candidate. (1) is obtained by subtracting the offset amount from the error between the synchronization word candidate and the regular synchronization word. Therefore, if the synchronization word candidate is compared with the known synchronization word based on this equation (1), even if the received signal includes an offset of a DC signal or the like due to a frequency shift or the like, the influence is removed and synchronization is performed. This means that word detection is possible.

FIG. 7 is a flow chart showing an example of an embodiment of the synchronization word detection method proposed in the first invention of the previous application. In FIG. 7, when the flow starts, the reception signal supplied from the reception high-frequency block of the wireless receiver is detected by the detection means (S41), synchronization word candidate data is obtained from this signal waveform, and synchronization is performed from these reception signal waveforms. The word candidate symbol data (a _i ) is acquired (S42). From this (a _i ), a symbol error (a _i −S _i ) is calculated by subtracting a value (S _i ) corresponding to a previously stored synchronization word (S 43). Next, an average symbol error value is calculated. This is based on the same concept as the calculation of the symbol error, and (a _j −S _j ) is calculated for n symbol values, and j is changed from 1 to n. After adding all, the symbol error average value shown in Expression (2) is obtained by dividing by the number of symbols n (S44).

F _off = Σ (a _j −S _j ) / n (where j is 1 to n) (2)
Since this value corresponds to an offset amount (DC offset) due to a frequency shift or the like, the symbol error average value (offset amount) F _off is subtracted from the symbol error calculated in S43 to obtain a received signal. A value of (a _i −S _i ) − {Σ (a _j −S _j ) / n} which is an offset correction value of the waveform extracted as a synchronization word candidate from the waveform is obtained (S 45). Further, a square value of this value is obtained (S46), and all the synchronization word symbol errors shown in the above equation (1) are added for the number of symbols n (S47). Since the value of the expression (1) is an error indicating the difference between the symbol value of the synchronization word candidate from which the offset is eliminated and the known normal synchronization word, it is compared with a preset threshold value (S49). If it is smaller than the threshold value (S49 Yes), it is determined that the synchronization word candidate is a correct synchronization word, and the process proceeds to the next process (S50). If the determination in S49 is larger than the threshold value, it is determined that the synchronization word candidate is not a synchronization word (No in S49), and a new synchronization word candidate is extracted after shifting by one symbol from the received signal waveform ( S51), returning to S41, the same processing is performed.

FIG. 8 shows the result when synchronous word detection is performed based on the above processing, and in order to clarify the effect of this method, an example of another operation conventionally performed is also described. Yes. In FIG. 8, the first signal waveform 201 which is a correct synchronization word candidate as a result is the minimum value “0” at the timing t ₈ that should be the synchronization timing as in the above-described case, and is the synchronization word correctly. Can be determined. For the third signal waveform 203 including the offset amount, the symbol values a _i are arranged differently from the first signal waveform, but at the synchronization timing t ₈ , the minimum value is “0”, and the synchronization word is correctly set. It can be determined that there is. On the other hand, in the second signal waveform 202, the minimum value is “3” at the timing t ₈ , but by setting the threshold value to 2 or less, for example, the erroneous synchronization determination can be sufficiently eliminated. In this example, since the number n of symbols in the synchronization word is four, it is considered that there is no significant difference between the calculation results of the first and third signal waveforms and the second signal waveform. However, as the normal synchronization word increases, the setting of the tolerance range has a significant meaning.

  FIG. 9 is a schematic configuration diagram of a main part of a synchronous word detecting apparatus for realizing this method. In the embodiment shown in this example, attention is paid to the fact that the calculation result shown in the equation (1) is a signal corresponding to a frequency shift included in the received signal, and the frequency of the received signal is corrected by this value, or The synchronization word detection time can be shortened, for example, by shifting the DC level of the detection signal in the positive direction or the negative direction so that the value of the expression (1) is minimized. FIG. 9 shows an example of the configuration of a synchronization word detection apparatus for that purpose. As shown in the figure, in this example, at least a detection unit 101 that demodulates a signal waveform from a received signal, a synchronization word (synchronization word) detection unit 102 that detects a synchronization word, a frequency adjustment unit 103, and a clock recovery unit 104 and a symbol determination unit (bit conversion unit) 105. In this configuration, the detection unit 101 has a function of outputting a detection signal from a reception signal. The frequency adjustment unit 103 is usually provided as a function of a crystal oscillator or the like in a wireless transceiver, and adjusts the oscillation frequency by changing the voltage of a variable reactance circuit element such as a variable capacitance element. Is. The clock recovery unit 104 has a function of extracting a clock signal component included in the received signal and generating an accurate clock signal in synchronization with the oscillation signal supplied from the frequency adjustment unit 103 or the like. is there. Further, the symbol determination unit 105 converts the received symbol value into a corresponding bit value after the synchronization word is detected. For example, in 4-level FSK modulation, one symbol value indicates 2 bits. Is converted into any one of four sets of bits “00”, “01”, “10”, and “11” according to the received symbol value.

In such a configuration, an operation of F _off = Σ (a _j −S _j ) / n (where j is 1 to n) shown in the above formula (1) is executed, and the result is supplied to the frequency adjustment unit 103. By correcting the frequency shift of the received signal and reproducing the clock signal that matches the received signal, a detection signal output without an offset can be obtained, so that the synchronization word detection process can be executed quickly. .
FIG. 10 is a flowchart for this purpose. When the processing is started, the received signal supplied from the radio high frequency block is detected (S60), and synchronization word candidate data is obtained from this signal waveform. The symbol data (a _i ) of the synchronization word candidate is acquired from the waveform (S61). When the symbol data of the synchronization word candidate is obtained, the symbol error (a _i −S _i ) is calculated by subtracting the corresponding value (S _i ) of the synchronization word stored in advance from (a _i ) ( S62). Next, an average symbol error value is calculated. Based on the same concept as the calculation of the symbol error, (a _j −S _j ) is calculated for n symbol values, and j is changed from 1 to n. Then, after adding all, the symbol error average value shown in Expression (1) is obtained by dividing by the number of symbols n (S63).

The expression (1) is F _off = Σ (a _j −S _j ) / n (where j is 1 to n), and as already described, the value of the expression (1) depends on a frequency shift or the like. Since this corresponds to the offset amount, the processing result is supplied to the frequency adjustment unit 33 (S64), and the clock reproduction unit 34 that generates the clock signal used for the synchronization word detection is controlled (S65). As a result, as described above, the synchronization word detection promoting effect can be obtained. Note that there are various methods of using the offset detection signal other than the adjustment of the oscillation frequency. Therefore, if used appropriately, it is useful in configuring a wireless communication device with improved functions. As described above, the frame synchronization word detector of the prior invention can implement frame synchronization word detection, DC offset component detection, and frequency deviation correction means with a simple configuration and method. If the entire invention of the present invention, its DC offset detection means or frequency adjustment means, etc. are partially selected as necessary and used, it is useful in the practice of the present invention.

<Frequency correction timing>
Further, the same applicant has filed an application as a Japanese Patent Application No. 2006-19851 “Wireless Communication Device and Frequency Control Method thereof” for means for frequency shifting at a timing that does not affect data detection, and this means is also used in the present invention. By doing so, a wireless communication device with a higher function can be configured, and the outline will be described.
The invention of the prior application includes a frequency converting means for extracting a desired intermediate frequency signal by mixing an output signal of a local oscillating means with a received signal, a frame synchronizing word detecting means for detecting a known frame synchronizing word signal from the intermediate frequency signal, and In the wireless communication device equipped with the frequency deviation detecting means for obtaining a signal corresponding to the frequency deviation between the received signal frequency and the oscillation frequency of the local oscillating means from the frame synchronization word signal, and the frequency deviation component acquired by the frequency deviation detecting means A frequency deviation correction synchronization detecting means for detecting a frame synchronization word by subtracting the received signal or the detected frame synchronization word signal, and a frequency correction for calculating a frequency correction amount of the local oscillation means based on the output of the frequency deviation detection means Quantity setting means and symbol counter for judging the data position in the received and detected frame signal A frequency correction means for controlling the oscillation frequency correction timing and the frequency correction amount of the local oscillating means based on the symbol counter and the frequency correction amount setting means, and the local frequency based on the symbol counter and the frequency correction amount setting means. The oscillation frequency correction timing and the frequency correction amount of the oscillation means are controlled.

  The frequency correction means includes a first mode correction means and a tracking mode correction means. The first mode correction means can correct the frequency deviation of the next frame signal based on the output of the frequency correction amount setting means. Means for determining whether or not the signal is within the range, and adjacent channel pull-in preventing means for preventing channel pull-in to the adjacent channel signal based on the received channel information. Average value calculating means for obtaining an average value of the frequency shift component or DC offset signal component, comparison means for comparing the average value with a predetermined threshold, and tracking for correcting the frequency of the local oscillating means based on the output of the comparison means The oscillation frequency of the frequency correction means and the local oscillation means is the tracking frequency. The positive range may be configured to switch the control of the first mode correcting means when exceeded.

  Alternatively, a symbol of frame synchronization word candidate acquisition means for acquiring frame synchronization word candidate symbol data from the received signal waveform, and each symbol value of the frame synchronization word candidate obtained by this means and each symbol corresponding value of the stored frame synchronization word Symbol error calculation means for obtaining an error, symbol error average calculation means for obtaining an average symbol error value for all symbols obtained by the calculation means, and each symbol error of the frame synchronization word candidate obtained by the symbol error calculation means Symbol error average subtracting means for subtracting the symbol error average value to obtain a DC offset correction value; correction value square calculating means for squaring the offset correction value obtained by the symbol error average subtracting means for each symbol of the frame synchronization word candidate; , Its correction value A symbol error summing means for obtaining a frame synchronization word symbol error by adding the results obtained by the multiplication means for all symbols of the frame synchronization word candidate, a frame synchronization word symbol error obtained by the symbol error summing means, and a preset threshold value. The wireless communication device includes a synchronization word determination unit that compares and determines whether the frame synchronization word candidate is a frame synchronization word.

  FIG. 11 is a block diagram of a wireless communication device according to the prior invention. A feature of the receiver shown in this example is that it includes a symbol counter 46 that supplies FSW detection timing information from the FSW synchronization detector 39 and supplies an output timing signal to the TCXO adjustment data setting unit 47, and synchronization is established. After detecting this, the oscillation frequency of the TCXO 42 is controlled based on the frequency shift information generated in the AFC control circuit 45 in synchronization with the start of the data bit following the frame synchronization word based on the count of the symbol counter 46. It is comprised as follows.

  FIG. 12 is a diagram showing a specific example of frame synchronization word detection and frequency control of the TCXO 42 as a local oscillator in the wireless communication device configured as described above, and (a) is a frame signal input to the reception high-frequency circuit, (b) is a frame signal after detection processing, (c) is DC offset adjustment data included in the frequency adjustment signal of the local oscillator, and (d) is a diagram showing the supply timing of the frequency adjustment data actually supplied to the local oscillator. is there. As shown in this example, in the second invention, the frame synchronization word is detected from the detected frame signal, and the frame data is demodulated based on the detected frame synchronization word. In this case, the DC offset included in the detected data is detected. By detecting the component and subtracting the DC offset component from the data signal, the data is correctly demodulated even when the DC offset is included. When the next frame synchronization word is detected, the timing at which the DC offset adjustment data (c in FIG. 12) generated at timing T5 is actually supplied as a control signal to the local oscillator is T6 or T7, or a required timing therebetween ( FIG. 12 d).

According to this method, at the time of data bit demodulation following the first frame synchronization word detection, normal demodulation can be performed by subtracting the detected DC component from the detected data and then performing symbol value detection. Accordingly, since the frequency of the local oscillator 10 is not changed during data bit detection, an erroneous detection output is not generated. Note that since the frame synchronization word detection is compared with a known bit pattern, it can be detected normally even in a relatively large amount of noise, and it is easy to detect the DC offset component included in it. .
As the means for detecting the DC offset component included in the frame synchronization word detection, the above-mentioned prior invention can be used.

  FIG. 13 is a flowchart showing a control example of the AFC control unit 35 of FIG. In the control shown in this example, when the flow starts, first, a frequency shift is detected. Here, the frequency shift is processed as a value obtained by subtracting the DC offset data obtained at the time of FSW detection from the TCXO adjustment data, that is, “TCXO adjustment data” − “DCW data of FSW” (S71). It is determined whether or not the calculation result is within the range of the frequency correction capability (absolute value thereof) of the TCXO, that is, whether or not the frequency deviation> | TCXO movable frequency range | (S72), and the frequency deviation ≦ | If it is the TCXO movable frequency range | (S72 No), the frequency deviation is differentially calculated (S73), and it is determined whether or not the frequency deviation differential calculated value is larger than the frequency tracking cancellation threshold value (S74). As a result of the determination, if the differential calculation result of the frequency deviation is smaller than the tracking cancellation threshold (No in S74), the fast mode, that is, both DC adjustment data and TCXO adjustment data are set, and the frequency of the local oscillator is set to the desired frequency. (S75), and TCXO adjustment data and 1 digit frequency data of TCXO are set as TCXO adjustment setting data (S76). During fast mode processing, the oscillation frequency may deviate from the desired frequency and is not suitable for data demodulation or generation of a carrier wave for transmission. Therefore, processing for prohibiting data demodulation or transmission processing may be performed. Useful.

  If the result of determination in step S72 is that frequency deviation> | TCXO movable frequency range | (S72 Yes), TCXO adjustment data is subtracted from the AFC movable frequency as DC adjustment data (S77), and the process S6 is performed. Transition. If the result of the determination in step S4 indicates that the frequency shift differential calculation result is greater than the tracking cancellation threshold (S74 Yes), it is determined whether or not the frequency shift differential calculation result is greater than the tracking entry threshold (S78). If No, the process proceeds to the process S5. If Yes, that is, if the frequency shift differential calculation result is larger than the tracking entry threshold (S78 Yes), the process proceeds to the tracking mode, and the DC adjustment data as the tracking mode is obtained. The TCXO adjustment data is set (S79), and the process proceeds to the process S76.

  Although not shown in the drawing, an example of the AFC first mode processing will be described. In the first mode, the DC offset data obtained in the frame synchronization word detection processing is collectively used as the frequency adjustment value of the local oscillator, and the frequency shift This mode corrects the image at high speed. In the frame synchronization word detection process, the DC offset component is obtained and the TCXO adjustment data is set. Therefore, it is determined whether or not the frequency error that is the sum of the two is within a preset tracking entry threshold. When the error is equal to or smaller than the tracking threshold, the process shifts to a tracking process, and a process of bringing the frequency of the local oscillator (TCXO 22) close to a desired value at high speed is performed. In addition, by including processing such as limiting the frequency adjustment range based on channel information at this time, even when a strong signal level of an adjacent channel exists, it can be prevented from being pulled in. This is useful for bringing

Further, an example of the tracking mode process controlled following the first mode will be described. This process can be quickly performed with respect to a relatively small frequency error in a state where the process is performed in the first mode and maintained in the desired frequency range. Although processing is performed to maintain the frequency at a constant value, the oscillation frequency may greatly fluctuate in response to an unnecessarily high frequency environment or an instantaneous frequency fluctuation. In this tracking mode, in order to prevent such an unstable frequency control from occurring, the DC offset data obtained at the time of FSW detection is accumulated over several frames and averaged, and the average value is determined to be positive or negative. In accordance with the directionality, the function to suppress the response to the frequency error information that occurs suddenly in the reverse direction is provided.
As described above, if this invention of the prior application is used, the synchronization can be quickly established and the data can be detected without affecting the data being processed. Therefore, accurate synchronization detection is possible.

The present invention is not limited to the above-described embodiments, and various modifications can be made. In particular, the invention of the prior application shown in the examples has been described in accordance with the description of each specification of the invention of the prior application, but when actually applied to the present invention, it is preferable to make appropriate modifications in accordance with the spirit of the present invention. Will.
That is, the present invention is characterized in that, in the configuration shown in FIG. 1, the passband filter 7 has a normal passband and a wider passband, and scanning reception and first detection that require FSW detection at high speed. In a state where the FSW is not detected as in frame reception, the received signal can be guided to the detector 8 even if the frequency is shifted to some extent due to a wide pass band. Accordingly, in the means according to the invention of the prior application used in combination with the present invention, frequency correction is performed at a stroke so that the DC offset component calculated based on the FSW detection becomes small, and the band limit filter is returned to the normal band to detect the data symbol For example, it is preferable that the unnecessary functions of the invention of the prior application are removed as appropriate, and only the necessary functions are left.

In addition, the method for extracting the DC offset component corresponding to the frequency shift directly from the output of the FM detector and the method for extracting the DC offset component corresponding to the frequency shift at the time of FSW synchronous detection may be methods other than those shown in the embodiments. The configuration of the wireless communication device to be applied is not limited to the embodiment.
Further, the functions and methods for realizing the radio communication apparatus and the frequency control method thereof according to the above-described embodiment are each programmed and written in advance on a recording medium such as a CD-ROM, and the CD-ROM drive mounted on the computer. It goes without saying that the object of the present invention can be achieved by mounting the CD-ROM or the like in such a medium driving device and storing and executing these programs in a memory or storage device of a computer.

The block diagram which shows one Example of the radio | wireless communication apparatus which concerns on this invention. The flowchart which shows the control example of the radio | wireless communication apparatus which concerns on this invention. The figure which shows the example of the relationship between the band filter used in this invention, and a received signal. The figure which shows the other example of the relationship between the band filter used in this invention, and a received signal. The signal timing diagram in the Example of this invention. It is a figure which shows an example of the repeater to which this invention is applied, (a) is a general | schematic block diagram, (b) is a schematic block diagram which shows the example of a carrier shift. The flowchart of the prior invention used in the present invention. FIG. 6 is a signal waveform diagram illustrating the prior invention used in the present invention. The signal timing diagram in the Example of this invention. The flowchart which shows the example of the timing control by prior invention. The block diagram which shows an example of the radio | wireless communication apparatus which concerns on a prior invention. It is a figure explaining the frame synchronous word detection procedure of prior invention, (a) is a timing diagram of the frame signal input to the reception high frequency circuit, (b) is a frame timing diagram after detection, (c) is a DC offset data diagram (D) is a frequency adjustment data figure of a local oscillator (TCXO). The flowchart explaining the frame synchronous word detection procedure of prior application invention. It is a detector output signal waveform diagram, (a) is a detected waveform diagram without a frequency shift, (b) is a detected waveform diagram including a DC offset. FIG. 6 is a detection waveform diagram including a large DC offset. The figure which shows the relationship between the band of a band pass filter when a frequency shift is large, and a received signal. The block diagram of the radio | wireless communication apparatus which concerns on a prior invention. It is a figure explaining the frame-synchronization word detection procedure of the radio | wireless communication apparatus of a prior application invention, (a) is a timing diagram of the frame signal input into a receiving high frequency circuit, (b) is an output signal waveform figure of LPF, (c) is a figure. The frequency adjustment data figure of a local oscillator (TCXO).

Explanation of symbols

  5 local oscillator, 6 mixer (MIX), 7 band filter (BPF), 8 FM detector, 9 frame sync word detector (FSW sync detector), 10 DC offset adjustment circuit, 11 symbol detection circuit, 12 LPF, 13 frequency detection circuit, 14 AFC control unit, 15 TCXO control circuit, 18 frequency shift detection circuit, 19 BPF control unit, 20 symbol counter, 21 BPF switching unit, 23 carrier shift, 68 frequency shift detection block.

Claims (4)

A frequency conversion means for mixing the local oscillation signal with the received signal to generate an intermediate frequency signal;
A bandpass filter that removes the adjacent channel frequency signal from the intermediate frequency signal and extracts the own channel signal;
Detection means for detecting the bandpass filter output signal;
Known frame synchronization word detection means for detecting a known frame synchronization word signal from the detection signal;
A frequency deviation correcting means for correcting the frequency deviation;
In a wireless communication device equipped with
Filter switching means for switching the passband of the bandpass filter to a first passband or a wider second passband;
In a state where the band-pass filter is switched to the second pass band, after corrected by the frequency deviation correcting unit, and a post-switching frame sync word detection means for detecting the frame synchronization word signal,
A frequency shift signal acquisition means for obtaining a signal corresponding to the frequency shift of the reception signal frequency from the frame synchronization word signal ;
A frequency correction amount setting means for calculating the frequency correction value of the local oscillation signal based on the previous SL frequency shift signal acquisition means output,
A symbol counter for determining a data position from the frame synchronization word signal ;
Frequency control means for controlling the oscillation frequency correction timing and the frequency correction amount of the local oscillation signal based on the symbol counter and the frequency correction amount setting means;
With
The wireless communication device, wherein the filter switching means switches the band filter to a first pass band after frequency control.   The known frame synchronization word detection means includes synchronization word candidate acquisition means for acquiring synchronization word candidate symbol data from the received signal waveform, each symbol value of the acquired frame synchronization word candidate, and each symbol corresponding value of the stored frame synchronization word Symbol error calculating means for calculating the symbol error of the symbol, symbol error average calculating means for calculating the symbol error average value for all symbols determined by the symbol error calculating means, and each symbol of the frame synchronization word candidate determined by the symbol error calculating means Symbol error average subtraction means for subtracting the symbol error average value from the error to obtain an offset correction value, and correction value square calculation for squaring the offset correction value obtained by the symbol error average subtraction means for each symbol of the frame synchronization word candidate Means and their supplements The result obtained by the value square operation means is added to all symbols in the frame synchronization word candidate to obtain a synchronization word symbol error, and the synchronization word symbol error obtained by the symbol error addition means is compared with a preset threshold value. 2. The wireless communication device according to claim 1, further comprising synchronization word determination means for determining whether or not the frame synchronization word candidate is a frame synchronization word.   3. The wireless communication apparatus according to claim 2, further comprising means for switching the band filter to a first pass band based on an output of the symbol counter.   4. The bandpass filter is an FIR filter, and is configured by software means so as to switch a pass band by switching an arithmetic coefficient thereof by a DSP, an ASIC, or the like. The wireless communication device described in 1.

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