JP2008160488A - Wireless communication device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a wireless communication device provided with an automatic frequency control function capable of detecting an FSW (frame sync word) by performing frequency shift (correction) into a band even if a frequency shifts in to the extent that the frequency goes out of a band filter, and its control method. <P>SOLUTION: A DC offset amount corresponding to the frequency shift is detected, and when the value exceeds a preset threshold, an oscillation frequency for reception or transmission is subjected to frequency shift (correction) so as to cancel the shift. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a wireless communication device, and more particularly to a wireless communication device suitable for use in a digital wireless communication system and a frequency correction unit thereof.

  In recent years, land mobile radio (LMR) for commercial use has been reduced in frequency band per channel and digitized from the viewpoint of frequency utilization efficiency. When digitizing, frequency division multiplexing using frequency modulation keying (FSK) of FM modulation because of coexistence with existing analog wireless communication devices, diversion of existing equipment, ease of control, etc. (Frequency Division Multiple Access: FDMA) is often employed. Moreover, as a high-frequency signal source for a wireless communication device or the like, a voltage controlled oscillator (VCO) having a temperature compensation function or a temperature compensated crystal oscillator (TCXO) using a crystal resonator as a frequency oscillation source. ) Is generally used.

On the other hand, in a communication method in which information transmission is performed by the amount of phase shift or frequency shift of a carrier wave such as PSK or FSK, if the received signal frequency is shifted from the local oscillation frequency of the receiver, a DC offset component ( DC offset) is included, and normal synchronization detection and data detection become difficult. In particular, when the frequency band per channel becomes narrow as in recent years, the allowable amount of phase shift and the amount of frequency shift are reduced, so that even the same amount of DC offset component has a greater effect.
Causes of such frequency deviation (or expressed as frequency error) include the secular change of the local oscillation circuit element on the receiver side and the circuit element of the detector (detection means in frequency modulation is a frequency discriminator). It is considered that the shift of the center frequency due to the change of the circuit element value accompanying the secular change and the temperature change is the main, but the same trouble occurs due to the change of the oscillation frequency on the transmission side.

FIG. 14 is a detection waveform diagram showing the influence of the DC offset when detecting a quaternary FSK modulation signal. FIG. 14A shows a state where there is no frequency shift, that is, when there is no DC offset. As shown in FIG. 14B, each symbol value is located at a location (± 1, ± 3) corresponding to each symbol value centered on the midpoint 0, whereas a DC offset is included. In addition, since the whole is shifted in either the upper or lower direction, a value different from the correct symbol value is detected. In the example shown in FIG. 14B, the DC offset amount at this time is an amount ΔDC shifted from the midpoint 0 in the plus direction.
Therefore, conventionally, such a wireless communication apparatus is generally provided with an automatic frequency control (AFC) circuit that automatically controls the local oscillation frequency of the transceiver to a desired value. As a basic means of AFC, a method of synchronizing a VCO or TCXO in a phase lock loop (PLL) circuit with a radio signal frequency transmitted from a base station or a radio relay station whose frequency is accurately adjusted. Is used. In addition, in a wireless communication device equipped with a received signal strength detection means (Receive Signal Strength Indicator: RSSI), a method of controlling the oscillation frequency of the local oscillator so that the RSSI value becomes the best is also known.

  Alternatively, an FSK digital modulation system that uses 4-level FSK adopted in the LMR standard, such as APCO 25, is disclosed in Patent Document 1 (Japanese Patent Laid-Open No. 6-177931). It has been. This is because a frame sync word (FSW) having a specific signal arrangement pattern is arranged and transmitted at the head of the frame, and the receiver side detects the frame sync word in the detection output signal. When establishing synchronization, a frequency shift (frequency error amount) is also detected from the DC offset, and the local oscillation frequency is directly controlled so that the DC offset becomes small.

FIG. 15 shows a conventional automatic frequency control method, that is, when a frame synchronization word is detected and synchronization is established, a frequency shift is detected from the DC offset component, and the local oscillation frequency is directly controlled so that the DC offset is reduced. It is the block diagram which showed an example of the radio | wireless communication apparatus provided with the means to do. A wireless communication apparatus shown in this example includes an antenna 101 and a first mixer (MIX) 103 that generates a first intermediate frequency signal by mixing a high-frequency signal received by the antenna 101 with an output of a first local oscillator 102. And a band filter 104, a second mixer (MIX) 106 and a band filter 107 for mixing with the output of the second local oscillator 105 for frequency conversion to generate a second intermediate frequency signal, FM detector 108 for detecting the two intermediate frequency signals, subtractor 109 for subtracting the DC offset component from the FM detection signal as will be described later, FSW synchronization detection circuit 110 for detecting FSW from the signal of the subtractor, and FSW synchronization A symbol detection circuit 111 for detecting a symbol from the output of the detection circuit 110, and a DC offset from the output signal of the FM detector 108 , An AFC control circuit 113 that generates a frequency correction signal from a signal indicating the DC offset amount, and a signal indicating the DC offset amount extracted from the FSW synchronization detection circuit 111, and oscillation by this frequency correction signal And a TCXO control circuit 114 for controlling the frequency, and by supplying the DC offset signal detected by the LPF 112 to the subtractor 109, the DC offset component contained in the detection FM detector 108 is removed, and the FSW It is configured and controlled to perform synchronization detection.
JP-A-6-177931

However, as shown in FIG. 15, the method of detecting the DC offset amount based on the output of the FSW synchronization detection circuit 110 and adjusting the output signal frequency of the local oscillators 102 and 105 so that the value becomes smaller is the FSW synchronization. Since it is assumed that it can be detected, the object cannot be achieved if the frequency error becomes large and FSW synchronization cannot be obtained.
That is, as shown in FIG. 16, when the frequency shift further increases and a part of the band of the received signal is removed by the attenuation band of the band filter 104 or 107, the complete received signal is supplied to the FM detector 108. As a result, the DC offset amount itself cannot be detected and cannot be corrected.
FIG. 17 is a diagram for explaining this problem. When the own channel reception signal 121 is located within the band of the band filter 120 of the reception channel, the FM detector 108, the LPF 112, and the subtraction are performed as shown in FIG. Although the DC offset component can be canceled by the detector 109, as shown at 122 in FIG. 17, when the received signal is located outside the pass band of the band filter, the received signal is not supplied to the FM detector in the first place. Thus, the frequency correction function does not work, and therefore the state where DC offset cannot be detected continues.

Furthermore, as described above, in the method of taking out the intermediate frequency signal by the band pass filter (BPF) and controlling the oscillation frequency of the local oscillator so that the output level of the band pass filter becomes the maximum, the level of the adjacent channel is greatly increased. When there is a signal, it operates to pull in the adjacent channel, and there is a possibility that it is erroneously synchronized with the adjacent channel.
The present invention has been made in order to solve various problems in a wireless communication apparatus having a conventional frequency correction function, and the frequency error (frequency shift) is so large that a frame synchronization word (FSW) is not detected. An object of the present invention is to provide a wireless communication device configured so that even if it occurs, it can be corrected normally and synchronization can be obtained.

In order to solve the above problems, the present invention provides a wireless communication device according to claim 1, wherein a frequency converting means for generating an intermediate frequency signal by mixing a local oscillation signal with a received signal, and a signal in a required band from the intermediate frequency signal. In a wireless communication device comprising: a band filter for extracting a band filter; a detection unit for detecting the band filter output signal; and a frame synchronization word detection unit for detecting a known frame synchronization word signal from the detection signal. Filter means for extracting a DC signal corresponding to the frequency deviation, frequency deviation comparison means for comparing the DC signal value or a value obtained by converting the DC signal value into a frequency deviation amount, with a preset threshold value, and the frequency deviation exceeds the threshold value. If there is, a local frequency correcting means for shifting the local oscillation signal frequency by a preset amount is provided.
According to a second aspect of the present invention, in the wireless communication device according to the first aspect, the maximum value of the frequency to be shifted is set in the local frequency correction means, and a plurality of values that increase stepwise are set as the frequency value to be shifted. The frequency correction is performed by selecting one of the values corresponding to the value obtained by the frequency deviation comparing means.

  According to a third aspect of the present invention, in the wireless communication device according to the first or second aspect, the synchronization word candidate acquisition unit for acquiring the synchronization word candidate symbol data from the received signal waveform, and the synchronization word candidate acquisition unit Symbol error calculation means for calculating a symbol error between each symbol value of the frame synchronization word candidate and each symbol corresponding value of the stored frame synchronization word, and symbol error average for calculating a symbol error average value for all symbols obtained by the symbol error calculation means For each symbol of the frame synchronization word candidate, a calculation means, a symbol error average subtraction means for subtracting the symbol error average value from each symbol error of the frame synchronization word candidate obtained by the symbol error calculation means, and obtaining an offset correction value Obtained by the above symbol error average subtraction means Correction value square calculating means for squaring the facet correction value, symbol error adding means for adding a result obtained by the correction value square calculating means for all symbols of the frame synchronization word candidate to obtain a synchronization word symbol error, and symbol error adding means And a synchronization word determination unit that compares the synchronization word symbol error obtained by the above with a preset threshold value and determines whether or not the frame synchronization word candidate is a frame synchronization word.

  According to a fourth aspect of the present invention, in the wireless communication device according to any one of the first to third aspects, the frame synchronization word signal further corresponds to a frequency shift between the reception signal frequency and the oscillation frequency of the local oscillation means. A frequency shift detection means for obtaining a signal, a frequency shift correction synchronization detection means for detecting a frame synchronization word by subtracting a frequency shift component acquired by the frequency shift detection means from a received signal or a frame synchronization word signal after detection, and a frequency Frequency correction amount setting means for calculating the frequency correction amount of the local oscillating means based on the deviation detection means output, a symbol counter for determining the data position in the received frame synchronization signal, and the symbol counter and frequency correction amount setting means Frequency correction means for controlling the oscillation frequency correction timing and frequency correction amount of the local oscillation means based on With the door, and controlling the oscillation frequency correction timing and frequency correction amount of the local oscillation means on the basis of the symbol counter and frequency correction amount setting means.

Since the present invention is configured as described above, the following effects can be obtained. That is, according to the first aspect of the present invention, even in a state where the FSW cannot be detected in the wireless communication device including the frequency conversion unit, the bandpass filter, the detection unit, and the frame synchronization word detection unit, the frequency shift from the detection signal. A DC signal (DC offset) corresponding to the frequency difference is detected and compared with a threshold value. When the amount of DC signal corresponding to the frequency deviation exceeds a preset threshold value, the local oscillation signal frequency for frequency conversion is corrected. Therefore, even when the received signal is greatly shifted in frequency so as to protrude from the bandpass filter for the frequency band, it is possible to detect the FSW by correcting the shift, and further, With the automatic frequency correction function based on FSW detection, the FSW synchronization can be accurately maintained and data can be demodulated.
According to a second aspect of the present invention, in the wireless communication device according to the first aspect, the maximum value of the frequency to be shifted is set in the local frequency correction means, and a plurality of values that increase stepwise are set as the frequency value to be shifted. Since any one of the values is selected and the frequency is corrected in accordance with the value obtained by the frequency deviation comparing means, it is possible to avoid the problem of erroneously drawing the adjacent channel signal.

  According to a third aspect of the present invention, in the wireless communication device according to the first or second aspect, synchronization word candidate acquisition means for acquiring frame synchronization word candidate symbol data, and each symbol value of the frame synchronization word candidate are stored in advance. The symbol error calculation means for calculating the symbol error with the corresponding value of each symbol of the frame synchronization word is used to determine the symbol error average value for all the calculated symbols, and the symbol error average value is subtracted from each symbol error of the frame synchronization word candidate. To calculate the offset correction value, square the offset correction value obtained by the symbol error average subtracting means, add the square calculation result of the correction value for all the symbols in the frame synchronization word candidate to obtain the synchronization word symbol error, and Compare word symbol error to a preset threshold Therefore, since the synchronization word determination means for determining whether or not the frame synchronization word candidate is a frame synchronization word is provided, it is possible to detect the FSW even when the reception quality is deteriorated. In combination with the invention, it is possible to quickly and accurately detect the frame synchronization word and then detect the symbol value.

  According to a fourth aspect of the present invention, in the wireless communication device according to any one of the first to third aspects of the present invention, in addition to the second prior invention of the same applicant, the received signal frequency is determined from the frame synchronization word signal. A frequency shift detector that obtains a signal corresponding to the frequency shift between the oscillation frequency of the local oscillator and the local oscillator, and a frame obtained by subtracting the frequency shift component acquired by the frequency shift detector from the received signal or the frame synchronization word signal after detection. Frequency deviation correction synchronization detecting means for detecting a synchronization word, frequency correction amount setting means for calculating the frequency correction amount of the local oscillation means based on the output of the frequency deviation detection means, and determining the data position in the received frame synchronization signal And the oscillation frequency correction timing of the local oscillation means based on the symbol counter and the frequency correction amount setting means Since the frequency correction means for controlling the frequency correction amount is provided and the oscillation frequency correction timing and the frequency correction amount of the local oscillating means are controlled based on the symbol counter and the frequency correction amount setting means. After word detection, frequency correction can be performed at a timing that prevents loss of data being processed.

Hereinafter, the present invention will be described in detail with reference to embodiments shown in the drawings. However, the components, types, combinations, shapes, relative arrangements, and the like described in this embodiment are merely illustrative examples and not intended to limit the scope of the present invention only unless otherwise specified. .
FIG. 1 is a diagram for explaining the basic concept of a wireless communication device according to the present invention. First, FIG. 1A is a block diagram showing a configuration example of a frequency shift circuit used in the wireless communication apparatus of the present invention. In this example, a detection signal is extracted from an FM detector 1 that detects an FSK modulation signal, and A direct current component is detected from the signal by an LPF (low-pass filter) 2. As shown in FIG. 1B, the DC component of the detection signal includes a DC offset component corresponding to the frequency shift (error). Therefore, the frequency shift detection circuit 3 uses the amount of this DC offset component as the frequency shift amount. And monitoring with a preset threshold value. When the threshold value is exceeded as a result of monitoring, the AFC control circuit 4 is controlled so as to correct the preset amount and the frequency of the local oscillation signal. The cause of the frequency shift is as already described.

In order to detect a frequency shift from the DC offset component, it is preferable to use LPF 2 that can discriminate a low frequency with accuracy of several Hz. At present, the filtering means are also digitized, and frequency analysis can be performed with extremely high accuracy by a DSP or the like, so that they can also be used. The DC component (DC offset) detected here is not limited to the FSW portion, and if the amount of DC offset per predetermined time of the detection signal is detected, the frequency shift at that time can be detected. In general, the FSW is often set so that the DC offset amount becomes zero when the frequency deviation is not included, or the detector is configured to be so. However, depending on the modulation method and the data encoding method, If this is not the case, it is necessary to devise appropriate detection as an offset amount.
However, since the frequency shift detection and the frequency shift performed here are for a case where the frequency is relatively large, the presence of some errors is not a problem compared to the FSW detection and the accompanying DC offset detection processing. . The present invention monitors the DC component included in the detection signal for the degree of frequency deviation, compares the DC component with a preset threshold value, and cancels the frequency deviation in the AFC control circuit 4 when the threshold value is exceeded. In this direction, the frequency of the local oscillator is corrected to a certain extent to cope with a case where the frequency greatly deviates outside the reception band.

FIG. 1C shows the state of the control described above, and the DC component included in the detection output is shown as time elapses as shown by the solid line 5 in a state where the AFC control (automatic frequency correction) processing is not performed. In the present invention, as indicated by the broken line 7, the local oscillation signal frequency is corrected in the direction of canceling the DC component.
It should be noted that when the signal outside the partial band as described above is drawn, the frequency correction is performed so that the frequency correction is not performed until the signal is erroneously moved to the adjacent channel signal band (so that the adjacent channel signal is not erroneously drawn). There is a need to limit the amount. FIG. 2 illustrates this state, in which 8 is the BPF reception band of the own channel and 9 is the BPF reception band of the adjacent channel. In this example, in order to prevent the adjacent channel from being pulled in, the center frequency of the own channel band is used. The frequency amount A from f0 to the cut-off of the passband is set as the first frequency shift value (threshold value 1), and the frequency amount B from the first frequency shift amount A to the intermediate frequency ft between both channels is set to the second frequency amount B. As the frequency shift value (threshold 2), the maximum frequency shift value is set to A + B.
Various methods of actual frequency shifting are conceivable. For example, as described above, when the DC offset amount exceeds the threshold value, a method of shifting the frequency corresponding to almost the same amount as the threshold value at a time, or a small amount as a frequency shift amount for one time is set in advance. A method of frequency shifting in several times, or a method of performing a relatively large amount of frequency shifting when a threshold value is exceeded, and then performing frequency shifting several times while gradually decreasing the amount of shift can be considered.

  FIG. 3 is a block diagram illustrating a configuration example of a main part of the wireless communication device according to the present invention. A wireless communication device 10 shown in this example includes an antenna 11 and a first mixer (MIX) 13 that generates a first intermediate frequency by mixing a high-frequency signal received by the antenna 11 with an output of a first local oscillator 12. And a band filter 14, and a second mixer (MIX) 16 and a band filter 17 for mixing with the output of the second local oscillator 15 for frequency conversion to generate a second intermediate frequency signal, An FM detector 18 for detecting an intermediate frequency signal, a frame synchronization word detector (FSW synchronization detector) 19 for detecting a frame synchronization word from the output signal of the FM detector and generating a synchronization signal, and the FM detector A DC offset adjuster 20 that subtracts the DC offset component from the output of 18 and a symbol that detects a target symbol from the signal from which the DC offset component has been removed. The detector 21, the LPF 22 that extracts a DC component including a DC offset component from the signal of the FM detector 18, the DC offset amount is compared with a preset threshold value, and a frequency shift signal is output when the threshold value is exceeded. And a TCXO control circuit 25 having a function of correcting the frequency based on the frequency adjustment data, the AFC control circuit 24 for generating frequency adjustment data based on the frequency shift signal. Thus, the frequency of the first local oscillator 12 is controlled by the signal of the TCXO control circuit 25. When the transmitter 26 is provided as a wireless communication device, the TCXO control circuit 25 can correct the frequency of the transmission oscillator 27 that controls the transmission frequency.

In addition, although the description of the reception high-frequency circuit and the like is omitted in the above configuration, the configuration is appropriately changed as necessary within the range satisfying the functions of the present invention described below, or unnecessary blocks are deleted. In addition, each block processing is configured by an IC including a microcomputer so as to perform digital processing, and software processing is free. The first local oscillator 12 may be a part of the TCXO control circuit 25, or the TCXO itself or a PLL oscillation circuit having the TCXO control circuit 25 as a part of its configuration. Further, the processing after the FSW synchronization detector 19 may be converted into a digital signal.
In the above configuration, the basic operation will be described in relation to an example of the prior art, and will not be described because it is already well known. However, a feature of the present invention is that a significant frequency shift occurs and the reception band is Even if a part of the frame protrudes outside the reception band, frame synchronization word detection is possible. For this purpose, as shown in FIG. 1, the FM detector 18, the LPF 22, the frequency drift detection circuit 23, and the AFC control circuit 24 monitor the DC component included in the output of the detector, and the amount thereof has a constant value. When it exceeds, the oscillation frequency is corrected so as to cancel it.

The operation of the embodiment of the present invention will be described below with reference to FIG. 4 showing signal waveforms with reference to FIG.
That is, FIG. 4 is a schematic signal waveform diagram illustrating an example of control of the wireless communication device of the present invention. In this example, a case where a signal format based on the above-mentioned APCO25 standard is used will be described. In this standard, as shown in the received signal sequence diagram of FIG. 4A, an FSW unit is arranged at the head at a predetermined interval (predetermined period), and then a frame data unit is transmitted.
FIG. 4B is an output waveform diagram of the LPF 22, and FIG. 4C is a TCXO adjustment data signal diagram. First, the FSW synchronization is not yet established at time t0, and the deviation between the reception frequency and the local oscillation frequency gradually increases due to some cause, exceeds the positive threshold at time t1, It shows the situation where the gap is expanding. Although depending on the set value of the threshold value, it is difficult to detect the FSW in this state, and the conventional means for correcting the DC offset amount based on the FSW detection does not function effectively.

Therefore, in the present invention, when it is detected that a preset threshold value is exceeded (time t1), the local oscillation frequency is corrected in a direction to cancel the frequency deviation. In this example, since the frequency is shifted in the positive direction, the local oscillation frequency is similarly shifted (corrected) in the positive direction. When this correction amount is α, the channel signal is not partially deleted by the BPF at the time of frequency correction, and the detection signal includes all band signals of the reception channel signal, so that the detection signal is not deteriorated. FIG. 1C shows this state.
In this state, as in the conventional DC offset correction method described above, the FSW detection function of the FSW synchronization detection circuit 19 performed based on the output of the FM detector 18 and the DC offset amount are obtained from the detected FSW. The AFC control circuit 24 is controlled to reduce the DC offset amount by the function of the DC offset adjustment circuit 20 having a process of adding / subtracting the DC offset amount from the symbol next to the FSW detection timing, and TCXO control is performed based on the result. Since the circuit 25 functions, the DC offset amount is automatically reduced and ideally becomes zero, and the FSW synchronization detection is performed stably and the data symbol is accurately detected.

  As described above, when the DC offset amount exceeds the threshold value, the frequency shift method is a method of shifting the frequency corresponding to the same amount as the threshold value, and the frequency shift amount is set in advance. A method of shifting the frequency in several steps, or a method of performing a relatively large amount of frequency shift when the threshold value is exceeded, and then performing a frequency shift several times while gradually decreasing the shift amount, etc. However, in order not to perform misadjustment to the adjacent channel, it is preferable to perform the frequency shift in several steps while confirming the decrease in the DC offset amount. Furthermore, the number of frequency shifts may be managed by the AFC control circuit 24, but the number of frequency shifts and the maximum number of shifts are set in advance based on the relationship with the secular change of the oscillator of the oscillation circuit and the adjacent channel frequency. If the maximum number of times is exceeded, it may be useful to prevent erroneous control such as shifting to an adjacent channel by limiting the number of shifts.

Also, the timing for performing the TCXO control becomes different depending on the frequency change if the TCXO control is performed. As described later, the delay time of the LPF and other circuits from the FSW head detected using a symbol counter is used. It is necessary to adjust (correct) the oscillation frequency of the TCXO at a timing that does not affect the data processing after a lapse of a predetermined time considering the above. Furthermore, the present invention can also perform frequency control for the transmitter in the same manner, receiving a radio signal whose frequency is accurately managed, such as a base station transmitter, and from the DC offset amount included in the detector output, If a frequency shift (error) between the base station frequency and the local oscillation signal frequency of the local station is detected and the shift is corrected by the above-described method, control can be performed so as to match the accurate transmission frequency from the base station. it can.
When a similar frequency shift correction is performed in a device such as a repeater in which frequency stability is ensured and does not have an AFC function, a preset frequency shift amount is shifted as shown in FIG. A carrier shift circuit having a plurality of oscillators having different frequencies and a switch for freely switching between them may be prepared.

FIG. 6 is a block diagram showing an example of a repeater device (wireless communication device) using the carrier shift circuit shown in FIG. The same parts as those shown in FIG. 3 are denoted by the same reference numerals, and the description thereof is omitted. However, in a repeater or the like, a constant temperature bath type having a function of keeping the inside at a constant temperature in order to ensure an accurate oscillation frequency. Since the crystal oscillator (Oven Controlled Crystal Oscillator) 29 is often used, the function of shifting the frequency by an arbitrary frequency amount is often not provided. Therefore, as shown in FIG. 6, for example, the carrier shift circuit 28 of FIG. 5 described above is inserted between the second mixer (MIX) 16 and the second band filter (BPF) 17, and the switch SW is controlled by AFC. It is controlled by a signal output from the circuit 24.
Note that the present invention is not limited to this example, and the object can be similarly achieved even if the carrier shift circuit 28 of FIG. 5 is used instead of (removed) the second mixer 16 and the OCXO that supplies the local oscillation signal thereto. it can.

As communication system forms, communication between wireless communication apparatuses (conventional form), transmission from a repeater to a wireless communication apparatus (conventional & trunking form), transmission from a wireless communication apparatus to a repeater (conventional form), wireless communication There may be a combination such as transmission from a communication device to a repeater (trunking form). However, in a normal repeater, as described above, the frequency transmitted from the repeater is managed to an extremely high accuracy frequency, and the frequency deviation is small. Considering this point, in a wireless communication device that receives a wireless signal from a repeater, the DC offset included in the FM detector output is a frequency shift of the own wireless communication device. Therefore, since the frequency signal obtained as a result of correcting the frequency deviation coincides with the transmission frequency of the repeater, it can be used as a reference frequency signal (center frequency), and can be used as a reference signal for a PLL circuit. It can be used in a circuit that requires correction of a built-in clock signal source or other accurate frequency signal.
As described above, according to the present invention, the oscillation frequency and the intermediate frequency are corrected even in a situation where the oscillation frequency and the center frequency of the detector are shifted due to aging of the circuit of the wireless communication device and the FSW cannot be detected. Thus, it is possible to return to a state where FSW detection is possible. In addition, in a system that can correct the reference frequency of the local radio communication device based on an accurate frequency such as a repeater using the present invention, an accurate oscillation frequency is maintained even if the radio communication device has poor frequency stability. It becomes possible.

[First invention already filed]
By the way, the same applicant filed a means for rapidly detecting FSW as Japanese Patent Application No. 2005-339435 “Synchronized Word Detection Device, Synchronized Word Detection Method, Program and Recording Medium” (hereinafter “first invention of the already filed application”). It is done. This is because there are few false detections even with a small number of frame synchronization words, and synchronization acquisition performance can be maintained even when the received signal contains a direct current component (DC offset component) due to frequency shift or the like. A frame synchronization word detection apparatus and a frame synchronization word detection method, and when used in combination with the present invention, FSW synchronization detection processing can be performed more quickly and accurately.
In the following description, following the description in the specification of the application, for example, “frame synchronization word” is simply expressed as “synchronization word”, “FSW”, etc. Although it may not necessarily match the term notation, even different notations may be technically the same.

  In the frame synchronization word detecting device of the first invention, the synchronization word detecting device detects a synchronization word inserted at a predetermined position of a received digital radio signal, and stores a known synchronization word in advance. Storage means, synchronization word candidate acquisition means for acquiring synchronization word candidate symbol data from the received signal waveform, each symbol value of the synchronization word candidate obtained by the synchronization word candidate acquisition means, and each symbol corresponding value of the stored synchronization word From the symbol error calculation means for calculating the symbol error, the symbol error average calculation means for calculating the symbol error average value for all symbols obtained by the symbol error calculation means, and the symbol errors of the synchronization word candidates obtained by the symbol error calculation means Calculate the offset correction value by subtracting the above symbol error average value. Symbol error average subtracting means, correction value square calculating means for squaring the offset correction value obtained by the symbol error average subtracting means for each symbol of the synchronization word candidate, and the result obtained by the correction value square calculating means for the synchronization word candidate The symbol error summing means for adding all the symbols to obtain the sync word symbol error, and comparing the sync word symbol error obtained by the sync symbol error summing means with a preset threshold value, and whether or not the sync word candidate is a sync word There is a synchronization word judging means for judging whether or not.

The first synchronous word detection device includes a clock recovery unit that recovers a clock signal based on a clock signal extracted from a received signal, and a frequency adjustment unit that adjusts an oscillation frequency of the clock recovery unit, Means for controlling the frequency adjusting unit with the symbol error average value is considered with the symbol error average value for all symbols of the synchronization word candidate obtained by the symbol error average calculating means as the frequency offset amount of the received signal.
According to these synchronization word detection devices / methods, while detecting the DC offset amount corresponding to the frequency shift and removing the influence, an error in a range that can be regarded as an intrinsic frame synchronization word is allowed, and frame synchronization is performed. Since word detection is performed, a substantially correct frame synchronization word can be detected efficiently. Therefore, by using the present invention, it is possible to reduce the time required to detect and synchronize the synchronization word by a simple calculation, and it is also possible to use DC offset amount detection means.
Further, in the frame synchronization word detection device / method, the symbol error average value for all symbols of the synchronization word candidate obtained by the average calculation means is regarded as the frequency offset amount of the received signal, and the frequency adjustment unit is controlled by the symbol error average value. Since the means is provided, even when the frequency of the received signal is deviated, the frequency can be automatically corrected, and the effect of further shortening the time to the synchronization probability can be obtained.

Hereinafter, the first invention will be briefly described with reference to FIGS.
The first invention of the prior application basically performs synchronous word detection based on the calculation shown in Equation (1) in order to eliminate the effect of offset superimposed on the received signal obtained by reception detection. It is.
D = Σ [(a _i −S _i ) − {Σ (a _j −S _j ) / n}] ²
However, i and j take values from 1 to n. Equation (1)
Σ (a _i −S _i ) on the right side of this equation is {Σ (a _j −S _j ) / n} on the right side, and all symbol values of frame synchronization word candidates correspond to symbols of normal synchronization words. The difference (error) of each value is added for all symbols and divided by the number of samples n, which means the average value of errors, and this value becomes the offset amount included in the symbol of the synchronization word candidate. (1) is obtained by subtracting the offset amount from the error between the synchronization word candidate and the regular synchronization word. Therefore, if the synchronization word candidate is compared with the known synchronization word based on this equation (1), even if the received signal includes an offset of a DC signal or the like due to a frequency shift or the like, the influence is removed and synchronization is performed. This means that word detection is possible.

FIG. 7 is a flow chart showing an example of an embodiment of the synchronization word detection method proposed in the first invention of the previous application. In FIG. 7, when the flow starts, the reception signal supplied from the reception high-frequency block of the wireless receiver is detected by the detection means (S41), synchronization word candidate data is obtained from this signal waveform, and synchronization is performed from these reception signal waveforms. The word candidate symbol data (a _i ) is acquired (S42). From this (a _i ), a symbol error (a _i −S _i ) is calculated by subtracting a value (S _i ) corresponding to a previously stored synchronization word (S 43). Next, an average symbol error value is calculated. This is based on the same concept as the calculation of the symbol error, and (a _j −S _j ) is calculated for n symbol values, and j is changed from 1 to n. After adding all, the symbol error average value shown in Expression (2) is obtained by dividing by the number of symbols n (S44).
F _off = Σ (a _j −S _j ) / n (where j is 1 to n) (2)
Since this value corresponds to an offset amount (DC offset) due to a frequency shift or the like, the symbol error average value (offset amount) F _off is subtracted from the symbol error calculated in S43 to obtain a received signal. A value of (a _i −S _i ) − {Σ (a _j −S _j ) / n} which is an offset correction value of the waveform extracted as a synchronization word candidate from the waveform is obtained (S 45).

  Further, a square value of this value is obtained (S46), and all the synchronization word symbol errors shown in the above equation (1) are added for the number of symbols n (S47). Since the value of the equation (1) is an error indicating the difference between the symbol value of the synchronization word candidate from which the offset is eliminated and the known regular synchronization word, it is compared with a preset threshold value (S49). If the value is smaller than the threshold (Yes in S49), it is determined that the synchronization word candidate is a correct synchronization word, and the process proceeds to the next process (S50). If the determination in S49 is greater than the threshold, it is determined that the synchronization word candidate is not a synchronization word (No in S49), and a new synchronization word candidate is extracted after shifting by one symbol from the received signal waveform (S51). Returning to S41, the same processing is performed thereafter.

FIG. 8 shows the result when synchronous word detection is performed based on the above processing, and in order to clarify the effect of this method, an example of another operation conventionally performed is also described. Yes. In FIG. 8, the first signal waveform 201 which is a correct synchronization word candidate as a result is the minimum value “0” at the timing t ₈ that should be the synchronization timing as in the above-described case, and is the synchronization word correctly. Can be determined. For the third signal waveform 203 including the offset amount, the symbol values a _i are arranged differently from the first signal waveform, but at the synchronization timing t ₈ , the minimum value is “0”, and the synchronization word is correctly set. It can be determined that there is.
On the other hand, in the second signal waveform 202, the minimum value is “3” at the timing t ₈ , but by setting the threshold value to 2 or less, for example, the erroneous synchronization determination can be sufficiently eliminated. In this example, since the number n of symbols in the synchronization word is four, it is considered that there is no significant difference between the calculation results of the first and third signal waveforms and the second signal waveform. However, as the normal synchronization word increases, the setting of the tolerance range has a significant meaning.

FIG. 9 is a schematic configuration diagram of a main part of a synchronous word detecting apparatus for realizing this method. In the embodiment shown in this example, attention is paid to the fact that the calculation result shown in the equation (1) is a signal corresponding to a frequency shift included in the received signal, and the frequency of the received signal is corrected by this value, or The synchronization word detection time can be shortened, for example, by shifting the DC level of the detection signal in the positive direction or the negative direction so that the value of the expression (1) is minimized.
FIG. 9 shows an example of the configuration of a synchronization word detection apparatus for that purpose. As shown in the figure, in this example, at least a detection unit 31 that demodulates a signal waveform from a received signal, a synchronization word (synchronization word) detection unit 32 that detects a synchronization word, a frequency adjustment unit 33, and a clock recovery unit 34 and a symbol determination unit (bit conversion unit) 35. In this configuration, the detection unit 31 has a function of outputting a detection signal from the received signal.

The frequency adjustment unit 33 is usually provided as a function of a crystal oscillator or the like in a wireless transceiver, and adjusts the oscillation frequency by changing the voltage of a variable reactance circuit element such as a variable capacitance element. Is. The clock recovery unit 34 has a function of extracting a clock signal component included in the received signal and generating an accurate clock signal in synchronization with the oscillation signal supplied from the frequency adjustment unit 33 or the like. is there.
Furthermore, the symbol determination unit 35 converts the received symbol value into a bit value corresponding to the detected symbol value after the synchronization word is detected. For example, in 4-level FSK modulation, one symbol value indicates 2 bits. Is converted into any one of four sets of bits “00”, “01”, “10”, and “11” according to the received symbol value.
In such a configuration, an operation of F _off = Σ (a _j −S _j ) / n (where j is 1 to n) shown in the formula (1) is executed, and the result is supplied to the frequency adjustment unit 33. By correcting the frequency shift of the received signal and reproducing the clock signal that matches the received signal, a detection signal output without an offset can be obtained, so that the synchronization word detection process can be executed quickly. .

FIG. 10 is a flowchart for this purpose. When the processing is started, the received signal supplied from the radio high frequency block is detected (S60), and synchronization word candidate data is obtained from this signal waveform. The symbol data (a _i ) of the synchronization word candidate is acquired from the waveform (S61). When the symbol data of the synchronization word candidate is obtained, the symbol error (a _i −S _i ) is calculated by subtracting the corresponding value (S _i ) of the synchronization word stored in advance from (a _i ) ( S62). Next, an average symbol error value is calculated. Based on the same concept as the calculation of the symbol error, (a _j −S _j ) is calculated for n symbol values, and j is changed from 1 to n. Then, after adding all, the symbol error average value shown in Expression (1) is obtained by dividing by the number of symbols n (S63).

Equation (1) is F _off = Σ (a _j −S _j ) / n (where j is 1 to n), and as already explained, the value of equation (1) is due to a frequency shift or the like. Since this corresponds to the offset amount, the processing result is supplied to the frequency adjustment unit 33 (S64), and the clock reproduction unit 34 that generates the clock signal used for the synchronization word detection is controlled (S65). As a result, as described above, the synchronization word detection promoting effect can be obtained. Note that there are various methods of using the offset detection signal other than the adjustment of the oscillation frequency. Therefore, if used appropriately, it is useful in configuring a wireless communication device with improved functions. As described above, the frame synchronization word detector of the first invention of the present application can realize frame synchronization word detection, DC offset component detection, and further frequency deviation correction means with a simple configuration and method. Therefore, if the entire first invention of the present application, its DC offset detecting means, frequency adjusting means, etc. are partially selected as necessary and used, it is useful in the practice of the present invention.

[Second invention already filed]
Furthermore, the same applicant filed as a Japanese Patent Application No. 2006-19851 “Radio Communication Device and Frequency Control Method Therefor” (hereinafter “second already filed invention”) regarding means for frequency shifting at a timing that does not affect data detection. If this means is also used in the present invention, it is possible to construct a wireless communication device with higher function, so an outline will be described.
The second invention of the present application includes frequency conversion means for extracting a desired intermediate frequency signal by mixing the output signal of the local oscillation means with the received signal, and a frame synchronization word for detecting a known frame synchronization word signal from the intermediate frequency signal. In a wireless communication device comprising a detecting means, a frequency deviation detecting means for obtaining a signal corresponding to a frequency deviation between the received signal frequency and the oscillation frequency of the local oscillating means from the frame synchronization word signal, and the frequency deviation detecting means Frequency deviation correction synchronization detecting means for detecting the frame synchronization word by subtracting the frequency deviation component from the received signal or the detected frame synchronization word signal, and calculating the frequency correction amount of the local oscillation means based on the output of the frequency deviation detection means Frequency correction amount setting means for determining the data position in the received and detected frame signal And frequency correction means for controlling the oscillation frequency correction timing and the frequency correction amount of the local oscillation means based on the symbol counter and the frequency correction amount setting means, and based on the symbol counter and the frequency correction amount setting means. It is characterized by controlling the oscillation frequency correction timing and the frequency correction amount of the local oscillating means.

  The frequency correction means includes a first mode correction means and a tracking mode correction means. The first mode correction means can correct the frequency deviation of the next frame signal based on the output of the frequency correction amount setting means. Means for determining whether or not the signal is within the range, and adjacent channel pull-in preventing means for preventing channel pull-in to the adjacent channel signal based on the received channel information. Average value calculating means for obtaining an average value of the frequency shift component or DC offset signal component, comparison means for comparing the average value with a predetermined threshold, and tracking for correcting the frequency of the local oscillating means based on the output of the comparison means The oscillation frequency of the frequency correction means and the local oscillation means is the tracking frequency. The positive range may be configured to switch the control of the first mode correcting means when exceeded.

  Alternatively, a symbol of frame synchronization word candidate acquisition means for acquiring frame synchronization word candidate symbol data from the received signal waveform, and each symbol value of the frame synchronization word candidate obtained by this means and each symbol corresponding value of the stored frame synchronization word Symbol error calculation means for obtaining an error, symbol error average calculation means for obtaining an average symbol error value for all symbols obtained by the calculation means, and each symbol error of the frame synchronization word candidate obtained by the symbol error calculation means Symbol error average subtracting means for subtracting the symbol error average value to obtain a DC offset correction value; correction value square calculating means for squaring the offset correction value obtained by the symbol error average subtracting means for each symbol of the frame synchronization word candidate; , Its correction value A symbol error summing means for obtaining a frame synchronization word symbol error by adding the results obtained by the multiplication means for all symbols of the frame synchronization word candidate, a frame synchronization word symbol error obtained by the symbol error summing means, and a preset threshold value. The wireless communication device includes a synchronization word determination unit that compares and determines whether the frame synchronization word candidate is a frame synchronization word.

  FIG. 11 is an example of a block diagram of a wireless communication device according to the second already-filed application. In the receiver shown in this example, the same parts as those in FIG. A feature of this configuration is that it includes a symbol counter 36 that supplies FSW detection timing information from the FSW synchronization detector 19 and supplies an output timing signal to the TCXO adjustment data setting unit 37, and detects that synchronization has been established. After that, the oscillation frequency of the TCXO 22 is controlled based on the frequency shift information generated in the AFC control circuit 35 in synchronization with the start of the data bit following the frame synchronization word based on the count of the symbol counter 36. Is.

FIG. 12 is a diagram showing a specific example of frame synchronization word detection and frequency control of the TCXO 22 as a local oscillator in the wireless communication device configured as described above, and (a) is a frame signal input to the reception high-frequency circuit, ( (b) is a frame signal after detection processing, (c) is DC offset adjustment data included in the frequency adjustment signal of the local oscillator, and (d) is a diagram showing the supply timing of the frequency adjustment data actually supplied to the local oscillator. is there.
As shown in this example, in the second invention, the frame synchronization word is detected from the detected frame signal, and the frame data is demodulated based on the detected frame synchronization word. In this case, the DC offset included in the detected data is detected. By detecting the component and subtracting the DC offset component from the data signal, the data is correctly demodulated even when the DC offset is included. When the next frame synchronization word is detected, the timing at which the DC offset adjustment data (c in FIG. 12) generated at timing T5 is actually supplied as a control signal to the local oscillator is T6 or T7, or a required timing therebetween ( FIG. 12 d).
According to this method, at the time of data bit demodulation following the first frame synchronization word detection, normal demodulation can be performed by subtracting the detected DC component from the detected data and then performing symbol value detection. Accordingly, since the frequency of the local oscillator 10 is not changed during data bit detection, an erroneous detection output is not generated.
Note that since the frame synchronization word detection is compared with a known bit pattern, it can be detected normally even in a relatively large amount of noise, and it is easy to detect the DC offset component included in it. .
As the means for detecting the DC offset component included in the frame synchronization word detection, the above-described first invention of the previous application can be used.

FIG. 13 is a flowchart showing a control example of the AFC control unit 35 of FIG. In the control shown in this example, when the flow starts, first, a frequency shift is detected. Here, the frequency shift is processed as a value obtained by subtracting the DC offset data obtained at the time of FSW detection from the TCXO adjustment data, that is, “TCXO adjustment data” − “DCW data of FSW” (S71).
It is determined whether or not the calculation result is within the range of the frequency correction capability (absolute value thereof) of the TCXO, that is, whether or not the frequency deviation> | TCXO movable frequency range | (S72), and the frequency deviation ≦ | If it is the TCXO movable frequency range | (S72 No), the frequency deviation is differentially calculated (S73), and it is determined whether or not the frequency deviation differential calculated value is larger than the frequency tracking cancellation threshold value (S74). As a result of the determination, if the differential calculation result of the frequency deviation is smaller than the tracking cancellation threshold (No in S74), the fast mode, that is, both DC adjustment data and TCXO adjustment data are set, and the frequency of the local oscillator is set to the desired frequency. (S75), and TCXO adjustment data and 1 digit frequency data of TCXO are set as TCXO adjustment setting data (S76).
During fast mode processing, the oscillation frequency may deviate from the desired frequency and is not suitable for data demodulation or generation of a carrier wave for transmission. Therefore, processing for prohibiting data demodulation or transmission processing may be performed. Useful.

  If the result of determination in step S72 is that frequency deviation> | TCXO movable frequency range | (S72 Yes), TCXO adjustment data is subtracted from the AFC movable frequency as DC adjustment data (S77), and the process proceeds to step S6. To do. If the result of the determination in step S4 indicates that the frequency shift differential calculation result is larger than the tracking cancellation threshold value (S74 Yes), it is determined whether or not the frequency shift differential calculation result is greater than the tracking entry threshold value (S78). If YES, that is, if the frequency deviation differential calculation result is larger than the tracking inrush threshold (S78 Yes), the tracking mode is entered and the DC adjustment data and TCXO adjustment as the tracking mode are entered. Data is set (S79), and the process proceeds to the process S76.

Although not shown in the drawing, an example of the AFC first mode processing will be described. In the first mode, the DC offset data obtained in the frame synchronization word detection processing is collectively used as the frequency adjustment value of the local oscillator, and the frequency shift This mode corrects the image at high speed. In the frame synchronization word detection process, the DC offset component is obtained and the TCXO adjustment data is set. Therefore, it is determined whether or not the frequency error that is the sum of the two is within a preset tracking entry threshold. When the error is equal to or smaller than the tracking threshold, the process shifts to a tracking process, and a process of bringing the frequency of the local oscillator (TCXO 22) close to a desired value at high speed is performed.
In addition, by including processing such as limiting the frequency adjustment range based on channel information at this time, even when a strong signal level of an adjacent channel exists, it can be prevented from being pulled in. This is useful for bringing

Further, an example of the tracking mode process controlled following the first mode will be described. This process can be quickly performed with respect to a relatively small frequency error in a state where the process is performed in the first mode and maintained in the desired frequency range. Although processing is performed to maintain the frequency at a constant value, the oscillation frequency may greatly fluctuate in response to an unnecessarily high frequency environment or an instantaneous frequency fluctuation. In this tracking mode, in order to prevent such an unstable frequency control from occurring, the DC offset data obtained at the time of FSW detection is accumulated over several frames and averaged, and the average value is determined to be positive or negative. In accordance with the directionality, the function to suppress the response to the frequency error information that occurs suddenly in the reverse direction is provided.
As described above, if the second invention of the present invention is used, it is possible to quickly establish synchronization and detect data without affecting the data being processed. This makes it possible to detect synchronization more accurately.

The present invention is not limited to the above-described embodiments, and various modifications can be made. In addition, the method for extracting the DC offset component corresponding to the frequency shift directly from the output of the FM detector and the method for extracting the DC offset component corresponding to the frequency shift at the time of FSW synchronous detection may be methods other than those shown in the embodiments. The configuration of the wireless communication device to be applied is not limited to the embodiment.
Further, the wireless communication device of the above-described embodiment, its automatic frequency control device, and each function / method for realizing the automatic frequency device and method used in the present invention are programmed and written in advance on a recording medium such as a CD-ROM. The CD-ROM or the like is mounted on a medium drive device such as a CD-ROM drive mounted on a computer, and these programs are stored in a computer memory or storage device and executed. It goes without saying that the objective is achieved.

It is a figure for demonstrating the operation | movement principle of this invention, (a) is a block diagram which shows an example of a DC offset frequency shift circuit, (b) is a wave form diagram containing the DC component of LPF output, (c) is DC offset. The figure which shows the time change of a component. The frequency band figure explaining the adjacent channel pull-in prevention in this invention. The block diagram which shows the example of 1 embodiment of the radio | wireless communication apparatus concerning this invention. BRIEF DESCRIPTION OF THE DRAWINGS It is a figure explaining the example of 1 embodiment of the radio | wireless communication apparatus concerning this invention, (a) is a timing diagram of the frame signal input into a receiving high frequency circuit, (b) is a LPF output waveform figure after a detection, (c) is a figure. TCXO adjustment signal waveform diagram. The block diagram which shows the structural example of the carrier shift circuit used in the deformation | transformation Example of this invention. The block diagram of the radio | wireless communication apparatus which shows the deformation | transformation Example of this invention. 6 is a flowchart for explaining a frame synchronization word detection procedure according to the first invention of the first application used in the present invention. The signal waveform and data figure for demonstrating the frame synchronous word detection means of 1st already-mentioned application. The outline block diagram which shows the structural example of the frame synchronous word detection means of 1st already invention of an application. The flowchart explaining the other example of the frame synchronous word detection procedure of the 1st already applied invention used in this invention. The block diagram of the radio | wireless communication apparatus using the frame synchronous word detection procedure of 2nd already invention. FIG. 6 is a diagram for explaining a frame synchronization word detection procedure according to the second invention, in which (a) is a timing diagram of a frame signal input to a reception high-frequency circuit, (b) is a frame timing diagram after detection, and (c) is DC The figure which shows offset data, (d) is a figure which shows the frequency adjustment data of a local oscillator (TCXO). 10 is a flowchart for explaining a frame synchronization word detection procedure according to the second invention of the previous application. It is a detector output signal waveform diagram, (a) is a detected waveform diagram without a frequency shift, (b) is a detected waveform diagram including a DC offset. The block diagram of the radio | wireless communication apparatus provided with the conventional AFC control function. The schematic diagram of a detection output signal when a frequency shift is large. The frequency spectrum figure which shows the mode of the received signal removal effect | action by an adjacent channel removal filter (BPF).

Explanation of symbols

  1, 18 FM detector, 2, 22 LPF, 3 frequency shift detection circuit, 4, 24 AFC control circuit, 5 detection output signal, 6 threshold, 7 DC offset after frequency correction, 8 own channel band, 9 adjacent channel band 10 wireless communication devices, 11 antennas, 12, 15 local oscillators, 13, 16 mixers (MIX), 14, 17 band filters (BPF), 19 FSW synchronization detection circuits, 20 DC offset adjustment circuits, 21 symbol detection circuits, 23, 35 Frequency shift detection circuit, 25, 37 TCXO control circuit, 28 carrier shift circuit, 36 symbol counter.

Claims (4)

Frequency conversion means for generating an intermediate frequency signal by mixing a local oscillation signal with a received signal, a band filter for extracting a signal of a required band from the intermediate frequency signal, detection means for detecting the band filter output signal, and the detection signal A frame synchronization word detecting means for detecting a known frame synchronization word signal from a wireless communication device comprising:
Filter means for extracting a DC signal corresponding to a frequency deviation from the detection signal, frequency deviation comparison means for comparing the DC signal value or a value obtained by converting the DC signal value into a frequency deviation amount, and a preset threshold value, and the frequency deviation. And a local frequency correcting means for shifting the local oscillation signal frequency by a preset amount when the threshold is exceeded.   In addition to setting a maximum value of the frequency to be shifted in the local frequency correction means, a plurality of values that increase stepwise are set as the frequency value to be shifted, and in accordance with the value obtained by the frequency deviation comparison means, 2. The wireless communication device according to claim 1, wherein the frequency is corrected by selecting one of the values.   3. The wireless communication device according to claim 1, further comprising: synchronization word candidate acquisition means for acquiring synchronization word candidate symbol data from the received signal waveform; and each symbol value of the frame synchronization word candidate obtained by the synchronization word candidate acquisition means. A symbol error calculation means for calculating a symbol error between each symbol corresponding value of the stored frame synchronization word, a symbol error average calculation means for calculating a symbol error average value for all symbols obtained by the symbol error calculation means, and the symbol error calculation Means for subtracting the symbol error average value from each symbol error of the frame synchronization word candidate to obtain an offset correction value, and the symbol error average subtraction means for each symbol of the frame synchronization word candidate. The offset correction value obtained is automatically Correction value square calculating means, symbol error summing means for adding a result obtained by the correction value square computing means for all symbols of the frame synchronization word candidate to obtain a synchronization word symbol error, and synchronization obtained by the symbol error summing means A wireless communication device comprising: synchronization word determination means for comparing a word symbol error with a preset threshold value and determining whether or not the frame synchronization word candidate is a frame synchronization word.   4. The radio communication device according to claim 1, further comprising: a frequency shift detection unit that obtains a signal corresponding to a frequency shift between the reception signal frequency and the oscillation frequency of the local oscillation unit from the frame synchronization word signal. A frequency deviation correction synchronization detecting means for detecting a frame synchronization word by subtracting a frequency deviation component acquired by the frequency deviation detection means from a received signal or a detected frame synchronization word signal, and based on an output of the frequency deviation detection means A frequency correction amount setting means for calculating a frequency correction amount of the local oscillation means, a symbol counter for determining a data position in the received frame synchronization signal, and a local oscillation based on the symbol counter and the frequency correction amount setting means. Frequency correction means for controlling the oscillation frequency correction timing and the frequency correction amount of the means. Wireless communication device and controlling the oscillation frequency correction timing and frequency correction amount of the local oscillation means on the basis of the bolt counter and frequency correction amount setting means.

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