JP5010012B2 - Power consumption reduction circuit - Google Patents
Power consumption reduction circuit Download PDFInfo
- Publication number
- JP5010012B2 JP5010012B2 JP2010105809A JP2010105809A JP5010012B2 JP 5010012 B2 JP5010012 B2 JP 5010012B2 JP 2010105809 A JP2010105809 A JP 2010105809A JP 2010105809 A JP2010105809 A JP 2010105809A JP 5010012 B2 JP5010012 B2 JP 5010012B2
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- output voltage
- power supply
- secondary side
- primary side
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Landscapes
- Dc-Dc Converters (AREA)
Description
本発明は、スイッチング電源における無負荷出力時の消費電力を低減する回路構成に関する。The present invention relates to a circuit configuration for reducing power consumption during no-load output in a switching power supply.
従来のスイッチング電源は図２のように、出力安定用の出力電圧検出用シャントレギュレーターＩＣ４は、出力が上昇するとＩＣ４に接続されたフォトカプラＰＣ２０１のダイオードに電流を増加させ、出力電圧検出信号フィードバック用フォトカプラＰＣ２のトランジスタのコレクタに接続されている電源制御用集積回路ＩＣ３のフィードバック端子ＦＢ２の電圧が低下し、低下量に応じて一定周波数で動作しているスイッチング素子Ｑ２のオフ時間デューティーが大きくなり、出力電圧を安定供給することができる。As shown in FIG. 2, in the conventional switching power supply, the output voltage detecting shunt regulator IC4 for stabilizing the output increases the current in the diode of the photocoupler PC201 connected to the IC4 when the output rises, and is used for feedback of the output voltage detection signal. The voltage at the feedback terminal FB2 of the integrated circuit IC3 for power control connected to the collector of the transistor of the photocoupler PC2 decreases, and the off-time duty of the switching element Q2 operating at a constant frequency increases according to the amount of decrease. The output voltage can be supplied stably.
上述のスイッチング電源では、スイッチング効率を改善し、電源制御用集積回路ＩＣ３の消費電流を低減しても安定した出力を供給するための出力電圧検出用シャントレギュレーターＩＣ４と、出力が上昇するとＩＣ４に接続されたフォトカプラＰＣ２０１のダイオードに電流を供給し続けるために、電力を消費しなければならない問題があった。The switching power supply described above is connected to the output voltage detection shunt regulator IC4 for improving the switching efficiency and supplying a stable output even if the current consumption of the power supply control integrated circuit IC3 is reduced, and to the IC4 when the output increases. There is a problem that power must be consumed in order to continue supplying current to the diode of the photocoupler PC201.
本発明は、このような従来の構成が有していた問題を解決しようとするものであり、スイッチング電源の無負荷定格出力時に、消費電力の低減を向上させたものである。The present invention is intended to solve the problem of such a conventional configuration, and improves the reduction of power consumption at the time of no-load rated output of a switching power supply.
そして本発明は上記目的を達成するために、スイッチング電源の出力が安定した出力を供給している時は、フォトカプラのダイオードに、流れる電流を低減した回路構成としたものである。In order to achieve the above object, the present invention has a circuit configuration in which the current flowing in the diode of the photocoupler is reduced when the output of the switching power supply supplies a stable output.
上述したように、定格出力電圧では、フォトカプラのダイオードには電流を低減しているので、無負荷時の消費電力を低減したスイッチング電源を提供できる。As described above, since the current is reduced in the photocoupler diode at the rated output voltage, it is possible to provide a switching power supply with reduced power consumption at no load.
以下、本発明の実施の形態を適用したスイッチング電源の一例を、図１に基づいて説明する。Hereinafter, an example of a switching power supply to which an embodiment of the present invention is applied will be described with reference to FIG.
この回路は、フライバックコンバータであり、Ｔ１は、１次側に蓄積されたエネルギーを２次側へ伝達するためのコンバータトランス、Ｑ１は、スイッチング素子であるＦＥＴ、Ｃ１は、電源入力平滑用コンデンサ、Ｃ２は、２次側出力平滑用コンデンサであり、ＩＣ１は電源制御用集積回路、ＩＣ２は出力電圧検出用集積回路であり、Ｒ１とＲ２の抵抗器は出力電圧検出用集積回路ＩＣ２内の基準電圧と比較するために、出力電圧を分圧するために設けられたものである。ＰＣ１とＰＣ１０１は、２次側回路に電圧を安定供給するための信号を１次側にフィードバックする出力電圧検出信号フィードバック用フォトカプラであり、Ｒ３はフィードバック用フォトカプラＰＣ１０１のダイオードに流れる電流を設定する抵抗器である。This circuit is a flyback converter, T1 is a converter transformer for transmitting energy accumulated on the primary side to the secondary side, Q1 is an FET as a switching element, and C1 is a capacitor for smoothing the power input. , C2 is a secondary side output smoothing capacitor, IC1 is an integrated circuit for power supply control, IC2 is an integrated circuit for output voltage detection, and resistors R1 and R2 are reference in the integrated circuit IC2 for output voltage detection It is provided to divide the output voltage for comparison with the voltage. PC1 and PC101 are output voltage detection signal feedback photocouplers that feed back a signal for stably supplying a voltage to the secondary side circuit to the primary side, and R3 sets a current flowing through the diode of the feedback photocoupler PC101. It is a resistor.
出力電圧が上昇し、出力電圧検出用集積回路のＩＣ２に接続されている抵抗器Ｒ１と抵抗器Ｒ２の分圧電圧がＩＣ２である出力電圧検出用集積回路の端子Ｓに入力され、ＩＣ２である出力電圧検出用集積回路内の基準電圧に近づくと、出力電圧検出用集積回路ＩＣ２に接続された出力電圧検出信号フィードバック用フォトカプラＰＣ１０１のダイオードに流れる電流が減少して、該フォトカプラＰＣ１のトランジスタが接続されている電源制御用集積回路ＩＣ１のフィードバック端子ＦＢ１の電圧が増加し、増加量に応じて一定周波数で動作しているスイッチング素子Ｑ１のオフ時間デューティが大きくなるように回路構成された電源制御用集積回路ＩＣ１は、出力電圧を安定供給することができる。The output voltage rises, and the divided voltage of the resistor R1 and the resistor R2 connected to the IC2 of the output voltage detection integrated circuit is input to the terminal S of the output voltage detection integrated circuit that is IC2, and is IC2. When approaching the reference voltage in the output voltage detection integrated circuit, the current flowing through the diode of the output voltage detection signal feedback photocoupler PC101 connected to the output voltage detection integrated circuit IC2 decreases, and the transistor of the photocoupler PC1 The voltage of the feedback terminal FB1 of the power supply control integrated circuit IC1 to which is connected is increased, and the power supply configured in a circuit so that the off-time duty of the switching element Q1 operating at a constant frequency increases according to the increase The control integrated circuit IC1 can stably supply the output voltage.
図４に、本発明の実施例によるスイッチング電源の動作状態と時間との関係を示す。また、図３に従来例によるものを示す。図３と図４を比較すると明らかなように、図４は２次側回路電流が低減されることで、無負荷時の消費電力を低減することができる。FIG. 4 shows the relationship between the operating state and time of the switching power supply according to the embodiment of the present invention. FIG. 3 shows a conventional example. As is apparent from a comparison between FIG. 3 and FIG. 4, in FIG. 4, power consumption during no load can be reduced by reducing the secondary circuit current.
Ｑ１ ＦＥＴ
Ｑ２ ＦＥＴ
Ｃ１ 電源入力平滑用コンデンサ
Ｃ２ ２次側出力平滑用コンデンサ
Ｃ３ 電源入力平滑用コンデンサ
Ｃ４ ２次側出力平滑用コンデンサ
ＩＣ１ 電源制御用集積回路
ＩＣ２ 出力電圧検出用集積回路
ＩＣ３ 電源制御用集積回路
ＩＣ４ シャントレギュレーターＩＣ
ＰＣ１ フォトカプラ
ＰＣ１０１ フォトカプラ
ＰＣ２ フォトカプラ
ＰＣ２０１ フォトカプラ
Ｒ１ 抵抗器
Ｒ２ 抵抗器
Ｒ３ 抵抗器
Ｒ４ 抵抗器
Ｒ５ 抵抗器
Ｒ６ 抵抗器
ＦＢ１ フィードバック端子
ＦＢ２ フィードバック端子
Ｔ１ コンバータートランス
Ｔ２ コンバータートランスQ1 FET
Q2 FET
C1 power input smoothing capacitor C2 secondary output smoothing capacitor C3 power input smoothing capacitor C4 secondary output smoothing capacitor IC1 power control integrated circuit IC2 output voltage detection integrated circuit IC3 power control integrated circuit IC4 shunt regulator IC
PC1 Photocoupler PC101 Photocoupler PC2 Photocoupler PC201 Photocoupler R1 Resistor R2 Resistor R3 Resistor R4 Resistor R5 Resistor R6 Resistor FB1 Feedback terminal FB2 Feedback terminal T1 Converter transformer T2 Converter transformer
Claims (1)
１次側に備えられた電源制御用集積回路と、An integrated circuit for power control provided on the primary side;
２次側に備えられた出力電圧検出用集積回路と、An integrated circuit for detecting the output voltage provided on the secondary side;
２次側に備えられ、２次側の出力電圧を分圧しかつ前記出力電圧検出用集積回路にProvided on the secondary side, the output voltage on the secondary side is divided and the output voltage detecting integrated circuit is provided.
接続された抵抗器と、Connected resistors,
１次側に備えられ前記電源制御用集積回路に接続されたトランジスタ、及び、２次側出力に備えられ前記出力電圧検出用集積回路に接続されたダイオードを有するフォトカプラと、A photocoupler having a transistor provided on the primary side and connected to the integrated circuit for power supply control, and a diode connected to the output voltage detection integrated circuit provided on the secondary side;
１次側に備えられ前記電源制御用集積回路に接続され、１次側をスイッチングするProvided on the primary side and connected to the integrated circuit for power control, and switches the primary side
スイッチング素子と、を有し、A switching element,
前記出力電圧検出用集積回路は、前記抵抗器によって分圧された電圧が前記出力電圧検出用集積回路内の基準電圧に近づいた場合、前記ダイオードに流す電流を減少させ、When the voltage divided by the resistor approaches the reference voltage in the output voltage detection integrated circuit, the output voltage detection integrated circuit reduces the current flowing through the diode,
前記電源制御用集積回路は、前記ダイオードに流れる電流が減少した場合、前記トランジスタのフィードバック端子電圧を増加させ、かつ、前記増加の量に応じて前記スイッチング素子のオフ時間デューティを大きくするスイッチング電源。The power supply control integrated circuit is a switching power supply that increases a feedback terminal voltage of the transistor and increases an off-time duty of the switching element according to the amount of increase when a current flowing through the diode decreases.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2010105809A JP5010012B2 (en) | 2010-04-14 | 2010-04-14 | Power consumption reduction circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2010105809A JP5010012B2 (en) | 2010-04-14 | 2010-04-14 | Power consumption reduction circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2011223851A JP2011223851A (en) | 2011-11-04 |
| JP5010012B2 true JP5010012B2 (en) | 2012-08-29 |
Family
ID=45040048
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2010105809A Expired - Fee Related JP5010012B2 (en) | 2010-04-14 | 2010-04-14 | Power consumption reduction circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP5010012B2 (en) |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001346329A (en) * | 2000-06-01 | 2001-12-14 | Sony Corp | Apparatus and method for power supply |
-
2010
- 2010-04-14 JP JP2010105809A patent/JP5010012B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2011223851A (en) | 2011-11-04 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP5341627B2 (en) | Semiconductor device and switching power supply device | |
| JP5230181B2 (en) | Energy transfer device and semiconductor device for energy transfer control | |
| CN107210676B (en) | Semiconductor device for power supply control | |
| JP5489502B2 (en) | Power supply | |
| US20110025289A1 (en) | Two-stage switching power supply | |
| JP5477699B2 (en) | Switching power supply | |
| US8891259B2 (en) | Control circuit and method for audible noise suppression in a power converter | |
| US20100133905A1 (en) | Multi-output power conversion circuit | |
| JP2009189170A (en) | Energy converter and semiconductor device and switch control method for the energy converter | |
| US8358517B2 (en) | Switching power conversion circuit and power supply using same | |
| JP2011015557A (en) | Switching power supply apparatus, and semiconductor device for control of the same | |
| JP6707390B2 (en) | INSULATED DC/DC CONVERTER, POWER ADAPTER USING THE SAME, ELECTRONIC DEVICE, AND CONTROL METHOD THEREOF | |
| US20100033992A1 (en) | Switching power supply controller and semiconductor device used for the same | |
| JP6171556B2 (en) | Switching power supply | |
| US20200403491A1 (en) | Dual supply low-side gate driver | |
| US20090153116A1 (en) | Switching controller and semiconductor device used in the same | |
| JP4255487B2 (en) | Switching power supply device and switching frequency setting method | |
| JP7123733B2 (en) | power control unit | |
| KR101228767B1 (en) | Switching mode power supply with multiple output | |
| EP2804303B1 (en) | Switching power supply circuit | |
| JP5010012B2 (en) | Power consumption reduction circuit | |
| JP4653350B2 (en) | Switching power supply | |
| JP4668473B2 (en) | Switching power supply | |
| JP4386384B2 (en) | Switching power supply | |
| JP6810150B2 (en) | Switching power supply and semiconductor device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A871 | Explanation of circumstances concerning accelerated examination |
Free format text: JAPANESE INTERMEDIATE CODE: A871 Effective date: 20111014 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20111013 |
|
| A975 | Report on accelerated examination |
Free format text: JAPANESE INTERMEDIATE CODE: A971005 Effective date: 20120105 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20120117 |
|
| A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20120315 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20120522 |
|
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
| R150 | Certificate of patent or registration of utility model |
Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20150608 |
|
| R154 | Certificate of patent or utility model (reissue) |
Free format text: JAPANESE INTERMEDIATE CODE: R154 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20150608 Year of fee payment: 3 |
|
| R150 | Certificate of patent or registration of utility model |
Ref document number: 5010012 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| LAPS | Cancellation because of no payment of annual fees |