JP4975615B2 - 集積回路装置パッケージ用切り欠きヒート・スラグ - Google Patents
集積回路装置パッケージ用切り欠きヒート・スラグ Download PDFInfo
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- 239000000758 substrate Substances 0.000 claims description 53
- 150000001875 compounds Chemical class 0.000 claims description 23
- 239000004065 semiconductor Substances 0.000 claims description 11
- 238000000034 method Methods 0.000 claims description 10
- 239000002893 slag Substances 0.000 claims description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 6
- 229910052710 silicon Inorganic materials 0.000 description 6
- 239000010703 silicon Substances 0.000 description 6
- 238000004519 manufacturing process Methods 0.000 description 5
- 238000004806 packaging method and process Methods 0.000 description 4
- 238000001816 cooling Methods 0.000 description 3
- 238000009792 diffusion process Methods 0.000 description 3
- 238000005538 encapsulation Methods 0.000 description 3
- 229910000679 solder Inorganic materials 0.000 description 3
- GLGNXYJARSMNGJ-VKTIVEEGSA-N (1s,2s,3r,4r)-3-[[5-chloro-2-[(1-ethyl-6-methoxy-2-oxo-4,5-dihydro-3h-1-benzazepin-7-yl)amino]pyrimidin-4-yl]amino]bicyclo[2.2.1]hept-5-ene-2-carboxamide Chemical compound CCN1C(=O)CCCC2=C(OC)C(NC=3N=C(C(=CN=3)Cl)N[C@H]3[C@H]([C@@]4([H])C[C@@]3(C=C4)[H])C(N)=O)=CC=C21 GLGNXYJARSMNGJ-VKTIVEEGSA-N 0.000 description 2
- 229940125758 compound 15 Drugs 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000011810 insulating material Substances 0.000 description 2
- QBWKPGNFQQJGFY-QLFBSQMISA-N 3-[(1r)-1-[(2r,6s)-2,6-dimethylmorpholin-4-yl]ethyl]-n-[6-methyl-3-(1h-pyrazol-4-yl)imidazo[1,2-a]pyrazin-8-yl]-1,2-thiazol-5-amine Chemical compound N1([C@H](C)C2=NSC(NC=3C4=NC=C(N4C=C(C)N=3)C3=CNN=C3)=C2)C[C@H](C)O[C@H](C)C1 QBWKPGNFQQJGFY-QLFBSQMISA-N 0.000 description 1
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- 229910007637 SnAg Inorganic materials 0.000 description 1
- 238000003491 array Methods 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 229940125846 compound 25 Drugs 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 238000012858 packaging process Methods 0.000 description 1
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- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H01L2224/732—Location after the connecting process
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- H01L24/42—Wire connectors; Manufacturing methods related thereto
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- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
- H01L2924/15182—Fan-in arrangement of the internal vias
- H01L2924/15184—Fan-in arrangement of the internal vias in different layers of the multilayer substrate
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- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- Condensed Matter Physics & Semiconductors (AREA)
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- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Description
Claims (3)
- 複数のパッド・ランドを有する複数の導電トレースを有する基板と、
前記基板上に固定され、複数のボンド・パッドを有する集積回路装置(IC装置)と、
前記複数の導電トレースに接続された前記複数のパッド・ランドと前記複数のボンド・パッドとを接続する複数の導電ワイヤと、
前記基板の表面上の所定高さを有するヒート・スラグであって、底部と上部とを備え、前記底部は前記ヒート・スラグを前記基板に対して機械的に取り付けるための複数の固定脚部を含み、前記上部は前記IC装置を収容する空洞を含む、ヒート・スラグと、
前記ヒート・スラグに設けられ、前記IC装置を取り囲む複数の第一寸法の開口と、
前記ヒート・スラグに設けられ、前記第一寸法の開口より大きく、モールド・コンパウンドの前記ヒート・スラグの前記空洞内への導入を促す第二寸法の開口と、
を備え、
前記第二寸法の開口は、前記複数の第一寸法の開口よりも、前記基板上のランドに近く、前記ランドは、前記モールド・コンパウンドの前記ヒート・スラグの前記空洞内への導入の間に、前記ヒート・スラグの前記空洞内へ前記モールド・コンパウンドを流れ始めさせるものである、
半導体パッケージ構造。 - 複数のパッド・ランドを有する複数の導電トレースを有する基板と、
前記基板上に固定され、複数のボンド・パッドを有する集積回路装置(IC装置)と、
前記複数の導電トレースに接続された前記複数パッド・ランドと前記複数のボンド・パッドとを接続する複数の導電ワイヤと、
前記基板の表面上の所定高さを有するヒート・スラグであって、底部と上部とを備え、前記底部は前記ヒート・スラグを前記基板に対して機械的に取り付けるための複数の固定脚部を含み、前記複数の固定脚部は、前記第二寸法の開口の近傍に複数の固定脚部を含み、前記上部は前記IC装置を収容する空洞を含む、ヒート・スラグと、
前記ヒート・スラグに設けられ、前記IC装置を取り囲む複数の第一寸法の開口と、
前記ヒート・スラグに設けられ、前記第一寸法の開口より大きく、モールド・コンパウンドの前記ヒート・スラグの前記空洞内への導入を促す第二寸法の開口と、
を有し、
前記第二寸法の開口は、前記複数の第一寸法の開口よりも、前記基板上のランドに近く、前記ランドは、前記モールド・コンパウンドの前記ヒート・スラグの前記空洞内への導入の間に、前記ヒート・スラグの前記空洞内へ前記モールド・コンパウンドを流れ始めさせるものである、
基板における積回路装置が固定される側とは反対側に複数の外部接続用のボールが設けられた、高性能ボール・グリッド・アレー(HBGA)パッケージ構造。 - 集積回路装置(IC装置)を基板にボンディングする方法であって、
前記IC装置を前記基板上に載置し、
前記IC装置を前記基板に取り付け、
前記IC装置と前記基板をワイヤ・ボンディングし、
前記IC装置の上方にヒート・スラグを配置し、該ヒート・スラグを前記基板に取り付け、
前記ヒート・スラグは、底部と上部とを備え、
前記底部は前記ヒート・スラグを前記基板に対して機械的に取り付けるための複数の固定脚部を含み、
前記上部は前記IC装置を収容する空洞を含み、
前記ヒート・スラグは、前記IC装置を取り囲む複数の第一寸法の開口と、前記第一寸法の開口より大きく、モールド・コンパウンドの前記ヒート・スラグの前記空洞内への導入を促す第二の寸法の開口と、を有するものであり、
前記ヒート・スラグの前記第二寸法の開口にモールド・コンパウンドを注入し、前記第二寸法の開口は、前記複数の第一寸法の開口よりも、前記基板上のランドに近く、前記ランドにより、前記モールド・コンパウンドの前記ヒート・スラグの前記空洞内への導入の間に、前記ヒート・スラグの空洞内へ前記モールド・コンパウンドを流れ始めさせる、
方法。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US57025104P | 2004-05-11 | 2004-05-11 | |
US60/570,251 | 2004-05-11 | ||
PCT/IB2005/051531 WO2005109498A2 (en) | 2004-05-11 | 2005-05-10 | Cut-out heat slug for integrated circuit device packaging |
Publications (2)
Publication Number | Publication Date |
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JP2007537589A JP2007537589A (ja) | 2007-12-20 |
JP4975615B2 true JP4975615B2 (ja) | 2012-07-11 |
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Application Number | Title | Priority Date | Filing Date |
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JP2007512693A Active JP4975615B2 (ja) | 2004-05-11 | 2005-05-10 | 集積回路装置パッケージ用切り欠きヒート・スラグ |
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US (2) | US7656029B2 (ja) |
JP (1) | JP4975615B2 (ja) |
KR (1) | KR101148676B1 (ja) |
TW (1) | TWI374525B (ja) |
WO (1) | WO2005109498A2 (ja) |
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TWI374525B (en) * | 2004-05-11 | 2012-10-11 | Taiwan Semiconductor Mfg | Cut-out heat slug for integrated circuit device packaging |
US20130206843A1 (en) * | 2012-02-14 | 2013-08-15 | Texas Instruments Incorporated | Integrated circuit package |
KR200471385Y1 (ko) | 2012-09-21 | 2014-02-20 | 주식회사 휘닉스소재 | 반도체 패키지용 히트슬러그 |
Family Cites Families (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03101038A (ja) | 1989-09-13 | 1991-04-25 | Fujitsu Ltd | 集束イオンビーム走査装置 |
JPH03101038U (ja) * | 1990-01-31 | 1991-10-22 | ||
JP3120575B2 (ja) * | 1992-06-29 | 2000-12-25 | 富士電機株式会社 | 半導体装置 |
JPH07321246A (ja) * | 1994-05-19 | 1995-12-08 | Shinko Electric Ind Co Ltd | 半導体装置 |
JPH08139223A (ja) * | 1994-11-09 | 1996-05-31 | Mitsubishi Electric Corp | 半導体装置 |
JPH11163229A (ja) * | 1997-11-26 | 1999-06-18 | Hitachi Ltd | 半導体装置およびその製造方法 |
TW418511B (en) | 1998-10-12 | 2001-01-11 | Siliconware Precision Industries Co Ltd | Packaged device of exposed heat sink |
JP3241669B2 (ja) | 1998-11-09 | 2001-12-25 | 埼玉日本電気株式会社 | Icパッケージの補強構造 |
US6191360B1 (en) | 1999-04-26 | 2001-02-20 | Advanced Semiconductor Engineering, Inc. | Thermally enhanced BGA package |
US6432749B1 (en) | 1999-08-24 | 2002-08-13 | Texas Instruments Incorporated | Method of fabricating flip chip IC packages with heat spreaders in strip format |
TW465806U (en) | 1999-08-25 | 2001-11-21 | Orient Semiconductor Elect Ltd | Improved positioning structure of BGA plastic packaged heat sink and integrated circuit chip surface |
JP2001102495A (ja) * | 1999-09-28 | 2001-04-13 | Toshiba Corp | 半導体装置 |
DE10038120A1 (de) * | 2000-08-04 | 2001-10-18 | Infineon Technologies Ag | Systemträger zum Verpacken von Halbleiterchips zu elektronischen Bauteilen und Verfahren zur Herstellung von Systemträgern und elektronischen Bauteilen |
TW465804U (en) | 2000-09-28 | 2001-11-21 | Advanced Semiconductor Eng | Fixing device for wire bonding station in packaging process |
JP2002151633A (ja) * | 2000-11-08 | 2002-05-24 | Citizen Watch Co Ltd | 樹脂封止型半導体装置 |
SG94734A1 (en) * | 2001-01-15 | 2003-03-18 | Chuen Khiang Wang | Packaging of a microchip device |
TW559337U (en) * | 2001-12-07 | 2003-10-21 | Siliconware Precision Industries Co Ltd | Semiconductor packaging apparatus having heat dissipation structure |
US7161092B2 (en) * | 2002-04-15 | 2007-01-09 | Visteon Global Technologies, Inc. | Apparatus and method for protecting an electronic circuit |
TW571406B (en) * | 2002-08-23 | 2004-01-11 | Via Tech Inc | High performance thermally enhanced package and method of fabricating the same |
CN100380636C (zh) * | 2002-09-30 | 2008-04-09 | 先进互连技术有限公司 | 用于整体成型组件的热增强封装及其制造方法 |
JP3101038U (ja) * | 2003-10-16 | 2004-06-03 | 立衛科技股▲ふん▼有限公司 | 半導体パッケージの放熱板 |
TWI374525B (en) * | 2004-05-11 | 2012-10-11 | Taiwan Semiconductor Mfg | Cut-out heat slug for integrated circuit device packaging |
TWI237882B (en) * | 2004-05-11 | 2005-08-11 | Via Tech Inc | Stacked multi-chip package |
US6969640B1 (en) * | 2004-09-02 | 2005-11-29 | Stats Chippac Ltd. | Air pocket resistant semiconductor package system |
US20070200210A1 (en) * | 2006-02-28 | 2007-08-30 | Broadcom Corporation | Methods and apparatus for improved thermal performance and electromagnetic interference (EMI) shielding in integrated circuit (IC) packages |
US8022512B2 (en) * | 2006-02-28 | 2011-09-20 | Unisem (Mauritus) Holdings Limited | No lead package with heat spreader |
US9013035B2 (en) * | 2006-06-20 | 2015-04-21 | Broadcom Corporation | Thermal improvement for hotspots on dies in integrated circuit packages |
-
2005
- 2005-05-06 TW TW094114783A patent/TWI374525B/zh not_active IP Right Cessation
- 2005-05-10 JP JP2007512693A patent/JP4975615B2/ja active Active
- 2005-05-10 WO PCT/IB2005/051531 patent/WO2005109498A2/en active Application Filing
- 2005-05-10 US US11/579,890 patent/US7656029B2/en not_active Expired - Fee Related
- 2005-05-10 KR KR1020067023596A patent/KR101148676B1/ko active IP Right Grant
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Also Published As
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US20080258296A1 (en) | 2008-10-23 |
TWI374525B (en) | 2012-10-11 |
WO2005109498A3 (en) | 2006-09-08 |
US7656029B2 (en) | 2010-02-02 |
JP2007537589A (ja) | 2007-12-20 |
US8222731B2 (en) | 2012-07-17 |
WO2005109498A2 (en) | 2005-11-17 |
TW200625574A (en) | 2006-07-16 |
US20100096742A1 (en) | 2010-04-22 |
KR20070010056A (ko) | 2007-01-19 |
KR101148676B1 (ko) | 2012-05-23 |
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