JP4972327B2 - Plasma processing equipment - Google Patents

Description

  The present invention relates to a plasma processing apparatus, and more particularly to a plasma processing apparatus having an electrode connected to a DC power source.

  A substrate processing chamber having a processing space into which a wafer as a substrate is carried, a lower electrode disposed in the substrate processing chamber and connected to a high frequency power source, and an upper electrode disposed to face the lower electrode A parallel plate type plasma processing apparatus is known. In this plasma processing apparatus, a processing gas is introduced into the processing space, and high-frequency power is applied to the processing space between the upper electrode and the lower electrode. Further, when the wafer is carried into the processing space and placed on the lower electrode, the introduced processing gas is converted into plasma by high-frequency power to generate ions and the like, and the wafer is subjected to plasma processing, for example, etching. Apply processing.

  In recent years, for the purpose of improving plasma processing performance, a plasma processing apparatus has been developed in which an upper electrode is connected to a DC power source and a DC voltage is applied to a processing space. In order to apply a DC voltage to the processing space, it is necessary to provide a ground potential electrode (hereinafter referred to as a “ground electrode”) that exposes the conductive surface in the processing space. However, when plasma processing is performed using a deposition process gas, deposits may be formed on the surface of the ground electrode to form a deposition film. Depending on the type of processing gas, the surface of the ground electrode may be covered with an oxide film or a nitride film. Since the deposition film, oxide film, and nitride film are insulative, the direct current from the upper electrode to the ground electrode is obstructed, making it impossible to apply a direct current voltage to the processing space. Therefore, it is necessary to remove the deposition film and the like.

Conventionally, as a method for removing a deposition film or the like on an electrode surface, oxygen (O ₂ ) gas is introduced into a processing space, oxygen ions or oxygen radicals are generated from the oxygen gas, and the deposition film or the like is reacted with oxygen ions or oxygen radicals. There is known a method of removing them (see, for example, Patent Document 1).

In addition, the above-described removal method of the deposition film or the like needs to execute a process different from the plasma processing of the wafer, and the productivity of the semiconductor device from the wafer decreases. More specifically, a deposition film removing method for transmitting a relatively low frequency, for example, a high frequency power of 2 MHz, to a substrate processing chamber component including a ground electrode has been developed. In this deposition film removal method, a fluctuation potential is generated on the surface of the ground electrode due to the high frequency power of 2 MHz. At this time, since the cation can follow the fluctuation potential of a relatively low frequency, the cation is drawn into the ground electrode by the fluctuation potential and sputters the surface. Thereby, the deposition film or the like is removed.
JP 62-40728 A

  However, there are cases where it is impossible to supply high-frequency power with a relatively low frequency in plasma processing, such as when only radicals are to contact the wafer. In this case, high-frequency power having a relatively high frequency is transmitted to the ground electrode or the like, but the cation cannot follow a fluctuation potential having a relatively high frequency, and is generated due to the high-frequency power having a relatively high frequency. Since the potential difference of the fluctuation potential is small, cations are attracted to the ground electrode with low energy, and as a result, the deposition film or the like may not be removed.

  An object of the present invention is to provide a plasma processing apparatus capable of removing an insulating film of a ground electrode.

In order to achieve the above object, a plasma processing apparatus according to claim 1 is a substrate processing chamber having a processing space for performing plasma processing on a substrate, a plate-like upper electrode for applying a DC voltage to the processing space, and A plasma processing apparatus comprising a base-like lower electrode facing the upper electrode in a substrate processing chamber, on which the substrate is placed and applying high frequency power to the processing space, and a ground electrode exposed in the processing space. And an annular focus ring surrounding the substrate placed on the lower electrode in the substrate processing chamber, wherein the lower electrode and the upper electrode are arranged in parallel with each other with the processing space interposed therebetween, the ground electrode is disposed on the lower electrode side in the substrate processing chamber, said ground electrode and said focusing ring are adjacent across the insulating portion, the supply of the lower electrode Was such that the ground electrode to the leakage field generated by the electric field leakage effect of the high-frequency power are opposed, the distance between the ground electrode and the focus ring is greater than 0 mm, is and set to 10mm or less, the lower electrode The high frequency power is applied to the ground electrode, but no high frequency power is applied to the ground electrode .

The plasma processing apparatus according to claim 2 is the plasma processing apparatus according to claim 1, wherein the strength of the leakage electric field is 20% or more of the strength of the electric field opposed to the peripheral edge of the lower electrode. .

A plasma processing apparatus according to a third aspect is the plasma processing apparatus according to the first or second aspect , wherein the distance is set to be greater than 0 mm and not greater than 5 mm.

A plasma processing apparatus according to a fourth aspect is the plasma processing apparatus according to the first or second aspect , wherein the distance is set to be greater than 0.5 mm and equal to or less than 10 mm.

The plasma processing apparatus according to claim 5 is the plasma processing apparatus according to any one of claims 1 to 4 , wherein the insulating portion is made of an insulator or a vacuum space.

According to the plasma processing apparatus according to claim 1 Symbol placement, the distance between the ground electrode adjacent to the high-frequency electrode across the insulating portion, the ground electrode and the high-frequency electrode exposed to the processing space in which a DC voltage is applied from 0mm And is set to 10 mm or less. The high-frequency power applied to the processing space by the high-frequency electrode generates an electric field having a predetermined intensity not only in the portion of the processing space facing the high-frequency electrode but also in the processing space near the high-frequency electrode. Further, the electric field almost disappears when it is separated from the high-frequency electrode by 10 mm or more. Therefore, an electric field having a predetermined intensity is generated in the portion of the processing space facing the ground electrode, and ions collide with the ground electrode due to the potential difference of the electric field. As a result, the insulating film of the ground electrode can be removed.

According to the plasma processing apparatus of claim 3, since the distance between the ground electrode and the high frequency electrode is set to be greater than 0 mm and 5 mm or less, a predetermined strength is applied to a portion of the processing space facing the ground electrode. It is possible to reliably generate the electric field, and to reliably remove the insulating film of the ground electrode.

According to the plasma processing apparatus of claim 4, since the distance between the ground electrode and the high frequency electrode is set to be greater than 0.5 mm and 10 mm or less, there is a margin for high frequency power being applied to the ground electrode. Can be prevented. As a result, the ground electrode can be maintained at the ground potential, so that a DC voltage can be reliably applied to the processing space.

According to the plasma processing apparatus of the fifth aspect, since the insulating portion between the ground electrode and the high frequency electrode is made of an insulator or a vacuum space, it is possible to reliably prevent the high frequency power from being applied to the ground electrode. .

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  First, the plasma processing apparatus according to the first embodiment of the present invention will be described.

  FIG. 1 is a cross-sectional view showing a schematic configuration of the plasma processing apparatus according to the present embodiment. This plasma processing apparatus is configured to perform RIE (Reactive Ion Etching) processing on a semiconductor wafer W as a substrate.

In FIG. 1, a plasma processing apparatus 10 has a cylindrical substrate processing chamber 11, and the substrate processing chamber 11 has a processing space S therein. Further, in the substrate processing chamber 11, for example, a cylindrical susceptor 12 (high-frequency electrode) is disposed as a mounting table on which a semiconductor wafer W having a diameter of 300 mm (hereinafter simply referred to as “wafer W”) is mounted. ing. The inner wall surface of the substrate processing chamber 11 is covered with a side wall member 13. The side wall member 13 is made of aluminum, and the surface facing the processing space S is coated with yttria (Y ₂ O ₃ ). Since the substrate processing chamber 11 is electrically grounded, the potential of the side wall member 13 is the ground potential. In addition, the susceptor 12 includes a conductor portion 29 made of a conductive material, for example, aluminum, and a susceptor side surface covering member 14 made of an insulating material that covers the side surface of the conductor portion 29.

  In the plasma processing apparatus 10, an exhaust path 15 that functions as a flow path for discharging gas molecules above the susceptor 12 out of the substrate processing chamber 11 is formed by the inner wall of the substrate processing chamber 11 and the side surface of the susceptor 12. A baffle plate 16 is disposed in the middle of the exhaust path 15.

  The baffle plate 16 is a plate-like member having a large number of holes, and functions as a partition plate that partitions the substrate processing chamber 11 into an upper part and a lower part. Plasma (described later) is generated in an upper portion (hereinafter referred to as “reaction chamber”) 17 of the substrate processing chamber 11 partitioned by the baffle plate 16. Further, a roughing exhaust pipe 19 and a main exhaust pipe 20 for exhausting gas in the substrate processing chamber 11 are opened in a lower portion 18 (hereinafter referred to as “exhaust chamber (manifold)”) of the substrate processing chamber 11. A DP (Dry Pump) (not shown) is connected to the roughing exhaust pipe 19, and a TMP (Turbo Molecular Pump) (not shown) is connected to the exhaust pipe 20. Further, the baffle plate 16 captures or reflects ions and radicals generated in the processing space S to prevent leakage to the manifold 18.

  The roughing exhaust pipe 19, the main exhaust pipe 20, DP, TMP, and the like constitute an exhaust device, and the roughing exhaust pipe 19 and the main exhaust pipe 20 pass the gas in the reaction chamber 17 through the manifold 18 to the outside of the substrate processing chamber 11. To discharge. Specifically, the roughing exhaust pipe 19 depressurizes the inside of the substrate processing chamber 11 from the atmospheric pressure to a low vacuum state, and the main exhaust pipe 20 cooperates with the roughing exhausting pipe 19 in the atmosphere of the substrate processing chamber 11. The pressure is reduced to a high vacuum state (for example, 133 Pa (1 Torr or less)) that is lower than the low vacuum state.

  A high frequency power source 21 is connected to the conductor portion 29 of the susceptor 12 via a matcher 22, and the high frequency power source 21 supplies high frequency power of a relatively high frequency, for example, 40 MHz to the conductor portion 29. Supply. Thereby, the conductor part 29 of the susceptor 12 functions as a high-frequency electrode. In addition, the matching unit 22 reduces the reflection of the high frequency power from the conductor portion 29 to maximize the supply efficiency of the high frequency power to the conductor portion 29. The susceptor 12 applies high frequency power of 40 MHz supplied from the high frequency power supply 21 to the processing space S.

  During the RIE process, an insulating film such as a deposition film, an oxide film, or a nitride film may be formed on the surface of the susceptor side surface covering member 14 or an exposed portion of a silicon electrode 27 described later. Here, a high frequency (40 MHz) fluctuation potential is generated on the surface of the susceptor side surface covering member 14 due to the high frequency power of 40 MHz supplied to the conductor portion 29, but the cation follows the potential difference that fluctuates at 40 MHz. Since the potential difference caused by the high frequency power of 40 MHz is not possible, the energy of the cation colliding with the susceptor side surface covering member 14 is low, and is formed on the surface of the susceptor side surface covering member 14 by the varying potential of 40 MHz. The insulating film is not removed.

  A disc-shaped electrostatic chuck 24 having an electrode plate 23 therein is disposed above the susceptor 12. When the susceptor 12 places the wafer W, the wafer W is placed on the electrostatic chuck 24. A DC power source 25 is electrically connected to the electrode plate 23. When a negative DC voltage is applied to the electrode plate 23, a positive potential is generated on the back surface of the wafer W. Therefore, a potential difference is generated between the electrode plate 23 and the back surface of the wafer W, and the Coulomb force or The wafer W is attracted and held on the upper surface of the electrostatic chuck 24 by a Johnson-Rahbek force.

Above the susceptor 12, an annular focus ring 26 is disposed so as to surround the wafer W attracted and held on the upper surface of the susceptor 12. The focus ring 26 is made of silicon (Si) or silica (SiO ₂ ), is exposed to the processing space S, and converges the plasma in the processing space S toward the surface of the wafer W, thereby improving the efficiency of the RIE processing. The high frequency power of 40 MHz supplied to the conductor portion 29 is transmitted to the focus ring 26 via the electrostatic chuck 24. At this time, the focus ring 26 applies high frequency power of 40 MHz to the processing space S. Therefore, the focus ring 26 also functions as a high frequency electrode.

  An annular silicon electrode 27 made of silicon is disposed around the focus ring 26 so as to be adjacent to the focus ring 26. The silicon electrode 27 has an exposed portion exposed to the processing space S, and is electrically grounded to function as a ground electrode. The silicon electrode 27 constitutes a part of a path of a direct current caused by a direct current voltage applied to the processing space S by an upper electrode plate 39 to be described later.

  Between the focus ring 26 and the silicon electrode 27, an annular insulator ring 28 (insulating part) made of an insulating material, for example, quartz (Qz) is disposed. Further, the susceptor side surface covering member 14 is interposed between the silicon electrode 27 and the conductor portion 29 of the susceptor 12. Therefore, the silicon electrode 27 is electrically insulated from the conductor portion 29 and the focus ring 26, and the insulator ring 28 and the susceptor side surface covering member 14 are supplied with high frequency power supplied to the conductor portion 29 and the focus ring 26 to the silicon electrode 27. It is surely prevented from being applied.

  An annular cover ring 30 made of quartz is disposed around the silicon electrode 27 to protect the side surface of the silicon electrode 27.

  Inside the susceptor 12, for example, an annular refrigerant chamber 31 extending in the circumferential direction is provided. A refrigerant having a predetermined temperature, for example, cooling water or a Galden (registered trademark) liquid, is circulated and supplied to the refrigerant chamber 31 from a chiller unit (not shown) via a refrigerant pipe 32. The processing temperature of the wafer W attracted and held on the upper surface is controlled.

  Further, a plurality of heat transfer gas supply holes 33 are opened in a portion of the upper surface of the susceptor 12 where the wafer W is adsorbed and held (hereinafter referred to as “adsorption surface”). The plurality of heat transfer gas supply holes 33 are connected to a heat transfer gas supply unit (not shown) via a heat transfer gas supply line 34 disposed inside the susceptor 12, and the heat transfer gas supply unit Helium (He) gas as gas is supplied to the gap between the adsorption surface and the back surface of the wafer W through the heat transfer gas supply hole 33.

  Further, a plurality of pusher pins 35 serving as lift pins that can protrude from the upper surface of the susceptor 12 are arranged on the suction surface of the susceptor 12. These pusher pins 35 are connected via a motor (not shown) and a ball screw (not shown), and freely protrude from the suction surface due to the rotational motion of the motor converted into a linear motion by the ball screw. To do. The pusher pin 35 is accommodated in the susceptor 12 when the wafer W is sucked and held on the suction surface to perform the RIE process on the wafer W, and the pusher pin 35 is carried out when the wafer W subjected to the RIE process is unloaded from the substrate processing chamber 11. 35 protrudes from the upper surface of the susceptor 12 to lift the wafer W away from the susceptor 12 and lift it upward.

  A gas introduction shower head 36 is disposed on the ceiling of the substrate processing chamber 11 so as to face the susceptor 12. The gas introduction shower head 36 includes an electrode plate support 38 made of an insulating material, in which a buffer chamber 37 is formed, and an upper electrode plate 39 supported by the electrode plate support 38. The lower surface of the upper electrode plate 39 is exposed in the processing space S. The upper electrode plate 39 is a disk-shaped member made of a conductive material such as silicon. The peripheral edge of the upper electrode plate 39 is covered with an annular shield ring 40 made of an insulating material. That is, the upper electrode plate 39 is electrically insulated from the wall portion of the substrate processing chamber 11 at the ground potential by the electrode plate support 38 and the shield ring 40.

  The upper electrode plate 39 is electrically connected to a DC power supply 41, and a negative DC voltage is applied to the upper electrode plate 39. Accordingly, the upper electrode plate 39 applies a DC voltage to the processing space S. Since a DC voltage is applied to the upper electrode plate 39, there is no need to arrange a matching unit between the upper electrode plate 39 and the DC power source 41, and the upper electrode plate is provided with a matching unit as in the conventional plasma processing apparatus. Therefore, the structure of the plasma processing apparatus 10 can be simplified as compared with the case where a high frequency power source is connected. In addition, since the upper electrode plate 39 does not fluctuate with a negative potential, it is possible to maintain a state in which only cations are drawn, and electrons are not lost from the processing space S. Therefore, electrons are not reduced in the processing space S, and as a result, the efficiency of plasma processing such as RIE processing can be improved.

  A processing gas introduction pipe 42 from a processing gas supply unit (not shown) is connected to the buffer chamber 37 of the electrode plate support 38. Further, the gas introduction shower head 36 has a plurality of gas holes 43 that allow the buffer chamber 37 to conduct to the processing space S. The gas introduction shower head 36 supplies the processing gas supplied from the processing gas introduction pipe 42 to the buffer chamber 37 to the processing space S through the gas holes 43.

  In addition, on the side wall of the substrate processing chamber 11, a wafer W loading / unloading port 44 is provided at a position corresponding to the height of the wafer W lifted upward from the susceptor 12 by the pusher pin 35. A gate valve 45 for opening and closing the carry-in / out port 44 is attached.

  In the substrate processing chamber 11 of the plasma processing apparatus 10, as described above, the conductor portion 29 of the susceptor 12 applies high frequency power to the processing space S that is a space between the susceptor 12 and the upper electrode plate 39. The processing gas supplied from the gas introduction shower head 36 in the processing space S is converted into high-density plasma to generate cations and radicals, and the upper electrode plate 39 applies a DC voltage to the processing space S. The plasma is maintained in a desired state, and the RIE process is performed on the wafer W by cations or radicals.

  By the way, prior to the present invention, the present inventor observed deposits in the substrate processing chamber 11 when only a relatively high frequency high frequency power was supplied to the high frequency electrode in the conventional plasma processing apparatus 46 shown below. .

  FIG. 2 is a cross-sectional view showing a schematic configuration of a conventional plasma processing apparatus. The conventional plasma processing apparatus is basically the same in configuration and operation as the above-described plasma processing apparatus 10, has a point that high-frequency power is supplied to the upper electrode plate 39, and has an insulator ring 28 and a silicon electrode 27. The only difference is that the plasma processing apparatus 10 is different. Therefore, the description of the duplicated configuration and operation is omitted, and the description of the different configuration and operation is given below.

  In FIG. 2, the plasma processing apparatus 46 has a high frequency power supply 47 connected to the upper electrode plate 39 via a matching unit 49. Therefore, the upper electrode plate 39 applies high frequency power to the processing space S. An annular cover ring 48 made of quartz is disposed around the focus ring 26 on the susceptor 12 so as to be adjacent to the focus ring 26. The focus ring 26 and the cover ring 48 are in direct contact with each other.

In the case where the high frequency power is supplied from the high frequency power supply 47 to the upper electrode plate 39 from the high frequency power supply 47 to the upper electrode plate 39 at 2200 W in the plasma processing apparatus 46 without supplying high frequency power from the high frequency power supply 21 to the conductor portion 29 of the susceptor 12 The deposition rate (deposition) in the vicinity of the upper electrode plate 39, specifically, the shield ring 40 and the side wall member 13 adjacent to the shield ring 40 was measured. At this time, in the plasma processing apparatus 46,
The pressure of the processing space S was set to 2.67 Pa (20 mTorr), and C ₄ F ₈ gas and Ar gas were supplied to the processing space S with respective flow rates set to 14 sccm and 700 sccm, and plasma was generated. The RIE process was continued for 5 minutes.

  FIG. 3 is a graph showing the relationship between the deposition rate and the location of each component when only the high frequency power of 60 MHz is supplied to the upper electrode plate. In this graph, the horizontal axis indicates the relative position of each component with respect to the upper electrode plate 39, and the closer to the upper electrode plate 39, the closer to the right.

  As shown in the graph of FIG. 3, it was found that the deposition rate is positive at the side wall member 13 and the deposition is attached to the side wall member 13, but the deposition rate is negative at the shield ring 40, and the deposition rate is reduced from the shield ring 40. It was found that the film was removed.

  In the plasma processing apparatus 46, a frequency at which ions can follow, for example, a high frequency power of 2 MHz is not supplied to the upper electrode plate 39 or the conductor portion 29 of the susceptor 12, and the shield ring 40 is made of an insulating material. Therefore, the fluctuation potential is not generated on the surface of the shield ring 40, and the deposition film is not removed by the drawing of ions (sputtering) due to the fluctuation potential.

  In view of this, the present inventor, in order to investigate the mechanism of removing the deposit film in the shield ring 40, when the high frequency power of 60 MHz is supplied to the upper electrode plate 39, the processing space facing the shield ring 40 and the side wall member 13 portion. The electric field strength in the portion S was calculated by simulation. In the following description, the “electric field in the portion of the processing space S that faces” is simply referred to as “counter field”.

  FIG. 4 is a graph showing the relationship between the electric field strength calculated by simulation and the location of each component when only high frequency power of 60 MHz is supplied to the upper electrode plate. Also in this graph, the horizontal axis indicates the relative position of each component with respect to the upper electrode plate 39, and the closer to the upper electrode plate 39, the closer to the right. The vertical axis indicates the intensity ratio when the opposing electric field intensity at the peripheral edge of the upper electrode plate 39 is “1”.

  As shown in the graph of FIG. 4, the strength of the opposing electric field in the portion of the side wall member 13 adjacent to the shield ring 40 is almost zero, whereas the opposing in the range of 10 mm from the upper electrode plate 39 in the shield ring 40. The strength of the electric field is 20% or more of the strength of the counter electric field at the peripheral edge of the upper electrode plate 39. In particular, the strength of the counter electric field in the range of 5 mm from the upper electrode plate 39 in the shield ring 40 is It was confirmed that it was 40% or more of the strength of the counter electric field at the peripheral edge. Further, the opposing electric field substantially disappears in the range exceeding 10 mm from the upper electrode plate 39 in the shield ring 40.

  From the results of the above simulation, the present inventor has obtained the following knowledge regarding the mechanism for removing the deposit film in the shield ring 40.

  That is, when the upper electrode plate 39 applies high frequency power of 60 MHz to the processing space S, an opposing electric field of the upper electrode plate 39 is generated, but the high frequency power is generated in the processing space S facing the upper electrode plate 39. A counter electric field slightly weaker than the counter electric field of the upper electrode plate 39 is generated not only in the portion but also in the vicinity of the upper electrode plate 39, that is, in the portion of the processing space S facing the shield ring 40 (electric field leakage effect). Then, ions having energy corresponding to the potential difference of the opposing electric field of the shield ring 40 collide with the shield ring 40, and the deposit film is removed from the shield ring 40 by the collision of the ions.

  In the present embodiment, the above-described electric field leakage effect is used to remove the insulating film formed on the exposed portion of the silicon electrode 27 at the ground potential. Specifically, the distance between the silicon electrode 27 and the focus ring 26 to which high frequency power of 40 MHz is transmitted is set to any of 0.5 mm to 10 mm, preferably 0.5 mm to 5 mm. At this time, due to the electric field leakage effect of high frequency power of 40 MHz applied to the processing space S by the focus ring 26, the counter electric field slightly weaker than the counter electric field of the focus ring 26 is also present in the portion of the processing space S facing the silicon electrode 27. Specifically, an electric field having a strength of 20% or more with respect to the strength of the opposing electric field at the peripheral edge of the focus ring 26 is generated. Then, ions having energy corresponding to the potential difference of the opposing electric field of the silicon electrode 27 collide with the silicon electrode 27, and the insulating film is removed from the silicon electrode 27 by the collision of the ions. Note that the case where the silicon electrode 27 is disposed 0.5 mm from the focus ring 26 corresponds to the case where a vacuum space (spatial capacitor) is formed instead of the insulator ring 28 disposed between the silicon electrode 27 and the focus ring 26. . The distance between the silicon electrode 27 and the focus ring 26 may theoretically be 0 mm as long as insulation is possible.

  According to the plasma processing apparatus 10, the silicon electrode 27 serving as a ground electrode having an exposed portion exposed to the processing space S to which a direct current voltage is applied is supplied with high-frequency power of 40 MHz across the insulating insulator ring 28. The distance between the silicon electrode 27 and the focus ring 26 adjacent to the focus ring 26 to be applied to S is set to any of 0.5 mm to 10 mm, preferably 0.5 mm to 5 mm. Ions do not follow the fluctuation potential generated due to the high frequency power of 40 MHz, and the insulating film of the silicon electrode 27 cannot be removed by drawing ions caused by the fluctuation potential. On the other hand, in the portion of the processing space S facing the silicon electrode 27, an electric field having a strength of 20% or more with respect to the strength of the opposing electric field at the peripheral edge of the focus ring 26 is generated. Collides with the silicon electrode 27. As a result, in the plasma processing apparatus 10, the insulating film of the silicon electrode 27 can be removed. That is, the insulating film of the silicon electrode 27 can be removed without supplying high-frequency power of 3 MHz or less, which is a frequency at which ions can follow the conductor portion 29.

  In the plasma processing apparatus 10, since the insulator ring 28 is made of quartz, it is possible to reliably prevent high frequency power from being applied to the silicon electrode 27. As a result, the silicon electrode 27 can be maintained at the ground potential, so that a DC voltage can be reliably applied to the processing space S. Further, instead of arranging the insulator ring 28 between the focus ring 26 and the silicon electrode 27, a vacuum space may be provided. Also in this case, it is possible to reliably prevent the high frequency power from being applied to the silicon electrode 27.

  In the plasma processing apparatus 10, the frequency of the high-frequency power supplied to the conductor portion 29 (and the focus ring 26) of the susceptor 12 is 40 MHz, but the frequency may be 13 MHz or more. Ions do not follow the fluctuating potential generated due to the high frequency power of 13 MHz or higher, but even in this case, the portion of the processing space S facing the silicon electrode 27 has a counter electric field due to the electric field leakage effect. Therefore, ions can be reliably drawn into the silicon electrode 27 by the electric field.

  In the plasma processing apparatus 10, only the high-frequency power source 21 is connected to the conductor portion 29 of the susceptor 12. However, a plurality of high-frequency power sources may be connected to the conductor portion 29, and one high-frequency power source is an ion. If high-frequency power of 3 MHz or less, which is a frequency that can be followed, is supplied to the silicon electrode 27, not only does the ion collide due to the opposing electric field generated by the electric field leakage effect, but also the frequency at which the ion can follow. Since ions are attracted due to the fluctuation potential, the insulating film of the silicon electrode 27 can be more reliably removed.

  Next, a plasma processing apparatus according to the second embodiment of the present invention will be described.

  The present embodiment is basically the same in configuration and operation as the first embodiment described above, and high-frequency power is supplied to the upper electrode plate. Is different from the first embodiment described above in that the insulator ring and the silicon electrode are not disposed around the focus ring. Therefore, the description of the same configuration is omitted, and only the operation different from that of the first embodiment will be described below.

  FIG. 5 is a cross-sectional view showing a schematic configuration of the plasma processing apparatus according to the present embodiment.

  In FIG. 5, the plasma processing apparatus 50 includes a high frequency power source 52 connected to the upper electrode plate 39 via a matching unit 51. The high frequency power supply 52 supplies a relatively high frequency, for example, a high frequency power of 60 MHz to the upper electrode plate 39. As a result, the upper electrode plate 39 functions as a high-frequency electrode and applies high-frequency power of 60 MHz to the processing space S. The upper electrode plate 39 is electrically connected to the DC power source 41 and applies a DC voltage to the processing space S.

  An annular silicon electrode 53 made of silicon is disposed around the upper electrode plate 39 so as to be adjacent to the upper electrode plate 39. The silicon electrode 53 has an exposed portion exposed to the processing space S, and is electrically grounded to function as a ground electrode. Further, the silicon electrode 53 constitutes a part of a path of a direct current caused by a direct current voltage applied to the processing space S by the upper electrode plate 39.

  An annular shield ring 54 (insulating portion) made of an insulating material such as quartz is disposed between the upper electrode plate 39 and the silicon electrode 53. Accordingly, the silicon electrode 53 is electrically insulated from the upper electrode plate 39, and the shield ring 54 reliably prevents high frequency power supplied to the upper electrode plate 39 from being applied to the silicon electrode 53.

  In the plasma processing apparatus 50, the high frequency power supply 21 supplies a relatively low frequency, for example, a high frequency power of 2 MHz to the conductor portion 29 of the susceptor 12. Furthermore, an annular cover ring 48 made of quartz is disposed around the focus ring 26 on the susceptor 12 so as to be adjacent to the focus ring 26. The focus ring 26 and the cover ring 48 are in direct contact with each other.

  In the plasma processing apparatus 50, the distance between the silicon electrode 53 and the upper electrode plate 39 is set to any of 0.5 mm to 10 mm, preferably 0.5 mm to 5 mm. At this time, due to the electric field leakage effect of the high frequency power of 60 MHz applied to the processing space S by the upper electrode plate 39, the counter electric field slightly weaker than the counter electric field of the upper electrode plate 39 is also present in the portion of the processing space S facing the silicon electrode 53. Will occur. Then, ions having energy corresponding to the potential difference of the opposing electric field of the silicon electrode 53 collide with the silicon electrode 53, and the insulating film can be removed from the silicon electrode 53 by the collision of the ions. Further, high frequency power of 2 MHz is transmitted to the silicon electrode 53 from the conductor portion 29 of the susceptor 12, and a fluctuating potential that fluctuates at 2 MHz is generated in the exposed portion of the silicon electrode 53. Since ions are attracted to the silicon electrode 53 by the fluctuation potential, the plasma processing apparatus 50 can reliably remove the insulating film from the silicon electrode 53.

  In the plasma processing apparatus 50 described above, the high frequency power supply 21 supplies the high frequency power of 2 MHz to the conductor portion 29 of the susceptor 12, but the high frequency power may not be supplied to the conductor portion 29. Even in this case, the opposing electric field of the silicon electrode 53 is generated due to the electric field leakage effect of the high frequency power of 60 MHz applied to the processing space S by the upper electrode plate 39, so that the insulating film of the silicon electrode 53 can be removed.

  In addition, the substrate on which the RIE processing or the like is performed in the plasma processing apparatuses 10 and 50 described above is not limited to a semiconductor wafer for a semiconductor device, and various substrates used for LCD (Liquid Crystal Display), FPD (Flat Panel Display), etc. It may be a photomask, a CD substrate, a printed circuit board, or the like.

It is sectional drawing which shows schematic structure of the plasma processing apparatus which concerns on the 1st Embodiment of this invention. It is sectional drawing which shows schematic structure of the conventional plasma processing apparatus. It is a graph which shows the relationship between the deposit and the arrangement | positioning location of each component at the time of supplying only the high frequency electric power of 60 MHz to an upper electrode plate. It is a graph which shows the relationship between the electric field strength calculated by simulation, and the arrangement | positioning location of each component when only the high frequency electric power of 60 MHz is supplied to an upper electrode plate. It is sectional drawing which shows schematic structure of the plasma processing apparatus which concerns on the 2nd Embodiment of this invention.

Explanation of symbols

S Processing space W Semiconductor wafers 10, 46, 50 Plasma processing apparatus 11 Substrate processing chamber 12 Susceptor 13 Side wall member 14 Susceptor side surface covering member 21, 47, 52 High frequency power supply 26 Focus ring 27, 53 Silicon electrode 28 Insulator ring 29 Conductor part 30, 48 Cover ring 36 Gas introduction shower head 39 Upper electrode plate 40, 54 Shield ring 41 DC power supply

Claims (5)

A substrate processing chamber having a processing space for performing plasma processing on the substrate; a plate-like upper electrode for applying a DC voltage to the processing space; and the substrate is placed opposite to the upper electrode in the substrate processing chamber; A plasma processing apparatus comprising a base-like lower electrode that applies high-frequency power to the processing space, and a ground electrode that is exposed to the processing space,
An annular focus ring surrounding the substrate placed on the lower electrode in the substrate processing chamber;
The lower electrode and the upper electrode are arranged in parallel with each other with the processing space in between,
The ground electrode is disposed on the lower electrode side in the substrate processing chamber,
The ground electrode and the focus ring are adjacent to each other with an insulating part interposed therebetween,
The distance between the ground electrode and the focus ring is set to be greater than 0 mm and less than 10 mm so that the ground electrode faces a leakage electric field generated by the electric field leakage effect of the high frequency power supplied to the lower electrode. And
A high frequency power is applied to the lower electrode, but no high frequency power is applied to the ground electrode.   The plasma processing apparatus according to claim 1, wherein the strength of the leakage electric field is 20% or more of the strength of the electric field facing the peripheral edge of the lower electrode. It said distance is greater than 0 mm, and the plasma processing apparatus according to claim 1 or 2, wherein the set to 5mm or less. It said distance is greater than 0.5 mm, and the plasma processing apparatus according to claim 1 or 2, wherein the set to 10mm or less. The insulating portion plasma processing apparatus according to any one of claims 1 to 4, characterized in that an insulator or a vacuum space.

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