JP4962261B2 - Method for manufacturing silicon carbide semiconductor device - Google Patents

Description

  The present invention relates to a method for manufacturing a silicon carbide semiconductor device in which a semiconductor device formed on a silicon carbide semiconductor wafer (hereinafter referred to as a SiC wafer) is divided into chips.

  Conventionally, methods for polishing an SiC wafer have been proposed in, for example, Patent Documents 1 and 2. FIG. 6 is a diagram showing a conventional polishing method. In the polishing apparatus 30 shown in this figure, a polishing cloth 32 is attached to a polishing surface plate 31, and a wafer holding table 40 is disposed above the polishing cloth 32. The SiC wafer 50 held on the wafer holding table 40 is in contact with the polishing pad 32 and is sandwiched between the polishing pad 32 and the wafer holding table 40.

  Using such a polishing apparatus 30, CMP (chemical mechanical polishing) processing is performed. That is, a liquid injector 33 is disposed on the polishing cloth 32, and a chemical liquid 34 containing an abrasive is dropped onto the polishing cloth 32 from the liquid injector 33. Then, the surface to be polished of the SiC wafer 50 is pressed against the polishing cloth 32 by the wafer holding table 40, and the wafer holding table 40 and the polishing surface plate 31 are rotated while dropping the chemical liquid 34 on the polishing cloth 32. . Thereby, the SiC wafer 50 is polished.

  The wafer holding table 40 is configured to withstand the processing pressure that presses the SiC wafer 50 against the polishing pad 32. FIG. 7 is a view showing an example of a wafer holding table 40 used for the CMP processing. The wafer holding table 40 shown in FIG. 7 includes a cylindrical chuck table 41, a backing material 42, and a wafer guide 43.

  In the wafer holding table 40 shown in FIG. 7A, the outer edge portion of one end surface of the chuck table 41 is surrounded by the wafer guide 43, and the backing material 42 is formed in the region surrounded by the wafer guide 43. Is arranged. The SiC wafer 50 is disposed on the backing material 42 in the region surrounded by the wafer guide 43. In this case, the surface to be polished of the SiC wafer 50 is in a state of protruding from the wafer guide 43.

  In the wafer holding table 40 shown in FIG. 7B, the backing material 42 is disposed on the chuck table 41, and the outer edge portion of the surface of the backing material 42 opposite to the chuck table 41 is the wafer guide. It is surrounded by 43 around. The SiC wafer 50 is arranged in a region surrounded by the wafer guide 43 so as to protrude from the wafer guide 43 on the backing material 42.

  Further, in the wafer holding table 40 shown in FIG. 7C, a pedestal 44 is disposed on the backing material 42 with respect to that shown in FIG. 7A, and the SiC wafer 50 is placed on the pedestal 44. Is fixed with wax 45.

As the wafer guide 43, a resin or ceramic having a long life is employed. That is, the wafer guide 43 is arranged on the outer peripheral portion of the SiC wafer 50, thereby preventing the SiC wafer 50 from being separated from the wafer holding table 40.
JP 2006-121111 A Japanese Patent Laid-Open No. 2002-16024

  However, in the above-described conventional technique, the SiC wafer 50 is the hardest material next to diamond, and the abrasive for polishing the SiC wafer 50 is generally diamond, and the wafer guide 43 formed of resin or ceramic is used as the SiC wafer. It will be polished before 50. Further, the mechanochemical polishing described in Patent Document 1 also has a problem that the wafer guide 43 is polished first. Thus, when the SiC wafer 50 is polished, it cannot be polished with selectivity so that only the SiC wafer 50 is polished.

  In this case, if the wafer holding table 40 shown in FIGS. 7A and 7B is repeated many times in the polishing process of the SiC wafer 50, the height of the wafer guide 43 gradually decreases, and polishing is performed. The force for holding SiC wafer 50 in the direction parallel to the surface of cloth 32 is reduced. Thereby, if the SiC wafer 50 is detached from the table or held in an unstable state, the processing accuracy is lowered.

  Further, in the wafer holding table 40 shown in FIG. 7C, since the SiC wafer 50 fixed with the wax 45 is separated from the wafer guide 43, the polishing rate of the wafer outer peripheral region is increased and polishing sagging is caused. This occurs, that is, the wafer outer peripheral region is not flat, and the polishing processing accuracy is lowered.

  In view of the above points, an object of the present invention is to prevent a wafer guide provided on a wafer holding table from being polished and to improve the accuracy of polishing a SiC wafer.

  In order to achieve the above object, the present invention provides a polishing step of polishing a plate-like semiconductor substrate (20) formed of silicon carbide and having one surface (21) and the other surface, and polishing the semiconductor substrate (20). A chuck table (11) disposed above the polishing cloth (32) for holding the semiconductor substrate (20) and sandwiching the semiconductor substrate (20) with the polishing cloth (32); ) And a guide (13) which is provided on the surface facing the polishing cloth (32) and which is disposed around the semiconductor substrate (20) and which is directed at least toward the polishing cloth (32). A step of preparing a semiconductor substrate holding table (10), a surface (21) of the semiconductor substrate (20) facing the polishing cloth (32) and a surface (21) of the polishing cloth (3) than the guide (13). A step of disposing the semiconductor substrate (20) on the semiconductor substrate holding table (10) so as to be positioned on the semiconductor substrate holding side, and pressing one surface (21) of the semiconductor substrate (20) against the polishing cloth (32), Polishing one surface (21) of the semiconductor substrate (20) by a mechanochemical method. In the step of preparing the semiconductor substrate holding table (10), the guide (13) is used as the guide (13). Among them, the member facing the polishing cloth (32) has a surface of the surface facing the polishing cloth (32) made of single-crystal silicon carbide and tilted to 1 ° or less from the {0001} plane or {0001} plane. Single crystal silicon carbide is used.

  According to this, since the {0001} surface having the lowest polishing rate in the plane orientation of silicon carbide is used for the guide (13), the difference in polishing rate from the inclined surface of the semiconductor substrate (20) to be polished is Utilizing this, the semiconductor substrate (20) can be selectively polished rather than the guide (13). Thereby, it is possible to prevent the guide (13) from being scraped more than the semiconductor substrate (20) by polishing the semiconductor substrate (20), and it is possible to prevent the guide (13) from being consumed. That is, since the height of the guide (13) can be maintained, the semiconductor substrate (20) can be stably held in the direction parallel to the surface of the polishing pad (32), and the semiconductor substrate (20 ) Processing accuracy can be maintained.

  Further, in the step of arranging the semiconductor substrate (20) on the semiconductor substrate holding table (10), the semiconductor substrate (20) is fixed to the plate-shaped pedestal (14), and the pedestal (14) is fixed to the chuck table (11). Can be installed.

  Thereby, a some semiconductor substrate (20) can be installed in a base (14). Therefore, a large amount of the semiconductor substrate (20) can be polished at a time.

  And what provided the guide (13) in the surface which opposes polishing cloth (32) in the outer periphery of a base (14) can be used.

  Further, in the step of preparing the semiconductor substrate holding table (10), the guide (13) that surrounds the semiconductor substrate (20) can be used. Thereby, the same holding force can be ensured in all directions parallel to the surface of the polishing pad (32).

  As the semiconductor substrate (20), an off-substrate in which the surface orientation of one surface (21) of the semiconductor substrate (20) is inclined by 4 ° or more with respect to the {0001} plane can be used.

  For example, the ratio of the polishing rate of single-crystal silicon carbide with an off angle of 1 ° or less as a guide (13) and single-crystal silicon carbide with an off angle of 4 ° as a semiconductor substrate (20) (semiconductor substrate / guide) Becomes 4 or more. Further, since the surface position of the guide (13) facing the polishing cloth (32) is lower than the surface position of the semiconductor substrate (20), the pressure of the guide (13) received from the polishing cloth (32) is the semiconductor substrate (20). ) Is less than the pressure. Therefore, the ratio of the polishing rate between the semiconductor substrate (20) and the guide (13) is further increased, and the consumption of the guide (13) is suppressed.

  In addition, the code | symbol in the bracket | parenthesis of each said means shows the correspondence with the specific means as described in embodiment mentioned later.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following embodiments, the same or equivalent parts are denoted by the same reference numerals in the drawings.

(First embodiment)
Hereinafter, a first embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a schematic cross-sectional view of a wafer holding table 10 used in the polishing process according to the first embodiment of the present invention. The wafer holding table 10 can be used in the polishing apparatus 30 shown in FIG.

  The wafer holding table 10 holds the SiC wafer 20 during the CMP process, and includes a chuck table 11, a backing material 12, and a wafer guide 13.

  The chuck table 11 has a cylindrical shape and holds the SiC wafer 20. The backing material 12 is a sheet-like resin material disposed on the chuck table 11. The backing material 12 is a cushioning material that can be expected to remove the surface uniformly using an elastic carrier for processing the SiC wafer 20 on the surface basis.

  The wafer guide 13 is a guide for holding the SiC wafer 20 so that the SiC wafer 20 is not detached from the chuck table 11 in the surface direction of the end surface of the chuck table 11. The wafer guide 13 is disposed around the SiC wafer 20.

  In the present embodiment, the wafer guide 13 has a ring shape that encircles and surrounds the outer edge of one end surface of the chuck table 11. The outer diameter is the same as the outer diameter of the chuck table 11, and the inner diameter is the same. The outer diameter of the SiC wafer 20 is substantially the same. That is, the wafer guide 13 has a form that surrounds the SiC wafer 20 in a circle.

  As shown in FIG. 1, a gap is provided between the SiC wafer 20 and the wafer guide 13. Although this gap varies depending on the size of the SiC wafer 20, for example, the SiC wafer 20 and the wafer guide 13 may contact each other. The wafer guide 13 only needs to hold the SiC wafer 20 regardless of the presence or absence of the gap.

  Such a wafer guide 13 includes a first guide portion 13a and a second guide portion 13b. The 1st guide part 13a is a part arrange | positioned on the chuck table 11, and is formed with resin or ceramics.

  The second guide portion 13b is disposed on the first guide portion 13a and is made of SiC. That is, the wafer guide 13 is formed of the same material as that of the SiC wafer 20, that is, silicon carbide (SiC) at least at a portion facing the polishing cloth 32 of the polishing apparatus 30 shown in FIG. 6.

  When polishing the processed surface (Si surface, C surface) of the SiC wafer 20 with an off angle (4 °, 8 °, etc.) used in the device, the surface facing the polishing cloth 32 as the second guide portion 13b However, it is possible to use a SiC substrate in which impurities are not doped on the Si surface and an off angle is 0 °. More specifically, as the second guide portion 13b, the surface of the surface of the second guide portion 13b that faces the polishing pad 32 is a {0001} plane, or a single surface that is inclined by 1 ° or less from the {0001} plane. An on-substrate formed of crystalline silicon carbide is used.

  As for the crystal plane of SiC, the (0001) plane is the Si plane, the (000-1) plane is the C plane, and the {0001} plane is both the Si plane and the C plane.

  As described above, the wafer holding table 10 shown in FIG. 1 has a configuration in which the second guide portion 13b is provided with respect to the configuration of the wafer holding table 40 shown in FIG. That is, it can be said that only the surface layer of the wafer guide 13 is formed of SiC. In addition, you may comprise the 1st guide part 13a with SiC. That is, all the wafer guides 13 can be formed of SiC. In this case, an on-substrate having a surface of the guide 13 facing the polishing pad 32 and having a surface orientation inclined at 1 ° or less from the {0001} plane or the {0001} plane is used.

  The backing material 12 is disposed on the chuck table 11 which is a hollow portion of the wafer guide 13, and the SiC wafer 20 is disposed on the backing material 12. As described above, when the SiC wafer 20 is arranged on the wafer holding table 10, the one surface 21 to be polished of the SiC wafer 20 protrudes from the second guide portion 13 b of the wafer guide 13.

  That is, the portion of the SiC wafer 20 that protrudes from the second guide portion 13b is polished. Therefore, the wafer guide 13 is adjusted to a height in consideration of the thickness of the SiC wafer 20 obtained by polishing. In the case of this embodiment, for example, the thickness of the SiC wafer 20 obtained by polishing the difference in height between the surface of the backing material 12 on which the SiC wafer 20 is disposed and the surface of the second guide portion 13b directed to the polishing pad 32 is obtained. To.

  The above is the configuration of the wafer holding table 10. The SiC wafer 20 corresponds to the semiconductor substrate of the present invention. The wafer holding table 10 corresponds to the semiconductor substrate holding table of the present invention, and the wafer guide 13 corresponds to the guide of the present invention.

  Next, the polishing process using the wafer holding table 10 will be described. In the polishing process, in addition to the wafer holding table 10 shown in FIG. 1, a polishing surface plate 31, a polishing cloth 32, a liquid injector 33, and a chemical solution 34 containing an abrasive are used. .

  When polishing by the CMP method, first, a wafer holding table 10 shown in FIG. 1 is prepared. In this case, in the wafer holding table 10, the height of the wafer guide 13 is optimally adjusted so that the SiC wafer 20 is polished with high accuracy.

  In this case, as the SiC wafer 20, an off substrate in which the surface orientation of one surface 21 of the SiC wafer 20 is inclined by, for example, 4 ° or more with respect to the {0001} plane can be used.

  Then, the surface of the SiC wafer 20 opposite to the one surface 21 to be polished is directed to the backing material 12, and the SiC wafer 20 is accommodated in the hollow portion of the wafer guide 13 on the backing material 12. As a result, one surface 21 of the SiC wafer 20 is positioned closer to the polishing cloth 32 than the second guide portion 13 b of the wafer guide 13.

  Thereafter, the wafer holding table 10 is placed on the polishing cloth 32 in the polishing apparatus 30 shown in FIG. Thereby, SiC wafer 20 is sandwiched between polishing cloth 32 and wafer holding table 10.

  Subsequently, the SiC wafer 20 is pressed against the polishing cloth 32 by the wafer holding table 10, and the chemical liquid 34 is dropped onto the polishing cloth 32 from the liquid injector 33 disposed on the polishing cloth 32, and the wafer holding table 10 and Each polishing surface plate 31 is rotated. Thereby, the surface of SiC wafer 20 is polished chemically and mechanically.

  In this case, the portion of the wafer guide 13 that faces the polishing pad 32, that is, the second guide portion 13b, is formed of SiC, which is the same material as the SiC wafer 20, and therefore the second guide portion 13b is the SiC wafer. It will not be cut faster than 20.

  More specifically, when an off-substrate is used as the SiC wafer 20 to be polished as described above, the ratio of the polishing rate between the second guide portion 13b that is the on-substrate and the SiC wafer 20 that is the off-substrate (SiC wafer) / Guide portion) is, for example, 4 or more. That is, the SiC wafer 20 can be polished using the difference in polishing rate between the second guide portion 13b and the SiC wafer 20. For this reason, the 2nd guide part 13b is hard to be shaved rather than the SiC wafer 20, and is not shaved earlier than the SiC wafer 20.

  The SiC wafer 20 subjected to the CMP process in this manner is divided into individual chips by dicing and cutting the SiC wafer 20 after a step of forming a semiconductor device such as a transistor or a diode. Thereby, the silicon carbide semiconductor device is completed.

  As described above, in the present embodiment, in the wafer holding table 10, at least the second guide portion 13 b facing the polishing pad 32 among the wafer guides 13 for holding the SiC wafer 20 is the same as the SiC wafer 20. It is characterized by using SiC as a material. More specifically, as the second guide portion 13b, a surface in which the surface orientation of the surface of the second guide portion 13b facing the polishing pad 32 is inclined by 1 ° or less from the {0001} plane and the {0001} plane. It is characterized by using an on-substrate. Furthermore, the {0001} plane is good when the (0001) plane that is the Si plane is used, because the polishing rate is slower than the (000-1) plane that is the C plane.

  According to this, the polishing speed of the on-substrate is slower than that of the SiC wafer 20 that is the off-substrate, and the pressure received from the polishing cloth is lower than that of the SiC wafer 20 in the second guide portion 13b. 13 consumption can be suppressed. For this reason, the wafer guide 13 can be used as a long-life guide.

  Further, since the wafer guide 13 can be prevented from being shaved, the height of the wafer guide 13 can be maintained. Thereby, the force for holding SiC wafer 20 in wafer guide 13 can be maintained, and SiC wafer 20 can be polished stably and with high accuracy.

  As described above, at least the second guide portion 13b of the wafer guide 13 is formed of SiC and has little deterioration, and therefore can be used many times for polishing.

  Then, by using a ring-shaped one that surrounds the SiC wafer 20 as the wafer guide 13, the same holding force can be secured in all the surface directions of the polishing pad 32 when the SiC wafer 20 is held. That is, the SiC wafer 20 can be stably held.

(Second Embodiment)
In the present embodiment, only different parts from the first embodiment will be described. FIG. 2 is a schematic cross-sectional view of a wafer holding table used in the method for manufacturing a silicon carbide semiconductor device according to the present embodiment. As shown in this figure, a backing material 12 is disposed on the chuck table 11, and a wafer guide 13 is disposed on the backing material 12. In this case, the height of the wafer guide 13 is adjusted with reference to one surface of the backing material 12 so that the SiC wafer 20 can be polished accurately after polishing. Thus, the wafer guide 13 can be provided on the backing material 12.

(Third embodiment)
In the present embodiment, only different parts from the first embodiment will be described. FIG. 3 is a schematic cross-sectional view of a wafer holding table used in the method for manufacturing a silicon carbide semiconductor device according to this embodiment. As shown in this figure, the wafer holding table 10 is provided with a pedestal 14 on a backing material 12, and an SiC wafer 20 is fixed on the pedestal 14 with wax 15. In this case, the height of the wafer guide 13 is adjusted so that the SiC wafer 20 placed on the pedestal 14 can be polished accurately.

  Thereby, since the force is not applied nonuniformly to the one surface 21 of the SiC wafer 20 by the wafer guide 13, the deterioration of the polishing accuracy can be suppressed, and the processing quality can be improved.

  As described above, when the SiC wafer 20 is fixed to the pedestal 14, a plurality of SiC wafers 20 can be fixed to one pedestal 14, which is effective when simultaneously polishing a large number of SiC wafers 20.

(Fourth embodiment)
In the present embodiment, only different portions from the above embodiments will be described. FIG. 4 is a schematic cross-sectional view of a wafer holding table used in the method for manufacturing a silicon carbide semiconductor device according to this embodiment. As shown in this figure, the wafer holding table 10 is provided with a bank portion 16 at the outer edge portion of the chuck table 11, and a backing material 12 is disposed in a portion surrounded by the bank portion 16.

  A pedestal 14 is disposed on the backing material 12, and a wafer guide 13 is disposed on the outer edge of the pedestal 14. In the present embodiment, the SiC wafer 20 is fixed to the region surrounded by the wafer guide 13 with the wax 15. Also in this embodiment, the height of the wafer guide 13 is adjusted so that the polished SiC wafer 20 is polished with high accuracy.

  In this way, the wafer guide 13 can be provided on the base 14. According to this, the base 14 can be easily detached from the chuck table 11. That is, the chuck table 11 provided with the bank portion 16 can be used as a common member, and the wafer guide 13 and the SiC wafer 20 can be replaced in units of the base 14.

  In FIG. 4, SiC wafer 20 and wafer guide 13 are in contact with each other, but as shown in FIG. 1, there may be a gap between SiC wafer 20 and wafer guide 13.

(Other embodiments)
In each of the above embodiments, the backing material 12 is disposed on the chuck table 11. However, for example, the position of the SiC wafer 20 with respect to the wafer guide 13 can be adjusted by blowing air from the chuck table 11. Conversely, the SiC wafer 20 and the pedestal 14 can be sucked by sucking air from the chuck table 11.

  In each of the embodiments described above, the backing material 12 is provided on the wafer holding table 10, but the backing material 12 is not essential and may not be provided on the wafer holding table 10.

  In the fourth embodiment, the case where one SiC wafer 20 is fixed to the pedestal 14 has been described. However, a plurality of SiC wafers 20 may be fixed to the pedestal 14 as in the third embodiment.

  In each of the above embodiments, the wafer guide 13 is used to hold the SiC wafer 20, but a retainer ring can also be used. The retainer ring is the same as the wafer guide 13 and is used to prevent the SiC wafer 20 from being detached from the wafer holding table 10 during polishing and to ensure the uniformity of the processed surface. . Further, the one for maintaining the surface reference can be applied not only to holding the backing material 12 but also to an air bag or the like. The retainer ring corresponds to the guide of the present invention, like the wafer guide 13.

  In addition, as shown in FIG. 5, the wafer guide 13 does not only surround the entire circumference of the SiC wafer 20, but can hold the SiC wafer 20 at a constant distance from the SiC wafer 20 even in a spaced state. It ’s fine.

  In addition, when indicating the orientation of a crystal, a bar (-) should be added to a desired number, but there is a limitation in expression based on a personal computer application. A bar shall be placed in front of the number.

It is a schematic sectional drawing of the table for wafer holding used for the manufacturing method of the silicon carbide semiconductor device which concerns on 1st Embodiment of this invention. It is a schematic sectional drawing of the wafer holding table used for the manufacturing method of the silicon carbide semiconductor device which concerns on 2nd Embodiment of this invention. It is a schematic sectional drawing of the table for wafer holding used for the manufacturing method of the silicon carbide semiconductor device which concerns on 3rd Embodiment of this invention. It is a schematic sectional drawing of the table for wafer holding used for the manufacturing method of the silicon carbide semiconductor device which concerns on 4th Embodiment of this invention. In other embodiment, it is the figure which showed an example of the wafer guide. It is the figure which showed the method of the conventional grinding | polishing process. It is the figure which showed the example of the table for wafer holding conventionally used for CMP process.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10 ... Wafer holding table, 11 ... Chuck table, 13 ... Wafer guide, 14 ... Base, 20 ... SiC wafer as semiconductor substrate, 21 ... One side of SiC wafer, 32 ... Polishing cloth

Claims (5)

A method for manufacturing a silicon carbide semiconductor device comprising a polishing step of polishing a plate-like semiconductor substrate (20) formed of silicon carbide and having one surface (21) and the other surface,
The polishing step includes
The semiconductor substrate (20) is disposed above a polishing cloth (32) for polishing, holds the semiconductor substrate (20), and holds the semiconductor substrate (20) between the polishing cloth (32). A chuck table (11) to be sandwiched;
Of the chuck table (11), provided on the surface facing the polishing cloth (32) and disposed around the semiconductor substrate (20), at least a portion directed to the polishing cloth (32) is made of silicon carbide. Preparing a semiconductor substrate holding table (10) having a guide (13) formed;
The semiconductor substrate (20) so that one surface (21) faces the polishing cloth (32) and the one surface (21) is located closer to the polishing cloth (32) than the guide (13). Placing the semiconductor substrate (20) on a holding table (10);
Pressing one surface (21) of the semiconductor substrate (20) against the polishing cloth (32) and polishing one surface (21) of the semiconductor substrate (20) by a CMP method or a mechanochemical method,
In the step of preparing the semiconductor substrate holding table (10), as the guide (13), a member of the guide (13) facing the polishing cloth (32) is made of single-crystal silicon carbide with the polishing cloth ( 32) A method for manufacturing a silicon carbide semiconductor device, comprising using a single crystal silicon carbide having a plane orientation opposite to the {0001} plane or a plane inclined by 1 ° or less from the {0001} plane. In the step of disposing the semiconductor substrate (20) on the semiconductor substrate holding table (10), the semiconductor substrate (20) is fixed to a plate-shaped pedestal (14), and the pedestal (14) is fixed to the chuck table (14). The method for manufacturing a silicon carbide semiconductor device according to claim 1, wherein the method is provided in 11). In the step of arranging the semiconductor substrate (20) on the semiconductor substrate holding table (10), the pedestal (14) provided with a guide (13) on the surface facing the polishing pad (32). The method for manufacturing a silicon carbide semiconductor device according to claim 2, wherein the method is used. The step of preparing the semiconductor substrate holding table (10) uses, as the guide (13), one that surrounds the semiconductor substrate (20) around the semiconductor substrate (20). A method for manufacturing a silicon carbide semiconductor device according to claim 1. 5. The off-substrate as claimed in claim 1, wherein a surface orientation of one surface (21) of the semiconductor substrate (20) is tilted by 1 ° or more with respect to the {0001} plane as the semiconductor substrate (20). The manufacturing method of the silicon carbide semiconductor device as described in any one.

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