JP2014017358A - Silicon carbide substrate and manufacturing method of the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a silicon carbide substrate having less warpage.SOLUTION: A manufacturing method of a silicon carbide substrate 10 comprises the processes of: forming a first intermediate substrate 11 having a first principal surface 11A and a second principal surface 11B which are opposite to each other and having a first SORI value 21 by slicing a silicon carbide ingot 1; forming a second intermediate substrate 12 having a second SORI value 22 smaller than the first SORI value by etching at least one of the first principal surface 11A and the second principal surface 11B of the first intermediate substrate 11; and forming a third intermediate substrate 13 having a third SORI value 23 smaller than the second SORI value 22 by polishing at least one of a first principal surface 12A and a second principal surface 12B of the second intermediate substrate 12.

Description

  The present invention relates to a silicon carbide substrate and a manufacturing method thereof, and more particularly to a silicon carbide substrate capable of reducing warpage of a silicon carbide substrate and a manufacturing method thereof.

  In recent years, silicon carbide substrates have begun to be used for manufacturing semiconductor devices. Silicon carbide has a larger band gap than silicon, a high breakdown electric field, and a high saturation electron mobility. Therefore, a semiconductor device using a silicon carbide substrate has a high temperature environment. It has excellent characteristics such as low characteristic deterioration, high breakdown voltage, and low on-resistance.

  For example, Japanese Patent Laying-Open No. 2008-374617 (Patent Document 1) discloses a method for manufacturing a silicon carbide substrate. This publication discloses a method in which a silicon carbide substrate is cut out by cutting a lump of silicon carbide with a wire saw, and then the work-affected layer is removed using a lapping apparatus. In addition, according to the method for manufacturing a silicon carbide substrate described in the publication, it is disclosed that a silicon carbide substrate having a warpage of ± 50 μm or less and a surface roughness Ra of 1 nm or less can be manufactured.

JP 2008-374617 A

  However, when a silicon carbide substrate is cut out from a lump of silicon carbide with a wire saw, a large warp may occur depending on the cutting direction. When polishing a silicon carbide substrate having such a large warp, it is difficult to attach it to the polishing plate with high accuracy, or the silicon carbide substrate may fall off from the polishing carrier, and thus a good polishing is performed. It was difficult to do. Therefore, it has been difficult to manufacture a silicon carbide substrate with a small warpage.

  The present invention has been made to solve the above-described problems, and provides a silicon carbide substrate having a small warpage.

  The method for manufacturing a silicon carbide substrate according to the present invention includes the following steps. By slicing the silicon carbide ingot, a first intermediate substrate having a first main surface and a second main surface facing each other and having a first SORI value is formed. By etching at least one of the first main surface and the second main surface of the first intermediate substrate, a second intermediate substrate having a second SORI value smaller than the first SORI value is formed. By polishing at least one of the first main surface and the second main surface of the second intermediate substrate, a third intermediate substrate having a third SORI value smaller than the second SORI value is formed.

  According to the method for manufacturing a silicon carbide substrate according to the present invention, by etching at least one of the first main surface and the second main surface of the first intermediate substrate, the second lower than the first SORI value is obtained. A second intermediate substrate having a SORI value is formed. Thereafter, at least one of the first main surface and the second main surface of the second intermediate substrate is polished. That is, after reducing the warp of the silicon carbide substrate by etching, a step of polishing the silicon carbide substrate is performed. With this measure, it is possible to suppress the occurrence of malfunctions in which the silicon carbide substrate is not accurately attached to the polishing plate due to the large warp of the conventional silicon carbide substrate or falls off the polishing carrier during polishing. . As a result, the warp of the silicon carbide substrate can be reduced by satisfactorily polishing the silicon carbide substrate.

  In the above method for manufacturing a silicon carbide substrate, preferably, each of the first main surface and the second main surface of the third intermediate substrate is subjected to CMP. Thereby, the curvature of a silicon carbide substrate can be reduced more.

  Preferably, in the method for manufacturing the silicon carbide substrate, the step of forming the third intermediate substrate is performed by simultaneously polishing each of the first main surface and the second main surface of the second intermediate substrate. Thereby, the curvature of a silicon carbide board | substrate can be reduced, shortening the manufacturing time of a silicon carbide board | substrate.

  Preferably, in the method for manufacturing the silicon carbide substrate, the step of forming the second intermediate substrate includes wet etching using potassium hydroxide on at least one of the first main surface and the second main surface of the first intermediate substrate. The process of performing. Thereby, the 2nd intermediate substrate with small curvature can be manufactured efficiently.

  Preferably, in the method for manufacturing the silicon carbide substrate, the step of forming the second intermediate substrate uses chlorine gas or fluorine gas for at least one of the first main surface and the second main surface of the first intermediate substrate. Including a step of performing dry etching. Thereby, the 2nd intermediate substrate with small curvature can be manufactured efficiently.

  Preferably, in the method for manufacturing the silicon carbide substrate, the step of forming the second intermediate substrate is performed by etching each of the first main surface and the second main surface of the first intermediate substrate. Thereby, the 2nd intermediate substrate with small curvature can be manufactured more efficiently.

  Preferably, in the method for manufacturing the silicon carbide substrate, in the step of forming the second intermediate substrate, the first intermediate substrate is etched so as to reduce the SORI value in a direction perpendicular to the direction of slicing the ingot. The warp of the first intermediate substrate is likely to occur in a direction perpendicular to the direction of slicing the ingot. By etching so as to reduce the SORI value in the direction perpendicular to the direction of slicing the ingot, the second intermediate substrate with less warpage can be manufactured more efficiently.

  The silicon carbide substrate according to the present invention has a first main surface and a second main surface that face each other. The surface roughness Rms of the first main surface is 0.2 nm or less. The surface roughness Rms of the second main surface is less than 10 nm. The SORI value is 23 μm or less and the TTV value is 3 μm or less. The diameter is 4 inches or more.

  According to the present invention, a silicon carbide substrate with small warpage can be obtained.

1 is a perspective view schematically showing a configuration of a silicon carbide substrate according to a first embodiment of the present invention. It is a cross-sectional schematic diagram which shows schematically the structure of the silicon carbide substrate which concerns on Embodiment 1 of this invention. It is a plane schematic diagram for demonstrating the definition of SORI and TTV. It is a cross-sectional schematic diagram for demonstrating the definition of SORI and TTV. It is a cross-sectional schematic diagram for demonstrating the definition of SORI and TTV. It is a flowchart which shows schematically the manufacturing method of the silicon carbide substrate which concerns on Embodiment 1 of this invention. FIG. 5 is a schematic plan view schematically showing a slicing step in the method for manufacturing the silicon carbide substrate according to the first embodiment of the present invention. It is a front schematic diagram which shows roughly the slice process of the manufacturing method of the silicon carbide substrate which concerns on Embodiment 1 of this invention. It is a plane schematic diagram for demonstrating the direction of SORI of the silicon carbide substrate which concerns on Embodiment 1 of this invention. It is a cross-sectional schematic diagram which shows schematically the grinding | polishing process of the manufacturing method of the silicon carbide substrate which concerns on Embodiment 1 of this invention. It is a cross-sectional schematic diagram which shows schematically the 1st intermediate substrate which concerns on Embodiment 1 of this invention. It is a cross-sectional schematic diagram which shows schematically the 2nd intermediate substrate which concerns on Embodiment 1 of this invention. It is a cross-sectional schematic diagram which shows schematically the 3rd intermediate substrate which concerns on Embodiment 1 of this invention. It is a cross-sectional schematic diagram which shows schematically the 4th intermediate substrate which concerns on Embodiment 1 of this invention. It is a flowchart which shows schematically the manufacturing method of the silicon carbide substrate which concerns on Embodiment 2 of this invention. It is a cross-sectional schematic diagram which shows schematically the grinding | polishing process of the manufacturing method of the silicon carbide substrate which concerns on Embodiment 2 of this invention. FIG. 10 is a schematic plan view for illustrating the positional relationship between the carrier and the second intermediate substrate in the polishing step of the method for manufacturing the silicon carbide substrate according to the second embodiment of the present invention.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following drawings, the same or corresponding parts are denoted by the same reference numerals, and description thereof will not be repeated.

  In the crystallographic description in this specification, the individual orientation is indicated by [], the collective orientation is indicated by <>, the individual plane is indicated by (), and the collective plane is indicated by {}. As for the negative index, “−” (bar) is attached on the number in crystallography, but in this specification, a negative sign is attached before the number. The angle is described using a system in which the omnidirectional angle is 360 degrees.

(Embodiment 1)
With reference to FIG. 1 and FIG. 2, the structure of the silicon carbide substrate according to the first embodiment of the present invention will be described.

  As shown in FIGS. 1 and 2, silicon carbide substrate 10 according to the first embodiment of the present invention has first main surface 10A and second main surface 10B facing each other. Silicon carbide substrate 10 is made of, for example, single crystal silicon carbide. Single crystal silicon carbide has a hexagonal crystal structure, for example, and the polytype is 4H, for example. At least one of the first main surface 10A and the second main surface 10B is, for example, a {03-38} surface. At least one of the first main surface 10A and the second main surface 10B may be, for example, a {0-11-1} plane or a {0-11-2} plane, with respect to the {000-1} plane. The surface may have a macroscopic off angle of 62 ° ± 10 °.

  The first main surface 10A is a mirror-treated surface, and the surface roughness Rms (root mean square surface roughness) of the first main surface 10A is 0.2 nm or less. The second main surface 10B is the back surface, and the surface roughness Rms (root mean square surface roughness) of the second main surface is less than 10 nm. The surface roughness Rms can be measured by, for example, an AFM (Atomic Force Microscope).

  The surface roughness Rms (root mean square surface roughness) of the first main surface 10A according to the present embodiment is, for example, about 0.073 nm, and the surface roughness Ra (average surface roughness) of the first main surface 10A. Is, for example, about 0.057 nm. Further, the surface roughness Rms (root mean square surface roughness) of the second main surface 10B is, for example, about 4 to 6 nm. Silicon carbide substrate 10 in the present embodiment is, for example, 4 inches or more, has a SORI (warp) value of 23 μm or less, and a TTV (Total Thickness Variation) value of 3 μm or less.

Next, the definition of the SORI value and the TTV value will be described with reference to FIGS.
The SORI value will be described with reference to FIG. 3 and FIG. The SORI value is one of parameters for quantifying the degree of warpage of the silicon carbide substrate. The SORI value is obtained at position 3 (highest point) of the first main surface 10A when the minimum square surface of the first main surface 10A of the silicon carbide substrate 10 is set to a reference height (minimum square surface height 6). This represents the total value of the distance between the height and the reference height and the distance between the height at position 4 (lowest point) and the reference height. Since the SORI value represents a distance, it is always a positive value. The SORI value is calculated for silicon carbide substrate 10 that is not clamped.

  The SORI value represents the degree of warpage in a certain measurement range. For example, the SORI value is determined between a position 7 of silicon carbide substrate 10 and another position 3 (range d). In the present embodiment, the SORI value of silicon carbide substrate 10 is the SORI value between any two points in the main surface (first main surface 10A or second main surface 10B) of silicon carbide substrate 10. It refers to the maximum SORI value.

  Usually, the SORI value of first main surface 10A facing each other and the SORI value of second main surface 10B are substantially the same value, so that the SORI value of silicon carbide substrate 10 is uniquely determined. If the SORI value of first main surface 10A is different from the SORI value of second main surface 10B, the SORI value of silicon carbide substrate 10 is the SORI value of first main surface 10A and the second SORI value. Of the SORI values of the main surface 10B, this is a large SORI value.

  The TTV value is one of parameters for quantifying the variation in the thickness of the silicon carbide substrate 10. For example, it is assumed that one main surface (for example, second main surface 10B) is a flat surface among first main surface 10A and second main surface 10B facing each other of silicon carbide substrate 10. At this time, virtual silicon carbide substrate 10 in which the height of first main surface 10A opposite to second main surface 10B is determined so as to be equal to the thickness at each position of silicon carbide substrate 10 is shown in FIG. . When the maximum thickness of the virtual silicon carbide substrate 10 shown in FIG. 5 is T1 and the minimum thickness is T2, the TTV value is a value calculated as the difference between the maximum thickness and the minimum thickness (ie, T1−T2). The TTV value is calculated for silicon carbide substrate 10 whose back surface is clamped.

  Next, a method for manufacturing silicon carbide substrate 10 according to the first embodiment of the present invention will be described with reference to FIG.

  First, an ingot slicing step (S10: FIG. 6) is performed. Specifically, ingot 1 made of silicon carbide is fixed by a base (not shown) made of carbon, for example. As shown in FIG. 7, the ingot 1 fixed to the pedestal is placed on the stage 8 of the slicer. A plurality of saw wires 5 are arranged above the stage 8. The ingot 1 is arranged so that the main surface of the intermediate substrate cut out by the saw wire 5 becomes a desired surface. For example, the ingot 1 is arranged on the slicer stage 8 so that the angle φ formed by the growth direction a of the ingot 1 (that is, the <0001> direction) and the extending direction of the saw wire 5 is, for example, 54.7 °. The

  Next, referring to FIG. 8, the saw wire 5 and the ingot 1 are relatively brought closer to each other while the saw wire 5 is reciprocated along the extending direction S of the saw wire 5. In this case, the saw wire 5 may approach the ingot 1, or the ingot 1 may approach the saw wire 5. When the ingot 1 comes into contact with the saw wire 5 and the saw wire 5 reciprocates along the extending direction S, the cutting of the ingot 1 is started. For example, the ingot 1 is cut by moving the ingot 1 in a direction perpendicular to the extending direction S of the saw wire 5. In the present specification, the direction Z for slicing the ingot 1 is the direction in which the ingot 1 or the saw wire 5 has moved from the start of cutting the ingot 1 to the end of cutting. The ingot 1 may be cut using loose abrasive grains, for example, using fixed abrasive grains fixed to a wire. For the cutting of the ingot 1, for example, diamond abrasive grains are used.

  As described above, by slicing ingot 1 made of silicon carbide, first intermediate substrate having first main surface 11A and second main surface 11B facing each other and having first SORI value 21 11 (see FIG. 11) is formed. Referring to FIG. 9, for example, when first intermediate substrate 11 having first main surface 11A of (03-38) is formed, slice direction (X direction) of ingot 1 (that is, <11-20). The first SORI value 21 along the direction <01-10> (Y direction) is about 13 μm (measurement range 40 mm). About 10 μm (measurement range 20 mm) and the radius of curvature is 5 m. In other words, in terms of a 4-inch substrate, the SORI value is about 250 μm immediately after slicing.

  Next, a substrate etching step (S20: FIG. 6) is performed. In this step (S20: FIG. 6), at least one of the first main surface 11A and the second main surface 11B of the first intermediate substrate 11 cut out in the step (S10: FIG. 6) is etched. Preferably, each of first main surface 11A and second main surface 11B of first intermediate substrate 11 is etched. Etching may be wet etching or dry etching. As a specific example of wet etching, for example, etching is performed by immersing the first intermediate substrate 11 in molten KOH (potassium hydroxide) at about 520 ° C. The time of immersion in molten KOH is, for example, 5 minutes or more and 8 minutes or less. The removal amount of the first intermediate substrate 11 by the etching is, for example, about 3 μm to 10 μm. As a specific example of dry etching, for example, etching is performed in an atmosphere in which chlorine gas and oxygen gas are introduced into at least one of first main surface 11A and second main surface 11B of first intermediate substrate 11. Preferably, dry etching is performed using chlorine gas or fluorine gas. The removal amount of the first intermediate substrate 11 by the etching is, for example, about 1 μm to 3 μm.

  As described above, part or all of the work-affected layer formed on the first main surface 11A and the second main surface 11B of the first intermediate substrate 11 is removed in the step (S10: FIG. 6). Thereby, the warp of the first intermediate substrate 11 is reduced. In other words, by etching at least one of the first main surface 11A and the second main surface 11B of the first intermediate substrate 11, the second intermediate having a second SORI value 22 smaller than the first SORI value 21. A substrate 12 (see FIG. 12) is formed. The second SORI value 22 in the second intermediate substrate 12 along the direction perpendicular to the slicing direction (that is, <01-10> direction) is, for example, about 2 μm (measurement range 20 mm), and the curvature radius is 25 m. In terms of a 4-inch substrate, an SORI value of about 50 μm is obtained by etching after slicing. It is significantly smaller than the SORI value 21 (10 μm (measurement range 20 mm)) immediately after the first slice processing described above.

  In the substrate etching step (S20: FIG. 6), the first main surface 11A and the second main surface 11A of the first intermediate substrate 11 are preferably reduced so that the SORI value in the direction perpendicular to the direction of slicing the ingot 1 is reduced. Either one of the main surfaces 11B is etched. In other words, by etching the first intermediate substrate 11 having the first SORI value 21 in the direction perpendicular to the direction in which the ingot 1 is sliced, the first SORI value 21 in the direction perpendicular to the direction in which the ingot 1 is sliced. A second intermediate substrate 12 having a smaller second SORI value 22 is formed.

  Next, a substrate pasting step (S30: FIG. 6) is performed. In this step (S30: FIG. 6), the second intermediate substrate 12 formed in the above step (S20: FIG. 6) is fixed to the polishing plate. Specifically, referring to FIG. 10, second intermediate substrate 12 having second SORI value 22 is fixed to polishing plate 40 via adhesive 30. At this time, for example, the second intermediate substrate 12 is disposed so that the side having the convex warpage of the second intermediate substrate 12 (for example, the first main surface 12A) is in contact with the adhesive 30. The second intermediate substrate 12 may be fixed to the polishing plate 40 in a state where only the central portion is in contact with the adhesive 30 and the outer peripheral portion is not in contact with the adhesive 30.

  As the polishing plate 40, for example, a porous ceramic plate may be used. In this case, the second intermediate substrate 12 is attracted to the polishing plate 40 by vacuuming and fixed to the polishing plate 40. That is, the second intermediate substrate 12 is fixed to the polishing plate 40 without using the adhesive 30.

  When the second intermediate substrate 12 is fixed to the polishing plate 40 using the adhesive 30, the second intermediate substrate 12 having a large warp has a smaller area in contact with the adhesive 30 than the second intermediate substrate 12 having a small warp. . Further, when the second intermediate substrate 12 is fixed to the polishing plate 40 by evacuation, the second intermediate substrate 12 having a large warp has a smaller area in contact with the polishing plate 40 than the second intermediate substrate 12 having a small warp. Therefore, regardless of which method is used to fix the polishing plate 40 to the polishing plate 40, the second intermediate substrate 12 having a large warpage is compared with the second intermediate substrate 12 having a small warpage by the polishing plate 40. The holding force is reduced. Therefore, the second intermediate substrate 12 having a large warp is more easily dropped from the polishing plate 40 than the second intermediate substrate 12 having a small warp. In the manufacturing method according to the first embodiment, before the second intermediate substrate 12 is attached to the polishing plate 40, an etching process is performed to reduce warpage. Therefore, it is possible to effectively suppress the second intermediate substrate 12 from dropping from the polishing plate 40 in the subsequent polishing process.

  Next, a second main surface lapping step (S40: FIG. 6) is performed. Specifically, a part of the second intermediate substrate 12 is removed by polishing the back surface (second main surface 12B) of the second intermediate substrate 12 using abrasive grains. As shown in FIG. 10, the second main surface 12 </ b> B of the second intermediate substrate 12 fixed to the polishing plate 40 is disposed so as to face the lapping platen 50. For example, by rotating the surface plate 50 with respect to the second main surface 12B while flowing a slurry containing abrasive grains between the surface plate 50 and the second main surface 12B, the second intermediate substrate 12 can be rotated. Second main surface 12B is polished. Here, for example, diamond abrasive grains are used as the abrasive grains, and the grain diameter of the diamond abrasive grains is, for example, about 1 to 6 μm. For example, iron, copper, tin or the like can be used as the surface plate 50 for lapping.

  Next, a second main surface MP (Mechanical Polishing) step (S50: FIG. 6) is performed. Specifically, a part of the second intermediate substrate 12 is removed by mechanically polishing the back surface (second main surface 12B) of the second intermediate substrate 12 using abrasive grains. As the abrasive grains, for example, diamond abrasive grains are used, and the grain diameter of the diamond abrasive grains is, for example, 0.1 μm or more and 3 μm or less. Further, as the surface plate 50 for MP, a metal surface plate such as tin or tin alloy, a resin surface plate, a polishing cloth, or the like can be used.

  As described above, the third intermediate substrate 13 having the third SORI value 23 smaller than the second SORI value 22 is obtained by polishing the second main surface 12B of the second intermediate substrate 12 (see FIG. 13). Is formed.

  Next, a second main surface CMP step (S60: FIG. 6) is performed. Specifically, CMP (Chemical Mechanical Polishing) is performed on the second main surface 13B of the third intermediate substrate 13 on which the MP process has been performed in the above step (S50: FIG. 6). CMP abrasive grains are required to be softer than silicon carbide in order to reduce the surface roughness and the work-affected layer. As abrasive grains for CMP, for example, colloidal silica, fumed silica, alumina, or the like is used. Moreover, a nonwoven fabric or suede can be used as the polishing cloth for CMP. Accordingly, the fourth intermediate substrate 14 having the first main surface 14A and the second main surface 14B facing each other and having the fourth SORI value 24 smaller than the third SORI value 23 (see FIG. 14). Is formed. As shown in FIG. 14, the warping direction may be reversed (for example, changed from a concave shape to a convex shape) by this step (S60: FIG. 6).

  Next, a substrate peeling step (S70: FIG. 6) is performed. Specifically, the fourth intermediate substrate 14 that has been subjected to the CMP process in the above step (S60: FIG. 6) is peeled from the polishing plate 40. Next, in order to perform processing such as mechanical polishing on the first main surface 14A of the fourth intermediate substrate 14, the fourth intermediate substrate 14 is attached to the polishing plate so that the second main surface 14B is in contact with the adhesive 30. Fix to 40.

  Next, a first main surface lapping step (S80: FIG. 6) is performed. Specifically, the first main surface 14A of the fourth intermediate substrate 14 is arranged to face the surface plate 50 by the same method as in the second main surface lapping step (S40). The surface (first main surface 14A) is polished.

  Next, the first main surface MP step (S90: FIG. 6) is performed. Specifically, the first main surface 14A of the fourth intermediate substrate 14 is mechanically polished by the same method as in the second main surface MP step (S50: FIG. 6).

  Next, a first main surface CMP step (S100: FIG. 6) is performed. Specifically, the first main surface 14A of the fourth intermediate substrate 14 is chemically mechanically polished by the same method as in the second main surface CMP step (S60: FIG. 6).

  Next, a substrate cleaning process (S110: FIG. 6) is performed. For example, the fourth intermediate substrate 14 is cleaned by immersing the fourth intermediate substrate 14 in the cleaning liquid and applying ultrasonic waves to the cleaning liquid. The frequency of the ultrasonic waves can be, for example, 50 kHz or more and 2 MHz or less.

  Through the above steps, silicon carbide substrate 10 having first main surface 10A and second main surface 10B facing each other is completed. The surface roughness Rms of the surface (first main surface 10A) of silicon carbide substrate 10 manufactured by the manufacturing method according to the present embodiment is, for example, about 0.073 nm, and the back surface (second main surface 10B) The surface roughness Rms is, for example, about 4 to 6 nm. Silicon carbide substrate 10 has a SORI value of, for example, about 22.1 μm (measurement range of 4 inches), and a TTV value of, for example, about 2.7 μm (measurement range of 4 inches).

Next, the function and effect of the first embodiment will be described.
According to the method for manufacturing silicon carbide substrate 10 according to the first embodiment, the first SORI value is obtained by etching at least one of first main surface 11A and second main surface 11B of first intermediate substrate 11. A second intermediate substrate 12 having a second SORI value 22 smaller than 21 is formed. Thereafter, at least one of the first main surface 12A and the second main surface 12B of the second intermediate substrate 12 is polished. That is, after reducing the warp of silicon carbide substrate 10 by etching, a step of polishing silicon carbide substrate 10 is performed. Therefore, it is possible to prevent the silicon carbide substrate 10 from dropping from the polishing plate 40 during polishing because the warp of the silicon carbide substrate 10 is large. As a result, the warp of silicon carbide substrate 10 can be reduced by favorably polishing second intermediate substrate 12.

  According to the method for manufacturing silicon carbide substrate 10 according to the first embodiment, each of first main surface 13A and second main surface 13B of third intermediate substrate 13 is subjected to the CMP process. Thereby, the curvature of silicon carbide substrate 10 can be further reduced.

  Furthermore, according to the method for manufacturing silicon carbide substrate 10 according to the first embodiment, the step of forming second intermediate substrate 12 includes at least first main surface 11A and second main surface 11B of first intermediate substrate 11. On the other hand, a step of performing wet etching using potassium hydroxide may be included. Thereby, the 2nd intermediate substrate 12 with small curvature can be manufactured efficiently.

  Furthermore, according to the method for manufacturing silicon carbide substrate 10 according to the first embodiment, the step of forming second intermediate substrate 12 includes at least first main surface 11A and second main surface 11B of first intermediate substrate 11. On the other hand, a step of performing dry etching using chlorine gas or fluorine gas may be included. Thereby, the 2nd intermediate substrate 12 with small curvature can be manufactured efficiently.

  Furthermore, according to the method for manufacturing silicon carbide substrate 10 according to the first embodiment, the step of forming second intermediate substrate 12 includes the steps of first main surface 11A and second main surface 11B of first intermediate substrate 11. Is performed by etching. Thereby, the 2nd intermediate substrate 12 with small curvature can be manufactured more efficiently.

  Furthermore, according to the method for manufacturing silicon carbide substrate 10 according to the first embodiment, in the step of forming second intermediate substrate 12, the first SORI value is reduced so as to reduce the SORI value in the direction perpendicular to direction Z for slicing ingot 1. The intermediate substrate 11 is etched. The warp of the first intermediate substrate 11 is likely to occur in a direction perpendicular to the direction in which the ingot 1 is sliced. By etching so as to reduce the SORI value in the direction perpendicular to the direction in which the ingot 1 is sliced, the second intermediate substrate 12 with less warpage can be manufactured more efficiently.

(Embodiment 2)
Next, a method for manufacturing the silicon carbide substrate according to the second embodiment of the present invention will be described with reference to FIG.

  First, an ingot slicing step (S11: FIG. 15) is performed. Specifically, by slicing ingot 1 made of silicon carbide by the same method as the ingot slicing step (S10: FIG. 6) described in the first embodiment, first main surface 11A and first A first intermediate substrate 11 (see FIG. 11) having two main surfaces 11B and having a first SORI value 21 is formed.

  Next, a substrate etching step (S21: FIG. 15) is performed. Specifically, at least one of the first main surface 11A and the second main surface 11B of the first intermediate substrate 11 is formed by the same method as the substrate etching step (S20: FIG. 6) described in the first embodiment. By etching, a second intermediate substrate 12 having a second SORI value 22 smaller than the first SORI value 21 is formed.

  Next, a double-sided lapping step (S31: FIG. 15) is performed. Specifically, referring to FIG. 17, second intermediate substrate 12 is arranged in hole 32 formed in carrier 31. The size of the hole 32 is larger than the size of the second intermediate substrate 12. Referring to FIG. 16, the second intermediate substrate 12 disposed in the hole 32 of the carrier 31 is disposed between the upper surface plate 51 and the lower surface plate 52. The upper surface plate 51 rotates, for example, clockwise, and the lower surface plate 52, for example, rotates counterclockwise, whereby the first main surface 12A and the second main surface 12B of the second intermediate substrate 12 are polished simultaneously. The

  In the present embodiment, since the substrate etching step (S21: FIG. 15) is performed before the double-sided lapping step (S31: FIG. 15), the warpage of the second intermediate substrate 12 is reduced. ing. Therefore, it is possible to suppress the second intermediate substrate 12 from dropping from the hole 32 of the carrier 31.

  Next, a double-sided MP step (S41: FIG. 15) is performed. Specifically, the first main surface 12A and the second main surface 12B of the second intermediate substrate 12 are mechanically polished simultaneously. The abrasive grains and surface plate materials used in this step (S41: FIG. 15) are the abrasive grains and surface plate described in the second main surface MP step (S50: FIG. 6) in the first embodiment. This is the same as the material.

  As described above, the third intermediate substrate 13 having the third SORI value 23 smaller than the second SORI value 22 is obtained by polishing the second main surface 12B of the second intermediate substrate 12 (see FIG. 13). Is formed.

  Next, a double-side CMP process (S51: FIG. 15) is performed. Specifically, the first main surface 13A and the second main surface 13B of the third intermediate substrate 13 on which the double-sided MP step has been performed in the above step (S41: FIG. 15) are simultaneously subjected to chemical mechanical polishing. The abrasive grains and surface plate materials used in this step (S51: FIG. 15) are the abrasive grains and surface plate described in the second main surface CMP step (S60: FIG. 6) in the first embodiment. This is the same as the material.

  Next, a substrate cleaning step (S61: FIG. 15) is performed. This step (S61: FIG. 15) is the same as the substrate cleaning step (S110: FIG. 6) described in the first embodiment. Thus, silicon carbide substrate 10 having first main surface 10A and second main surface 10B facing each other is completed. In addition, surface roughness Rms of the surface (first main surface 10A) of silicon carbide substrate 10 manufactured by the manufacturing method according to Embodiment 2, surface roughness Rms of the back surface (second main surface 10B), SORI The value and the TTV value are the same as those of silicon carbide substrate 10 manufactured by the manufacturing method according to the first embodiment.

  In the method for manufacturing the silicon carbide substrate according to the second embodiment, the step of forming third intermediate substrate 13 includes polishing each of first main surface 12A and second main surface 12B of second intermediate substrate 12 simultaneously. Is done. Thereby, the curvature of silicon carbide substrate 10 can be reduced while shortening the manufacturing time of silicon carbide substrate 10.

  The embodiment disclosed this time is to be considered as illustrative in all points and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

  1 ingot, 3, 4, 7 position, 5 saw wire, 6 least square surface height, 8 stage, 10 silicon carbide substrate, 10A, 11A, 12A, 13A, 14A first main surface, 10B, 11B, 12B, 13B , 14B Second main surface, 11 First intermediate substrate, 12 Second intermediate substrate, 13 Third intermediate substrate, 14 Fourth intermediate substrate, 30 Adhesive, 31 Carrier, 32 holes, 50 Surface plate, 51 Upper surface plate , 52 Lower surface plate, Z Direction to slice.

Claims (8)

Slicing a silicon carbide ingot to form a first intermediate substrate having a first main surface and a second main surface facing each other and having a first SORI value;
Etching at least one of the first main surface and the second main surface of the first intermediate substrate forms a second intermediate substrate having a second SORI value smaller than the first SORI value. And a process of
A third intermediate substrate having a third SORI value smaller than the second SORI value is formed by polishing at least one of the first main surface and the second main surface of the second intermediate substrate. A method for manufacturing a silicon carbide substrate, comprising the step of:   The method for manufacturing a silicon carbide substrate according to claim 1, further comprising a step of performing a CMP process on each of the first main surface and the second main surface of the third intermediate substrate.   The carbonization according to claim 1 or 2, wherein the step of forming the third intermediate substrate is performed by simultaneously polishing each of the first main surface and the second main surface of the second intermediate substrate. A method for manufacturing a silicon substrate.   The step of forming the second intermediate substrate includes a step of performing wet etching using potassium hydroxide on at least one of the first main surface and the second main surface of the first intermediate substrate. The manufacturing method of the silicon carbide substrate of any one of 1-3.   The step of forming the second intermediate substrate includes a step of performing dry etching using chlorine gas or fluorine gas on at least one of the first main surface and the second main surface of the first intermediate substrate. The manufacturing method of the silicon carbide substrate of any one of Claims 1-3.   The step of forming the second intermediate substrate is performed by etching each of the first main surface and the second main surface of the first intermediate substrate. The manufacturing method of the silicon carbide substrate as described in any one of.   7. The method according to claim 1, wherein in the step of forming the second intermediate substrate, the first intermediate substrate is etched so as to reduce a SORI value in a direction perpendicular to a direction of slicing the ingot. The manufacturing method of the silicon carbide substrate of description. A first main surface and a second main surface facing each other;
The surface roughness Rms of the first main surface is 0.2 nm or less,
The surface roughness Rms of the second main surface is less than 10 nm,
A silicon carbide substrate having a diameter of 4 inches or more and having a SORI value of 23 μm or less and a TTV value of 3 μm or less.

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